linux/drivers/net/wireless/ath/ath9k/main.c
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   1/*
   2 * Copyright (c) 2008-2011 Atheros Communications Inc.
   3 *
   4 * Permission to use, copy, modify, and/or distribute this software for any
   5 * purpose with or without fee is hereby granted, provided that the above
   6 * copyright notice and this permission notice appear in all copies.
   7 *
   8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15 */
  16
  17#include <linux/nl80211.h>
  18#include <linux/delay.h>
  19#include "ath9k.h"
  20#include "btcoex.h"
  21
  22static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  23                        u32 queues, bool drop);
  24
  25u8 ath9k_parse_mpdudensity(u8 mpdudensity)
  26{
  27        /*
  28         * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  29         *   0 for no restriction
  30         *   1 for 1/4 us
  31         *   2 for 1/2 us
  32         *   3 for 1 us
  33         *   4 for 2 us
  34         *   5 for 4 us
  35         *   6 for 8 us
  36         *   7 for 16 us
  37         */
  38        switch (mpdudensity) {
  39        case 0:
  40                return 0;
  41        case 1:
  42        case 2:
  43        case 3:
  44                /* Our lower layer calculations limit our precision to
  45                   1 microsecond */
  46                return 1;
  47        case 4:
  48                return 2;
  49        case 5:
  50                return 4;
  51        case 6:
  52                return 8;
  53        case 7:
  54                return 16;
  55        default:
  56                return 0;
  57        }
  58}
  59
  60static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
  61                                     bool sw_pending)
  62{
  63        bool pending = false;
  64
  65        spin_lock_bh(&txq->axq_lock);
  66
  67        if (txq->axq_depth) {
  68                pending = true;
  69                goto out;
  70        }
  71
  72        if (!sw_pending)
  73                goto out;
  74
  75        if (txq->mac80211_qnum >= 0) {
  76                struct ath_acq *acq;
  77
  78                acq = &sc->cur_chan->acq[txq->mac80211_qnum];
  79                if (!list_empty(&acq->acq_new) || !list_empty(&acq->acq_old))
  80                        pending = true;
  81        }
  82out:
  83        spin_unlock_bh(&txq->axq_lock);
  84        return pending;
  85}
  86
  87static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  88{
  89        unsigned long flags;
  90        bool ret;
  91
  92        spin_lock_irqsave(&sc->sc_pm_lock, flags);
  93        ret = ath9k_hw_setpower(sc->sc_ah, mode);
  94        spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  95
  96        return ret;
  97}
  98
  99void ath_ps_full_sleep(struct timer_list *t)
 100{
 101        struct ath_softc *sc = from_timer(sc, t, sleep_timer);
 102        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 103        unsigned long flags;
 104        bool reset;
 105
 106        spin_lock_irqsave(&common->cc_lock, flags);
 107        ath_hw_cycle_counters_update(common);
 108        spin_unlock_irqrestore(&common->cc_lock, flags);
 109
 110        ath9k_hw_setrxabort(sc->sc_ah, 1);
 111        ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
 112
 113        ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 114}
 115
 116void ath9k_ps_wakeup(struct ath_softc *sc)
 117{
 118        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 119        unsigned long flags;
 120        enum ath9k_power_mode power_mode;
 121
 122        spin_lock_irqsave(&sc->sc_pm_lock, flags);
 123        if (++sc->ps_usecount != 1)
 124                goto unlock;
 125
 126        del_timer_sync(&sc->sleep_timer);
 127        power_mode = sc->sc_ah->power_mode;
 128        ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 129
 130        /*
 131         * While the hardware is asleep, the cycle counters contain no
 132         * useful data. Better clear them now so that they don't mess up
 133         * survey data results.
 134         */
 135        if (power_mode != ATH9K_PM_AWAKE) {
 136                spin_lock(&common->cc_lock);
 137                ath_hw_cycle_counters_update(common);
 138                memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 139                memset(&common->cc_ani, 0, sizeof(common->cc_ani));
 140                spin_unlock(&common->cc_lock);
 141        }
 142
 143 unlock:
 144        spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 145}
 146
 147void ath9k_ps_restore(struct ath_softc *sc)
 148{
 149        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 150        enum ath9k_power_mode mode;
 151        unsigned long flags;
 152
 153        spin_lock_irqsave(&sc->sc_pm_lock, flags);
 154        if (--sc->ps_usecount != 0)
 155                goto unlock;
 156
 157        if (sc->ps_idle) {
 158                mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
 159                goto unlock;
 160        }
 161
 162        if (sc->ps_enabled &&
 163                   !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 164                                     PS_WAIT_FOR_CAB |
 165                                     PS_WAIT_FOR_PSPOLL_DATA |
 166                                     PS_WAIT_FOR_TX_ACK |
 167                                     PS_WAIT_FOR_ANI))) {
 168                mode = ATH9K_PM_NETWORK_SLEEP;
 169                if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
 170                        ath9k_btcoex_stop_gen_timer(sc);
 171        } else {
 172                goto unlock;
 173        }
 174
 175        spin_lock(&common->cc_lock);
 176        ath_hw_cycle_counters_update(common);
 177        spin_unlock(&common->cc_lock);
 178
 179        ath9k_hw_setpower(sc->sc_ah, mode);
 180
 181 unlock:
 182        spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 183}
 184
 185static void __ath_cancel_work(struct ath_softc *sc)
 186{
 187        cancel_work_sync(&sc->paprd_work);
 188        cancel_delayed_work_sync(&sc->hw_check_work);
 189        cancel_delayed_work_sync(&sc->hw_pll_work);
 190
 191#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 192        if (ath9k_hw_mci_is_enabled(sc->sc_ah))
 193                cancel_work_sync(&sc->mci_work);
 194#endif
 195}
 196
 197void ath_cancel_work(struct ath_softc *sc)
 198{
 199        __ath_cancel_work(sc);
 200        cancel_work_sync(&sc->hw_reset_work);
 201}
 202
 203void ath_restart_work(struct ath_softc *sc)
 204{
 205        ieee80211_queue_delayed_work(sc->hw, &sc->hw_check_work,
 206                                     ATH_HW_CHECK_POLL_INT);
 207
 208        if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
 209                ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
 210                                     msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
 211
 212        ath_start_ani(sc);
 213}
 214
 215static bool ath_prepare_reset(struct ath_softc *sc)
 216{
 217        struct ath_hw *ah = sc->sc_ah;
 218        bool ret = true;
 219
 220        ieee80211_stop_queues(sc->hw);
 221        ath_stop_ani(sc);
 222        ath9k_hw_disable_interrupts(ah);
 223
 224        if (AR_SREV_9300_20_OR_LATER(ah)) {
 225                ret &= ath_stoprecv(sc);
 226                ret &= ath_drain_all_txq(sc);
 227        } else {
 228                ret &= ath_drain_all_txq(sc);
 229                ret &= ath_stoprecv(sc);
 230        }
 231
 232        return ret;
 233}
 234
 235static bool ath_complete_reset(struct ath_softc *sc, bool start)
 236{
 237        struct ath_hw *ah = sc->sc_ah;
 238        struct ath_common *common = ath9k_hw_common(ah);
 239        unsigned long flags;
 240
 241        ath9k_calculate_summary_state(sc, sc->cur_chan);
 242        ath_startrecv(sc);
 243        ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
 244                               sc->cur_chan->txpower,
 245                               &sc->cur_chan->cur_txpower);
 246        clear_bit(ATH_OP_HW_RESET, &common->op_flags);
 247
 248        if (!sc->cur_chan->offchannel && start) {
 249                /* restore per chanctx TSF timer */
 250                if (sc->cur_chan->tsf_val) {
 251                        u32 offset;
 252
 253                        offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
 254                                                         NULL);
 255                        ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
 256                }
 257
 258
 259                if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
 260                        goto work;
 261
 262                if (ah->opmode == NL80211_IFTYPE_STATION &&
 263                    test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
 264                        spin_lock_irqsave(&sc->sc_pm_lock, flags);
 265                        sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
 266                        spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 267                } else {
 268                        ath9k_set_beacon(sc);
 269                }
 270        work:
 271                ath_restart_work(sc);
 272                ath_txq_schedule_all(sc);
 273        }
 274
 275        sc->gtt_cnt = 0;
 276
 277        ath9k_hw_set_interrupts(ah);
 278        ath9k_hw_enable_interrupts(ah);
 279        ieee80211_wake_queues(sc->hw);
 280        ath9k_p2p_ps_timer(sc);
 281
 282        return true;
 283}
 284
 285static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 286{
 287        struct ath_hw *ah = sc->sc_ah;
 288        struct ath_common *common = ath9k_hw_common(ah);
 289        struct ath9k_hw_cal_data *caldata = NULL;
 290        bool fastcc = true;
 291        int r;
 292
 293        __ath_cancel_work(sc);
 294
 295        disable_irq(sc->irq);
 296        tasklet_disable(&sc->intr_tq);
 297        tasklet_disable(&sc->bcon_tasklet);
 298        spin_lock_bh(&sc->sc_pcu_lock);
 299
 300        if (!sc->cur_chan->offchannel) {
 301                fastcc = false;
 302                caldata = &sc->cur_chan->caldata;
 303        }
 304
 305        if (!hchan) {
 306                fastcc = false;
 307                hchan = ah->curchan;
 308        }
 309
 310        if (!hchan) {
 311                fastcc = false;
 312                hchan = ath9k_cmn_get_channel(sc->hw, ah, &sc->cur_chan->chandef);
 313        }
 314
 315        if (!ath_prepare_reset(sc))
 316                fastcc = false;
 317
 318        if (ath9k_is_chanctx_enabled())
 319                fastcc = false;
 320
 321        spin_lock_bh(&sc->chan_lock);
 322        sc->cur_chandef = sc->cur_chan->chandef;
 323        spin_unlock_bh(&sc->chan_lock);
 324
 325        ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 326                hchan->channel, IS_CHAN_HT40(hchan), fastcc);
 327
 328        r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 329        if (r) {
 330                ath_err(common,
 331                        "Unable to reset channel, reset status %d\n", r);
 332
 333                ath9k_hw_enable_interrupts(ah);
 334                ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
 335
 336                goto out;
 337        }
 338
 339        if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
 340            sc->cur_chan->offchannel)
 341                ath9k_mci_set_txpower(sc, true, false);
 342
 343        if (!ath_complete_reset(sc, true))
 344                r = -EIO;
 345
 346out:
 347        enable_irq(sc->irq);
 348        spin_unlock_bh(&sc->sc_pcu_lock);
 349        tasklet_enable(&sc->bcon_tasklet);
 350        tasklet_enable(&sc->intr_tq);
 351
 352        return r;
 353}
 354
 355static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
 356                            struct ieee80211_vif *vif)
 357{
 358        struct ath_node *an;
 359        an = (struct ath_node *)sta->drv_priv;
 360
 361        an->sc = sc;
 362        an->sta = sta;
 363        an->vif = vif;
 364        memset(&an->key_idx, 0, sizeof(an->key_idx));
 365
 366        ath_tx_node_init(sc, an);
 367
 368        ath_dynack_node_init(sc->sc_ah, an);
 369}
 370
 371static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 372{
 373        struct ath_node *an = (struct ath_node *)sta->drv_priv;
 374        ath_tx_node_cleanup(sc, an);
 375
 376        ath_dynack_node_deinit(sc->sc_ah, an);
 377}
 378
 379void ath9k_tasklet(struct tasklet_struct *t)
 380{
 381        struct ath_softc *sc = from_tasklet(sc, t, intr_tq);
 382        struct ath_hw *ah = sc->sc_ah;
 383        struct ath_common *common = ath9k_hw_common(ah);
 384        enum ath_reset_type type;
 385        unsigned long flags;
 386        u32 status;
 387        u32 rxmask;
 388
 389        spin_lock_irqsave(&sc->intr_lock, flags);
 390        status = sc->intrstatus;
 391        sc->intrstatus = 0;
 392        spin_unlock_irqrestore(&sc->intr_lock, flags);
 393
 394        ath9k_ps_wakeup(sc);
 395        spin_lock(&sc->sc_pcu_lock);
 396
 397        if (status & ATH9K_INT_FATAL) {
 398                type = RESET_TYPE_FATAL_INT;
 399                ath9k_queue_reset(sc, type);
 400                ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
 401                goto out;
 402        }
 403
 404        if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 405            (status & ATH9K_INT_BB_WATCHDOG)) {
 406                spin_lock_irqsave(&common->cc_lock, flags);
 407                ath_hw_cycle_counters_update(common);
 408                ar9003_hw_bb_watchdog_dbg_info(ah);
 409                spin_unlock_irqrestore(&common->cc_lock, flags);
 410
 411                if (ar9003_hw_bb_watchdog_check(ah)) {
 412                        type = RESET_TYPE_BB_WATCHDOG;
 413                        ath9k_queue_reset(sc, type);
 414
 415                        ath_dbg(common, RESET,
 416                                "BB_WATCHDOG: Skipping interrupts\n");
 417                        goto out;
 418                }
 419        }
 420
 421        if (status & ATH9K_INT_GTT) {
 422                sc->gtt_cnt++;
 423
 424                if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
 425                        type = RESET_TYPE_TX_GTT;
 426                        ath9k_queue_reset(sc, type);
 427                        ath_dbg(common, RESET,
 428                                "GTT: Skipping interrupts\n");
 429                        goto out;
 430                }
 431        }
 432
 433        spin_lock_irqsave(&sc->sc_pm_lock, flags);
 434        if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 435                /*
 436                 * TSF sync does not look correct; remain awake to sync with
 437                 * the next Beacon.
 438                 */
 439                ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
 440                sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 441        }
 442        spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 443
 444        if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 445                rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 446                          ATH9K_INT_RXORN);
 447        else
 448                rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 449
 450        if (status & rxmask) {
 451                /* Check for high priority Rx first */
 452                if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 453                    (status & ATH9K_INT_RXHP))
 454                        ath_rx_tasklet(sc, 0, true);
 455
 456                ath_rx_tasklet(sc, 0, false);
 457        }
 458
 459        if (status & ATH9K_INT_TX) {
 460                if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 461                        /*
 462                         * For EDMA chips, TX completion is enabled for the
 463                         * beacon queue, so if a beacon has been transmitted
 464                         * successfully after a GTT interrupt, the GTT counter
 465                         * gets reset to zero here.
 466                         */
 467                        sc->gtt_cnt = 0;
 468
 469                        ath_tx_edma_tasklet(sc);
 470                } else {
 471                        ath_tx_tasklet(sc);
 472                }
 473
 474                wake_up(&sc->tx_wait);
 475        }
 476
 477        if (status & ATH9K_INT_GENTIMER)
 478                ath_gen_timer_isr(sc->sc_ah);
 479
 480        ath9k_btcoex_handle_interrupt(sc, status);
 481
 482        /* re-enable hardware interrupt */
 483        ath9k_hw_resume_interrupts(ah);
 484out:
 485        spin_unlock(&sc->sc_pcu_lock);
 486        ath9k_ps_restore(sc);
 487}
 488
 489irqreturn_t ath_isr(int irq, void *dev)
 490{
 491#define SCHED_INTR (                            \
 492                ATH9K_INT_FATAL |               \
 493                ATH9K_INT_BB_WATCHDOG |         \
 494                ATH9K_INT_RXORN |               \
 495                ATH9K_INT_RXEOL |               \
 496                ATH9K_INT_RX |                  \
 497                ATH9K_INT_RXLP |                \
 498                ATH9K_INT_RXHP |                \
 499                ATH9K_INT_TX |                  \
 500                ATH9K_INT_BMISS |               \
 501                ATH9K_INT_CST |                 \
 502                ATH9K_INT_GTT |                 \
 503                ATH9K_INT_TSFOOR |              \
 504                ATH9K_INT_GENTIMER |            \
 505                ATH9K_INT_MCI)
 506
 507        struct ath_softc *sc = dev;
 508        struct ath_hw *ah = sc->sc_ah;
 509        struct ath_common *common = ath9k_hw_common(ah);
 510        enum ath9k_int status;
 511        u32 sync_cause = 0;
 512        bool sched = false;
 513
 514        /*
 515         * The hardware is not ready/present, don't
 516         * touch anything. Note this can happen early
 517         * on if the IRQ is shared.
 518         */
 519        if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
 520                return IRQ_NONE;
 521
 522        /* shared irq, not for us */
 523        if (!ath9k_hw_intrpend(ah))
 524                return IRQ_NONE;
 525
 526        /*
 527         * Figure out the reason(s) for the interrupt.  Note
 528         * that the hal returns a pseudo-ISR that may include
 529         * bits we haven't explicitly enabled so we mask the
 530         * value to insure we only process bits we requested.
 531         */
 532        ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
 533        ath9k_debug_sync_cause(sc, sync_cause);
 534        status &= ah->imask;    /* discard unasked-for bits */
 535
 536        if (test_bit(ATH_OP_HW_RESET, &common->op_flags))
 537                return IRQ_HANDLED;
 538
 539        /*
 540         * If there are no status bits set, then this interrupt was not
 541         * for me (should have been caught above).
 542         */
 543        if (!status)
 544                return IRQ_NONE;
 545
 546        /* Cache the status */
 547        spin_lock(&sc->intr_lock);
 548        sc->intrstatus |= status;
 549        spin_unlock(&sc->intr_lock);
 550
 551        if (status & SCHED_INTR)
 552                sched = true;
 553
 554        /*
 555         * If a FATAL interrupt is received, we have to reset the chip
 556         * immediately.
 557         */
 558        if (status & ATH9K_INT_FATAL)
 559                goto chip_reset;
 560
 561        if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 562            (status & ATH9K_INT_BB_WATCHDOG))
 563                goto chip_reset;
 564
 565        if (status & ATH9K_INT_SWBA)
 566                tasklet_schedule(&sc->bcon_tasklet);
 567
 568        if (status & ATH9K_INT_TXURN)
 569                ath9k_hw_updatetxtriglevel(ah, true);
 570
 571        if (status & ATH9K_INT_RXEOL) {
 572                ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 573                ath9k_hw_set_interrupts(ah);
 574        }
 575
 576        if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 577                if (status & ATH9K_INT_TIM_TIMER) {
 578                        if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 579                                goto chip_reset;
 580                        /* Clear RxAbort bit so that we can
 581                         * receive frames */
 582                        ath9k_setpower(sc, ATH9K_PM_AWAKE);
 583                        spin_lock(&sc->sc_pm_lock);
 584                        ath9k_hw_setrxabort(sc->sc_ah, 0);
 585                        sc->ps_flags |= PS_WAIT_FOR_BEACON;
 586                        spin_unlock(&sc->sc_pm_lock);
 587                }
 588
 589chip_reset:
 590
 591        ath_debug_stat_interrupt(sc, status);
 592
 593        if (sched) {
 594                /* turn off every interrupt */
 595                ath9k_hw_kill_interrupts(ah);
 596                tasklet_schedule(&sc->intr_tq);
 597        }
 598
 599        return IRQ_HANDLED;
 600
 601#undef SCHED_INTR
 602}
 603
 604/*
 605 * This function is called when a HW reset cannot be deferred
 606 * and has to be immediate.
 607 */
 608int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
 609{
 610        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 611        int r;
 612
 613        ath9k_hw_kill_interrupts(sc->sc_ah);
 614        set_bit(ATH_OP_HW_RESET, &common->op_flags);
 615
 616        ath9k_ps_wakeup(sc);
 617        r = ath_reset_internal(sc, hchan);
 618        ath9k_ps_restore(sc);
 619
 620        return r;
 621}
 622
 623/*
 624 * When a HW reset can be deferred, it is added to the
 625 * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
 626 * queueing.
 627 */
 628void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
 629{
 630        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 631#ifdef CONFIG_ATH9K_DEBUGFS
 632        RESET_STAT_INC(sc, type);
 633#endif
 634        ath9k_hw_kill_interrupts(sc->sc_ah);
 635        set_bit(ATH_OP_HW_RESET, &common->op_flags);
 636        ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 637}
 638
 639void ath_reset_work(struct work_struct *work)
 640{
 641        struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 642
 643        ath9k_ps_wakeup(sc);
 644        ath_reset_internal(sc, NULL);
 645        ath9k_ps_restore(sc);
 646}
 647
 648/**********************/
 649/* mac80211 callbacks */
 650/**********************/
 651
 652static int ath9k_start(struct ieee80211_hw *hw)
 653{
 654        struct ath_softc *sc = hw->priv;
 655        struct ath_hw *ah = sc->sc_ah;
 656        struct ath_common *common = ath9k_hw_common(ah);
 657        struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
 658        struct ath_chanctx *ctx = sc->cur_chan;
 659        struct ath9k_channel *init_channel;
 660        int r;
 661
 662        ath_dbg(common, CONFIG,
 663                "Starting driver with initial channel: %d MHz\n",
 664                curchan->center_freq);
 665
 666        ath9k_ps_wakeup(sc);
 667        mutex_lock(&sc->mutex);
 668
 669        init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
 670        sc->cur_chandef = hw->conf.chandef;
 671
 672        /* Reset SERDES registers */
 673        ath9k_hw_configpcipowersave(ah, false);
 674
 675        /*
 676         * The basic interface to setting the hardware in a good
 677         * state is ``reset''.  On return the hardware is known to
 678         * be powered up and with interrupts disabled.  This must
 679         * be followed by initialization of the appropriate bits
 680         * and then setup of the interrupt mask.
 681         */
 682        spin_lock_bh(&sc->sc_pcu_lock);
 683
 684        atomic_set(&ah->intr_ref_cnt, -1);
 685
 686        r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
 687        if (r) {
 688                ath_err(common,
 689                        "Unable to reset hardware; reset status %d (freq %u MHz)\n",
 690                        r, curchan->center_freq);
 691                ah->reset_power_on = false;
 692        }
 693
 694        /* Setup our intr mask. */
 695        ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 696                    ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 697                    ATH9K_INT_GLOBAL;
 698
 699        if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 700                ah->imask |= ATH9K_INT_RXHP |
 701                             ATH9K_INT_RXLP;
 702        else
 703                ah->imask |= ATH9K_INT_RX;
 704
 705        if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
 706                ah->imask |= ATH9K_INT_BB_WATCHDOG;
 707
 708        /*
 709         * Enable GTT interrupts only for AR9003/AR9004 chips
 710         * for now.
 711         */
 712        if (AR_SREV_9300_20_OR_LATER(ah))
 713                ah->imask |= ATH9K_INT_GTT;
 714
 715        if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
 716                ah->imask |= ATH9K_INT_CST;
 717
 718        ath_mci_enable(sc);
 719
 720        clear_bit(ATH_OP_INVALID, &common->op_flags);
 721        sc->sc_ah->is_monitoring = false;
 722
 723        if (!ath_complete_reset(sc, false))
 724                ah->reset_power_on = false;
 725
 726        if (ah->led_pin >= 0) {
 727                ath9k_hw_set_gpio(ah, ah->led_pin,
 728                                  (ah->config.led_active_high) ? 1 : 0);
 729                ath9k_hw_gpio_request_out(ah, ah->led_pin, NULL,
 730                                          AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 731        }
 732
 733        /*
 734         * Reset key cache to sane defaults (all entries cleared) instead of
 735         * semi-random values after suspend/resume.
 736         */
 737        ath9k_cmn_init_crypto(sc->sc_ah);
 738
 739        ath9k_hw_reset_tsf(ah);
 740
 741        spin_unlock_bh(&sc->sc_pcu_lock);
 742
 743        ath9k_rng_start(sc);
 744
 745        mutex_unlock(&sc->mutex);
 746
 747        ath9k_ps_restore(sc);
 748
 749        return 0;
 750}
 751
 752static void ath9k_tx(struct ieee80211_hw *hw,
 753                     struct ieee80211_tx_control *control,
 754                     struct sk_buff *skb)
 755{
 756        struct ath_softc *sc = hw->priv;
 757        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 758        struct ath_tx_control txctl;
 759        struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 760        unsigned long flags;
 761
 762        if (sc->ps_enabled) {
 763                /*
 764                 * mac80211 does not set PM field for normal data frames, so we
 765                 * need to update that based on the current PS mode.
 766                 */
 767                if (ieee80211_is_data(hdr->frame_control) &&
 768                    !ieee80211_is_nullfunc(hdr->frame_control) &&
 769                    !ieee80211_has_pm(hdr->frame_control)) {
 770                        ath_dbg(common, PS,
 771                                "Add PM=1 for a TX frame while in PS mode\n");
 772                        hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
 773                }
 774        }
 775
 776        if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
 777                /*
 778                 * We are using PS-Poll and mac80211 can request TX while in
 779                 * power save mode. Need to wake up hardware for the TX to be
 780                 * completed and if needed, also for RX of buffered frames.
 781                 */
 782                ath9k_ps_wakeup(sc);
 783                spin_lock_irqsave(&sc->sc_pm_lock, flags);
 784                if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 785                        ath9k_hw_setrxabort(sc->sc_ah, 0);
 786                if (ieee80211_is_pspoll(hdr->frame_control)) {
 787                        ath_dbg(common, PS,
 788                                "Sending PS-Poll to pick a buffered frame\n");
 789                        sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
 790                } else {
 791                        ath_dbg(common, PS, "Wake up to complete TX\n");
 792                        sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
 793                }
 794                /*
 795                 * The actual restore operation will happen only after
 796                 * the ps_flags bit is cleared. We are just dropping
 797                 * the ps_usecount here.
 798                 */
 799                spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 800                ath9k_ps_restore(sc);
 801        }
 802
 803        /*
 804         * Cannot tx while the hardware is in full sleep, it first needs a full
 805         * chip reset to recover from that
 806         */
 807        if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
 808                ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
 809                goto exit;
 810        }
 811
 812        memset(&txctl, 0, sizeof(struct ath_tx_control));
 813        txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
 814        txctl.sta = control->sta;
 815
 816        ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
 817
 818        if (ath_tx_start(hw, skb, &txctl) != 0) {
 819                ath_dbg(common, XMIT, "TX failed\n");
 820                TX_STAT_INC(sc, txctl.txq->axq_qnum, txfailed);
 821                goto exit;
 822        }
 823
 824        return;
 825exit:
 826        ieee80211_free_txskb(hw, skb);
 827}
 828
 829static bool ath9k_txq_list_has_key(struct list_head *txq_list, u32 keyix)
 830{
 831        struct ath_buf *bf;
 832        struct ieee80211_tx_info *txinfo;
 833        struct ath_frame_info *fi;
 834
 835        list_for_each_entry(bf, txq_list, list) {
 836                if (bf->bf_state.stale || !bf->bf_mpdu)
 837                        continue;
 838
 839                txinfo = IEEE80211_SKB_CB(bf->bf_mpdu);
 840                fi = (struct ath_frame_info *)&txinfo->rate_driver_data[0];
 841                if (fi->keyix == keyix)
 842                        return true;
 843        }
 844
 845        return false;
 846}
 847
 848static bool ath9k_txq_has_key(struct ath_softc *sc, u32 keyix)
 849{
 850        struct ath_hw *ah = sc->sc_ah;
 851        int i;
 852        struct ath_txq *txq;
 853        bool key_in_use = false;
 854
 855        for (i = 0; !key_in_use && i < ATH9K_NUM_TX_QUEUES; i++) {
 856                if (!ATH_TXQ_SETUP(sc, i))
 857                        continue;
 858                txq = &sc->tx.txq[i];
 859                if (!txq->axq_depth)
 860                        continue;
 861                if (!ath9k_hw_numtxpending(ah, txq->axq_qnum))
 862                        continue;
 863
 864                ath_txq_lock(sc, txq);
 865                key_in_use = ath9k_txq_list_has_key(&txq->axq_q, keyix);
 866                if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 867                        int idx = txq->txq_tailidx;
 868
 869                        while (!key_in_use &&
 870                               !list_empty(&txq->txq_fifo[idx])) {
 871                                key_in_use = ath9k_txq_list_has_key(
 872                                        &txq->txq_fifo[idx], keyix);
 873                                INCR(idx, ATH_TXFIFO_DEPTH);
 874                        }
 875                }
 876                ath_txq_unlock(sc, txq);
 877        }
 878
 879        return key_in_use;
 880}
 881
 882static void ath9k_pending_key_del(struct ath_softc *sc, u8 keyix)
 883{
 884        struct ath_hw *ah = sc->sc_ah;
 885        struct ath_common *common = ath9k_hw_common(ah);
 886
 887        if (!test_bit(keyix, ah->pending_del_keymap) ||
 888            ath9k_txq_has_key(sc, keyix))
 889                return;
 890
 891        /* No more TXQ frames point to this key cache entry, so delete it. */
 892        clear_bit(keyix, ah->pending_del_keymap);
 893        ath_key_delete(common, keyix);
 894}
 895
 896static void ath9k_stop(struct ieee80211_hw *hw)
 897{
 898        struct ath_softc *sc = hw->priv;
 899        struct ath_hw *ah = sc->sc_ah;
 900        struct ath_common *common = ath9k_hw_common(ah);
 901        bool prev_idle;
 902        int i;
 903
 904        ath9k_deinit_channel_context(sc);
 905
 906        mutex_lock(&sc->mutex);
 907
 908        ath9k_rng_stop(sc);
 909
 910        ath_cancel_work(sc);
 911
 912        if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
 913                ath_dbg(common, ANY, "Device not present\n");
 914                mutex_unlock(&sc->mutex);
 915                return;
 916        }
 917
 918        /* Ensure HW is awake when we try to shut it down. */
 919        ath9k_ps_wakeup(sc);
 920
 921        spin_lock_bh(&sc->sc_pcu_lock);
 922
 923        /* prevent tasklets to enable interrupts once we disable them */
 924        ah->imask &= ~ATH9K_INT_GLOBAL;
 925
 926        /* make sure h/w will not generate any interrupt
 927         * before setting the invalid flag. */
 928        ath9k_hw_disable_interrupts(ah);
 929
 930        spin_unlock_bh(&sc->sc_pcu_lock);
 931
 932        /* we can now sync irq and kill any running tasklets, since we already
 933         * disabled interrupts and not holding a spin lock */
 934        synchronize_irq(sc->irq);
 935        tasklet_kill(&sc->intr_tq);
 936        tasklet_kill(&sc->bcon_tasklet);
 937
 938        prev_idle = sc->ps_idle;
 939        sc->ps_idle = true;
 940
 941        spin_lock_bh(&sc->sc_pcu_lock);
 942
 943        if (ah->led_pin >= 0) {
 944                ath9k_hw_set_gpio(ah, ah->led_pin,
 945                                  (ah->config.led_active_high) ? 0 : 1);
 946                ath9k_hw_gpio_request_in(ah, ah->led_pin, NULL);
 947        }
 948
 949        ath_prepare_reset(sc);
 950
 951        if (sc->rx.frag) {
 952                dev_kfree_skb_any(sc->rx.frag);
 953                sc->rx.frag = NULL;
 954        }
 955
 956        if (!ah->curchan)
 957                ah->curchan = ath9k_cmn_get_channel(hw, ah,
 958                                                    &sc->cur_chan->chandef);
 959
 960        ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 961
 962        set_bit(ATH_OP_INVALID, &common->op_flags);
 963
 964        ath9k_hw_phy_disable(ah);
 965
 966        ath9k_hw_configpcipowersave(ah, true);
 967
 968        spin_unlock_bh(&sc->sc_pcu_lock);
 969
 970        for (i = 0; i < ATH_KEYMAX; i++)
 971                ath9k_pending_key_del(sc, i);
 972
 973        /* Clear key cache entries explicitly to get rid of any potentially
 974         * remaining keys.
 975         */
 976        ath9k_cmn_init_crypto(sc->sc_ah);
 977
 978        ath9k_ps_restore(sc);
 979
 980        sc->ps_idle = prev_idle;
 981
 982        mutex_unlock(&sc->mutex);
 983
 984        ath_dbg(common, CONFIG, "Driver halt\n");
 985}
 986
 987static bool ath9k_uses_beacons(int type)
 988{
 989        switch (type) {
 990        case NL80211_IFTYPE_AP:
 991        case NL80211_IFTYPE_ADHOC:
 992        case NL80211_IFTYPE_MESH_POINT:
 993                return true;
 994        default:
 995                return false;
 996        }
 997}
 998
 999static void ath9k_vif_iter_set_beacon(struct ath9k_vif_iter_data *iter_data,
1000                                      struct ieee80211_vif *vif)
1001{
1002        /* Use the first (configured) interface, but prefering AP interfaces. */
1003        if (!iter_data->primary_beacon_vif) {
1004                iter_data->primary_beacon_vif = vif;
1005        } else {
1006                if (iter_data->primary_beacon_vif->type != NL80211_IFTYPE_AP &&
1007                    vif->type == NL80211_IFTYPE_AP)
1008                        iter_data->primary_beacon_vif = vif;
1009        }
1010
1011        iter_data->beacons = true;
1012        iter_data->nbcnvifs += 1;
1013}
1014
1015static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
1016                           u8 *mac, struct ieee80211_vif *vif)
1017{
1018        struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1019        int i;
1020
1021        if (iter_data->has_hw_macaddr) {
1022                for (i = 0; i < ETH_ALEN; i++)
1023                        iter_data->mask[i] &=
1024                                ~(iter_data->hw_macaddr[i] ^ mac[i]);
1025        } else {
1026                memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
1027                iter_data->has_hw_macaddr = true;
1028        }
1029
1030        if (!vif->bss_conf.use_short_slot)
1031                iter_data->slottime = 20;
1032
1033        switch (vif->type) {
1034        case NL80211_IFTYPE_AP:
1035                iter_data->naps++;
1036                if (vif->bss_conf.enable_beacon)
1037                        ath9k_vif_iter_set_beacon(iter_data, vif);
1038                break;
1039        case NL80211_IFTYPE_STATION:
1040                iter_data->nstations++;
1041                if (avp->assoc && !iter_data->primary_sta)
1042                        iter_data->primary_sta = vif;
1043                break;
1044        case NL80211_IFTYPE_OCB:
1045                iter_data->nocbs++;
1046                break;
1047        case NL80211_IFTYPE_ADHOC:
1048                iter_data->nadhocs++;
1049                if (vif->bss_conf.enable_beacon)
1050                        ath9k_vif_iter_set_beacon(iter_data, vif);
1051                break;
1052        case NL80211_IFTYPE_MESH_POINT:
1053                iter_data->nmeshes++;
1054                if (vif->bss_conf.enable_beacon)
1055                        ath9k_vif_iter_set_beacon(iter_data, vif);
1056                break;
1057        default:
1058                break;
1059        }
1060}
1061
1062static void ath9k_update_bssid_mask(struct ath_softc *sc,
1063                                    struct ath_chanctx *ctx,
1064                                    struct ath9k_vif_iter_data *iter_data)
1065{
1066        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1067        struct ath_vif *avp;
1068        int i;
1069
1070        if (!ath9k_is_chanctx_enabled())
1071                return;
1072
1073        list_for_each_entry(avp, &ctx->vifs, list) {
1074                if (ctx->nvifs_assigned != 1)
1075                        continue;
1076
1077                if (!iter_data->has_hw_macaddr)
1078                        continue;
1079
1080                ether_addr_copy(common->curbssid, avp->bssid);
1081
1082                /* perm_addr will be used as the p2p device address. */
1083                for (i = 0; i < ETH_ALEN; i++)
1084                        iter_data->mask[i] &=
1085                                ~(iter_data->hw_macaddr[i] ^
1086                                  sc->hw->wiphy->perm_addr[i]);
1087        }
1088}
1089
1090/* Called with sc->mutex held. */
1091void ath9k_calculate_iter_data(struct ath_softc *sc,
1092                               struct ath_chanctx *ctx,
1093                               struct ath9k_vif_iter_data *iter_data)
1094{
1095        struct ath_vif *avp;
1096
1097        /*
1098         * The hardware will use primary station addr together with the
1099         * BSSID mask when matching addresses.
1100         */
1101        memset(iter_data, 0, sizeof(*iter_data));
1102        eth_broadcast_addr(iter_data->mask);
1103        iter_data->slottime = 9;
1104
1105        list_for_each_entry(avp, &ctx->vifs, list)
1106                ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1107
1108        ath9k_update_bssid_mask(sc, ctx, iter_data);
1109}
1110
1111static void ath9k_set_assoc_state(struct ath_softc *sc,
1112                                  struct ieee80211_vif *vif, bool changed)
1113{
1114        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1115        struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1116        unsigned long flags;
1117
1118        set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1119
1120        ether_addr_copy(common->curbssid, avp->bssid);
1121        common->curaid = avp->aid;
1122        ath9k_hw_write_associd(sc->sc_ah);
1123
1124        if (changed) {
1125                common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1126                sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1127
1128                spin_lock_irqsave(&sc->sc_pm_lock, flags);
1129                sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1130                spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1131        }
1132
1133        if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1134                ath9k_mci_update_wlan_channels(sc, false);
1135
1136        ath_dbg(common, CONFIG,
1137                "Primary Station interface: %pM, BSSID: %pM\n",
1138                vif->addr, common->curbssid);
1139}
1140
1141#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1142static void ath9k_set_offchannel_state(struct ath_softc *sc)
1143{
1144        struct ath_hw *ah = sc->sc_ah;
1145        struct ath_common *common = ath9k_hw_common(ah);
1146        struct ieee80211_vif *vif = NULL;
1147
1148        ath9k_ps_wakeup(sc);
1149
1150        if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1151                vif = sc->offchannel.scan_vif;
1152        else
1153                vif = sc->offchannel.roc_vif;
1154
1155        if (WARN_ON(!vif))
1156                goto exit;
1157
1158        eth_zero_addr(common->curbssid);
1159        eth_broadcast_addr(common->bssidmask);
1160        memcpy(common->macaddr, vif->addr, ETH_ALEN);
1161        common->curaid = 0;
1162        ah->opmode = vif->type;
1163        ah->imask &= ~ATH9K_INT_SWBA;
1164        ah->imask &= ~ATH9K_INT_TSFOOR;
1165        ah->slottime = 9;
1166
1167        ath_hw_setbssidmask(common);
1168        ath9k_hw_setopmode(ah);
1169        ath9k_hw_write_associd(sc->sc_ah);
1170        ath9k_hw_set_interrupts(ah);
1171        ath9k_hw_init_global_settings(ah);
1172
1173exit:
1174        ath9k_ps_restore(sc);
1175}
1176#endif
1177
1178/* Called with sc->mutex held. */
1179void ath9k_calculate_summary_state(struct ath_softc *sc,
1180                                   struct ath_chanctx *ctx)
1181{
1182        struct ath_hw *ah = sc->sc_ah;
1183        struct ath_common *common = ath9k_hw_common(ah);
1184        struct ath9k_vif_iter_data iter_data;
1185
1186        ath_chanctx_check_active(sc, ctx);
1187
1188        if (ctx != sc->cur_chan)
1189                return;
1190
1191#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1192        if (ctx == &sc->offchannel.chan)
1193                return ath9k_set_offchannel_state(sc);
1194#endif
1195
1196        ath9k_ps_wakeup(sc);
1197        ath9k_calculate_iter_data(sc, ctx, &iter_data);
1198
1199        if (iter_data.has_hw_macaddr)
1200                memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1201
1202        memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1203        ath_hw_setbssidmask(common);
1204
1205        if (iter_data.naps > 0) {
1206                ath9k_hw_set_tsfadjust(ah, true);
1207                ah->opmode = NL80211_IFTYPE_AP;
1208        } else {
1209                ath9k_hw_set_tsfadjust(ah, false);
1210                if (iter_data.beacons)
1211                        ath9k_beacon_ensure_primary_slot(sc);
1212
1213                if (iter_data.nmeshes)
1214                        ah->opmode = NL80211_IFTYPE_MESH_POINT;
1215                else if (iter_data.nocbs)
1216                        ah->opmode = NL80211_IFTYPE_OCB;
1217                else if (iter_data.nadhocs)
1218                        ah->opmode = NL80211_IFTYPE_ADHOC;
1219                else
1220                        ah->opmode = NL80211_IFTYPE_STATION;
1221        }
1222
1223        ath9k_hw_setopmode(ah);
1224
1225        ctx->switch_after_beacon = false;
1226        if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1227                ah->imask |= ATH9K_INT_TSFOOR;
1228        else {
1229                ah->imask &= ~ATH9K_INT_TSFOOR;
1230                if (iter_data.naps == 1 && iter_data.beacons)
1231                        ctx->switch_after_beacon = true;
1232        }
1233
1234        if (ah->opmode == NL80211_IFTYPE_STATION) {
1235                bool changed = (iter_data.primary_sta != ctx->primary_sta);
1236
1237                if (iter_data.primary_sta) {
1238                        iter_data.primary_beacon_vif = iter_data.primary_sta;
1239                        iter_data.beacons = true;
1240                        ath9k_set_assoc_state(sc, iter_data.primary_sta,
1241                                              changed);
1242                        ctx->primary_sta = iter_data.primary_sta;
1243                } else {
1244                        ctx->primary_sta = NULL;
1245                        eth_zero_addr(common->curbssid);
1246                        common->curaid = 0;
1247                        ath9k_hw_write_associd(sc->sc_ah);
1248                        if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1249                                ath9k_mci_update_wlan_channels(sc, true);
1250                }
1251        }
1252        sc->nbcnvifs = iter_data.nbcnvifs;
1253        ath9k_beacon_config(sc, iter_data.primary_beacon_vif,
1254                            iter_data.beacons);
1255        ath9k_hw_set_interrupts(ah);
1256
1257        if (ah->slottime != iter_data.slottime) {
1258                ah->slottime = iter_data.slottime;
1259                ath9k_hw_init_global_settings(ah);
1260        }
1261
1262        if (iter_data.primary_sta)
1263                set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1264        else
1265                clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1266
1267        ath_dbg(common, CONFIG,
1268                "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1269                common->macaddr, common->curbssid, common->bssidmask);
1270
1271        ath9k_ps_restore(sc);
1272}
1273
1274static void ath9k_tpc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1275{
1276        int *power = data;
1277
1278        if (vif->bss_conf.txpower == INT_MIN)
1279                return;
1280
1281        if (*power < vif->bss_conf.txpower)
1282                *power = vif->bss_conf.txpower;
1283}
1284
1285/* Called with sc->mutex held. */
1286void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif)
1287{
1288        int power;
1289        struct ath_hw *ah = sc->sc_ah;
1290        struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
1291
1292        ath9k_ps_wakeup(sc);
1293        if (ah->tpc_enabled) {
1294                power = (vif) ? vif->bss_conf.txpower : -1;
1295                ieee80211_iterate_active_interfaces_atomic(
1296                                sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1297                                ath9k_tpc_vif_iter, &power);
1298                if (power == -1)
1299                        power = sc->hw->conf.power_level;
1300        } else {
1301                power = sc->hw->conf.power_level;
1302        }
1303        sc->cur_chan->txpower = 2 * power;
1304        ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
1305        sc->cur_chan->cur_txpower = reg->max_power_level;
1306        ath9k_ps_restore(sc);
1307}
1308
1309static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1310                                   struct ieee80211_vif *vif)
1311{
1312        int i;
1313
1314        if (!ath9k_is_chanctx_enabled())
1315                return;
1316
1317        for (i = 0; i < IEEE80211_NUM_ACS; i++)
1318                vif->hw_queue[i] = i;
1319
1320        if (vif->type == NL80211_IFTYPE_AP ||
1321            vif->type == NL80211_IFTYPE_MESH_POINT)
1322                vif->cab_queue = hw->queues - 2;
1323        else
1324                vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1325}
1326
1327static int ath9k_add_interface(struct ieee80211_hw *hw,
1328                               struct ieee80211_vif *vif)
1329{
1330        struct ath_softc *sc = hw->priv;
1331        struct ath_hw *ah = sc->sc_ah;
1332        struct ath_common *common = ath9k_hw_common(ah);
1333        struct ath_vif *avp = (void *)vif->drv_priv;
1334        struct ath_node *an = &avp->mcast_node;
1335
1336        mutex_lock(&sc->mutex);
1337        if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1338                if (sc->cur_chan->nvifs >= 1) {
1339                        mutex_unlock(&sc->mutex);
1340                        return -EOPNOTSUPP;
1341                }
1342                sc->tx99_vif = vif;
1343        }
1344
1345        ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1346        sc->cur_chan->nvifs++;
1347
1348        if (vif->type == NL80211_IFTYPE_STATION && ath9k_is_chanctx_enabled())
1349                vif->driver_flags |= IEEE80211_VIF_GET_NOA_UPDATE;
1350
1351        if (ath9k_uses_beacons(vif->type))
1352                ath9k_beacon_assign_slot(sc, vif);
1353
1354        avp->vif = vif;
1355        if (!ath9k_is_chanctx_enabled()) {
1356                avp->chanctx = sc->cur_chan;
1357                list_add_tail(&avp->list, &avp->chanctx->vifs);
1358        }
1359
1360        ath9k_calculate_summary_state(sc, avp->chanctx);
1361
1362        ath9k_assign_hw_queues(hw, vif);
1363
1364        ath9k_set_txpower(sc, vif);
1365
1366        an->sc = sc;
1367        an->sta = NULL;
1368        an->vif = vif;
1369        an->no_ps_filter = true;
1370        ath_tx_node_init(sc, an);
1371
1372        mutex_unlock(&sc->mutex);
1373        return 0;
1374}
1375
1376static int ath9k_change_interface(struct ieee80211_hw *hw,
1377                                  struct ieee80211_vif *vif,
1378                                  enum nl80211_iftype new_type,
1379                                  bool p2p)
1380{
1381        struct ath_softc *sc = hw->priv;
1382        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1383        struct ath_vif *avp = (void *)vif->drv_priv;
1384
1385        mutex_lock(&sc->mutex);
1386
1387        if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1388                mutex_unlock(&sc->mutex);
1389                return -EOPNOTSUPP;
1390        }
1391
1392        ath_dbg(common, CONFIG, "Change Interface\n");
1393
1394        if (ath9k_uses_beacons(vif->type))
1395                ath9k_beacon_remove_slot(sc, vif);
1396
1397        vif->type = new_type;
1398        vif->p2p = p2p;
1399
1400        if (ath9k_uses_beacons(vif->type))
1401                ath9k_beacon_assign_slot(sc, vif);
1402
1403        ath9k_assign_hw_queues(hw, vif);
1404        ath9k_calculate_summary_state(sc, avp->chanctx);
1405
1406        ath9k_set_txpower(sc, vif);
1407
1408        mutex_unlock(&sc->mutex);
1409        return 0;
1410}
1411
1412static void ath9k_remove_interface(struct ieee80211_hw *hw,
1413                                   struct ieee80211_vif *vif)
1414{
1415        struct ath_softc *sc = hw->priv;
1416        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1417        struct ath_vif *avp = (void *)vif->drv_priv;
1418
1419        ath_dbg(common, CONFIG, "Detach Interface\n");
1420
1421        mutex_lock(&sc->mutex);
1422
1423        ath9k_p2p_remove_vif(sc, vif);
1424
1425        sc->cur_chan->nvifs--;
1426        sc->tx99_vif = NULL;
1427        if (!ath9k_is_chanctx_enabled())
1428                list_del(&avp->list);
1429
1430        if (ath9k_uses_beacons(vif->type))
1431                ath9k_beacon_remove_slot(sc, vif);
1432
1433        ath_tx_node_cleanup(sc, &avp->mcast_node);
1434
1435        ath9k_calculate_summary_state(sc, avp->chanctx);
1436
1437        ath9k_set_txpower(sc, NULL);
1438
1439        mutex_unlock(&sc->mutex);
1440}
1441
1442static void ath9k_enable_ps(struct ath_softc *sc)
1443{
1444        struct ath_hw *ah = sc->sc_ah;
1445        struct ath_common *common = ath9k_hw_common(ah);
1446
1447        if (IS_ENABLED(CONFIG_ATH9K_TX99))
1448                return;
1449
1450        sc->ps_enabled = true;
1451        if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1452                if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1453                        ah->imask |= ATH9K_INT_TIM_TIMER;
1454                        ath9k_hw_set_interrupts(ah);
1455                }
1456                ath9k_hw_setrxabort(ah, 1);
1457        }
1458        ath_dbg(common, PS, "PowerSave enabled\n");
1459}
1460
1461static void ath9k_disable_ps(struct ath_softc *sc)
1462{
1463        struct ath_hw *ah = sc->sc_ah;
1464        struct ath_common *common = ath9k_hw_common(ah);
1465
1466        if (IS_ENABLED(CONFIG_ATH9K_TX99))
1467                return;
1468
1469        sc->ps_enabled = false;
1470        ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1471        if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1472                ath9k_hw_setrxabort(ah, 0);
1473                sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1474                                  PS_WAIT_FOR_CAB |
1475                                  PS_WAIT_FOR_PSPOLL_DATA |
1476                                  PS_WAIT_FOR_TX_ACK);
1477                if (ah->imask & ATH9K_INT_TIM_TIMER) {
1478                        ah->imask &= ~ATH9K_INT_TIM_TIMER;
1479                        ath9k_hw_set_interrupts(ah);
1480                }
1481        }
1482        ath_dbg(common, PS, "PowerSave disabled\n");
1483}
1484
1485static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1486{
1487        struct ath_softc *sc = hw->priv;
1488        struct ath_hw *ah = sc->sc_ah;
1489        struct ath_common *common = ath9k_hw_common(ah);
1490        struct ieee80211_conf *conf = &hw->conf;
1491        struct ath_chanctx *ctx = sc->cur_chan;
1492
1493        ath9k_ps_wakeup(sc);
1494        mutex_lock(&sc->mutex);
1495
1496        if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1497                sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1498                if (sc->ps_idle) {
1499                        ath_cancel_work(sc);
1500                        ath9k_stop_btcoex(sc);
1501                } else {
1502                        ath9k_start_btcoex(sc);
1503                        /*
1504                         * The chip needs a reset to properly wake up from
1505                         * full sleep
1506                         */
1507                        ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1508                }
1509        }
1510
1511        /*
1512         * We just prepare to enable PS. We have to wait until our AP has
1513         * ACK'd our null data frame to disable RX otherwise we'll ignore
1514         * those ACKs and end up retransmitting the same null data frames.
1515         * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1516         */
1517        if (changed & IEEE80211_CONF_CHANGE_PS) {
1518                unsigned long flags;
1519                spin_lock_irqsave(&sc->sc_pm_lock, flags);
1520                if (conf->flags & IEEE80211_CONF_PS)
1521                        ath9k_enable_ps(sc);
1522                else
1523                        ath9k_disable_ps(sc);
1524                spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1525        }
1526
1527        if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1528                if (conf->flags & IEEE80211_CONF_MONITOR) {
1529                        ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1530                        sc->sc_ah->is_monitoring = true;
1531                } else {
1532                        ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1533                        sc->sc_ah->is_monitoring = false;
1534                }
1535        }
1536
1537        if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1538                ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1539                ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1540        }
1541
1542        if (changed & IEEE80211_CONF_CHANGE_POWER)
1543                ath9k_set_txpower(sc, NULL);
1544
1545        mutex_unlock(&sc->mutex);
1546        ath9k_ps_restore(sc);
1547
1548        return 0;
1549}
1550
1551#define SUPPORTED_FILTERS                       \
1552        (FIF_ALLMULTI |                         \
1553        FIF_CONTROL |                           \
1554        FIF_PSPOLL |                            \
1555        FIF_OTHER_BSS |                         \
1556        FIF_BCN_PRBRESP_PROMISC |               \
1557        FIF_PROBE_REQ |                         \
1558        FIF_MCAST_ACTION |                      \
1559        FIF_FCSFAIL)
1560
1561/* FIXME: sc->sc_full_reset ? */
1562static void ath9k_configure_filter(struct ieee80211_hw *hw,
1563                                   unsigned int changed_flags,
1564                                   unsigned int *total_flags,
1565                                   u64 multicast)
1566{
1567        struct ath_softc *sc = hw->priv;
1568        struct ath_chanctx *ctx;
1569        u32 rfilt;
1570
1571        changed_flags &= SUPPORTED_FILTERS;
1572        *total_flags &= SUPPORTED_FILTERS;
1573
1574        spin_lock_bh(&sc->chan_lock);
1575        ath_for_each_chanctx(sc, ctx)
1576                ctx->rxfilter = *total_flags;
1577#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1578        sc->offchannel.chan.rxfilter = *total_flags;
1579#endif
1580        spin_unlock_bh(&sc->chan_lock);
1581
1582        ath9k_ps_wakeup(sc);
1583        rfilt = ath_calcrxfilter(sc);
1584        ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1585        ath9k_ps_restore(sc);
1586
1587        ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1588                rfilt);
1589}
1590
1591static int ath9k_sta_add(struct ieee80211_hw *hw,
1592                         struct ieee80211_vif *vif,
1593                         struct ieee80211_sta *sta)
1594{
1595        struct ath_softc *sc = hw->priv;
1596        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1597        struct ath_node *an = (struct ath_node *) sta->drv_priv;
1598        struct ieee80211_key_conf ps_key = { };
1599        int key;
1600
1601        ath_node_attach(sc, sta, vif);
1602
1603        if (vif->type != NL80211_IFTYPE_AP &&
1604            vif->type != NL80211_IFTYPE_AP_VLAN)
1605                return 0;
1606
1607        key = ath_key_config(common, vif, sta, &ps_key);
1608        if (key > 0) {
1609                an->ps_key = key;
1610                an->key_idx[0] = key;
1611        }
1612
1613        return 0;
1614}
1615
1616static void ath9k_del_ps_key(struct ath_softc *sc,
1617                             struct ieee80211_vif *vif,
1618                             struct ieee80211_sta *sta)
1619{
1620        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1621        struct ath_node *an = (struct ath_node *) sta->drv_priv;
1622
1623        if (!an->ps_key)
1624            return;
1625
1626        ath_key_delete(common, an->ps_key);
1627        an->ps_key = 0;
1628        an->key_idx[0] = 0;
1629}
1630
1631static int ath9k_sta_remove(struct ieee80211_hw *hw,
1632                            struct ieee80211_vif *vif,
1633                            struct ieee80211_sta *sta)
1634{
1635        struct ath_softc *sc = hw->priv;
1636
1637        ath9k_del_ps_key(sc, vif, sta);
1638        ath_node_detach(sc, sta);
1639
1640        return 0;
1641}
1642
1643static int ath9k_sta_state(struct ieee80211_hw *hw,
1644                           struct ieee80211_vif *vif,
1645                           struct ieee80211_sta *sta,
1646                           enum ieee80211_sta_state old_state,
1647                           enum ieee80211_sta_state new_state)
1648{
1649        struct ath_softc *sc = hw->priv;
1650        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1651        int ret = 0;
1652
1653        if (old_state == IEEE80211_STA_NOTEXIST &&
1654            new_state == IEEE80211_STA_NONE) {
1655                ret = ath9k_sta_add(hw, vif, sta);
1656                ath_dbg(common, CONFIG,
1657                        "Add station: %pM\n", sta->addr);
1658        } else if (old_state == IEEE80211_STA_NONE &&
1659                   new_state == IEEE80211_STA_NOTEXIST) {
1660                ret = ath9k_sta_remove(hw, vif, sta);
1661                ath_dbg(common, CONFIG,
1662                        "Remove station: %pM\n", sta->addr);
1663        }
1664
1665        if (ath9k_is_chanctx_enabled()) {
1666                if (vif->type == NL80211_IFTYPE_STATION) {
1667                        if (old_state == IEEE80211_STA_ASSOC &&
1668                            new_state == IEEE80211_STA_AUTHORIZED)
1669                                ath_chanctx_event(sc, vif,
1670                                                  ATH_CHANCTX_EVENT_AUTHORIZED);
1671                }
1672        }
1673
1674        return ret;
1675}
1676
1677static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1678                                    struct ath_node *an,
1679                                    bool set)
1680{
1681        int i;
1682
1683        for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1684                if (!an->key_idx[i])
1685                        continue;
1686                ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1687        }
1688}
1689
1690static void ath9k_sta_notify(struct ieee80211_hw *hw,
1691                         struct ieee80211_vif *vif,
1692                         enum sta_notify_cmd cmd,
1693                         struct ieee80211_sta *sta)
1694{
1695        struct ath_softc *sc = hw->priv;
1696        struct ath_node *an = (struct ath_node *) sta->drv_priv;
1697
1698        switch (cmd) {
1699        case STA_NOTIFY_SLEEP:
1700                an->sleeping = true;
1701                ath_tx_aggr_sleep(sta, sc, an);
1702                ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1703                break;
1704        case STA_NOTIFY_AWAKE:
1705                ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1706                an->sleeping = false;
1707                ath_tx_aggr_wakeup(sc, an);
1708                break;
1709        }
1710}
1711
1712static int ath9k_conf_tx(struct ieee80211_hw *hw,
1713                         struct ieee80211_vif *vif, u16 queue,
1714                         const struct ieee80211_tx_queue_params *params)
1715{
1716        struct ath_softc *sc = hw->priv;
1717        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1718        struct ath_txq *txq;
1719        struct ath9k_tx_queue_info qi;
1720        int ret = 0;
1721
1722        if (queue >= IEEE80211_NUM_ACS)
1723                return 0;
1724
1725        txq = sc->tx.txq_map[queue];
1726
1727        ath9k_ps_wakeup(sc);
1728        mutex_lock(&sc->mutex);
1729
1730        memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1731
1732        qi.tqi_aifs = params->aifs;
1733        qi.tqi_cwmin = params->cw_min;
1734        qi.tqi_cwmax = params->cw_max;
1735        qi.tqi_burstTime = params->txop * 32;
1736
1737        ath_dbg(common, CONFIG,
1738                "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1739                queue, txq->axq_qnum, params->aifs, params->cw_min,
1740                params->cw_max, params->txop);
1741
1742        ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1743        ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1744        if (ret)
1745                ath_err(common, "TXQ Update failed\n");
1746
1747        mutex_unlock(&sc->mutex);
1748        ath9k_ps_restore(sc);
1749
1750        return ret;
1751}
1752
1753static int ath9k_set_key(struct ieee80211_hw *hw,
1754                         enum set_key_cmd cmd,
1755                         struct ieee80211_vif *vif,
1756                         struct ieee80211_sta *sta,
1757                         struct ieee80211_key_conf *key)
1758{
1759        struct ath_softc *sc = hw->priv;
1760        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1761        struct ath_node *an = NULL;
1762        int ret = 0, i;
1763
1764        if (ath9k_modparam_nohwcrypt)
1765                return -ENOSPC;
1766
1767        if ((vif->type == NL80211_IFTYPE_ADHOC ||
1768             vif->type == NL80211_IFTYPE_MESH_POINT) &&
1769            (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1770             key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1771            !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1772                /*
1773                 * For now, disable hw crypto for the RSN IBSS group keys. This
1774                 * could be optimized in the future to use a modified key cache
1775                 * design to support per-STA RX GTK, but until that gets
1776                 * implemented, use of software crypto for group addressed
1777                 * frames is a acceptable to allow RSN IBSS to be used.
1778                 */
1779                return -EOPNOTSUPP;
1780        }
1781
1782        /* There may be MPDUs queued for the outgoing PTK key. Flush queues to
1783         * make sure these are not send unencrypted or with a wrong (new) key
1784         */
1785        if (cmd == DISABLE_KEY && key->flags & IEEE80211_KEY_FLAG_PAIRWISE) {
1786                ieee80211_stop_queues(hw);
1787                ath9k_flush(hw, vif, 0, true);
1788                ieee80211_wake_queues(hw);
1789        }
1790
1791        mutex_lock(&sc->mutex);
1792        ath9k_ps_wakeup(sc);
1793        ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1794        if (sta)
1795                an = (struct ath_node *)sta->drv_priv;
1796
1797        /* Delete pending key cache entries if no more frames are pointing to
1798         * them in TXQs.
1799         */
1800        for (i = 0; i < ATH_KEYMAX; i++)
1801                ath9k_pending_key_del(sc, i);
1802
1803        switch (cmd) {
1804        case SET_KEY:
1805                if (sta)
1806                        ath9k_del_ps_key(sc, vif, sta);
1807
1808                key->hw_key_idx = 0;
1809                ret = ath_key_config(common, vif, sta, key);
1810                if (ret >= 0) {
1811                        key->hw_key_idx = ret;
1812                        /* push IV and Michael MIC generation to stack */
1813                        key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1814                        if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1815                                key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1816                        if (sc->sc_ah->sw_mgmt_crypto_tx &&
1817                            key->cipher == WLAN_CIPHER_SUITE_CCMP)
1818                                key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1819                        ret = 0;
1820                }
1821                if (an && key->hw_key_idx) {
1822                        for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1823                                if (an->key_idx[i])
1824                                        continue;
1825                                an->key_idx[i] = key->hw_key_idx;
1826                                break;
1827                        }
1828                        WARN_ON(i == ARRAY_SIZE(an->key_idx));
1829                }
1830                break;
1831        case DISABLE_KEY:
1832                if (ath9k_txq_has_key(sc, key->hw_key_idx)) {
1833                        /* Delay key cache entry deletion until there are no
1834                         * remaining TXQ frames pointing to this entry.
1835                         */
1836                        set_bit(key->hw_key_idx, sc->sc_ah->pending_del_keymap);
1837                        ath_hw_keysetmac(common, key->hw_key_idx, NULL);
1838                } else {
1839                        ath_key_delete(common, key->hw_key_idx);
1840                }
1841                if (an) {
1842                        for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1843                                if (an->key_idx[i] != key->hw_key_idx)
1844                                        continue;
1845                                an->key_idx[i] = 0;
1846                                break;
1847                        }
1848                }
1849                key->hw_key_idx = 0;
1850                break;
1851        default:
1852                ret = -EINVAL;
1853        }
1854
1855        ath9k_ps_restore(sc);
1856        mutex_unlock(&sc->mutex);
1857
1858        return ret;
1859}
1860
1861static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1862                                   struct ieee80211_vif *vif,
1863                                   struct ieee80211_bss_conf *bss_conf,
1864                                   u32 changed)
1865{
1866#define CHECK_ANI                               \
1867        (BSS_CHANGED_ASSOC |                    \
1868         BSS_CHANGED_IBSS |                     \
1869         BSS_CHANGED_BEACON_ENABLED)
1870
1871        struct ath_softc *sc = hw->priv;
1872        struct ath_hw *ah = sc->sc_ah;
1873        struct ath_common *common = ath9k_hw_common(ah);
1874        struct ath_vif *avp = (void *)vif->drv_priv;
1875        int slottime;
1876
1877        ath9k_ps_wakeup(sc);
1878        mutex_lock(&sc->mutex);
1879
1880        if (changed & BSS_CHANGED_ASSOC) {
1881                ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1882                        bss_conf->bssid, bss_conf->assoc);
1883
1884                memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1885                avp->aid = bss_conf->aid;
1886                avp->assoc = bss_conf->assoc;
1887
1888                ath9k_calculate_summary_state(sc, avp->chanctx);
1889        }
1890
1891        if ((changed & BSS_CHANGED_IBSS) ||
1892              (changed & BSS_CHANGED_OCB)) {
1893                memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1894                common->curaid = bss_conf->aid;
1895                ath9k_hw_write_associd(sc->sc_ah);
1896        }
1897
1898        if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1899            (changed & BSS_CHANGED_BEACON_INT) ||
1900            (changed & BSS_CHANGED_BEACON_INFO)) {
1901                ath9k_calculate_summary_state(sc, avp->chanctx);
1902        }
1903
1904        if ((avp->chanctx == sc->cur_chan) &&
1905            (changed & BSS_CHANGED_ERP_SLOT)) {
1906                if (bss_conf->use_short_slot)
1907                        slottime = 9;
1908                else
1909                        slottime = 20;
1910
1911                if (vif->type == NL80211_IFTYPE_AP) {
1912                        /*
1913                         * Defer update, so that connected stations can adjust
1914                         * their settings at the same time.
1915                         * See beacon.c for more details
1916                         */
1917                        sc->beacon.slottime = slottime;
1918                        sc->beacon.updateslot = UPDATE;
1919                } else {
1920                        ah->slottime = slottime;
1921                        ath9k_hw_init_global_settings(ah);
1922                }
1923        }
1924
1925        if (changed & BSS_CHANGED_P2P_PS)
1926                ath9k_p2p_bss_info_changed(sc, vif);
1927
1928        if (changed & CHECK_ANI)
1929                ath_check_ani(sc);
1930
1931        if (changed & BSS_CHANGED_TXPOWER) {
1932                ath_dbg(common, CONFIG, "vif %pM power %d dbm power_type %d\n",
1933                        vif->addr, bss_conf->txpower, bss_conf->txpower_type);
1934                ath9k_set_txpower(sc, vif);
1935        }
1936
1937        mutex_unlock(&sc->mutex);
1938        ath9k_ps_restore(sc);
1939
1940#undef CHECK_ANI
1941}
1942
1943static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1944{
1945        struct ath_softc *sc = hw->priv;
1946        struct ath_vif *avp = (void *)vif->drv_priv;
1947        u64 tsf;
1948
1949        mutex_lock(&sc->mutex);
1950        ath9k_ps_wakeup(sc);
1951        /* Get current TSF either from HW or kernel time. */
1952        if (sc->cur_chan == avp->chanctx) {
1953                tsf = ath9k_hw_gettsf64(sc->sc_ah);
1954        } else {
1955                tsf = sc->cur_chan->tsf_val +
1956                      ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts, NULL);
1957        }
1958        tsf += le64_to_cpu(avp->tsf_adjust);
1959        ath9k_ps_restore(sc);
1960        mutex_unlock(&sc->mutex);
1961
1962        return tsf;
1963}
1964
1965static void ath9k_set_tsf(struct ieee80211_hw *hw,
1966                          struct ieee80211_vif *vif,
1967                          u64 tsf)
1968{
1969        struct ath_softc *sc = hw->priv;
1970        struct ath_vif *avp = (void *)vif->drv_priv;
1971
1972        mutex_lock(&sc->mutex);
1973        ath9k_ps_wakeup(sc);
1974        tsf -= le64_to_cpu(avp->tsf_adjust);
1975        ktime_get_raw_ts64(&avp->chanctx->tsf_ts);
1976        if (sc->cur_chan == avp->chanctx)
1977                ath9k_hw_settsf64(sc->sc_ah, tsf);
1978        avp->chanctx->tsf_val = tsf;
1979        ath9k_ps_restore(sc);
1980        mutex_unlock(&sc->mutex);
1981}
1982
1983static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1984{
1985        struct ath_softc *sc = hw->priv;
1986        struct ath_vif *avp = (void *)vif->drv_priv;
1987
1988        mutex_lock(&sc->mutex);
1989
1990        ath9k_ps_wakeup(sc);
1991        ktime_get_raw_ts64(&avp->chanctx->tsf_ts);
1992        if (sc->cur_chan == avp->chanctx)
1993                ath9k_hw_reset_tsf(sc->sc_ah);
1994        avp->chanctx->tsf_val = 0;
1995        ath9k_ps_restore(sc);
1996
1997        mutex_unlock(&sc->mutex);
1998}
1999
2000static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2001                              struct ieee80211_vif *vif,
2002                              struct ieee80211_ampdu_params *params)
2003{
2004        struct ath_softc *sc = hw->priv;
2005        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2006        bool flush = false;
2007        int ret = 0;
2008        struct ieee80211_sta *sta = params->sta;
2009        struct ath_node *an = (struct ath_node *)sta->drv_priv;
2010        enum ieee80211_ampdu_mlme_action action = params->action;
2011        u16 tid = params->tid;
2012        u16 *ssn = &params->ssn;
2013        struct ath_atx_tid *atid;
2014
2015        mutex_lock(&sc->mutex);
2016
2017        switch (action) {
2018        case IEEE80211_AMPDU_RX_START:
2019                break;
2020        case IEEE80211_AMPDU_RX_STOP:
2021                break;
2022        case IEEE80211_AMPDU_TX_START:
2023                if (ath9k_is_chanctx_enabled()) {
2024                        if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2025                                ret = -EBUSY;
2026                                break;
2027                        }
2028                }
2029                ath9k_ps_wakeup(sc);
2030                ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2031                if (!ret)
2032                        ret = IEEE80211_AMPDU_TX_START_IMMEDIATE;
2033                ath9k_ps_restore(sc);
2034                break;
2035        case IEEE80211_AMPDU_TX_STOP_FLUSH:
2036        case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
2037                flush = true;
2038                fallthrough;
2039        case IEEE80211_AMPDU_TX_STOP_CONT:
2040                ath9k_ps_wakeup(sc);
2041                ath_tx_aggr_stop(sc, sta, tid);
2042                if (!flush)
2043                        ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2044                ath9k_ps_restore(sc);
2045                break;
2046        case IEEE80211_AMPDU_TX_OPERATIONAL:
2047                atid = ath_node_to_tid(an, tid);
2048                atid->baw_size = IEEE80211_MIN_AMPDU_BUF <<
2049                                sta->ht_cap.ampdu_factor;
2050                break;
2051        default:
2052                ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2053        }
2054
2055        mutex_unlock(&sc->mutex);
2056
2057        return ret;
2058}
2059
2060static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2061                             struct survey_info *survey)
2062{
2063        struct ath_softc *sc = hw->priv;
2064        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2065        struct ieee80211_supported_band *sband;
2066        struct ieee80211_channel *chan;
2067        unsigned long flags;
2068        int pos;
2069
2070        if (IS_ENABLED(CONFIG_ATH9K_TX99))
2071                return -EOPNOTSUPP;
2072
2073        spin_lock_irqsave(&common->cc_lock, flags);
2074        if (idx == 0)
2075                ath_update_survey_stats(sc);
2076
2077        sband = hw->wiphy->bands[NL80211_BAND_2GHZ];
2078        if (sband && idx >= sband->n_channels) {
2079                idx -= sband->n_channels;
2080                sband = NULL;
2081        }
2082
2083        if (!sband)
2084                sband = hw->wiphy->bands[NL80211_BAND_5GHZ];
2085
2086        if (!sband || idx >= sband->n_channels) {
2087                spin_unlock_irqrestore(&common->cc_lock, flags);
2088                return -ENOENT;
2089        }
2090
2091        chan = &sband->channels[idx];
2092        pos = chan->hw_value;
2093        memcpy(survey, &sc->survey[pos], sizeof(*survey));
2094        survey->channel = chan;
2095        spin_unlock_irqrestore(&common->cc_lock, flags);
2096
2097        return 0;
2098}
2099
2100static void ath9k_enable_dynack(struct ath_softc *sc)
2101{
2102#ifdef CONFIG_ATH9K_DYNACK
2103        u32 rfilt;
2104        struct ath_hw *ah = sc->sc_ah;
2105
2106        ath_dynack_reset(ah);
2107
2108        ah->dynack.enabled = true;
2109        rfilt = ath_calcrxfilter(sc);
2110        ath9k_hw_setrxfilter(ah, rfilt);
2111#endif
2112}
2113
2114static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
2115                                     s16 coverage_class)
2116{
2117        struct ath_softc *sc = hw->priv;
2118        struct ath_hw *ah = sc->sc_ah;
2119
2120        if (IS_ENABLED(CONFIG_ATH9K_TX99))
2121                return;
2122
2123        mutex_lock(&sc->mutex);
2124
2125        if (coverage_class >= 0) {
2126                ah->coverage_class = coverage_class;
2127                if (ah->dynack.enabled) {
2128                        u32 rfilt;
2129
2130                        ah->dynack.enabled = false;
2131                        rfilt = ath_calcrxfilter(sc);
2132                        ath9k_hw_setrxfilter(ah, rfilt);
2133                }
2134                ath9k_ps_wakeup(sc);
2135                ath9k_hw_init_global_settings(ah);
2136                ath9k_ps_restore(sc);
2137        } else if (!ah->dynack.enabled) {
2138                ath9k_enable_dynack(sc);
2139        }
2140
2141        mutex_unlock(&sc->mutex);
2142}
2143
2144static bool ath9k_has_tx_pending(struct ath_softc *sc,
2145                                 bool sw_pending)
2146{
2147        int i, npend = 0;
2148
2149        for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2150                if (!ATH_TXQ_SETUP(sc, i))
2151                        continue;
2152
2153                npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
2154                                                 sw_pending);
2155                if (npend)
2156                        break;
2157        }
2158
2159        return !!npend;
2160}
2161
2162static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2163                        u32 queues, bool drop)
2164{
2165        struct ath_softc *sc = hw->priv;
2166        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2167
2168        if (ath9k_is_chanctx_enabled()) {
2169                if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2170                        goto flush;
2171
2172                /*
2173                 * If MCC is active, extend the flush timeout
2174                 * and wait for the HW/SW queues to become
2175                 * empty. This needs to be done outside the
2176                 * sc->mutex lock to allow the channel scheduler
2177                 * to switch channel contexts.
2178                 *
2179                 * The vif queues have been stopped in mac80211,
2180                 * so there won't be any incoming frames.
2181                 */
2182                __ath9k_flush(hw, queues, drop, true, true);
2183                return;
2184        }
2185flush:
2186        mutex_lock(&sc->mutex);
2187        __ath9k_flush(hw, queues, drop, true, false);
2188        mutex_unlock(&sc->mutex);
2189}
2190
2191void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2192                   bool sw_pending, bool timeout_override)
2193{
2194        struct ath_softc *sc = hw->priv;
2195        struct ath_hw *ah = sc->sc_ah;
2196        struct ath_common *common = ath9k_hw_common(ah);
2197        int timeout;
2198        bool drain_txq;
2199
2200        cancel_delayed_work_sync(&sc->hw_check_work);
2201
2202        if (ah->ah_flags & AH_UNPLUGGED) {
2203                ath_dbg(common, ANY, "Device has been unplugged!\n");
2204                return;
2205        }
2206
2207        if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2208                ath_dbg(common, ANY, "Device not present\n");
2209                return;
2210        }
2211
2212        spin_lock_bh(&sc->chan_lock);
2213        if (timeout_override)
2214                timeout = HZ / 5;
2215        else
2216                timeout = sc->cur_chan->flush_timeout;
2217        spin_unlock_bh(&sc->chan_lock);
2218
2219        ath_dbg(common, CHAN_CTX,
2220                "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2221
2222        if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2223                               timeout) > 0)
2224                drop = false;
2225
2226        if (drop) {
2227                ath9k_ps_wakeup(sc);
2228                spin_lock_bh(&sc->sc_pcu_lock);
2229                drain_txq = ath_drain_all_txq(sc);
2230                spin_unlock_bh(&sc->sc_pcu_lock);
2231
2232                if (!drain_txq)
2233                        ath_reset(sc, NULL);
2234
2235                ath9k_ps_restore(sc);
2236        }
2237
2238        ieee80211_queue_delayed_work(hw, &sc->hw_check_work,
2239                                     ATH_HW_CHECK_POLL_INT);
2240}
2241
2242static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2243{
2244        struct ath_softc *sc = hw->priv;
2245
2246        return ath9k_has_tx_pending(sc, true);
2247}
2248
2249static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2250{
2251        struct ath_softc *sc = hw->priv;
2252        struct ath_hw *ah = sc->sc_ah;
2253        struct ieee80211_vif *vif;
2254        struct ath_vif *avp;
2255        struct ath_buf *bf;
2256        struct ath_tx_status ts;
2257        bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2258        int status;
2259
2260        vif = sc->beacon.bslot[0];
2261        if (!vif)
2262                return 0;
2263
2264        if (!vif->bss_conf.enable_beacon)
2265                return 0;
2266
2267        avp = (void *)vif->drv_priv;
2268
2269        if (!sc->beacon.tx_processed && !edma) {
2270                tasklet_disable(&sc->bcon_tasklet);
2271
2272                bf = avp->av_bcbuf;
2273                if (!bf || !bf->bf_mpdu)
2274                        goto skip;
2275
2276                status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2277                if (status == -EINPROGRESS)
2278                        goto skip;
2279
2280                sc->beacon.tx_processed = true;
2281                sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2282
2283skip:
2284                tasklet_enable(&sc->bcon_tasklet);
2285        }
2286
2287        return sc->beacon.tx_last;
2288}
2289
2290static int ath9k_get_stats(struct ieee80211_hw *hw,
2291                           struct ieee80211_low_level_stats *stats)
2292{
2293        struct ath_softc *sc = hw->priv;
2294        struct ath_hw *ah = sc->sc_ah;
2295        struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2296
2297        stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2298        stats->dot11RTSFailureCount = mib_stats->rts_bad;
2299        stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2300        stats->dot11RTSSuccessCount = mib_stats->rts_good;
2301        return 0;
2302}
2303
2304static u32 fill_chainmask(u32 cap, u32 new)
2305{
2306        u32 filled = 0;
2307        int i;
2308
2309        for (i = 0; cap && new; i++, cap >>= 1) {
2310                if (!(cap & BIT(0)))
2311                        continue;
2312
2313                if (new & BIT(0))
2314                        filled |= BIT(i);
2315
2316                new >>= 1;
2317        }
2318
2319        return filled;
2320}
2321
2322static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2323{
2324        if (AR_SREV_9300_20_OR_LATER(ah))
2325                return true;
2326
2327        switch (val & 0x7) {
2328        case 0x1:
2329        case 0x3:
2330        case 0x7:
2331                return true;
2332        case 0x2:
2333                return (ah->caps.rx_chainmask == 1);
2334        default:
2335                return false;
2336        }
2337}
2338
2339static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2340{
2341        struct ath_softc *sc = hw->priv;
2342        struct ath_hw *ah = sc->sc_ah;
2343
2344        if (ah->caps.rx_chainmask != 1)
2345                rx_ant |= tx_ant;
2346
2347        if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2348                return -EINVAL;
2349
2350        sc->ant_rx = rx_ant;
2351        sc->ant_tx = tx_ant;
2352
2353        if (ah->caps.rx_chainmask == 1)
2354                return 0;
2355
2356        /* AR9100 runs into calibration issues if not all rx chains are enabled */
2357        if (AR_SREV_9100(ah))
2358                ah->rxchainmask = 0x7;
2359        else
2360                ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2361
2362        ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2363        ath9k_cmn_reload_chainmask(ah);
2364
2365        return 0;
2366}
2367
2368static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2369{
2370        struct ath_softc *sc = hw->priv;
2371
2372        *tx_ant = sc->ant_tx;
2373        *rx_ant = sc->ant_rx;
2374        return 0;
2375}
2376
2377static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2378                                struct ieee80211_vif *vif,
2379                                const u8 *mac_addr)
2380{
2381        struct ath_softc *sc = hw->priv;
2382        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2383        set_bit(ATH_OP_SCANNING, &common->op_flags);
2384}
2385
2386static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2387                                   struct ieee80211_vif *vif)
2388{
2389        struct ath_softc *sc = hw->priv;
2390        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2391        clear_bit(ATH_OP_SCANNING, &common->op_flags);
2392}
2393
2394#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2395
2396static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2397{
2398        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2399
2400        if (sc->offchannel.roc_vif) {
2401                ath_dbg(common, CHAN_CTX,
2402                        "%s: Aborting RoC\n", __func__);
2403
2404                del_timer_sync(&sc->offchannel.timer);
2405                if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2406                        ath_roc_complete(sc, ATH_ROC_COMPLETE_ABORT);
2407        }
2408
2409        if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2410                ath_dbg(common, CHAN_CTX,
2411                        "%s: Aborting HW scan\n", __func__);
2412
2413                del_timer_sync(&sc->offchannel.timer);
2414                ath_scan_complete(sc, true);
2415        }
2416}
2417
2418static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2419                         struct ieee80211_scan_request *hw_req)
2420{
2421        struct cfg80211_scan_request *req = &hw_req->req;
2422        struct ath_softc *sc = hw->priv;
2423        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2424        int ret = 0;
2425
2426        mutex_lock(&sc->mutex);
2427
2428        if (WARN_ON(sc->offchannel.scan_req)) {
2429                ret = -EBUSY;
2430                goto out;
2431        }
2432
2433        ath9k_ps_wakeup(sc);
2434        set_bit(ATH_OP_SCANNING, &common->op_flags);
2435        sc->offchannel.scan_vif = vif;
2436        sc->offchannel.scan_req = req;
2437        sc->offchannel.scan_idx = 0;
2438
2439        ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2440                vif->addr);
2441
2442        if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2443                ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2444                ath_offchannel_next(sc);
2445        }
2446
2447out:
2448        mutex_unlock(&sc->mutex);
2449
2450        return ret;
2451}
2452
2453static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2454                                 struct ieee80211_vif *vif)
2455{
2456        struct ath_softc *sc = hw->priv;
2457        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2458
2459        ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2460
2461        mutex_lock(&sc->mutex);
2462        del_timer_sync(&sc->offchannel.timer);
2463        ath_scan_complete(sc, true);
2464        mutex_unlock(&sc->mutex);
2465}
2466
2467static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2468                                   struct ieee80211_vif *vif,
2469                                   struct ieee80211_channel *chan, int duration,
2470                                   enum ieee80211_roc_type type)
2471{
2472        struct ath_softc *sc = hw->priv;
2473        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2474        int ret = 0;
2475
2476        mutex_lock(&sc->mutex);
2477
2478        if (WARN_ON(sc->offchannel.roc_vif)) {
2479                ret = -EBUSY;
2480                goto out;
2481        }
2482
2483        ath9k_ps_wakeup(sc);
2484        sc->offchannel.roc_vif = vif;
2485        sc->offchannel.roc_chan = chan;
2486        sc->offchannel.roc_duration = duration;
2487
2488        ath_dbg(common, CHAN_CTX,
2489                "RoC request on vif: %pM, type: %d duration: %d\n",
2490                vif->addr, type, duration);
2491
2492        if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2493                ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2494                ath_offchannel_next(sc);
2495        }
2496
2497out:
2498        mutex_unlock(&sc->mutex);
2499
2500        return ret;
2501}
2502
2503static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw,
2504                                          struct ieee80211_vif *vif)
2505{
2506        struct ath_softc *sc = hw->priv;
2507        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2508
2509        mutex_lock(&sc->mutex);
2510
2511        ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2512        del_timer_sync(&sc->offchannel.timer);
2513
2514        if (sc->offchannel.roc_vif) {
2515                if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2516                        ath_roc_complete(sc, ATH_ROC_COMPLETE_CANCEL);
2517        }
2518
2519        mutex_unlock(&sc->mutex);
2520
2521        return 0;
2522}
2523
2524static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2525                             struct ieee80211_chanctx_conf *conf)
2526{
2527        struct ath_softc *sc = hw->priv;
2528        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2529        struct ath_chanctx *ctx, **ptr;
2530        int pos;
2531
2532        mutex_lock(&sc->mutex);
2533
2534        ath_for_each_chanctx(sc, ctx) {
2535                if (ctx->assigned)
2536                        continue;
2537
2538                ptr = (void *) conf->drv_priv;
2539                *ptr = ctx;
2540                ctx->assigned = true;
2541                pos = ctx - &sc->chanctx[0];
2542                ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2543
2544                ath_dbg(common, CHAN_CTX,
2545                        "Add channel context: %d MHz\n",
2546                        conf->def.chan->center_freq);
2547
2548                ath_chanctx_set_channel(sc, ctx, &conf->def);
2549
2550                mutex_unlock(&sc->mutex);
2551                return 0;
2552        }
2553
2554        mutex_unlock(&sc->mutex);
2555        return -ENOSPC;
2556}
2557
2558
2559static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2560                                 struct ieee80211_chanctx_conf *conf)
2561{
2562        struct ath_softc *sc = hw->priv;
2563        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2564        struct ath_chanctx *ctx = ath_chanctx_get(conf);
2565
2566        mutex_lock(&sc->mutex);
2567
2568        ath_dbg(common, CHAN_CTX,
2569                "Remove channel context: %d MHz\n",
2570                conf->def.chan->center_freq);
2571
2572        ctx->assigned = false;
2573        ctx->hw_queue_base = 0;
2574        ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2575
2576        mutex_unlock(&sc->mutex);
2577}
2578
2579static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2580                                 struct ieee80211_chanctx_conf *conf,
2581                                 u32 changed)
2582{
2583        struct ath_softc *sc = hw->priv;
2584        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2585        struct ath_chanctx *ctx = ath_chanctx_get(conf);
2586
2587        mutex_lock(&sc->mutex);
2588        ath_dbg(common, CHAN_CTX,
2589                "Change channel context: %d MHz\n",
2590                conf->def.chan->center_freq);
2591        ath_chanctx_set_channel(sc, ctx, &conf->def);
2592        mutex_unlock(&sc->mutex);
2593}
2594
2595static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2596                                    struct ieee80211_vif *vif,
2597                                    struct ieee80211_chanctx_conf *conf)
2598{
2599        struct ath_softc *sc = hw->priv;
2600        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2601        struct ath_vif *avp = (void *)vif->drv_priv;
2602        struct ath_chanctx *ctx = ath_chanctx_get(conf);
2603        int i;
2604
2605        ath9k_cancel_pending_offchannel(sc);
2606
2607        mutex_lock(&sc->mutex);
2608
2609        ath_dbg(common, CHAN_CTX,
2610                "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2611                vif->addr, vif->type, vif->p2p,
2612                conf->def.chan->center_freq);
2613
2614        avp->chanctx = ctx;
2615        ctx->nvifs_assigned++;
2616        list_add_tail(&avp->list, &ctx->vifs);
2617        ath9k_calculate_summary_state(sc, ctx);
2618        for (i = 0; i < IEEE80211_NUM_ACS; i++)
2619                vif->hw_queue[i] = ctx->hw_queue_base + i;
2620
2621        mutex_unlock(&sc->mutex);
2622
2623        return 0;
2624}
2625
2626static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2627                                       struct ieee80211_vif *vif,
2628                                       struct ieee80211_chanctx_conf *conf)
2629{
2630        struct ath_softc *sc = hw->priv;
2631        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2632        struct ath_vif *avp = (void *)vif->drv_priv;
2633        struct ath_chanctx *ctx = ath_chanctx_get(conf);
2634        int ac;
2635
2636        ath9k_cancel_pending_offchannel(sc);
2637
2638        mutex_lock(&sc->mutex);
2639
2640        ath_dbg(common, CHAN_CTX,
2641                "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2642                vif->addr, vif->type, vif->p2p,
2643                conf->def.chan->center_freq);
2644
2645        avp->chanctx = NULL;
2646        ctx->nvifs_assigned--;
2647        list_del(&avp->list);
2648        ath9k_calculate_summary_state(sc, ctx);
2649        for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2650                vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2651
2652        mutex_unlock(&sc->mutex);
2653}
2654
2655static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2656                                 struct ieee80211_vif *vif,
2657                                 struct ieee80211_prep_tx_info *info)
2658{
2659        struct ath_softc *sc = hw->priv;
2660        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2661        struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2662        struct ath_beacon_config *cur_conf;
2663        struct ath_chanctx *go_ctx;
2664        unsigned long timeout;
2665        bool changed = false;
2666        u32 beacon_int;
2667
2668        if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2669                return;
2670
2671        if (!avp->chanctx)
2672                return;
2673
2674        mutex_lock(&sc->mutex);
2675
2676        spin_lock_bh(&sc->chan_lock);
2677        if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2678                changed = true;
2679        spin_unlock_bh(&sc->chan_lock);
2680
2681        if (!changed)
2682                goto out;
2683
2684        ath9k_cancel_pending_offchannel(sc);
2685
2686        go_ctx = ath_is_go_chanctx_present(sc);
2687
2688        if (go_ctx) {
2689                /*
2690                 * Wait till the GO interface gets a chance
2691                 * to send out an NoA.
2692                 */
2693                spin_lock_bh(&sc->chan_lock);
2694                sc->sched.mgd_prepare_tx = true;
2695                cur_conf = &go_ctx->beacon;
2696                beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2697                spin_unlock_bh(&sc->chan_lock);
2698
2699                timeout = usecs_to_jiffies(beacon_int * 2);
2700                init_completion(&sc->go_beacon);
2701
2702                mutex_unlock(&sc->mutex);
2703
2704                if (wait_for_completion_timeout(&sc->go_beacon,
2705                                                timeout) == 0) {
2706                        ath_dbg(common, CHAN_CTX,
2707                                "Failed to send new NoA\n");
2708
2709                        spin_lock_bh(&sc->chan_lock);
2710                        sc->sched.mgd_prepare_tx = false;
2711                        spin_unlock_bh(&sc->chan_lock);
2712                }
2713
2714                mutex_lock(&sc->mutex);
2715        }
2716
2717        ath_dbg(common, CHAN_CTX,
2718                "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2719                __func__, vif->addr);
2720
2721        spin_lock_bh(&sc->chan_lock);
2722        sc->next_chan = avp->chanctx;
2723        sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2724        spin_unlock_bh(&sc->chan_lock);
2725
2726        ath_chanctx_set_next(sc, true);
2727out:
2728        mutex_unlock(&sc->mutex);
2729}
2730
2731void ath9k_fill_chanctx_ops(void)
2732{
2733        if (!ath9k_is_chanctx_enabled())
2734                return;
2735
2736        ath9k_ops.hw_scan                  = ath9k_hw_scan;
2737        ath9k_ops.cancel_hw_scan           = ath9k_cancel_hw_scan;
2738        ath9k_ops.remain_on_channel        = ath9k_remain_on_channel;
2739        ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2740        ath9k_ops.add_chanctx              = ath9k_add_chanctx;
2741        ath9k_ops.remove_chanctx           = ath9k_remove_chanctx;
2742        ath9k_ops.change_chanctx           = ath9k_change_chanctx;
2743        ath9k_ops.assign_vif_chanctx       = ath9k_assign_vif_chanctx;
2744        ath9k_ops.unassign_vif_chanctx     = ath9k_unassign_vif_chanctx;
2745        ath9k_ops.mgd_prepare_tx           = ath9k_mgd_prepare_tx;
2746}
2747
2748#endif
2749
2750static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2751                             int *dbm)
2752{
2753        struct ath_softc *sc = hw->priv;
2754        struct ath_vif *avp = (void *)vif->drv_priv;
2755
2756        mutex_lock(&sc->mutex);
2757        if (avp->chanctx)
2758                *dbm = avp->chanctx->cur_txpower;
2759        else
2760                *dbm = sc->cur_chan->cur_txpower;
2761        mutex_unlock(&sc->mutex);
2762
2763        *dbm /= 2;
2764
2765        return 0;
2766}
2767
2768struct ieee80211_ops ath9k_ops = {
2769        .tx                 = ath9k_tx,
2770        .start              = ath9k_start,
2771        .stop               = ath9k_stop,
2772        .add_interface      = ath9k_add_interface,
2773        .change_interface   = ath9k_change_interface,
2774        .remove_interface   = ath9k_remove_interface,
2775        .config             = ath9k_config,
2776        .configure_filter   = ath9k_configure_filter,
2777        .sta_state          = ath9k_sta_state,
2778        .sta_notify         = ath9k_sta_notify,
2779        .conf_tx            = ath9k_conf_tx,
2780        .bss_info_changed   = ath9k_bss_info_changed,
2781        .set_key            = ath9k_set_key,
2782        .get_tsf            = ath9k_get_tsf,
2783        .set_tsf            = ath9k_set_tsf,
2784        .reset_tsf          = ath9k_reset_tsf,
2785        .ampdu_action       = ath9k_ampdu_action,
2786        .get_survey         = ath9k_get_survey,
2787        .rfkill_poll        = ath9k_rfkill_poll_state,
2788        .set_coverage_class = ath9k_set_coverage_class,
2789        .flush              = ath9k_flush,
2790        .tx_frames_pending  = ath9k_tx_frames_pending,
2791        .tx_last_beacon     = ath9k_tx_last_beacon,
2792        .release_buffered_frames = ath9k_release_buffered_frames,
2793        .get_stats          = ath9k_get_stats,
2794        .set_antenna        = ath9k_set_antenna,
2795        .get_antenna        = ath9k_get_antenna,
2796
2797#ifdef CONFIG_ATH9K_WOW
2798        .suspend            = ath9k_suspend,
2799        .resume             = ath9k_resume,
2800        .set_wakeup         = ath9k_set_wakeup,
2801#endif
2802
2803#ifdef CONFIG_ATH9K_DEBUGFS
2804        .get_et_sset_count  = ath9k_get_et_sset_count,
2805        .get_et_stats       = ath9k_get_et_stats,
2806        .get_et_strings     = ath9k_get_et_strings,
2807#endif
2808
2809#if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2810        .sta_add_debugfs    = ath9k_sta_add_debugfs,
2811#endif
2812        .sw_scan_start      = ath9k_sw_scan_start,
2813        .sw_scan_complete   = ath9k_sw_scan_complete,
2814        .get_txpower        = ath9k_get_txpower,
2815        .wake_tx_queue      = ath9k_wake_tx_queue,
2816};
2817