1/* SPDX-License-Identifier: GPL-2.0 */ 2#ifndef B43_RADIO_2056_H_ 3#define B43_RADIO_2056_H_ 4 5#include <linux/types.h> 6 7#include "tables_nphy.h" 8 9#define B2056_SYN (0x0 << 12) 10#define B2056_TX0 (0x2 << 12) 11#define B2056_TX1 (0x3 << 12) 12#define B2056_RX0 (0x6 << 12) 13#define B2056_RX1 (0x7 << 12) 14#define B2056_ALLTX (0xE << 12) 15#define B2056_ALLRX (0xF << 12) 16 17#define B2056_SYN_RESERVED_ADDR0 0x00 18#define B2056_SYN_IDCODE 0x01 19#define B2056_SYN_RESERVED_ADDR2 0x02 20#define B2056_SYN_RESERVED_ADDR3 0x03 21#define B2056_SYN_RESERVED_ADDR4 0x04 22#define B2056_SYN_RESERVED_ADDR5 0x05 23#define B2056_SYN_RESERVED_ADDR6 0x06 24#define B2056_SYN_RESERVED_ADDR7 0x07 25#define B2056_SYN_COM_CTRL 0x08 26#define B2056_SYN_COM_PU 0x09 27#define B2056_SYN_COM_OVR 0x0A 28#define B2056_SYN_COM_RESET 0x0B 29#define B2056_SYN_COM_RCAL 0x0C 30#define B2056_SYN_COM_RC_RXLPF 0x0D 31#define B2056_SYN_COM_RC_TXLPF 0x0E 32#define B2056_SYN_COM_RC_RXHPF 0x0F 33#define B2056_SYN_RESERVED_ADDR16 0x10 34#define B2056_SYN_RESERVED_ADDR17 0x11 35#define B2056_SYN_RESERVED_ADDR18 0x12 36#define B2056_SYN_RESERVED_ADDR19 0x13 37#define B2056_SYN_RESERVED_ADDR20 0x14 38#define B2056_SYN_RESERVED_ADDR21 0x15 39#define B2056_SYN_RESERVED_ADDR22 0x16 40#define B2056_SYN_RESERVED_ADDR23 0x17 41#define B2056_SYN_RESERVED_ADDR24 0x18 42#define B2056_SYN_RESERVED_ADDR25 0x19 43#define B2056_SYN_RESERVED_ADDR26 0x1A 44#define B2056_SYN_RESERVED_ADDR27 0x1B 45#define B2056_SYN_RESERVED_ADDR28 0x1C 46#define B2056_SYN_RESERVED_ADDR29 0x1D 47#define B2056_SYN_RESERVED_ADDR30 0x1E 48#define B2056_SYN_RESERVED_ADDR31 0x1F 49#define B2056_SYN_GPIO_MASTER1 0x20 50#define B2056_SYN_GPIO_MASTER2 0x21 51#define B2056_SYN_TOPBIAS_MASTER 0x22 52#define B2056_SYN_TOPBIAS_RCAL 0x23 53#define B2056_SYN_AFEREG 0x24 54#define B2056_SYN_TEMPPROCSENSE 0x25 55#define B2056_SYN_TEMPPROCSENSEIDAC 0x26 56#define B2056_SYN_TEMPPROCSENSERCAL 0x27 57#define B2056_SYN_LPO 0x28 58#define B2056_SYN_VDDCAL_MASTER 0x29 59#define B2056_SYN_VDDCAL_IDAC 0x2A 60#define B2056_SYN_VDDCAL_STATUS 0x2B 61#define B2056_SYN_RCAL_MASTER 0x2C 62#define B2056_SYN_RCAL_CODE_OUT 0x2D 63#define B2056_SYN_RCCAL_CTRL0 0x2E 64#define B2056_SYN_RCCAL_CTRL1 0x2F 65#define B2056_SYN_RCCAL_CTRL2 0x30 66#define B2056_SYN_RCCAL_CTRL3 0x31 67#define B2056_SYN_RCCAL_CTRL4 0x32 68#define B2056_SYN_RCCAL_CTRL5 0x33 69#define B2056_SYN_RCCAL_CTRL6 0x34 70#define B2056_SYN_RCCAL_CTRL7 0x35 71#define B2056_SYN_RCCAL_CTRL8 0x36 72#define B2056_SYN_RCCAL_CTRL9 0x37 73#define B2056_SYN_RCCAL_CTRL10 0x38 74#define B2056_SYN_RCCAL_CTRL11 0x39 75#define B2056_SYN_ZCAL_SPARE1 0x3A 76#define B2056_SYN_ZCAL_SPARE2 0x3B 77#define B2056_SYN_PLL_MAST1 0x3C 78#define B2056_SYN_PLL_MAST2 0x3D 79#define B2056_SYN_PLL_MAST3 0x3E 80#define B2056_SYN_PLL_BIAS_RESET 0x3F 81#define B2056_SYN_PLL_XTAL0 0x40 82#define B2056_SYN_PLL_XTAL1 0x41 83#define B2056_SYN_PLL_XTAL3 0x42 84#define B2056_SYN_PLL_XTAL4 0x43 85#define B2056_SYN_PLL_XTAL5 0x44 86#define B2056_SYN_PLL_XTAL6 0x45 87#define B2056_SYN_PLL_REFDIV 0x46 88#define B2056_SYN_PLL_PFD 0x47 89#define B2056_SYN_PLL_CP1 0x48 90#define B2056_SYN_PLL_CP2 0x49 91#define B2056_SYN_PLL_CP3 0x4A 92#define B2056_SYN_PLL_LOOPFILTER1 0x4B 93#define B2056_SYN_PLL_LOOPFILTER2 0x4C 94#define B2056_SYN_PLL_LOOPFILTER3 0x4D 95#define B2056_SYN_PLL_LOOPFILTER4 0x4E 96#define B2056_SYN_PLL_LOOPFILTER5 0x4F 97#define B2056_SYN_PLL_MMD1 0x50 98#define B2056_SYN_PLL_MMD2 0x51 99#define B2056_SYN_PLL_VCO1 0x52 100#define B2056_SYN_PLL_VCO2 0x53 101#define B2056_SYN_PLL_MONITOR1 0x54 102#define B2056_SYN_PLL_MONITOR2 0x55 103#define B2056_SYN_PLL_VCOCAL1 0x56 104#define B2056_SYN_PLL_VCOCAL2 0x57 105#define B2056_SYN_PLL_VCOCAL4 0x58 106#define B2056_SYN_PLL_VCOCAL5 0x59 107#define B2056_SYN_PLL_VCOCAL6 0x5A 108#define B2056_SYN_PLL_VCOCAL7 0x5B 109#define B2056_SYN_PLL_VCOCAL8 0x5C 110#define B2056_SYN_PLL_VCOCAL9 0x5D 111#define B2056_SYN_PLL_VCOCAL10 0x5E 112#define B2056_SYN_PLL_VCOCAL11 0x5F 113#define B2056_SYN_PLL_VCOCAL12 0x60 114#define B2056_SYN_PLL_VCOCAL13 0x61 115#define B2056_SYN_PLL_VREG 0x62 116#define B2056_SYN_PLL_STATUS1 0x63 117#define B2056_SYN_PLL_STATUS2 0x64 118#define B2056_SYN_PLL_STATUS3 0x65 119#define B2056_SYN_LOGEN_PU0 0x66 120#define B2056_SYN_LOGEN_PU1 0x67 121#define B2056_SYN_LOGEN_PU2 0x68 122#define B2056_SYN_LOGEN_PU3 0x69 123#define B2056_SYN_LOGEN_PU5 0x6A 124#define B2056_SYN_LOGEN_PU6 0x6B 125#define B2056_SYN_LOGEN_PU7 0x6C 126#define B2056_SYN_LOGEN_PU8 0x6D 127#define B2056_SYN_LOGEN_BIAS_RESET 0x6E 128#define B2056_SYN_LOGEN_RCCR1 0x6F 129#define B2056_SYN_LOGEN_VCOBUF1 0x70 130#define B2056_SYN_LOGEN_MIXER1 0x71 131#define B2056_SYN_LOGEN_MIXER2 0x72 132#define B2056_SYN_LOGEN_BUF1 0x73 133#define B2056_SYN_LOGENBUF2 0x74 134#define B2056_SYN_LOGEN_BUF3 0x75 135#define B2056_SYN_LOGEN_BUF4 0x76 136#define B2056_SYN_LOGEN_DIV1 0x77 137#define B2056_SYN_LOGEN_DIV2 0x78 138#define B2056_SYN_LOGEN_DIV3 0x79 139#define B2056_SYN_LOGEN_ACL1 0x7A 140#define B2056_SYN_LOGEN_ACL2 0x7B 141#define B2056_SYN_LOGEN_ACL3 0x7C 142#define B2056_SYN_LOGEN_ACL4 0x7D 143#define B2056_SYN_LOGEN_ACL5 0x7E 144#define B2056_SYN_LOGEN_ACL6 0x7F 145#define B2056_SYN_LOGEN_ACLOUT 0x80 146#define B2056_SYN_LOGEN_ACLCAL1 0x81 147#define B2056_SYN_LOGEN_ACLCAL2 0x82 148#define B2056_SYN_LOGEN_ACLCAL3 0x83 149#define B2056_SYN_CALEN 0x84 150#define B2056_SYN_LOGEN_PEAKDET1 0x85 151#define B2056_SYN_LOGEN_CORE_ACL_OVR 0x86 152#define B2056_SYN_LOGEN_RX_DIFF_ACL_OVR 0x87 153#define B2056_SYN_LOGEN_TX_DIFF_ACL_OVR 0x88 154#define B2056_SYN_LOGEN_RX_CMOS_ACL_OVR 0x89 155#define B2056_SYN_LOGEN_TX_CMOS_ACL_OVR 0x8A 156#define B2056_SYN_LOGEN_VCOBUF2 0x8B 157#define B2056_SYN_LOGEN_MIXER3 0x8C 158#define B2056_SYN_LOGEN_BUF5 0x8D 159#define B2056_SYN_LOGEN_BUF6 0x8E 160#define B2056_SYN_LOGEN_CBUFRX1 0x8F 161#define B2056_SYN_LOGEN_CBUFRX2 0x90 162#define B2056_SYN_LOGEN_CBUFRX3 0x91 163#define B2056_SYN_LOGEN_CBUFRX4 0x92 164#define B2056_SYN_LOGEN_CBUFTX1 0x93 165#define B2056_SYN_LOGEN_CBUFTX2 0x94 166#define B2056_SYN_LOGEN_CBUFTX3 0x95 167#define B2056_SYN_LOGEN_CBUFTX4 0x96 168#define B2056_SYN_LOGEN_CMOSRX1 0x97 169#define B2056_SYN_LOGEN_CMOSRX2 0x98 170#define B2056_SYN_LOGEN_CMOSRX3 0x99 171#define B2056_SYN_LOGEN_CMOSRX4 0x9A 172#define B2056_SYN_LOGEN_CMOSTX1 0x9B 173#define B2056_SYN_LOGEN_CMOSTX2 0x9C 174#define B2056_SYN_LOGEN_CMOSTX3 0x9D 175#define B2056_SYN_LOGEN_CMOSTX4 0x9E 176#define B2056_SYN_LOGEN_VCOBUF2_OVRVAL 0x9F 177#define B2056_SYN_LOGEN_MIXER3_OVRVAL 0xA0 178#define B2056_SYN_LOGEN_BUF5_OVRVAL 0xA1 179#define B2056_SYN_LOGEN_BUF6_OVRVAL 0xA2 180#define B2056_SYN_LOGEN_CBUFRX1_OVRVAL 0xA3 181#define B2056_SYN_LOGEN_CBUFRX2_OVRVAL 0xA4 182#define B2056_SYN_LOGEN_CBUFRX3_OVRVAL 0xA5 183#define B2056_SYN_LOGEN_CBUFRX4_OVRVAL 0xA6 184#define B2056_SYN_LOGEN_CBUFTX1_OVRVAL 0xA7 185#define B2056_SYN_LOGEN_CBUFTX2_OVRVAL 0xA8 186#define B2056_SYN_LOGEN_CBUFTX3_OVRVAL 0xA9 187#define B2056_SYN_LOGEN_CBUFTX4_OVRVAL 0xAA 188#define B2056_SYN_LOGEN_CMOSRX1_OVRVAL 0xAB 189#define B2056_SYN_LOGEN_CMOSRX2_OVRVAL 0xAC 190#define B2056_SYN_LOGEN_CMOSRX3_OVRVAL 0xAD 191#define B2056_SYN_LOGEN_CMOSRX4_OVRVAL 0xAE 192#define B2056_SYN_LOGEN_CMOSTX1_OVRVAL 0xAF 193#define B2056_SYN_LOGEN_CMOSTX2_OVRVAL 0xB0 194#define B2056_SYN_LOGEN_CMOSTX3_OVRVAL 0xB1 195#define B2056_SYN_LOGEN_CMOSTX4_OVRVAL 0xB2 196#define B2056_SYN_LOGEN_ACL_WAITCNT 0xB3 197#define B2056_SYN_LOGEN_CORE_CALVALID 0xB4 198#define B2056_SYN_LOGEN_RX_CMOS_CALVALID 0xB5 199#define B2056_SYN_LOGEN_TX_CMOS_VALID 0xB6 200 201#define B2056_TX_RESERVED_ADDR0 0x00 202#define B2056_TX_IDCODE 0x01 203#define B2056_TX_RESERVED_ADDR2 0x02 204#define B2056_TX_RESERVED_ADDR3 0x03 205#define B2056_TX_RESERVED_ADDR4 0x04 206#define B2056_TX_RESERVED_ADDR5 0x05 207#define B2056_TX_RESERVED_ADDR6 0x06 208#define B2056_TX_RESERVED_ADDR7 0x07 209#define B2056_TX_COM_CTRL 0x08 210#define B2056_TX_COM_PU 0x09 211#define B2056_TX_COM_OVR 0x0A 212#define B2056_TX_COM_RESET 0x0B 213#define B2056_TX_COM_RCAL 0x0C 214#define B2056_TX_COM_RC_RXLPF 0x0D 215#define B2056_TX_COM_RC_TXLPF 0x0E 216#define B2056_TX_COM_RC_RXHPF 0x0F 217#define B2056_TX_RESERVED_ADDR16 0x10 218#define B2056_TX_RESERVED_ADDR17 0x11 219#define B2056_TX_RESERVED_ADDR18 0x12 220#define B2056_TX_RESERVED_ADDR19 0x13 221#define B2056_TX_RESERVED_ADDR20 0x14 222#define B2056_TX_RESERVED_ADDR21 0x15 223#define B2056_TX_RESERVED_ADDR22 0x16 224#define B2056_TX_RESERVED_ADDR23 0x17 225#define B2056_TX_RESERVED_ADDR24 0x18 226#define B2056_TX_RESERVED_ADDR25 0x19 227#define B2056_TX_RESERVED_ADDR26 0x1A 228#define B2056_TX_RESERVED_ADDR27 0x1B 229#define B2056_TX_RESERVED_ADDR28 0x1C 230#define B2056_TX_RESERVED_ADDR29 0x1D 231#define B2056_TX_RESERVED_ADDR30 0x1E 232#define B2056_TX_RESERVED_ADDR31 0x1F 233#define B2056_TX_IQCAL_GAIN_BW 0x20 234#define B2056_TX_LOFT_FINE_I 0x21 235#define B2056_TX_LOFT_FINE_Q 0x22 236#define B2056_TX_LOFT_COARSE_I 0x23 237#define B2056_TX_LOFT_COARSE_Q 0x24 238#define B2056_TX_TX_COM_MASTER1 0x25 239#define B2056_TX_TX_COM_MASTER2 0x26 240#define B2056_TX_RXIQCAL_TXMUX 0x27 241#define B2056_TX_TX_SSI_MASTER 0x28 242#define B2056_TX_IQCAL_VCM_HG 0x29 243#define B2056_TX_IQCAL_IDAC 0x2A 244#define B2056_TX_TSSI_VCM 0x2B 245#define B2056_TX_TX_AMP_DET 0x2C 246#define B2056_TX_TX_SSI_MUX 0x2D 247#define B2056_TX_TSSIA 0x2E 248#define B2056_TX_TSSIG 0x2F 249#define B2056_TX_TSSI_MISC1 0x30 250#define B2056_TX_TSSI_MISC2 0x31 251#define B2056_TX_TSSI_MISC3 0x32 252#define B2056_TX_PA_SPARE1 0x33 253#define B2056_TX_PA_SPARE2 0x34 254#define B2056_TX_INTPAA_MASTER 0x35 255#define B2056_TX_INTPAA_GAIN 0x36 256#define B2056_TX_INTPAA_BOOST_TUNE 0x37 257#define B2056_TX_INTPAA_IAUX_STAT 0x38 258#define B2056_TX_INTPAA_IAUX_DYN 0x39 259#define B2056_TX_INTPAA_IMAIN_STAT 0x3A 260#define B2056_TX_INTPAA_IMAIN_DYN 0x3B 261#define B2056_TX_INTPAA_CASCBIAS 0x3C 262#define B2056_TX_INTPAA_PASLOPE 0x3D 263#define B2056_TX_INTPAA_PA_MISC 0x3E 264#define B2056_TX_INTPAG_MASTER 0x3F 265#define B2056_TX_INTPAG_GAIN 0x40 266#define B2056_TX_INTPAG_BOOST_TUNE 0x41 267#define B2056_TX_INTPAG_IAUX_STAT 0x42 268#define B2056_TX_INTPAG_IAUX_DYN 0x43 269#define B2056_TX_INTPAG_IMAIN_STAT 0x44 270#define B2056_TX_INTPAG_IMAIN_DYN 0x45 271#define B2056_TX_INTPAG_CASCBIAS 0x46 272#define B2056_TX_INTPAG_PASLOPE 0x47 273#define B2056_TX_INTPAG_PA_MISC 0x48 274#define B2056_TX_PADA_MASTER 0x49 275#define B2056_TX_PADA_IDAC 0x4A 276#define B2056_TX_PADA_CASCBIAS 0x4B 277#define B2056_TX_PADA_GAIN 0x4C 278#define B2056_TX_PADA_BOOST_TUNE 0x4D 279#define B2056_TX_PADA_SLOPE 0x4E 280#define B2056_TX_PADG_MASTER 0x4F 281#define B2056_TX_PADG_IDAC 0x50 282#define B2056_TX_PADG_CASCBIAS 0x51 283#define B2056_TX_PADG_GAIN 0x52 284#define B2056_TX_PADG_BOOST_TUNE 0x53 285#define B2056_TX_PADG_SLOPE 0x54 286#define B2056_TX_PGAA_MASTER 0x55 287#define B2056_TX_PGAA_IDAC 0x56 288#define B2056_TX_PGAA_GAIN 0x57 289#define B2056_TX_PGAA_BOOST_TUNE 0x58 290#define B2056_TX_PGAA_SLOPE 0x59 291#define B2056_TX_PGAA_MISC 0x5A 292#define B2056_TX_PGAG_MASTER 0x5B 293#define B2056_TX_PGAG_IDAC 0x5C 294#define B2056_TX_PGAG_GAIN 0x5D 295#define B2056_TX_PGAG_BOOST_TUNE 0x5E 296#define B2056_TX_PGAG_SLOPE 0x5F 297#define B2056_TX_PGAG_MISC 0x60 298#define B2056_TX_MIXA_MASTER 0x61 299#define B2056_TX_MIXA_BOOST_TUNE 0x62 300#define B2056_TX_MIXG 0x63 301#define B2056_TX_MIXG_BOOST_TUNE 0x64 302#define B2056_TX_BB_GM_MASTER 0x65 303#define B2056_TX_GMBB_GM 0x66 304#define B2056_TX_GMBB_IDAC 0x67 305#define B2056_TX_TXLPF_MASTER 0x68 306#define B2056_TX_TXLPF_RCCAL 0x69 307#define B2056_TX_TXLPF_RCCAL_OFF0 0x6A 308#define B2056_TX_TXLPF_RCCAL_OFF1 0x6B 309#define B2056_TX_TXLPF_RCCAL_OFF2 0x6C 310#define B2056_TX_TXLPF_RCCAL_OFF3 0x6D 311#define B2056_TX_TXLPF_RCCAL_OFF4 0x6E 312#define B2056_TX_TXLPF_RCCAL_OFF5 0x6F 313#define B2056_TX_TXLPF_RCCAL_OFF6 0x70 314#define B2056_TX_TXLPF_BW 0x71 315#define B2056_TX_TXLPF_GAIN 0x72 316#define B2056_TX_TXLPF_IDAC 0x73 317#define B2056_TX_TXLPF_IDAC_0 0x74 318#define B2056_TX_TXLPF_IDAC_1 0x75 319#define B2056_TX_TXLPF_IDAC_2 0x76 320#define B2056_TX_TXLPF_IDAC_3 0x77 321#define B2056_TX_TXLPF_IDAC_4 0x78 322#define B2056_TX_TXLPF_IDAC_5 0x79 323#define B2056_TX_TXLPF_IDAC_6 0x7A 324#define B2056_TX_TXLPF_OPAMP_IDAC 0x7B 325#define B2056_TX_TXLPF_MISC 0x7C 326#define B2056_TX_TXSPARE1 0x7D 327#define B2056_TX_TXSPARE2 0x7E 328#define B2056_TX_TXSPARE3 0x7F 329#define B2056_TX_TXSPARE4 0x80 330#define B2056_TX_TXSPARE5 0x81 331#define B2056_TX_TXSPARE6 0x82 332#define B2056_TX_TXSPARE7 0x83 333#define B2056_TX_TXSPARE8 0x84 334#define B2056_TX_TXSPARE9 0x85 335#define B2056_TX_TXSPARE10 0x86 336#define B2056_TX_TXSPARE11 0x87 337#define B2056_TX_TXSPARE12 0x88 338#define B2056_TX_TXSPARE13 0x89 339#define B2056_TX_TXSPARE14 0x8A 340#define B2056_TX_TXSPARE15 0x8B 341#define B2056_TX_TXSPARE16 0x8C 342#define B2056_TX_STATUS_INTPA_GAIN 0x8D 343#define B2056_TX_STATUS_PAD_GAIN 0x8E 344#define B2056_TX_STATUS_PGA_GAIN 0x8F 345#define B2056_TX_STATUS_GM_TXLPF_GAIN 0x90 346#define B2056_TX_STATUS_TXLPF_BW 0x91 347#define B2056_TX_STATUS_TXLPF_RC 0x92 348#define B2056_TX_GMBB_IDAC0 0x93 349#define B2056_TX_GMBB_IDAC1 0x94 350#define B2056_TX_GMBB_IDAC2 0x95 351#define B2056_TX_GMBB_IDAC3 0x96 352#define B2056_TX_GMBB_IDAC4 0x97 353#define B2056_TX_GMBB_IDAC5 0x98 354#define B2056_TX_GMBB_IDAC6 0x99 355#define B2056_TX_GMBB_IDAC7 0x9A 356 357#define B2056_RX_RESERVED_ADDR0 0x00 358#define B2056_RX_IDCODE 0x01 359#define B2056_RX_RESERVED_ADDR2 0x02 360#define B2056_RX_RESERVED_ADDR3 0x03 361#define B2056_RX_RESERVED_ADDR4 0x04 362#define B2056_RX_RESERVED_ADDR5 0x05 363#define B2056_RX_RESERVED_ADDR6 0x06 364#define B2056_RX_RESERVED_ADDR7 0x07 365#define B2056_RX_COM_CTRL 0x08 366#define B2056_RX_COM_PU 0x09 367#define B2056_RX_COM_OVR 0x0A 368#define B2056_RX_COM_RESET 0x0B 369#define B2056_RX_COM_RCAL 0x0C 370#define B2056_RX_COM_RC_RXLPF 0x0D 371#define B2056_RX_COM_RC_TXLPF 0x0E 372#define B2056_RX_COM_RC_RXHPF 0x0F 373#define B2056_RX_RESERVED_ADDR16 0x10 374#define B2056_RX_RESERVED_ADDR17 0x11 375#define B2056_RX_RESERVED_ADDR18 0x12 376#define B2056_RX_RESERVED_ADDR19 0x13 377#define B2056_RX_RESERVED_ADDR20 0x14 378#define B2056_RX_RESERVED_ADDR21 0x15 379#define B2056_RX_RESERVED_ADDR22 0x16 380#define B2056_RX_RESERVED_ADDR23 0x17 381#define B2056_RX_RESERVED_ADDR24 0x18 382#define B2056_RX_RESERVED_ADDR25 0x19 383#define B2056_RX_RESERVED_ADDR26 0x1A 384#define B2056_RX_RESERVED_ADDR27 0x1B 385#define B2056_RX_RESERVED_ADDR28 0x1C 386#define B2056_RX_RESERVED_ADDR29 0x1D 387#define B2056_RX_RESERVED_ADDR30 0x1E 388#define B2056_RX_RESERVED_ADDR31 0x1F 389#define B2056_RX_RXIQCAL_RXMUX 0x20 390#define B2056_RX_RSSI_PU 0x21 391#define B2056_RX_RSSI_SEL 0x22 392#define B2056_RX_RSSI_GAIN 0x23 393#define B2056_RX_RSSI_NB_IDAC 0x24 394#define B2056_RX_RSSI_WB2I_IDAC_1 0x25 395#define B2056_RX_RSSI_WB2I_IDAC_2 0x26 396#define B2056_RX_RSSI_WB2Q_IDAC_1 0x27 397#define B2056_RX_RSSI_WB2Q_IDAC_2 0x28 398#define B2056_RX_RSSI_POLE 0x29 399#define B2056_RX_RSSI_WB1_IDAC 0x2A 400#define B2056_RX_RSSI_MISC 0x2B 401#define B2056_RX_LNAA_MASTER 0x2C 402#define B2056_RX_LNAA_TUNE 0x2D 403#define B2056_RX_LNAA_GAIN 0x2E 404#define B2056_RX_LNA_A_SLOPE 0x2F 405#define B2056_RX_BIASPOLE_LNAA1_IDAC 0x30 406#define B2056_RX_LNAA2_IDAC 0x31 407#define B2056_RX_LNA1A_MISC 0x32 408#define B2056_RX_LNAG_MASTER 0x33 409#define B2056_RX_LNAG_TUNE 0x34 410#define B2056_RX_LNAG_GAIN 0x35 411#define B2056_RX_LNA_G_SLOPE 0x36 412#define B2056_RX_BIASPOLE_LNAG1_IDAC 0x37 413#define B2056_RX_LNAG2_IDAC 0x38 414#define B2056_RX_LNA1G_MISC 0x39 415#define B2056_RX_MIXA_MASTER 0x3A 416#define B2056_RX_MIXA_VCM 0x3B 417#define B2056_RX_MIXA_CTRLPTAT 0x3C 418#define B2056_RX_MIXA_LOB_BIAS 0x3D 419#define B2056_RX_MIXA_CORE_IDAC 0x3E 420#define B2056_RX_MIXA_CMFB_IDAC 0x3F 421#define B2056_RX_MIXA_BIAS_AUX 0x40 422#define B2056_RX_MIXA_BIAS_MAIN 0x41 423#define B2056_RX_MIXA_BIAS_MISC 0x42 424#define B2056_RX_MIXA_MAST_BIAS 0x43 425#define B2056_RX_MIXG_MASTER 0x44 426#define B2056_RX_MIXG_VCM 0x45 427#define B2056_RX_MIXG_CTRLPTAT 0x46 428#define B2056_RX_MIXG_LOB_BIAS 0x47 429#define B2056_RX_MIXG_CORE_IDAC 0x48 430#define B2056_RX_MIXG_CMFB_IDAC 0x49 431#define B2056_RX_MIXG_BIAS_AUX 0x4A 432#define B2056_RX_MIXG_BIAS_MAIN 0x4B 433#define B2056_RX_MIXG_BIAS_MISC 0x4C 434#define B2056_RX_MIXG_MAST_BIAS 0x4D 435#define B2056_RX_TIA_MASTER 0x4E 436#define B2056_RX_TIA_IOPAMP 0x4F 437#define B2056_RX_TIA_QOPAMP 0x50 438#define B2056_RX_TIA_IMISC 0x51 439#define B2056_RX_TIA_QMISC 0x52 440#define B2056_RX_TIA_GAIN 0x53 441#define B2056_RX_TIA_SPARE1 0x54 442#define B2056_RX_TIA_SPARE2 0x55 443#define B2056_RX_BB_LPF_MASTER 0x56 444#define B2056_RX_AACI_MASTER 0x57 445#define B2056_RX_RXLPF_IDAC 0x58 446#define B2056_RX_RXLPF_OPAMPBIAS_LOWQ 0x59 447#define B2056_RX_RXLPF_OPAMPBIAS_HIGHQ 0x5A 448#define B2056_RX_RXLPF_BIAS_DCCANCEL 0x5B 449#define B2056_RX_RXLPF_OUTVCM 0x5C 450#define B2056_RX_RXLPF_INVCM_BODY 0x5D 451#define B2056_RX_RXLPF_CC_OP 0x5E 452#define B2056_RX_RXLPF_GAIN 0x5F 453#define B2056_RX_RXLPF_Q_BW 0x60 454#define B2056_RX_RXLPF_HP_CORNER_BW 0x61 455#define B2056_RX_RXLPF_RCCAL_HPC 0x62 456#define B2056_RX_RXHPF_OFF0 0x63 457#define B2056_RX_RXHPF_OFF1 0x64 458#define B2056_RX_RXHPF_OFF2 0x65 459#define B2056_RX_RXHPF_OFF3 0x66 460#define B2056_RX_RXHPF_OFF4 0x67 461#define B2056_RX_RXHPF_OFF5 0x68 462#define B2056_RX_RXHPF_OFF6 0x69 463#define B2056_RX_RXHPF_OFF7 0x6A 464#define B2056_RX_RXLPF_RCCAL_LPC 0x6B 465#define B2056_RX_RXLPF_OFF_0 0x6C 466#define B2056_RX_RXLPF_OFF_1 0x6D 467#define B2056_RX_RXLPF_OFF_2 0x6E 468#define B2056_RX_RXLPF_OFF_3 0x6F 469#define B2056_RX_RXLPF_OFF_4 0x70 470#define B2056_RX_UNUSED 0x71 471#define B2056_RX_VGA_MASTER 0x72 472#define B2056_RX_VGA_BIAS 0x73 473#define B2056_RX_VGA_BIAS_DCCANCEL 0x74 474#define B2056_RX_VGA_GAIN 0x75 475#define B2056_RX_VGA_HP_CORNER_BW 0x76 476#define B2056_RX_VGABUF_BIAS 0x77 477#define B2056_RX_VGABUF_GAIN_BW 0x78 478#define B2056_RX_TXFBMIX_A 0x79 479#define B2056_RX_TXFBMIX_G 0x7A 480#define B2056_RX_RXSPARE1 0x7B 481#define B2056_RX_RXSPARE2 0x7C 482#define B2056_RX_RXSPARE3 0x7D 483#define B2056_RX_RXSPARE4 0x7E 484#define B2056_RX_RXSPARE5 0x7F 485#define B2056_RX_RXSPARE6 0x80 486#define B2056_RX_RXSPARE7 0x81 487#define B2056_RX_RXSPARE8 0x82 488#define B2056_RX_RXSPARE9 0x83 489#define B2056_RX_RXSPARE10 0x84 490#define B2056_RX_RXSPARE11 0x85 491#define B2056_RX_RXSPARE12 0x86 492#define B2056_RX_RXSPARE13 0x87 493#define B2056_RX_RXSPARE14 0x88 494#define B2056_RX_RXSPARE15 0x89 495#define B2056_RX_RXSPARE16 0x8A 496#define B2056_RX_STATUS_LNAA_GAIN 0x8B 497#define B2056_RX_STATUS_LNAG_GAIN 0x8C 498#define B2056_RX_STATUS_MIXTIA_GAIN 0x8D 499#define B2056_RX_STATUS_RXLPF_GAIN 0x8E 500#define B2056_RX_STATUS_VGA_BUF_GAIN 0x8F 501#define B2056_RX_STATUS_RXLPF_Q 0x90 502#define B2056_RX_STATUS_RXLPF_BUF_BW 0x91 503#define B2056_RX_STATUS_RXLPF_VGA_HPC 0x92 504#define B2056_RX_STATUS_RXLPF_RC 0x93 505#define B2056_RX_STATUS_HPC_RC 0x94 506 507#define B2056_LNA1_A_PU 0x01 508#define B2056_LNA2_A_PU 0x02 509#define B2056_LNA1_G_PU 0x01 510#define B2056_LNA2_G_PU 0x02 511#define B2056_MIXA_PU_I 0x01 512#define B2056_MIXA_PU_Q 0x02 513#define B2056_MIXA_PU_GM 0x10 514#define B2056_MIXG_PU_I 0x01 515#define B2056_MIXG_PU_Q 0x02 516#define B2056_MIXG_PU_GM 0x10 517#define B2056_TIA_PU 0x01 518#define B2056_BB_LPF_PU 0x20 519#define B2056_W1_PU 0x02 520#define B2056_W2_PU 0x04 521#define B2056_NB_PU 0x08 522#define B2056_RSSI_W1_SEL 0x02 523#define B2056_RSSI_W2_SEL 0x04 524#define B2056_RSSI_NB_SEL 0x08 525#define B2056_VCM_MASK 0x1C 526#define B2056_RSSI_VCM_SHIFT 0x02 527 528#define B2056_SYN (0x0 << 12) 529#define B2056_TX0 (0x2 << 12) 530#define B2056_TX1 (0x3 << 12) 531#define B2056_RX0 (0x6 << 12) 532#define B2056_RX1 (0x7 << 12) 533#define B2056_ALLTX (0xE << 12) 534#define B2056_ALLRX (0xF << 12) 535 536#define B2056_SYN_RESERVED_ADDR0 0x00 537#define B2056_SYN_IDCODE 0x01 538#define B2056_SYN_RESERVED_ADDR2 0x02 539#define B2056_SYN_RESERVED_ADDR3 0x03 540#define B2056_SYN_RESERVED_ADDR4 0x04 541#define B2056_SYN_RESERVED_ADDR5 0x05 542#define B2056_SYN_RESERVED_ADDR6 0x06 543#define B2056_SYN_RESERVED_ADDR7 0x07 544#define B2056_SYN_COM_CTRL 0x08 545#define B2056_SYN_COM_PU 0x09 546#define B2056_SYN_COM_OVR 0x0A 547#define B2056_SYN_COM_RESET 0x0B 548#define B2056_SYN_COM_RCAL 0x0C 549#define B2056_SYN_COM_RC_RXLPF 0x0D 550#define B2056_SYN_COM_RC_TXLPF 0x0E 551#define B2056_SYN_COM_RC_RXHPF 0x0F 552#define B2056_SYN_RESERVED_ADDR16 0x10 553#define B2056_SYN_RESERVED_ADDR17 0x11 554#define B2056_SYN_RESERVED_ADDR18 0x12 555#define B2056_SYN_RESERVED_ADDR19 0x13 556#define B2056_SYN_RESERVED_ADDR20 0x14 557#define B2056_SYN_RESERVED_ADDR21 0x15 558#define B2056_SYN_RESERVED_ADDR22 0x16 559#define B2056_SYN_RESERVED_ADDR23 0x17 560#define B2056_SYN_RESERVED_ADDR24 0x18 561#define B2056_SYN_RESERVED_ADDR25 0x19 562#define B2056_SYN_RESERVED_ADDR26 0x1A 563#define B2056_SYN_RESERVED_ADDR27 0x1B 564#define B2056_SYN_RESERVED_ADDR28 0x1C 565#define B2056_SYN_RESERVED_ADDR29 0x1D 566#define B2056_SYN_RESERVED_ADDR30 0x1E 567#define B2056_SYN_RESERVED_ADDR31 0x1F 568#define B2056_SYN_GPIO_MASTER1 0x20 569#define B2056_SYN_GPIO_MASTER2 0x21 570#define B2056_SYN_TOPBIAS_MASTER 0x22 571#define B2056_SYN_TOPBIAS_RCAL 0x23 572#define B2056_SYN_AFEREG 0x24 573#define B2056_SYN_TEMPPROCSENSE 0x25 574#define B2056_SYN_TEMPPROCSENSEIDAC 0x26 575#define B2056_SYN_TEMPPROCSENSERCAL 0x27 576#define B2056_SYN_LPO 0x28 577#define B2056_SYN_VDDCAL_MASTER 0x29 578#define B2056_SYN_VDDCAL_IDAC 0x2A 579#define B2056_SYN_VDDCAL_STATUS 0x2B 580#define B2056_SYN_RCAL_MASTER 0x2C 581#define B2056_SYN_RCAL_CODE_OUT 0x2D 582#define B2056_SYN_RCCAL_CTRL0 0x2E 583#define B2056_SYN_RCCAL_CTRL1 0x2F 584#define B2056_SYN_RCCAL_CTRL2 0x30 585#define B2056_SYN_RCCAL_CTRL3 0x31 586#define B2056_SYN_RCCAL_CTRL4 0x32 587#define B2056_SYN_RCCAL_CTRL5 0x33 588#define B2056_SYN_RCCAL_CTRL6 0x34 589#define B2056_SYN_RCCAL_CTRL7 0x35 590#define B2056_SYN_RCCAL_CTRL8 0x36 591#define B2056_SYN_RCCAL_CTRL9 0x37 592#define B2056_SYN_RCCAL_CTRL10 0x38 593#define B2056_SYN_RCCAL_CTRL11 0x39 594#define B2056_SYN_ZCAL_SPARE1 0x3A 595#define B2056_SYN_ZCAL_SPARE2 0x3B 596#define B2056_SYN_PLL_MAST1 0x3C 597#define B2056_SYN_PLL_MAST2 0x3D 598#define B2056_SYN_PLL_MAST3 0x3E 599#define B2056_SYN_PLL_BIAS_RESET 0x3F 600#define B2056_SYN_PLL_XTAL0 0x40 601#define B2056_SYN_PLL_XTAL1 0x41 602#define B2056_SYN_PLL_XTAL3 0x42 603#define B2056_SYN_PLL_XTAL4 0x43 604#define B2056_SYN_PLL_XTAL5 0x44 605#define B2056_SYN_PLL_XTAL6 0x45 606#define B2056_SYN_PLL_REFDIV 0x46 607#define B2056_SYN_PLL_PFD 0x47 608#define B2056_SYN_PLL_CP1 0x48 609#define B2056_SYN_PLL_CP2 0x49 610#define B2056_SYN_PLL_CP3 0x4A 611#define B2056_SYN_PLL_LOOPFILTER1 0x4B 612#define B2056_SYN_PLL_LOOPFILTER2 0x4C 613#define B2056_SYN_PLL_LOOPFILTER3 0x4D 614#define B2056_SYN_PLL_LOOPFILTER4 0x4E 615#define B2056_SYN_PLL_LOOPFILTER5 0x4F 616#define B2056_SYN_PLL_MMD1 0x50 617#define B2056_SYN_PLL_MMD2 0x51 618#define B2056_SYN_PLL_VCO1 0x52 619#define B2056_SYN_PLL_VCO2 0x53 620#define B2056_SYN_PLL_MONITOR1 0x54 621#define B2056_SYN_PLL_MONITOR2 0x55 622#define B2056_SYN_PLL_VCOCAL1 0x56 623#define B2056_SYN_PLL_VCOCAL2 0x57 624#define B2056_SYN_PLL_VCOCAL4 0x58 625#define B2056_SYN_PLL_VCOCAL5 0x59 626#define B2056_SYN_PLL_VCOCAL6 0x5A 627#define B2056_SYN_PLL_VCOCAL7 0x5B 628#define B2056_SYN_PLL_VCOCAL8 0x5C 629#define B2056_SYN_PLL_VCOCAL9 0x5D 630#define B2056_SYN_PLL_VCOCAL10 0x5E 631#define B2056_SYN_PLL_VCOCAL11 0x5F 632#define B2056_SYN_PLL_VCOCAL12 0x60 633#define B2056_SYN_PLL_VCOCAL13 0x61 634#define B2056_SYN_PLL_VREG 0x62 635#define B2056_SYN_PLL_STATUS1 0x63 636#define B2056_SYN_PLL_STATUS2 0x64 637#define B2056_SYN_PLL_STATUS3 0x65 638#define B2056_SYN_LOGEN_PU0 0x66 639#define B2056_SYN_LOGEN_PU1 0x67 640#define B2056_SYN_LOGEN_PU2 0x68 641#define B2056_SYN_LOGEN_PU3 0x69 642#define B2056_SYN_LOGEN_PU5 0x6A 643#define B2056_SYN_LOGEN_PU6 0x6B 644#define B2056_SYN_LOGEN_PU7 0x6C 645#define B2056_SYN_LOGEN_PU8 0x6D 646#define B2056_SYN_LOGEN_BIAS_RESET 0x6E 647#define B2056_SYN_LOGEN_RCCR1 0x6F 648#define B2056_SYN_LOGEN_VCOBUF1 0x70 649#define B2056_SYN_LOGEN_MIXER1 0x71 650#define B2056_SYN_LOGEN_MIXER2 0x72 651#define B2056_SYN_LOGEN_BUF1 0x73 652#define B2056_SYN_LOGENBUF2 0x74 653#define B2056_SYN_LOGEN_BUF3 0x75 654#define B2056_SYN_LOGEN_BUF4 0x76 655#define B2056_SYN_LOGEN_DIV1 0x77 656#define B2056_SYN_LOGEN_DIV2 0x78 657#define B2056_SYN_LOGEN_DIV3 0x79 658#define B2056_SYN_LOGEN_ACL1 0x7A 659#define B2056_SYN_LOGEN_ACL2 0x7B 660#define B2056_SYN_LOGEN_ACL3 0x7C 661#define B2056_SYN_LOGEN_ACL4 0x7D 662#define B2056_SYN_LOGEN_ACL5 0x7E 663#define B2056_SYN_LOGEN_ACL6 0x7F 664#define B2056_SYN_LOGEN_ACLOUT 0x80 665#define B2056_SYN_LOGEN_ACLCAL1 0x81 666#define B2056_SYN_LOGEN_ACLCAL2 0x82 667#define B2056_SYN_LOGEN_ACLCAL3 0x83 668#define B2056_SYN_CALEN 0x84 669#define B2056_SYN_LOGEN_PEAKDET1 0x85 670#define B2056_SYN_LOGEN_CORE_ACL_OVR 0x86 671#define B2056_SYN_LOGEN_RX_DIFF_ACL_OVR 0x87 672#define B2056_SYN_LOGEN_TX_DIFF_ACL_OVR 0x88 673#define B2056_SYN_LOGEN_RX_CMOS_ACL_OVR 0x89 674#define B2056_SYN_LOGEN_TX_CMOS_ACL_OVR 0x8A 675#define B2056_SYN_LOGEN_VCOBUF2 0x8B 676#define B2056_SYN_LOGEN_MIXER3 0x8C 677#define B2056_SYN_LOGEN_BUF5 0x8D 678#define B2056_SYN_LOGEN_BUF6 0x8E 679#define B2056_SYN_LOGEN_CBUFRX1 0x8F 680#define B2056_SYN_LOGEN_CBUFRX2 0x90 681#define B2056_SYN_LOGEN_CBUFRX3 0x91 682#define B2056_SYN_LOGEN_CBUFRX4 0x92 683#define B2056_SYN_LOGEN_CBUFTX1 0x93 684#define B2056_SYN_LOGEN_CBUFTX2 0x94 685#define B2056_SYN_LOGEN_CBUFTX3 0x95 686#define B2056_SYN_LOGEN_CBUFTX4 0x96 687#define B2056_SYN_LOGEN_CMOSRX1 0x97 688#define B2056_SYN_LOGEN_CMOSRX2 0x98 689#define B2056_SYN_LOGEN_CMOSRX3 0x99 690#define B2056_SYN_LOGEN_CMOSRX4 0x9A 691#define B2056_SYN_LOGEN_CMOSTX1 0x9B 692#define B2056_SYN_LOGEN_CMOSTX2 0x9C 693#define B2056_SYN_LOGEN_CMOSTX3 0x9D 694#define B2056_SYN_LOGEN_CMOSTX4 0x9E 695#define B2056_SYN_LOGEN_VCOBUF2_OVRVAL 0x9F 696#define B2056_SYN_LOGEN_MIXER3_OVRVAL 0xA0 697#define B2056_SYN_LOGEN_BUF5_OVRVAL 0xA1 698#define B2056_SYN_LOGEN_BUF6_OVRVAL 0xA2 699#define B2056_SYN_LOGEN_CBUFRX1_OVRVAL 0xA3 700#define B2056_SYN_LOGEN_CBUFRX2_OVRVAL 0xA4 701#define B2056_SYN_LOGEN_CBUFRX3_OVRVAL 0xA5 702#define B2056_SYN_LOGEN_CBUFRX4_OVRVAL 0xA6 703#define B2056_SYN_LOGEN_CBUFTX1_OVRVAL 0xA7 704#define B2056_SYN_LOGEN_CBUFTX2_OVRVAL 0xA8 705#define B2056_SYN_LOGEN_CBUFTX3_OVRVAL 0xA9 706#define B2056_SYN_LOGEN_CBUFTX4_OVRVAL 0xAA 707#define B2056_SYN_LOGEN_CMOSRX1_OVRVAL 0xAB 708#define B2056_SYN_LOGEN_CMOSRX2_OVRVAL 0xAC 709#define B2056_SYN_LOGEN_CMOSRX3_OVRVAL 0xAD 710#define B2056_SYN_LOGEN_CMOSRX4_OVRVAL 0xAE 711#define B2056_SYN_LOGEN_CMOSTX1_OVRVAL 0xAF 712#define B2056_SYN_LOGEN_CMOSTX2_OVRVAL 0xB0 713#define B2056_SYN_LOGEN_CMOSTX3_OVRVAL 0xB1 714#define B2056_SYN_LOGEN_CMOSTX4_OVRVAL 0xB2 715#define B2056_SYN_LOGEN_ACL_WAITCNT 0xB3 716#define B2056_SYN_LOGEN_CORE_CALVALID 0xB4 717#define B2056_SYN_LOGEN_RX_CMOS_CALVALID 0xB5 718#define B2056_SYN_LOGEN_TX_CMOS_VALID 0xB6 719 720#define B2056_TX_RESERVED_ADDR0 0x00 721#define B2056_TX_IDCODE 0x01 722#define B2056_TX_RESERVED_ADDR2 0x02 723#define B2056_TX_RESERVED_ADDR3 0x03 724#define B2056_TX_RESERVED_ADDR4 0x04 725#define B2056_TX_RESERVED_ADDR5 0x05 726#define B2056_TX_RESERVED_ADDR6 0x06 727#define B2056_TX_RESERVED_ADDR7 0x07 728#define B2056_TX_COM_CTRL 0x08 729#define B2056_TX_COM_PU 0x09 730#define B2056_TX_COM_OVR 0x0A 731#define B2056_TX_COM_RESET 0x0B 732#define B2056_TX_COM_RCAL 0x0C 733#define B2056_TX_COM_RC_RXLPF 0x0D 734#define B2056_TX_COM_RC_TXLPF 0x0E 735#define B2056_TX_COM_RC_RXHPF 0x0F 736#define B2056_TX_RESERVED_ADDR16 0x10 737#define B2056_TX_RESERVED_ADDR17 0x11 738#define B2056_TX_RESERVED_ADDR18 0x12 739#define B2056_TX_RESERVED_ADDR19 0x13 740#define B2056_TX_RESERVED_ADDR20 0x14 741#define B2056_TX_RESERVED_ADDR21 0x15 742#define B2056_TX_RESERVED_ADDR22 0x16 743#define B2056_TX_RESERVED_ADDR23 0x17 744#define B2056_TX_RESERVED_ADDR24 0x18 745#define B2056_TX_RESERVED_ADDR25 0x19 746#define B2056_TX_RESERVED_ADDR26 0x1A 747#define B2056_TX_RESERVED_ADDR27 0x1B 748#define B2056_TX_RESERVED_ADDR28 0x1C 749#define B2056_TX_RESERVED_ADDR29 0x1D 750#define B2056_TX_RESERVED_ADDR30 0x1E 751#define B2056_TX_RESERVED_ADDR31 0x1F 752#define B2056_TX_IQCAL_GAIN_BW 0x20 753#define B2056_TX_LOFT_FINE_I 0x21 754#define B2056_TX_LOFT_FINE_Q 0x22 755#define B2056_TX_LOFT_COARSE_I 0x23 756#define B2056_TX_LOFT_COARSE_Q 0x24 757#define B2056_TX_TX_COM_MASTER1 0x25 758#define B2056_TX_TX_COM_MASTER2 0x26 759#define B2056_TX_RXIQCAL_TXMUX 0x27 760#define B2056_TX_TX_SSI_MASTER 0x28 761#define B2056_TX_IQCAL_VCM_HG 0x29 762#define B2056_TX_IQCAL_IDAC 0x2A 763#define B2056_TX_TSSI_VCM 0x2B 764#define B2056_TX_TX_AMP_DET 0x2C 765#define B2056_TX_TX_SSI_MUX 0x2D 766#define B2056_TX_TSSIA 0x2E 767#define B2056_TX_TSSIG 0x2F 768#define B2056_TX_TSSI_MISC1 0x30 769#define B2056_TX_TSSI_MISC2 0x31 770#define B2056_TX_TSSI_MISC3 0x32 771#define B2056_TX_PA_SPARE1 0x33 772#define B2056_TX_PA_SPARE2 0x34 773#define B2056_TX_INTPAA_MASTER 0x35 774#define B2056_TX_INTPAA_GAIN 0x36 775#define B2056_TX_INTPAA_BOOST_TUNE 0x37 776#define B2056_TX_INTPAA_IAUX_STAT 0x38 777#define B2056_TX_INTPAA_IAUX_DYN 0x39 778#define B2056_TX_INTPAA_IMAIN_STAT 0x3A 779#define B2056_TX_INTPAA_IMAIN_DYN 0x3B 780#define B2056_TX_INTPAA_CASCBIAS 0x3C 781#define B2056_TX_INTPAA_PASLOPE 0x3D 782#define B2056_TX_INTPAA_PA_MISC 0x3E 783#define B2056_TX_INTPAG_MASTER 0x3F 784#define B2056_TX_INTPAG_GAIN 0x40 785#define B2056_TX_INTPAG_BOOST_TUNE 0x41 786#define B2056_TX_INTPAG_IAUX_STAT 0x42 787#define B2056_TX_INTPAG_IAUX_DYN 0x43 788#define B2056_TX_INTPAG_IMAIN_STAT 0x44 789#define B2056_TX_INTPAG_IMAIN_DYN 0x45 790#define B2056_TX_INTPAG_CASCBIAS 0x46 791#define B2056_TX_INTPAG_PASLOPE 0x47 792#define B2056_TX_INTPAG_PA_MISC 0x48 793#define B2056_TX_PADA_MASTER 0x49 794#define B2056_TX_PADA_IDAC 0x4A 795#define B2056_TX_PADA_CASCBIAS 0x4B 796#define B2056_TX_PADA_GAIN 0x4C 797#define B2056_TX_PADA_BOOST_TUNE 0x4D 798#define B2056_TX_PADA_SLOPE 0x4E 799#define B2056_TX_PADG_MASTER 0x4F 800#define B2056_TX_PADG_IDAC 0x50 801#define B2056_TX_PADG_CASCBIAS 0x51 802#define B2056_TX_PADG_GAIN 0x52 803#define B2056_TX_PADG_BOOST_TUNE 0x53 804#define B2056_TX_PADG_SLOPE 0x54 805#define B2056_TX_PGAA_MASTER 0x55 806#define B2056_TX_PGAA_IDAC 0x56 807#define B2056_TX_PGAA_GAIN 0x57 808#define B2056_TX_PGAA_BOOST_TUNE 0x58 809#define B2056_TX_PGAA_SLOPE 0x59 810#define B2056_TX_PGAA_MISC 0x5A 811#define B2056_TX_PGAG_MASTER 0x5B 812#define B2056_TX_PGAG_IDAC 0x5C 813#define B2056_TX_PGAG_GAIN 0x5D 814#define B2056_TX_PGAG_BOOST_TUNE 0x5E 815#define B2056_TX_PGAG_SLOPE 0x5F 816#define B2056_TX_PGAG_MISC 0x60 817#define B2056_TX_MIXA_MASTER 0x61 818#define B2056_TX_MIXA_BOOST_TUNE 0x62 819#define B2056_TX_MIXG 0x63 820#define B2056_TX_MIXG_BOOST_TUNE 0x64 821#define B2056_TX_BB_GM_MASTER 0x65 822#define B2056_TX_GMBB_GM 0x66 823#define B2056_TX_GMBB_IDAC 0x67 824#define B2056_TX_TXLPF_MASTER 0x68 825#define B2056_TX_TXLPF_RCCAL 0x69 826#define B2056_TX_TXLPF_RCCAL_OFF0 0x6A 827#define B2056_TX_TXLPF_RCCAL_OFF1 0x6B 828#define B2056_TX_TXLPF_RCCAL_OFF2 0x6C 829#define B2056_TX_TXLPF_RCCAL_OFF3 0x6D 830#define B2056_TX_TXLPF_RCCAL_OFF4 0x6E 831#define B2056_TX_TXLPF_RCCAL_OFF5 0x6F 832#define B2056_TX_TXLPF_RCCAL_OFF6 0x70 833#define B2056_TX_TXLPF_BW 0x71 834#define B2056_TX_TXLPF_GAIN 0x72 835#define B2056_TX_TXLPF_IDAC 0x73 836#define B2056_TX_TXLPF_IDAC_0 0x74 837#define B2056_TX_TXLPF_IDAC_1 0x75 838#define B2056_TX_TXLPF_IDAC_2 0x76 839#define B2056_TX_TXLPF_IDAC_3 0x77 840#define B2056_TX_TXLPF_IDAC_4 0x78 841#define B2056_TX_TXLPF_IDAC_5 0x79 842#define B2056_TX_TXLPF_IDAC_6 0x7A 843#define B2056_TX_TXLPF_OPAMP_IDAC 0x7B 844#define B2056_TX_TXLPF_MISC 0x7C 845#define B2056_TX_TXSPARE1 0x7D 846#define B2056_TX_TXSPARE2 0x7E 847#define B2056_TX_TXSPARE3 0x7F 848#define B2056_TX_TXSPARE4 0x80 849#define B2056_TX_TXSPARE5 0x81 850#define B2056_TX_TXSPARE6 0x82 851#define B2056_TX_TXSPARE7 0x83 852#define B2056_TX_TXSPARE8 0x84 853#define B2056_TX_TXSPARE9 0x85 854#define B2056_TX_TXSPARE10 0x86 855#define B2056_TX_TXSPARE11 0x87 856#define B2056_TX_TXSPARE12 0x88 857#define B2056_TX_TXSPARE13 0x89 858#define B2056_TX_TXSPARE14 0x8A 859#define B2056_TX_TXSPARE15 0x8B 860#define B2056_TX_TXSPARE16 0x8C 861#define B2056_TX_STATUS_INTPA_GAIN 0x8D 862#define B2056_TX_STATUS_PAD_GAIN 0x8E 863#define B2056_TX_STATUS_PGA_GAIN 0x8F 864#define B2056_TX_STATUS_GM_TXLPF_GAIN 0x90 865#define B2056_TX_STATUS_TXLPF_BW 0x91 866#define B2056_TX_STATUS_TXLPF_RC 0x92 867#define B2056_TX_GMBB_IDAC0 0x93 868#define B2056_TX_GMBB_IDAC1 0x94 869#define B2056_TX_GMBB_IDAC2 0x95 870#define B2056_TX_GMBB_IDAC3 0x96 871#define B2056_TX_GMBB_IDAC4 0x97 872#define B2056_TX_GMBB_IDAC5 0x98 873#define B2056_TX_GMBB_IDAC6 0x99 874#define B2056_TX_GMBB_IDAC7 0x9A 875 876#define B2056_RX_RESERVED_ADDR0 0x00 877#define B2056_RX_IDCODE 0x01 878#define B2056_RX_RESERVED_ADDR2 0x02 879#define B2056_RX_RESERVED_ADDR3 0x03 880#define B2056_RX_RESERVED_ADDR4 0x04 881#define B2056_RX_RESERVED_ADDR5 0x05 882#define B2056_RX_RESERVED_ADDR6 0x06 883#define B2056_RX_RESERVED_ADDR7 0x07 884#define B2056_RX_COM_CTRL 0x08 885#define B2056_RX_COM_PU 0x09 886#define B2056_RX_COM_OVR 0x0A 887#define B2056_RX_COM_RESET 0x0B 888#define B2056_RX_COM_RCAL 0x0C 889#define B2056_RX_COM_RC_RXLPF 0x0D 890#define B2056_RX_COM_RC_TXLPF 0x0E 891#define B2056_RX_COM_RC_RXHPF 0x0F 892#define B2056_RX_RESERVED_ADDR16 0x10 893#define B2056_RX_RESERVED_ADDR17 0x11 894#define B2056_RX_RESERVED_ADDR18 0x12 895#define B2056_RX_RESERVED_ADDR19 0x13 896#define B2056_RX_RESERVED_ADDR20 0x14 897#define B2056_RX_RESERVED_ADDR21 0x15 898#define B2056_RX_RESERVED_ADDR22 0x16 899#define B2056_RX_RESERVED_ADDR23 0x17 900#define B2056_RX_RESERVED_ADDR24 0x18 901#define B2056_RX_RESERVED_ADDR25 0x19 902#define B2056_RX_RESERVED_ADDR26 0x1A 903#define B2056_RX_RESERVED_ADDR27 0x1B 904#define B2056_RX_RESERVED_ADDR28 0x1C 905#define B2056_RX_RESERVED_ADDR29 0x1D 906#define B2056_RX_RESERVED_ADDR30 0x1E 907#define B2056_RX_RESERVED_ADDR31 0x1F 908#define B2056_RX_RXIQCAL_RXMUX 0x20 909#define B2056_RX_RSSI_PU 0x21 910#define B2056_RX_RSSI_SEL 0x22 911#define B2056_RX_RSSI_GAIN 0x23 912#define B2056_RX_RSSI_NB_IDAC 0x24 913#define B2056_RX_RSSI_WB2I_IDAC_1 0x25 914#define B2056_RX_RSSI_WB2I_IDAC_2 0x26 915#define B2056_RX_RSSI_WB2Q_IDAC_1 0x27 916#define B2056_RX_RSSI_WB2Q_IDAC_2 0x28 917#define B2056_RX_RSSI_POLE 0x29 918#define B2056_RX_RSSI_WB1_IDAC 0x2A 919#define B2056_RX_RSSI_MISC 0x2B 920#define B2056_RX_LNAA_MASTER 0x2C 921#define B2056_RX_LNAA_TUNE 0x2D 922#define B2056_RX_LNAA_GAIN 0x2E 923#define B2056_RX_LNA_A_SLOPE 0x2F 924#define B2056_RX_BIASPOLE_LNAA1_IDAC 0x30 925#define B2056_RX_LNAA2_IDAC 0x31 926#define B2056_RX_LNA1A_MISC 0x32 927#define B2056_RX_LNAG_MASTER 0x33 928#define B2056_RX_LNAG_TUNE 0x34 929#define B2056_RX_LNAG_GAIN 0x35 930#define B2056_RX_LNA_G_SLOPE 0x36 931#define B2056_RX_BIASPOLE_LNAG1_IDAC 0x37 932#define B2056_RX_LNAG2_IDAC 0x38 933#define B2056_RX_LNA1G_MISC 0x39 934#define B2056_RX_MIXA_MASTER 0x3A 935#define B2056_RX_MIXA_VCM 0x3B 936#define B2056_RX_MIXA_CTRLPTAT 0x3C 937#define B2056_RX_MIXA_LOB_BIAS 0x3D 938#define B2056_RX_MIXA_CORE_IDAC 0x3E 939#define B2056_RX_MIXA_CMFB_IDAC 0x3F 940#define B2056_RX_MIXA_BIAS_AUX 0x40 941#define B2056_RX_MIXA_BIAS_MAIN 0x41 942#define B2056_RX_MIXA_BIAS_MISC 0x42 943#define B2056_RX_MIXA_MAST_BIAS 0x43 944#define B2056_RX_MIXG_MASTER 0x44 945#define B2056_RX_MIXG_VCM 0x45 946#define B2056_RX_MIXG_CTRLPTAT 0x46 947#define B2056_RX_MIXG_LOB_BIAS 0x47 948#define B2056_RX_MIXG_CORE_IDAC 0x48 949#define B2056_RX_MIXG_CMFB_IDAC 0x49 950#define B2056_RX_MIXG_BIAS_AUX 0x4A 951#define B2056_RX_MIXG_BIAS_MAIN 0x4B 952#define B2056_RX_MIXG_BIAS_MISC 0x4C 953#define B2056_RX_MIXG_MAST_BIAS 0x4D 954#define B2056_RX_TIA_MASTER 0x4E 955#define B2056_RX_TIA_IOPAMP 0x4F 956#define B2056_RX_TIA_QOPAMP 0x50 957#define B2056_RX_TIA_IMISC 0x51 958#define B2056_RX_TIA_QMISC 0x52 959#define B2056_RX_TIA_GAIN 0x53 960#define B2056_RX_TIA_SPARE1 0x54 961#define B2056_RX_TIA_SPARE2 0x55 962#define B2056_RX_BB_LPF_MASTER 0x56 963#define B2056_RX_AACI_MASTER 0x57 964#define B2056_RX_RXLPF_IDAC 0x58 965#define B2056_RX_RXLPF_OPAMPBIAS_LOWQ 0x59 966#define B2056_RX_RXLPF_OPAMPBIAS_HIGHQ 0x5A 967#define B2056_RX_RXLPF_BIAS_DCCANCEL 0x5B 968#define B2056_RX_RXLPF_OUTVCM 0x5C 969#define B2056_RX_RXLPF_INVCM_BODY 0x5D 970#define B2056_RX_RXLPF_CC_OP 0x5E 971#define B2056_RX_RXLPF_GAIN 0x5F 972#define B2056_RX_RXLPF_Q_BW 0x60 973#define B2056_RX_RXLPF_HP_CORNER_BW 0x61 974#define B2056_RX_RXLPF_RCCAL_HPC 0x62 975#define B2056_RX_RXHPF_OFF0 0x63 976#define B2056_RX_RXHPF_OFF1 0x64 977#define B2056_RX_RXHPF_OFF2 0x65 978#define B2056_RX_RXHPF_OFF3 0x66 979#define B2056_RX_RXHPF_OFF4 0x67 980#define B2056_RX_RXHPF_OFF5 0x68 981#define B2056_RX_RXHPF_OFF6 0x69 982#define B2056_RX_RXHPF_OFF7 0x6A 983#define B2056_RX_RXLPF_RCCAL_LPC 0x6B 984#define B2056_RX_RXLPF_OFF_0 0x6C 985#define B2056_RX_RXLPF_OFF_1 0x6D 986#define B2056_RX_RXLPF_OFF_2 0x6E 987#define B2056_RX_RXLPF_OFF_3 0x6F 988#define B2056_RX_RXLPF_OFF_4 0x70 989#define B2056_RX_UNUSED 0x71 990#define B2056_RX_VGA_MASTER 0x72 991#define B2056_RX_VGA_BIAS 0x73 992#define B2056_RX_VGA_BIAS_DCCANCEL 0x74 993#define B2056_RX_VGA_GAIN 0x75 994#define B2056_RX_VGA_HP_CORNER_BW 0x76 995#define B2056_RX_VGABUF_BIAS 0x77 996#define B2056_RX_VGABUF_GAIN_BW 0x78 997#define B2056_RX_TXFBMIX_A 0x79 998#define B2056_RX_TXFBMIX_G 0x7A 999#define B2056_RX_RXSPARE1 0x7B 1000#define B2056_RX_RXSPARE2 0x7C
1001#define B2056_RX_RXSPARE3 0x7D 1002#define B2056_RX_RXSPARE4 0x7E 1003#define B2056_RX_RXSPARE5 0x7F 1004#define B2056_RX_RXSPARE6 0x80 1005#define B2056_RX_RXSPARE7 0x81 1006#define B2056_RX_RXSPARE8 0x82 1007#define B2056_RX_RXSPARE9 0x83 1008#define B2056_RX_RXSPARE10 0x84 1009#define B2056_RX_RXSPARE11 0x85 1010#define B2056_RX_RXSPARE12 0x86 1011#define B2056_RX_RXSPARE13 0x87 1012#define B2056_RX_RXSPARE14 0x88 1013#define B2056_RX_RXSPARE15 0x89 1014#define B2056_RX_RXSPARE16 0x8A 1015#define B2056_RX_STATUS_LNAA_GAIN 0x8B 1016#define B2056_RX_STATUS_LNAG_GAIN 0x8C 1017#define B2056_RX_STATUS_MIXTIA_GAIN 0x8D 1018#define B2056_RX_STATUS_RXLPF_GAIN 0x8E 1019#define B2056_RX_STATUS_VGA_BUF_GAIN 0x8F 1020#define B2056_RX_STATUS_RXLPF_Q 0x90 1021#define B2056_RX_STATUS_RXLPF_BUF_BW 0x91 1022#define B2056_RX_STATUS_RXLPF_VGA_HPC 0x92 1023#define B2056_RX_STATUS_RXLPF_RC 0x93 1024#define B2056_RX_STATUS_HPC_RC 0x94 1025 1026#define B2056_LNA1_A_PU 0x01 1027#define B2056_LNA2_A_PU 0x02 1028#define B2056_LNA1_G_PU 0x01 1029#define B2056_LNA2_G_PU 0x02 1030#define B2056_MIXA_PU_I 0x01 1031#define B2056_MIXA_PU_Q 0x02 1032#define B2056_MIXA_PU_GM 0x10 1033#define B2056_MIXG_PU_I 0x01 1034#define B2056_MIXG_PU_Q 0x02 1035#define B2056_MIXG_PU_GM 0x10 1036#define B2056_TIA_PU 0x01 1037#define B2056_BB_LPF_PU 0x20 1038#define B2056_W1_PU 0x02 1039#define B2056_W2_PU 0x04 1040#define B2056_NB_PU 0x08 1041#define B2056_RSSI_W1_SEL 0x02 1042#define B2056_RSSI_W2_SEL 0x04 1043#define B2056_RSSI_NB_SEL 0x08 1044#define B2056_VCM_MASK 0x1C 1045#define B2056_RSSI_VCM_SHIFT 0x02 1046 1047struct b43_nphy_channeltab_entry_rev3 { 1048 /* The channel frequency in MHz */ 1049 u16 freq; 1050 /* Radio register values on channelswitch */ 1051 u8 radio_syn_pll_vcocal1; 1052 u8 radio_syn_pll_vcocal2; 1053 u8 radio_syn_pll_refdiv; 1054 u8 radio_syn_pll_mmd2; 1055 u8 radio_syn_pll_mmd1; 1056 u8 radio_syn_pll_loopfilter1; 1057 u8 radio_syn_pll_loopfilter2; 1058 u8 radio_syn_pll_loopfilter3; 1059 u8 radio_syn_pll_loopfilter4; 1060 u8 radio_syn_pll_loopfilter5; 1061 u8 radio_syn_reserved_addr27; 1062 u8 radio_syn_reserved_addr28; 1063 u8 radio_syn_reserved_addr29; 1064 u8 radio_syn_logen_vcobuf1; 1065 u8 radio_syn_logen_mixer2; 1066 u8 radio_syn_logen_buf3; 1067 u8 radio_syn_logen_buf4; 1068 u8 radio_rx0_lnaa_tune; 1069 u8 radio_rx0_lnag_tune; 1070 u8 radio_tx0_intpaa_boost_tune; 1071 u8 radio_tx0_intpag_boost_tune; 1072 u8 radio_tx0_pada_boost_tune; 1073 u8 radio_tx0_padg_boost_tune; 1074 u8 radio_tx0_pgaa_boost_tune; 1075 u8 radio_tx0_pgag_boost_tune; 1076 u8 radio_tx0_mixa_boost_tune; 1077 u8 radio_tx0_mixg_boost_tune; 1078 u8 radio_rx1_lnaa_tune; 1079 u8 radio_rx1_lnag_tune; 1080 u8 radio_tx1_intpaa_boost_tune; 1081 u8 radio_tx1_intpag_boost_tune; 1082 u8 radio_tx1_pada_boost_tune; 1083 u8 radio_tx1_padg_boost_tune; 1084 u8 radio_tx1_pgaa_boost_tune; 1085 u8 radio_tx1_pgag_boost_tune; 1086 u8 radio_tx1_mixa_boost_tune; 1087 u8 radio_tx1_mixg_boost_tune; 1088 /* PHY register values on channelswitch */ 1089 struct b43_phy_n_sfo_cfg phy_regs; 1090}; 1091 1092void b2056_upload_inittabs(struct b43_wldev *dev, 1093 bool ghz5, bool ignore_uploadflag); 1094void b2056_upload_syn_pll_cp2(struct b43_wldev *dev, bool ghz5); 1095 1096/* Get the NPHY Channel Switch Table entry for a channel. 1097 * Returns NULL on failure to find an entry. */ 1098const struct b43_nphy_channeltab_entry_rev3 * 1099b43_nphy_get_chantabent_rev3(struct b43_wldev *dev, u16 freq); 1100 1101#endif /* B43_RADIO_2056_H_ */ 1102