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7#ifndef __iwl_fw_file_h__
8#define __iwl_fw_file_h__
9
10#include <linux/netdevice.h>
11#include <linux/nl80211.h>
12
13
14struct iwl_ucode_header {
15 __le32 ver;
16 union {
17 struct {
18 __le32 inst_size;
19 __le32 data_size;
20 __le32 init_size;
21 __le32 init_data_size;
22 __le32 boot_size;
23 u8 data[0];
24 } v1;
25 struct {
26 __le32 build;
27 __le32 inst_size;
28 __le32 data_size;
29 __le32 init_size;
30 __le32 init_data_size;
31 __le32 boot_size;
32 u8 data[0];
33 } v2;
34 } u;
35};
36
37#define IWL_UCODE_TLV_DEBUG_BASE 0x1000005
38#define IWL_UCODE_TLV_CONST_BASE 0x100
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46
47enum iwl_ucode_tlv_type {
48 IWL_UCODE_TLV_INVALID = 0,
49 IWL_UCODE_TLV_INST = 1,
50 IWL_UCODE_TLV_DATA = 2,
51 IWL_UCODE_TLV_INIT = 3,
52 IWL_UCODE_TLV_INIT_DATA = 4,
53 IWL_UCODE_TLV_BOOT = 5,
54 IWL_UCODE_TLV_PROBE_MAX_LEN = 6,
55 IWL_UCODE_TLV_PAN = 7,
56 IWL_UCODE_TLV_MEM_DESC = 7,
57 IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8,
58 IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9,
59 IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10,
60 IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11,
61 IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12,
62 IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13,
63 IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14,
64 IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
65 IWL_UCODE_TLV_WOWLAN_INST = 16,
66 IWL_UCODE_TLV_WOWLAN_DATA = 17,
67 IWL_UCODE_TLV_FLAGS = 18,
68 IWL_UCODE_TLV_SEC_RT = 19,
69 IWL_UCODE_TLV_SEC_INIT = 20,
70 IWL_UCODE_TLV_SEC_WOWLAN = 21,
71 IWL_UCODE_TLV_DEF_CALIB = 22,
72 IWL_UCODE_TLV_PHY_SKU = 23,
73 IWL_UCODE_TLV_SECURE_SEC_RT = 24,
74 IWL_UCODE_TLV_SECURE_SEC_INIT = 25,
75 IWL_UCODE_TLV_SECURE_SEC_WOWLAN = 26,
76 IWL_UCODE_TLV_NUM_OF_CPU = 27,
77 IWL_UCODE_TLV_CSCHEME = 28,
78 IWL_UCODE_TLV_API_CHANGES_SET = 29,
79 IWL_UCODE_TLV_ENABLED_CAPABILITIES = 30,
80 IWL_UCODE_TLV_N_SCAN_CHANNELS = 31,
81 IWL_UCODE_TLV_PAGING = 32,
82 IWL_UCODE_TLV_SEC_RT_USNIFFER = 34,
83
84 IWL_UCODE_TLV_FW_VERSION = 36,
85 IWL_UCODE_TLV_FW_DBG_DEST = 38,
86 IWL_UCODE_TLV_FW_DBG_CONF = 39,
87 IWL_UCODE_TLV_FW_DBG_TRIGGER = 40,
88 IWL_UCODE_TLV_CMD_VERSIONS = 48,
89 IWL_UCODE_TLV_FW_GSCAN_CAPA = 50,
90 IWL_UCODE_TLV_FW_MEM_SEG = 51,
91 IWL_UCODE_TLV_IML = 52,
92 IWL_UCODE_TLV_UMAC_DEBUG_ADDRS = 54,
93 IWL_UCODE_TLV_LMAC_DEBUG_ADDRS = 55,
94 IWL_UCODE_TLV_FW_RECOVERY_INFO = 57,
95 IWL_UCODE_TLV_HW_TYPE = 58,
96 IWL_UCODE_TLV_FW_FSEQ_VERSION = 60,
97 IWL_UCODE_TLV_PHY_INTEGRATION_VERSION = 61,
98
99 IWL_UCODE_TLV_PNVM_VERSION = 62,
100 IWL_UCODE_TLV_PNVM_SKU = 64,
101 IWL_UCODE_TLV_TCM_DEBUG_ADDRS = 65,
102
103 IWL_UCODE_TLV_FW_NUM_STATIONS = IWL_UCODE_TLV_CONST_BASE + 0,
104
105 IWL_UCODE_TLV_TYPE_DEBUG_INFO = IWL_UCODE_TLV_DEBUG_BASE + 0,
106 IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION = IWL_UCODE_TLV_DEBUG_BASE + 1,
107 IWL_UCODE_TLV_TYPE_HCMD = IWL_UCODE_TLV_DEBUG_BASE + 2,
108 IWL_UCODE_TLV_TYPE_REGIONS = IWL_UCODE_TLV_DEBUG_BASE + 3,
109 IWL_UCODE_TLV_TYPE_TRIGGERS = IWL_UCODE_TLV_DEBUG_BASE + 4,
110 IWL_UCODE_TLV_DEBUG_MAX = IWL_UCODE_TLV_TYPE_TRIGGERS,
111
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113 IWL_UCODE_TLV_FW_DBG_DUMP_LST = 0x1000,
114};
115
116struct iwl_ucode_tlv {
117 __le32 type;
118 __le32 length;
119 u8 data[0];
120};
121
122#define IWL_TLV_UCODE_MAGIC 0x0a4c5749
123#define FW_VER_HUMAN_READABLE_SZ 64
124
125struct iwl_tlv_ucode_header {
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132 __le32 zero;
133 __le32 magic;
134 u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
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136 __le32 ver;
137 __le32 build;
138 __le64 ignore;
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145 u8 data[0];
146};
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153struct iwl_ucode_api {
154 __le32 api_index;
155 __le32 api_flags;
156} __packed;
157
158struct iwl_ucode_capa {
159 __le32 api_index;
160 __le32 api_capa;
161} __packed;
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184enum iwl_ucode_tlv_flag {
185 IWL_UCODE_TLV_FLAGS_PAN = BIT(0),
186 IWL_UCODE_TLV_FLAGS_NEWSCAN = BIT(1),
187 IWL_UCODE_TLV_FLAGS_MFP = BIT(2),
188 IWL_UCODE_TLV_FLAGS_SHORT_BL = BIT(7),
189 IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS = BIT(10),
190 IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID = BIT(12),
191 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL = BIT(15),
192 IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE = BIT(16),
193 IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT = BIT(24),
194 IWL_UCODE_TLV_FLAGS_EBS_SUPPORT = BIT(25),
195 IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD = BIT(26),
196 IWL_UCODE_TLV_FLAGS_BCAST_FILTERING = BIT(29),
197};
198
199typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
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246enum iwl_ucode_tlv_api {
247
248 IWL_UCODE_TLV_API_FRAGMENTED_SCAN = (__force iwl_ucode_tlv_api_t)8,
249 IWL_UCODE_TLV_API_WIFI_MCC_UPDATE = (__force iwl_ucode_tlv_api_t)9,
250 IWL_UCODE_TLV_API_LQ_SS_PARAMS = (__force iwl_ucode_tlv_api_t)18,
251 IWL_UCODE_TLV_API_NEW_VERSION = (__force iwl_ucode_tlv_api_t)20,
252 IWL_UCODE_TLV_API_SCAN_TSF_REPORT = (__force iwl_ucode_tlv_api_t)28,
253 IWL_UCODE_TLV_API_TKIP_MIC_KEYS = (__force iwl_ucode_tlv_api_t)29,
254 IWL_UCODE_TLV_API_STA_TYPE = (__force iwl_ucode_tlv_api_t)30,
255 IWL_UCODE_TLV_API_NAN2_VER2 = (__force iwl_ucode_tlv_api_t)31,
256
257 IWL_UCODE_TLV_API_ADAPTIVE_DWELL = (__force iwl_ucode_tlv_api_t)32,
258 IWL_UCODE_TLV_API_OCE = (__force iwl_ucode_tlv_api_t)33,
259 IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE = (__force iwl_ucode_tlv_api_t)34,
260 IWL_UCODE_TLV_API_NEW_RX_STATS = (__force iwl_ucode_tlv_api_t)35,
261 IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL = (__force iwl_ucode_tlv_api_t)36,
262 IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY = (__force iwl_ucode_tlv_api_t)38,
263 IWL_UCODE_TLV_API_DEPRECATE_TTAK = (__force iwl_ucode_tlv_api_t)41,
264 IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2 = (__force iwl_ucode_tlv_api_t)42,
265 IWL_UCODE_TLV_API_FRAG_EBS = (__force iwl_ucode_tlv_api_t)44,
266 IWL_UCODE_TLV_API_REDUCE_TX_POWER = (__force iwl_ucode_tlv_api_t)45,
267 IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF = (__force iwl_ucode_tlv_api_t)46,
268 IWL_UCODE_TLV_API_BEACON_FILTER_V4 = (__force iwl_ucode_tlv_api_t)47,
269 IWL_UCODE_TLV_API_REGULATORY_NVM_INFO = (__force iwl_ucode_tlv_api_t)48,
270 IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ = (__force iwl_ucode_tlv_api_t)49,
271 IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS = (__force iwl_ucode_tlv_api_t)50,
272 IWL_UCODE_TLV_API_MBSSID_HE = (__force iwl_ucode_tlv_api_t)52,
273 IWL_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE = (__force iwl_ucode_tlv_api_t)53,
274 IWL_UCODE_TLV_API_FTM_RTT_ACCURACY = (__force iwl_ucode_tlv_api_t)54,
275 IWL_UCODE_TLV_API_SAR_TABLE_VER = (__force iwl_ucode_tlv_api_t)55,
276 IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG = (__force iwl_ucode_tlv_api_t)56,
277 IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP = (__force iwl_ucode_tlv_api_t)57,
278 IWL_UCODE_TLV_API_SCAN_EXT_CHAN_VER = (__force iwl_ucode_tlv_api_t)58,
279 IWL_UCODE_TLV_API_BAND_IN_RX_DATA = (__force iwl_ucode_tlv_api_t)59,
280
281
282#ifdef __CHECKER__
283
284#define NUM_IWL_UCODE_TLV_API 128
285#else
286 NUM_IWL_UCODE_TLV_API
287#endif
288};
289
290typedef unsigned int __bitwise iwl_ucode_tlv_capa_t;
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373enum iwl_ucode_tlv_capa {
374
375 IWL_UCODE_TLV_CAPA_D0I3_SUPPORT = (__force iwl_ucode_tlv_capa_t)0,
376 IWL_UCODE_TLV_CAPA_LAR_SUPPORT = (__force iwl_ucode_tlv_capa_t)1,
377 IWL_UCODE_TLV_CAPA_UMAC_SCAN = (__force iwl_ucode_tlv_capa_t)2,
378 IWL_UCODE_TLV_CAPA_BEAMFORMER = (__force iwl_ucode_tlv_capa_t)3,
379 IWL_UCODE_TLV_CAPA_TDLS_SUPPORT = (__force iwl_ucode_tlv_capa_t)6,
380 IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT = (__force iwl_ucode_tlv_capa_t)8,
381 IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)9,
382 IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)10,
383 IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT = (__force iwl_ucode_tlv_capa_t)11,
384 IWL_UCODE_TLV_CAPA_DQA_SUPPORT = (__force iwl_ucode_tlv_capa_t)12,
385 IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH = (__force iwl_ucode_tlv_capa_t)13,
386 IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG = (__force iwl_ucode_tlv_capa_t)17,
387 IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT = (__force iwl_ucode_tlv_capa_t)18,
388 IWL_UCODE_TLV_CAPA_DC2DC_CONFIG_SUPPORT = (__force iwl_ucode_tlv_capa_t)19,
389 IWL_UCODE_TLV_CAPA_CSUM_SUPPORT = (__force iwl_ucode_tlv_capa_t)21,
390 IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS = (__force iwl_ucode_tlv_capa_t)22,
391 IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD = (__force iwl_ucode_tlv_capa_t)26,
392 IWL_UCODE_TLV_CAPA_BT_COEX_PLCR = (__force iwl_ucode_tlv_capa_t)28,
393 IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC = (__force iwl_ucode_tlv_capa_t)29,
394 IWL_UCODE_TLV_CAPA_BT_COEX_RRC = (__force iwl_ucode_tlv_capa_t)30,
395 IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)31,
396
397
398 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT = (__force iwl_ucode_tlv_capa_t)37,
399 IWL_UCODE_TLV_CAPA_STA_PM_NOTIF = (__force iwl_ucode_tlv_capa_t)38,
400 IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)39,
401 IWL_UCODE_TLV_CAPA_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)40,
402 IWL_UCODE_TLV_CAPA_D0I3_END_FIRST = (__force iwl_ucode_tlv_capa_t)41,
403 IWL_UCODE_TLV_CAPA_TLC_OFFLOAD = (__force iwl_ucode_tlv_capa_t)43,
404 IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA = (__force iwl_ucode_tlv_capa_t)44,
405 IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2 = (__force iwl_ucode_tlv_capa_t)45,
406 IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD = (__force iwl_ucode_tlv_capa_t)46,
407 IWL_UCODE_TLV_CAPA_FTM_CALIBRATED = (__force iwl_ucode_tlv_capa_t)47,
408 IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS = (__force iwl_ucode_tlv_capa_t)48,
409 IWL_UCODE_TLV_CAPA_CS_MODIFY = (__force iwl_ucode_tlv_capa_t)49,
410 IWL_UCODE_TLV_CAPA_SET_LTR_GEN2 = (__force iwl_ucode_tlv_capa_t)50,
411 IWL_UCODE_TLV_CAPA_SET_PPAG = (__force iwl_ucode_tlv_capa_t)52,
412 IWL_UCODE_TLV_CAPA_TAS_CFG = (__force iwl_ucode_tlv_capa_t)53,
413 IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD = (__force iwl_ucode_tlv_capa_t)54,
414 IWL_UCODE_TLV_CAPA_PROTECTED_TWT = (__force iwl_ucode_tlv_capa_t)56,
415 IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE = (__force iwl_ucode_tlv_capa_t)57,
416 IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN = (__force iwl_ucode_tlv_capa_t)58,
417 IWL_UCODE_TLV_CAPA_HIDDEN_6GHZ_SCAN = (__force iwl_ucode_tlv_capa_t)59,
418 IWL_UCODE_TLV_CAPA_BROADCAST_TWT = (__force iwl_ucode_tlv_capa_t)60,
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421 IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE = (__force iwl_ucode_tlv_capa_t)64,
422 IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS = (__force iwl_ucode_tlv_capa_t)65,
423 IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT = (__force iwl_ucode_tlv_capa_t)67,
424 IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT = (__force iwl_ucode_tlv_capa_t)68,
425 IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD = (__force iwl_ucode_tlv_capa_t)70,
426 IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION = (__force iwl_ucode_tlv_capa_t)71,
427 IWL_UCODE_TLV_CAPA_BEACON_STORING = (__force iwl_ucode_tlv_capa_t)72,
428 IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3 = (__force iwl_ucode_tlv_capa_t)73,
429 IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW = (__force iwl_ucode_tlv_capa_t)74,
430 IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT = (__force iwl_ucode_tlv_capa_t)75,
431 IWL_UCODE_TLV_CAPA_CTDP_SUPPORT = (__force iwl_ucode_tlv_capa_t)76,
432 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED = (__force iwl_ucode_tlv_capa_t)77,
433 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG = (__force iwl_ucode_tlv_capa_t)80,
434 IWL_UCODE_TLV_CAPA_LQM_SUPPORT = (__force iwl_ucode_tlv_capa_t)81,
435 IWL_UCODE_TLV_CAPA_TX_POWER_ACK = (__force iwl_ucode_tlv_capa_t)84,
436 IWL_UCODE_TLV_CAPA_D3_DEBUG = (__force iwl_ucode_tlv_capa_t)87,
437 IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT = (__force iwl_ucode_tlv_capa_t)88,
438 IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT = (__force iwl_ucode_tlv_capa_t)89,
439 IWL_UCODE_TLV_CAPA_CSI_REPORTING = (__force iwl_ucode_tlv_capa_t)90,
440 IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP = (__force iwl_ucode_tlv_capa_t)92,
441 IWL_UCODE_TLV_CAPA_DBG_BUF_ALLOC_CMD_SUPP = (__force iwl_ucode_tlv_capa_t)93,
442
443
444 IWL_UCODE_TLV_CAPA_MLME_OFFLOAD = (__force iwl_ucode_tlv_capa_t)96,
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449 IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)98,
450
451 IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT = (__force iwl_ucode_tlv_capa_t)100,
452 IWL_UCODE_TLV_CAPA_RFIM_SUPPORT = (__force iwl_ucode_tlv_capa_t)102,
453
454#ifdef __CHECKER__
455
456#define NUM_IWL_UCODE_TLV_CAPA 128
457#else
458 NUM_IWL_UCODE_TLV_CAPA
459#endif
460};
461
462
463#define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18
464#define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE 19
465#define IWL_MAX_PHY_CALIBRATE_TBL_SIZE 253
466
467
468#define IWL_DEFAULT_MAX_PROBE_LENGTH 200
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473
474#define CPU1_CPU2_SEPARATOR_SECTION 0xFFFFCCCC
475#define PAGING_SEPARATOR_SECTION 0xAAAABBBB
476
477
478#define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24)
479#define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16)
480#define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8)
481#define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF)
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491struct iwl_tlv_calib_ctrl {
492 __le32 flow_trigger;
493 __le32 event_trigger;
494} __packed;
495
496enum iwl_fw_phy_cfg {
497 FW_PHY_CFG_RADIO_TYPE_POS = 0,
498 FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS,
499 FW_PHY_CFG_RADIO_STEP_POS = 2,
500 FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS,
501 FW_PHY_CFG_RADIO_DASH_POS = 4,
502 FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS,
503 FW_PHY_CFG_TX_CHAIN_POS = 16,
504 FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS,
505 FW_PHY_CFG_RX_CHAIN_POS = 20,
506 FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS,
507 FW_PHY_CFG_CHAIN_SAD_POS = 23,
508 FW_PHY_CFG_CHAIN_SAD_ENABLED = 0x1 << FW_PHY_CFG_CHAIN_SAD_POS,
509 FW_PHY_CFG_CHAIN_SAD_ANT_A = 0x2 << FW_PHY_CFG_CHAIN_SAD_POS,
510 FW_PHY_CFG_CHAIN_SAD_ANT_B = 0x4 << FW_PHY_CFG_CHAIN_SAD_POS,
511 FW_PHY_CFG_SHARED_CLK = BIT(31),
512};
513
514#define IWL_UCODE_MAX_CS 1
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529struct iwl_fw_cipher_scheme {
530 __le32 cipher;
531 u8 flags;
532 u8 hdr_len;
533 u8 pn_len;
534 u8 pn_off;
535 u8 key_idx_off;
536 u8 key_idx_mask;
537 u8 key_idx_shift;
538 u8 mic_len;
539 u8 hw_cipher;
540} __packed;
541
542enum iwl_fw_dbg_reg_operator {
543 CSR_ASSIGN,
544 CSR_SETBIT,
545 CSR_CLEARBIT,
546
547 PRPH_ASSIGN,
548 PRPH_SETBIT,
549 PRPH_CLEARBIT,
550
551 INDIRECT_ASSIGN,
552 INDIRECT_SETBIT,
553 INDIRECT_CLEARBIT,
554
555 PRPH_BLOCKBIT,
556};
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565struct iwl_fw_dbg_reg_op {
566 u8 op;
567 u8 reserved[3];
568 __le32 addr;
569 __le32 val;
570} __packed;
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580enum iwl_fw_dbg_monitor_mode {
581 SMEM_MODE = 0,
582 EXTERNAL_MODE = 1,
583 MARBH_MODE = 2,
584 MIPI_MODE = 3,
585};
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595
596struct iwl_fw_dbg_mem_seg_tlv {
597 __le32 data_type;
598 __le32 ofs;
599 __le32 len;
600} __packed;
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618struct iwl_fw_dbg_dest_tlv_v1 {
619 u8 version;
620 u8 monitor_mode;
621 u8 size_power;
622 u8 reserved;
623 __le32 base_reg;
624 __le32 end_reg;
625 __le32 write_ptr_reg;
626 __le32 wrap_count;
627 u8 base_shift;
628 u8 end_shift;
629 struct iwl_fw_dbg_reg_op reg_ops[0];
630} __packed;
631
632
633#define IWL_LDBG_M2S_BUF_SIZE_MSK 0x0fff0000
634
635#define IWL_LDBG_M2S_BUF_BA_MSK 0x00000fff
636
637#define IWL_M2S_UNIT_SIZE 0x100
638
639struct iwl_fw_dbg_dest_tlv {
640 u8 version;
641 u8 monitor_mode;
642 u8 size_power;
643 u8 reserved;
644 __le32 cfg_reg;
645 __le32 write_ptr_reg;
646 __le32 wrap_count;
647 u8 base_shift;
648 u8 size_shift;
649 struct iwl_fw_dbg_reg_op reg_ops[0];
650} __packed;
651
652struct iwl_fw_dbg_conf_hcmd {
653 u8 id;
654 u8 reserved;
655 __le16 len;
656 u8 data[0];
657} __packed;
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666
667enum iwl_fw_dbg_trigger_mode {
668 IWL_FW_DBG_TRIGGER_START = BIT(0),
669 IWL_FW_DBG_TRIGGER_STOP = BIT(1),
670 IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2),
671};
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676
677enum iwl_fw_dbg_trigger_flags {
678 IWL_FW_DBG_FORCE_RESTART = BIT(0),
679};
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690
691enum iwl_fw_dbg_trigger_vif_type {
692 IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED,
693 IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC,
694 IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION,
695 IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP,
696 IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT,
697 IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO,
698 IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE,
699};
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719struct iwl_fw_dbg_trigger_tlv {
720 __le32 id;
721 __le32 vif_type;
722 __le32 stop_conf_ids;
723 __le32 stop_delay;
724 u8 mode;
725 u8 start_conf_id;
726 __le16 occurrences;
727 __le16 trig_dis_ms;
728 u8 flags;
729 u8 reserved[5];
730
731 u8 data[0];
732} __packed;
733
734#define FW_DBG_START_FROM_ALIVE 0
735#define FW_DBG_CONF_MAX 32
736#define FW_DBG_INVALID 0xff
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746
747struct iwl_fw_dbg_trigger_missed_bcon {
748 __le32 stop_consec_missed_bcon;
749 __le32 stop_consec_missed_bcon_since_rx;
750 __le32 reserved2[2];
751 __le32 start_consec_missed_bcon;
752 __le32 start_consec_missed_bcon_since_rx;
753 __le32 reserved1[2];
754} __packed;
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760struct iwl_fw_dbg_trigger_cmd {
761 struct cmd {
762 u8 cmd_id;
763 u8 group_id;
764 } __packed cmds[16];
765} __packed;
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774struct iwl_fw_dbg_trigger_stats {
775 __le32 stop_offset;
776 __le32 stop_threshold;
777 __le32 start_offset;
778 __le32 start_threshold;
779} __packed;
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785struct iwl_fw_dbg_trigger_low_rssi {
786 __le32 rssi;
787} __packed;
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806struct iwl_fw_dbg_trigger_mlme {
807 u8 stop_auth_denied;
808 u8 stop_auth_timeout;
809 u8 stop_rx_deauth;
810 u8 stop_tx_deauth;
811
812 u8 stop_assoc_denied;
813 u8 stop_assoc_timeout;
814 u8 stop_connection_loss;
815 u8 reserved;
816
817 u8 start_auth_denied;
818 u8 start_auth_timeout;
819 u8 start_rx_deauth;
820 u8 start_tx_deauth;
821
822 u8 start_assoc_denied;
823 u8 start_assoc_timeout;
824 u8 start_connection_loss;
825 u8 reserved2;
826} __packed;
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839struct iwl_fw_dbg_trigger_txq_timer {
840 __le32 command_queue;
841 __le32 bss;
842 __le32 softap;
843 __le32 p2p_go;
844 __le32 p2p_client;
845 __le32 p2p_device;
846 __le32 ibss;
847 __le32 tdls;
848 __le32 reserved[4];
849} __packed;
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859struct iwl_fw_dbg_trigger_time_event {
860 struct {
861 __le32 id;
862 __le32 action_bitmap;
863 __le32 status_bitmap;
864 } __packed time_events[16];
865} __packed;
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884struct iwl_fw_dbg_trigger_ba {
885 __le16 rx_ba_start;
886 __le16 rx_ba_stop;
887 __le16 tx_ba_start;
888 __le16 tx_ba_stop;
889 __le16 rx_bar;
890 __le16 tx_bar;
891 __le16 frame_timeout;
892} __packed;
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899
900struct iwl_fw_dbg_trigger_tdls {
901 u8 action_bitmap;
902 u8 peer_mode;
903 u8 peer[ETH_ALEN];
904 u8 reserved[4];
905} __packed;
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911
912struct iwl_fw_dbg_trigger_tx_status {
913 struct tx_status {
914 u8 status;
915 u8 reserved[3];
916 } __packed statuses[16];
917 __le32 reserved[2];
918} __packed;
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931struct iwl_fw_dbg_conf_tlv {
932 u8 id;
933 u8 usniffer;
934 u8 reserved;
935 u8 num_of_hcmds;
936 struct iwl_fw_dbg_conf_hcmd hcmd;
937} __packed;
938
939#define IWL_FW_CMD_VER_UNKNOWN 99
940
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947
948struct iwl_fw_cmd_version {
949 u8 cmd;
950 u8 group;
951 u8 cmd_ver;
952 u8 notif_ver;
953} __packed;
954
955struct iwl_fw_tcm_error_addr {
956 __le32 addr;
957};
958
959static inline size_t _iwl_tlv_array_len(const struct iwl_ucode_tlv *tlv,
960 size_t fixed_size, size_t var_size)
961{
962 size_t var_len = le32_to_cpu(tlv->length) - fixed_size;
963
964 if (WARN_ON(var_len % var_size))
965 return 0;
966
967 return var_len / var_size;
968}
969
970#define iwl_tlv_array_len(_tlv_ptr, _struct_ptr, _memb) \
971 _iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)), \
972 sizeof(_struct_ptr->_memb[0]))
973
974#endif
975