LXR linux/drivers/net/wireless/mediatek/mt76/mmio.c

   1// SPDX-License-Identifier: ISC
   2/*
   3 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
   4 */
   5
   6#include "mt76.h"
   7#include "trace.h"
   8
   9static u32 mt76_mmio_rr(struct mt76_dev *dev, u32 offset)
  10{
  11        u32 val;
  12
  13        val = readl(dev->mmio.regs + offset);
  14        trace_reg_rr(dev, offset, val);
  15
  16        return val;
  17}
  18
  19static void mt76_mmio_wr(struct mt76_dev *dev, u32 offset, u32 val)
  20{
  21        trace_reg_wr(dev, offset, val);
  22        writel(val, dev->mmio.regs + offset);
  23}
  24
  25static u32 mt76_mmio_rmw(struct mt76_dev *dev, u32 offset, u32 mask, u32 val)
  26{
  27        val |= mt76_mmio_rr(dev, offset) & ~mask;
  28        mt76_mmio_wr(dev, offset, val);
  29        return val;
  30}
  31
  32static void mt76_mmio_write_copy(struct mt76_dev *dev, u32 offset,
  33                                 const void *data, int len)
  34{
  35        __iowrite32_copy(dev->mmio.regs + offset, data, DIV_ROUND_UP(len, 4));
  36}
  37
  38static void mt76_mmio_read_copy(struct mt76_dev *dev, u32 offset,
  39                                void *data, int len)
  40{
  41        __ioread32_copy(data, dev->mmio.regs + offset, DIV_ROUND_UP(len, 4));
  42}
  43
  44static int mt76_mmio_wr_rp(struct mt76_dev *dev, u32 base,
  45                           const struct mt76_reg_pair *data, int len)
  46{
  47        while (len > 0) {
  48                mt76_mmio_wr(dev, data->reg, data->value);
  49                data++;
  50                len--;
  51        }
  52
  53        return 0;
  54}
  55
  56static int mt76_mmio_rd_rp(struct mt76_dev *dev, u32 base,
  57                           struct mt76_reg_pair *data, int len)
  58{
  59        while (len > 0) {
  60                data->value = mt76_mmio_rr(dev, data->reg);
  61                data++;
  62                len--;
  63        }
  64
  65        return 0;
  66}
  67
  68void mt76_set_irq_mask(struct mt76_dev *dev, u32 addr,
  69                       u32 clear, u32 set)
  70{
  71        unsigned long flags;
  72
  73        spin_lock_irqsave(&dev->mmio.irq_lock, flags);
  74        dev->mmio.irqmask &= ~clear;
  75        dev->mmio.irqmask |= set;
  76        if (addr)
  77                mt76_mmio_wr(dev, addr, dev->mmio.irqmask);
  78        spin_unlock_irqrestore(&dev->mmio.irq_lock, flags);
  79}
  80EXPORT_SYMBOL_GPL(mt76_set_irq_mask);
  81
  82void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs)
  83{
  84        static const struct mt76_bus_ops mt76_mmio_ops = {
  85                .rr = mt76_mmio_rr,
  86                .rmw = mt76_mmio_rmw,
  87                .wr = mt76_mmio_wr,
  88                .write_copy = mt76_mmio_write_copy,
  89                .read_copy = mt76_mmio_read_copy,
  90                .wr_rp = mt76_mmio_wr_rp,
  91                .rd_rp = mt76_mmio_rd_rp,
  92                .type = MT76_BUS_MMIO,
  93        };
  94
  95        dev->bus = &mt76_mmio_ops;
  96        dev->mmio.regs = regs;
  97
  98        spin_lock_init(&dev->mmio.irq_lock);
  99}
 100EXPORT_SYMBOL_GPL(mt76_mmio_init);
 101