1
2
3
4#ifndef __MT76_CONNAC_H
5#define __MT76_CONNAC_H
6
7#include "mt76.h"
8
9#define MT76_CONNAC_SCAN_IE_LEN 600
10#define MT76_CONNAC_MAX_NUM_SCHED_SCAN_INTERVAL 10
11#define MT76_CONNAC_MAX_TIME_SCHED_SCAN_INTERVAL U16_MAX
12#define MT76_CONNAC_MAX_SCHED_SCAN_SSID 10
13#define MT76_CONNAC_MAX_SCAN_MATCH 16
14
15#define MT76_CONNAC_COREDUMP_TIMEOUT (HZ / 20)
16#define MT76_CONNAC_COREDUMP_SZ (1300 * 1024)
17
18enum {
19 CMD_CBW_20MHZ = IEEE80211_STA_RX_BW_20,
20 CMD_CBW_40MHZ = IEEE80211_STA_RX_BW_40,
21 CMD_CBW_80MHZ = IEEE80211_STA_RX_BW_80,
22 CMD_CBW_160MHZ = IEEE80211_STA_RX_BW_160,
23 CMD_CBW_10MHZ,
24 CMD_CBW_5MHZ,
25 CMD_CBW_8080MHZ,
26
27 CMD_HE_MCS_BW80 = 0,
28 CMD_HE_MCS_BW160,
29 CMD_HE_MCS_BW8080,
30 CMD_HE_MCS_BW_NUM
31};
32
33enum {
34 HW_BSSID_0 = 0x0,
35 HW_BSSID_1,
36 HW_BSSID_2,
37 HW_BSSID_3,
38 HW_BSSID_MAX = HW_BSSID_3,
39 EXT_BSSID_START = 0x10,
40 EXT_BSSID_1,
41 EXT_BSSID_15 = 0x1f,
42 EXT_BSSID_MAX = EXT_BSSID_15,
43 REPEATER_BSSID_START = 0x20,
44 REPEATER_BSSID_MAX = 0x3f,
45};
46
47struct mt76_connac_pm {
48 bool enable;
49 bool ds_enable;
50 bool suspended;
51
52 spinlock_t txq_lock;
53 struct {
54 struct mt76_wcid *wcid;
55 struct sk_buff *skb;
56 } tx_q[IEEE80211_NUM_ACS];
57
58 struct work_struct wake_work;
59 wait_queue_head_t wait;
60
61 struct {
62 spinlock_t lock;
63 u32 count;
64 } wake;
65 struct mutex mutex;
66
67 struct delayed_work ps_work;
68 unsigned long last_activity;
69 unsigned long idle_timeout;
70
71 struct {
72 unsigned long last_wake_event;
73 unsigned long awake_time;
74 unsigned long last_doze_event;
75 unsigned long doze_time;
76 unsigned int lp_wake;
77 } stats;
78};
79
80struct mt76_connac_coredump {
81 struct sk_buff_head msg_list;
82 struct delayed_work work;
83 unsigned long last_activity;
84};
85
86extern const struct wiphy_wowlan_support mt76_connac_wowlan_support;
87
88static inline bool is_mt7921(struct mt76_dev *dev)
89{
90 return mt76_chip(dev) == 0x7961;
91}
92
93static inline bool is_mt7663(struct mt76_dev *dev)
94{
95 return mt76_chip(dev) == 0x7663;
96}
97
98int mt76_connac_pm_wake(struct mt76_phy *phy, struct mt76_connac_pm *pm);
99void mt76_connac_power_save_sched(struct mt76_phy *phy,
100 struct mt76_connac_pm *pm);
101void mt76_connac_free_pending_tx_skbs(struct mt76_connac_pm *pm,
102 struct mt76_wcid *wcid);
103
104static inline bool
105mt76_connac_pm_ref(struct mt76_phy *phy, struct mt76_connac_pm *pm)
106{
107 bool ret = false;
108
109 spin_lock_bh(&pm->wake.lock);
110 if (test_bit(MT76_STATE_PM, &phy->state))
111 goto out;
112
113 pm->wake.count++;
114 ret = true;
115out:
116 spin_unlock_bh(&pm->wake.lock);
117
118 return ret;
119}
120
121static inline void
122mt76_connac_pm_unref(struct mt76_phy *phy, struct mt76_connac_pm *pm)
123{
124 spin_lock_bh(&pm->wake.lock);
125
126 pm->last_activity = jiffies;
127 if (--pm->wake.count == 0 &&
128 test_bit(MT76_STATE_MCU_RUNNING, &phy->state))
129 mt76_connac_power_save_sched(phy, pm);
130
131 spin_unlock_bh(&pm->wake.lock);
132}
133
134static inline bool
135mt76_connac_skip_fw_pmctrl(struct mt76_phy *phy, struct mt76_connac_pm *pm)
136{
137 struct mt76_dev *dev = phy->dev;
138 bool ret;
139
140 if (dev->token_count)
141 return true;
142
143 spin_lock_bh(&pm->wake.lock);
144 ret = pm->wake.count || test_and_set_bit(MT76_STATE_PM, &phy->state);
145 spin_unlock_bh(&pm->wake.lock);
146
147 return ret;
148}
149
150static inline void
151mt76_connac_mutex_acquire(struct mt76_dev *dev, struct mt76_connac_pm *pm)
152 __acquires(&dev->mutex)
153{
154 mutex_lock(&dev->mutex);
155 mt76_connac_pm_wake(&dev->phy, pm);
156}
157
158static inline void
159mt76_connac_mutex_release(struct mt76_dev *dev, struct mt76_connac_pm *pm)
160 __releases(&dev->mutex)
161{
162 mt76_connac_power_save_sched(&dev->phy, pm);
163 mutex_unlock(&dev->mutex);
164}
165
166void mt76_connac_pm_queue_skb(struct ieee80211_hw *hw,
167 struct mt76_connac_pm *pm,
168 struct mt76_wcid *wcid,
169 struct sk_buff *skb);
170void mt76_connac_pm_dequeue_skbs(struct mt76_phy *phy,
171 struct mt76_connac_pm *pm);
172
173#endif
174
