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7#include <linux/clk.h>
8#include <linux/mmc/sdio_func.h>
9#include <linux/mmc/sdio_ids.h>
10#include <linux/mmc/host.h>
11#include <linux/mmc/sdio.h>
12#include <linux/of_irq.h>
13
14#include "netdev.h"
15#include "cfg80211.h"
16
17#define SDIO_MODALIAS "wilc1000_sdio"
18
19static const struct sdio_device_id wilc_sdio_ids[] = {
20 { SDIO_DEVICE(SDIO_VENDOR_ID_MICROCHIP_WILC, SDIO_DEVICE_ID_MICROCHIP_WILC1000) },
21 { },
22};
23
24#define WILC_SDIO_BLOCK_SIZE 512
25
26struct wilc_sdio {
27 bool irq_gpio;
28 u32 block_size;
29 int has_thrpt_enh3;
30};
31
32struct sdio_cmd52 {
33 u32 read_write: 1;
34 u32 function: 3;
35 u32 raw: 1;
36 u32 address: 17;
37 u32 data: 8;
38};
39
40struct sdio_cmd53 {
41 u32 read_write: 1;
42 u32 function: 3;
43 u32 block_mode: 1;
44 u32 increment: 1;
45 u32 address: 17;
46 u32 count: 9;
47 u8 *buffer;
48 u32 block_size;
49};
50
51static const struct wilc_hif_func wilc_hif_sdio;
52
53static void wilc_sdio_interrupt(struct sdio_func *func)
54{
55 sdio_release_host(func);
56 wilc_handle_isr(sdio_get_drvdata(func));
57 sdio_claim_host(func);
58}
59
60static int wilc_sdio_cmd52(struct wilc *wilc, struct sdio_cmd52 *cmd)
61{
62 struct sdio_func *func = container_of(wilc->dev, struct sdio_func, dev);
63 int ret;
64 u8 data;
65
66 sdio_claim_host(func);
67
68 func->num = cmd->function;
69 if (cmd->read_write) {
70 if (cmd->raw) {
71 sdio_writeb(func, cmd->data, cmd->address, &ret);
72 data = sdio_readb(func, cmd->address, &ret);
73 cmd->data = data;
74 } else {
75 sdio_writeb(func, cmd->data, cmd->address, &ret);
76 }
77 } else {
78 data = sdio_readb(func, cmd->address, &ret);
79 cmd->data = data;
80 }
81
82 sdio_release_host(func);
83
84 if (ret)
85 dev_err(&func->dev, "%s..failed, err(%d)\n", __func__, ret);
86 return ret;
87}
88
89static int wilc_sdio_cmd53(struct wilc *wilc, struct sdio_cmd53 *cmd)
90{
91 struct sdio_func *func = container_of(wilc->dev, struct sdio_func, dev);
92 int size, ret;
93
94 sdio_claim_host(func);
95
96 func->num = cmd->function;
97 func->cur_blksize = cmd->block_size;
98 if (cmd->block_mode)
99 size = cmd->count * cmd->block_size;
100 else
101 size = cmd->count;
102
103 if (cmd->read_write) {
104 ret = sdio_memcpy_toio(func, cmd->address,
105 (void *)cmd->buffer, size);
106 } else {
107 ret = sdio_memcpy_fromio(func, (void *)cmd->buffer,
108 cmd->address, size);
109 }
110
111 sdio_release_host(func);
112
113 if (ret)
114 dev_err(&func->dev, "%s..failed, err(%d)\n", __func__, ret);
115
116 return ret;
117}
118
119static int wilc_sdio_probe(struct sdio_func *func,
120 const struct sdio_device_id *id)
121{
122 struct wilc *wilc;
123 int ret;
124 struct wilc_sdio *sdio_priv;
125
126 sdio_priv = kzalloc(sizeof(*sdio_priv), GFP_KERNEL);
127 if (!sdio_priv)
128 return -ENOMEM;
129
130 ret = wilc_cfg80211_init(&wilc, &func->dev, WILC_HIF_SDIO,
131 &wilc_hif_sdio);
132 if (ret)
133 goto free;
134
135 if (IS_ENABLED(CONFIG_WILC1000_HW_OOB_INTR)) {
136 struct device_node *np = func->card->dev.of_node;
137 int irq_num = of_irq_get(np, 0);
138
139 if (irq_num > 0) {
140 wilc->dev_irq_num = irq_num;
141 sdio_priv->irq_gpio = true;
142 }
143 }
144
145 sdio_set_drvdata(func, wilc);
146 wilc->bus_data = sdio_priv;
147 wilc->dev = &func->dev;
148
149 wilc->rtc_clk = devm_clk_get_optional(&func->card->dev, "rtc");
150 if (IS_ERR(wilc->rtc_clk)) {
151 ret = PTR_ERR(wilc->rtc_clk);
152 goto dispose_irq;
153 }
154 clk_prepare_enable(wilc->rtc_clk);
155
156 dev_info(&func->dev, "Driver Initializing success\n");
157 return 0;
158
159dispose_irq:
160 irq_dispose_mapping(wilc->dev_irq_num);
161 wilc_netdev_cleanup(wilc);
162free:
163 kfree(sdio_priv);
164 return ret;
165}
166
167static void wilc_sdio_remove(struct sdio_func *func)
168{
169 struct wilc *wilc = sdio_get_drvdata(func);
170
171 clk_disable_unprepare(wilc->rtc_clk);
172 wilc_netdev_cleanup(wilc);
173}
174
175static int wilc_sdio_reset(struct wilc *wilc)
176{
177 struct sdio_cmd52 cmd;
178 int ret;
179 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
180
181 cmd.read_write = 1;
182 cmd.function = 0;
183 cmd.raw = 0;
184 cmd.address = SDIO_CCCR_ABORT;
185 cmd.data = WILC_SDIO_CCCR_ABORT_RESET;
186 ret = wilc_sdio_cmd52(wilc, &cmd);
187 if (ret) {
188 dev_err(&func->dev, "Fail cmd 52, reset cmd ...\n");
189 return ret;
190 }
191 return 0;
192}
193
194static int wilc_sdio_suspend(struct device *dev)
195{
196 struct sdio_func *func = dev_to_sdio_func(dev);
197 struct wilc *wilc = sdio_get_drvdata(func);
198 int ret;
199
200 dev_info(dev, "sdio suspend\n");
201 chip_wakeup(wilc);
202
203 if (!IS_ERR(wilc->rtc_clk))
204 clk_disable_unprepare(wilc->rtc_clk);
205
206 if (wilc->suspend_event) {
207 host_sleep_notify(wilc);
208 chip_allow_sleep(wilc);
209 }
210
211 ret = wilc_sdio_reset(wilc);
212 if (ret) {
213 dev_err(&func->dev, "Fail reset sdio\n");
214 return ret;
215 }
216 sdio_claim_host(func);
217
218 return 0;
219}
220
221static int wilc_sdio_enable_interrupt(struct wilc *dev)
222{
223 struct sdio_func *func = container_of(dev->dev, struct sdio_func, dev);
224 int ret = 0;
225
226 sdio_claim_host(func);
227 ret = sdio_claim_irq(func, wilc_sdio_interrupt);
228 sdio_release_host(func);
229
230 if (ret < 0) {
231 dev_err(&func->dev, "can't claim sdio_irq, err(%d)\n", ret);
232 ret = -EIO;
233 }
234 return ret;
235}
236
237static void wilc_sdio_disable_interrupt(struct wilc *dev)
238{
239 struct sdio_func *func = container_of(dev->dev, struct sdio_func, dev);
240 int ret;
241
242 sdio_claim_host(func);
243 ret = sdio_release_irq(func);
244 if (ret < 0)
245 dev_err(&func->dev, "can't release sdio_irq, err(%d)\n", ret);
246 sdio_release_host(func);
247}
248
249
250
251
252
253
254
255static int wilc_sdio_set_func0_csa_address(struct wilc *wilc, u32 adr)
256{
257 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
258 struct sdio_cmd52 cmd;
259 int ret;
260
261
262
263
264 cmd.read_write = 1;
265 cmd.function = 0;
266 cmd.raw = 0;
267 cmd.address = WILC_SDIO_FBR_CSA_REG;
268 cmd.data = (u8)adr;
269 ret = wilc_sdio_cmd52(wilc, &cmd);
270 if (ret) {
271 dev_err(&func->dev, "Failed cmd52, set %04x data...\n",
272 cmd.address);
273 return ret;
274 }
275
276 cmd.address = WILC_SDIO_FBR_CSA_REG + 1;
277 cmd.data = (u8)(adr >> 8);
278 ret = wilc_sdio_cmd52(wilc, &cmd);
279 if (ret) {
280 dev_err(&func->dev, "Failed cmd52, set %04x data...\n",
281 cmd.address);
282 return ret;
283 }
284
285 cmd.address = WILC_SDIO_FBR_CSA_REG + 2;
286 cmd.data = (u8)(adr >> 16);
287 ret = wilc_sdio_cmd52(wilc, &cmd);
288 if (ret) {
289 dev_err(&func->dev, "Failed cmd52, set %04x data...\n",
290 cmd.address);
291 return ret;
292 }
293
294 return 0;
295}
296
297static int wilc_sdio_set_block_size(struct wilc *wilc, u8 func_num,
298 u32 block_size)
299{
300 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
301 struct sdio_cmd52 cmd;
302 int ret;
303
304 cmd.read_write = 1;
305 cmd.function = 0;
306 cmd.raw = 0;
307 cmd.address = SDIO_FBR_BASE(func_num) + SDIO_CCCR_BLKSIZE;
308 cmd.data = (u8)block_size;
309 ret = wilc_sdio_cmd52(wilc, &cmd);
310 if (ret) {
311 dev_err(&func->dev, "Failed cmd52, set %04x data...\n",
312 cmd.address);
313 return ret;
314 }
315
316 cmd.address = SDIO_FBR_BASE(func_num) + SDIO_CCCR_BLKSIZE + 1;
317 cmd.data = (u8)(block_size >> 8);
318 ret = wilc_sdio_cmd52(wilc, &cmd);
319 if (ret) {
320 dev_err(&func->dev, "Failed cmd52, set %04x data...\n",
321 cmd.address);
322 return ret;
323 }
324
325 return 0;
326}
327
328
329
330
331
332
333static int wilc_sdio_write_reg(struct wilc *wilc, u32 addr, u32 data)
334{
335 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
336 struct wilc_sdio *sdio_priv = wilc->bus_data;
337 int ret;
338
339 cpu_to_le32s(&data);
340
341 if (addr >= 0xf0 && addr <= 0xff) {
342 struct sdio_cmd52 cmd;
343
344 cmd.read_write = 1;
345 cmd.function = 0;
346 cmd.raw = 0;
347 cmd.address = addr;
348 cmd.data = data;
349 ret = wilc_sdio_cmd52(wilc, &cmd);
350 if (ret)
351 dev_err(&func->dev,
352 "Failed cmd 52, read reg (%08x) ...\n", addr);
353 } else {
354 struct sdio_cmd53 cmd;
355
356
357
358
359 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
360 if (ret)
361 return ret;
362
363 cmd.read_write = 1;
364 cmd.function = 0;
365 cmd.address = WILC_SDIO_FBR_DATA_REG;
366 cmd.block_mode = 0;
367 cmd.increment = 1;
368 cmd.count = 4;
369 cmd.buffer = (u8 *)&data;
370 cmd.block_size = sdio_priv->block_size;
371 ret = wilc_sdio_cmd53(wilc, &cmd);
372 if (ret)
373 dev_err(&func->dev,
374 "Failed cmd53, write reg (%08x)...\n", addr);
375 }
376
377 return ret;
378}
379
380static int wilc_sdio_write(struct wilc *wilc, u32 addr, u8 *buf, u32 size)
381{
382 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
383 struct wilc_sdio *sdio_priv = wilc->bus_data;
384 u32 block_size = sdio_priv->block_size;
385 struct sdio_cmd53 cmd;
386 int nblk, nleft, ret;
387
388 cmd.read_write = 1;
389 if (addr > 0) {
390
391
392
393 cmd.function = 0;
394 cmd.address = WILC_SDIO_FBR_DATA_REG;
395 } else {
396
397
398
399 cmd.function = 1;
400 cmd.address = WILC_SDIO_F1_DATA_REG;
401 }
402
403 size = ALIGN(size, 4);
404 nblk = size / block_size;
405 nleft = size % block_size;
406
407 if (nblk > 0) {
408 cmd.block_mode = 1;
409 cmd.increment = 1;
410 cmd.count = nblk;
411 cmd.buffer = buf;
412 cmd.block_size = block_size;
413 if (addr > 0) {
414 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
415 if (ret)
416 return ret;
417 }
418 ret = wilc_sdio_cmd53(wilc, &cmd);
419 if (ret) {
420 dev_err(&func->dev,
421 "Failed cmd53 [%x], block send...\n", addr);
422 return ret;
423 }
424 if (addr > 0)
425 addr += nblk * block_size;
426 buf += nblk * block_size;
427 }
428
429 if (nleft > 0) {
430 cmd.block_mode = 0;
431 cmd.increment = 1;
432 cmd.count = nleft;
433 cmd.buffer = buf;
434
435 cmd.block_size = block_size;
436
437 if (addr > 0) {
438 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
439 if (ret)
440 return ret;
441 }
442 ret = wilc_sdio_cmd53(wilc, &cmd);
443 if (ret) {
444 dev_err(&func->dev,
445 "Failed cmd53 [%x], bytes send...\n", addr);
446 return ret;
447 }
448 }
449
450 return 0;
451}
452
453static int wilc_sdio_read_reg(struct wilc *wilc, u32 addr, u32 *data)
454{
455 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
456 struct wilc_sdio *sdio_priv = wilc->bus_data;
457 int ret;
458
459 if (addr >= 0xf0 && addr <= 0xff) {
460 struct sdio_cmd52 cmd;
461
462 cmd.read_write = 0;
463 cmd.function = 0;
464 cmd.raw = 0;
465 cmd.address = addr;
466 ret = wilc_sdio_cmd52(wilc, &cmd);
467 if (ret) {
468 dev_err(&func->dev,
469 "Failed cmd 52, read reg (%08x) ...\n", addr);
470 return ret;
471 }
472 *data = cmd.data;
473 } else {
474 struct sdio_cmd53 cmd;
475
476 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
477 if (ret)
478 return ret;
479
480 cmd.read_write = 0;
481 cmd.function = 0;
482 cmd.address = WILC_SDIO_FBR_DATA_REG;
483 cmd.block_mode = 0;
484 cmd.increment = 1;
485 cmd.count = 4;
486 cmd.buffer = (u8 *)data;
487
488 cmd.block_size = sdio_priv->block_size;
489 ret = wilc_sdio_cmd53(wilc, &cmd);
490 if (ret) {
491 dev_err(&func->dev,
492 "Failed cmd53, read reg (%08x)...\n", addr);
493 return ret;
494 }
495 }
496
497 le32_to_cpus(data);
498 return 0;
499}
500
501static int wilc_sdio_read(struct wilc *wilc, u32 addr, u8 *buf, u32 size)
502{
503 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
504 struct wilc_sdio *sdio_priv = wilc->bus_data;
505 u32 block_size = sdio_priv->block_size;
506 struct sdio_cmd53 cmd;
507 int nblk, nleft, ret;
508
509 cmd.read_write = 0;
510 if (addr > 0) {
511
512
513
514 cmd.function = 0;
515 cmd.address = WILC_SDIO_FBR_DATA_REG;
516 } else {
517
518
519
520 cmd.function = 1;
521 cmd.address = WILC_SDIO_F1_DATA_REG;
522 }
523
524 size = ALIGN(size, 4);
525 nblk = size / block_size;
526 nleft = size % block_size;
527
528 if (nblk > 0) {
529 cmd.block_mode = 1;
530 cmd.increment = 1;
531 cmd.count = nblk;
532 cmd.buffer = buf;
533 cmd.block_size = block_size;
534 if (addr > 0) {
535 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
536 if (ret)
537 return ret;
538 }
539 ret = wilc_sdio_cmd53(wilc, &cmd);
540 if (ret) {
541 dev_err(&func->dev,
542 "Failed cmd53 [%x], block read...\n", addr);
543 return ret;
544 }
545 if (addr > 0)
546 addr += nblk * block_size;
547 buf += nblk * block_size;
548 }
549
550 if (nleft > 0) {
551 cmd.block_mode = 0;
552 cmd.increment = 1;
553 cmd.count = nleft;
554 cmd.buffer = buf;
555
556 cmd.block_size = block_size;
557
558 if (addr > 0) {
559 ret = wilc_sdio_set_func0_csa_address(wilc, addr);
560 if (ret)
561 return ret;
562 }
563 ret = wilc_sdio_cmd53(wilc, &cmd);
564 if (ret) {
565 dev_err(&func->dev,
566 "Failed cmd53 [%x], bytes read...\n", addr);
567 return ret;
568 }
569 }
570
571 return 0;
572}
573
574
575
576
577
578
579
580static int wilc_sdio_deinit(struct wilc *wilc)
581{
582 return 0;
583}
584
585static int wilc_sdio_init(struct wilc *wilc, bool resume)
586{
587 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
588 struct wilc_sdio *sdio_priv = wilc->bus_data;
589 struct sdio_cmd52 cmd;
590 int loop, ret;
591 u32 chipid;
592
593
594
595
596 cmd.read_write = 1;
597 cmd.function = 0;
598 cmd.raw = 1;
599 cmd.address = SDIO_FBR_BASE(func->num);
600 cmd.data = SDIO_FBR_ENABLE_CSA;
601 ret = wilc_sdio_cmd52(wilc, &cmd);
602 if (ret) {
603 dev_err(&func->dev, "Fail cmd 52, enable csa...\n");
604 return ret;
605 }
606
607
608
609
610 ret = wilc_sdio_set_block_size(wilc, 0, WILC_SDIO_BLOCK_SIZE);
611 if (ret) {
612 dev_err(&func->dev, "Fail cmd 52, set func 0 block size...\n");
613 return ret;
614 }
615 sdio_priv->block_size = WILC_SDIO_BLOCK_SIZE;
616
617
618
619
620 cmd.read_write = 1;
621 cmd.function = 0;
622 cmd.raw = 1;
623 cmd.address = SDIO_CCCR_IOEx;
624 cmd.data = WILC_SDIO_CCCR_IO_EN_FUNC1;
625 ret = wilc_sdio_cmd52(wilc, &cmd);
626 if (ret) {
627 dev_err(&func->dev,
628 "Fail cmd 52, set IOE register...\n");
629 return ret;
630 }
631
632
633
634
635 cmd.read_write = 0;
636 cmd.function = 0;
637 cmd.raw = 0;
638 cmd.address = SDIO_CCCR_IORx;
639 loop = 3;
640 do {
641 cmd.data = 0;
642 ret = wilc_sdio_cmd52(wilc, &cmd);
643 if (ret) {
644 dev_err(&func->dev,
645 "Fail cmd 52, get IOR register...\n");
646 return ret;
647 }
648 if (cmd.data == WILC_SDIO_CCCR_IO_EN_FUNC1)
649 break;
650 } while (loop--);
651
652 if (loop <= 0) {
653 dev_err(&func->dev, "Fail func 1 is not ready...\n");
654 return -EINVAL;
655 }
656
657
658
659
660 ret = wilc_sdio_set_block_size(wilc, 1, WILC_SDIO_BLOCK_SIZE);
661 if (ret) {
662 dev_err(&func->dev, "Fail set func 1 block size...\n");
663 return ret;
664 }
665
666
667
668
669 cmd.read_write = 1;
670 cmd.function = 0;
671 cmd.raw = 1;
672 cmd.address = SDIO_CCCR_IENx;
673 cmd.data = WILC_SDIO_CCCR_IEN_MASTER | WILC_SDIO_CCCR_IEN_FUNC1;
674 ret = wilc_sdio_cmd52(wilc, &cmd);
675 if (ret) {
676 dev_err(&func->dev, "Fail cmd 52, set IEN register...\n");
677 return ret;
678 }
679
680
681
682
683 if (!resume) {
684 int rev;
685
686 ret = wilc_sdio_read_reg(wilc, WILC_CHIPID, &chipid);
687 if (ret) {
688 dev_err(&func->dev, "Fail cmd read chip id...\n");
689 return ret;
690 }
691 dev_err(&func->dev, "chipid (%08x)\n", chipid);
692 rev = FIELD_GET(WILC_CHIP_REV_FIELD, chipid);
693 if (rev > FIELD_GET(WILC_CHIP_REV_FIELD, WILC_1000_BASE_ID_2A))
694 sdio_priv->has_thrpt_enh3 = 1;
695 else
696 sdio_priv->has_thrpt_enh3 = 0;
697 dev_info(&func->dev, "has_thrpt_enh3 = %d...\n",
698 sdio_priv->has_thrpt_enh3);
699 }
700
701 return 0;
702}
703
704static int wilc_sdio_read_size(struct wilc *wilc, u32 *size)
705{
706 u32 tmp;
707 struct sdio_cmd52 cmd;
708
709
710
711
712 cmd.read_write = 0;
713 cmd.function = 0;
714 cmd.raw = 0;
715 cmd.address = WILC_SDIO_INTERRUPT_DATA_SZ_REG;
716 cmd.data = 0;
717 wilc_sdio_cmd52(wilc, &cmd);
718 tmp = cmd.data;
719
720 cmd.address = WILC_SDIO_INTERRUPT_DATA_SZ_REG + 1;
721 cmd.data = 0;
722 wilc_sdio_cmd52(wilc, &cmd);
723 tmp |= (cmd.data << 8);
724
725 *size = tmp;
726 return 0;
727}
728
729static int wilc_sdio_read_int(struct wilc *wilc, u32 *int_status)
730{
731 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
732 struct wilc_sdio *sdio_priv = wilc->bus_data;
733 u32 tmp;
734 u8 irq_flags;
735 struct sdio_cmd52 cmd;
736
737 wilc_sdio_read_size(wilc, &tmp);
738
739
740
741
742 if (!sdio_priv->irq_gpio) {
743 cmd.function = 1;
744 cmd.address = WILC_SDIO_EXT_IRQ_FLAG_REG;
745 } else {
746 cmd.function = 0;
747 cmd.address = WILC_SDIO_IRQ_FLAG_REG;
748 }
749 cmd.raw = 0;
750 cmd.read_write = 0;
751 cmd.data = 0;
752 wilc_sdio_cmd52(wilc, &cmd);
753 irq_flags = cmd.data;
754 tmp |= FIELD_PREP(IRG_FLAGS_MASK, cmd.data);
755
756 if (FIELD_GET(UNHANDLED_IRQ_MASK, irq_flags))
757 dev_err(&func->dev, "Unexpected interrupt (1) int=%lx\n",
758 FIELD_GET(UNHANDLED_IRQ_MASK, irq_flags));
759
760 *int_status = tmp;
761
762 return 0;
763}
764
765static int wilc_sdio_clear_int_ext(struct wilc *wilc, u32 val)
766{
767 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
768 struct wilc_sdio *sdio_priv = wilc->bus_data;
769 int ret;
770 int vmm_ctl;
771
772 if (sdio_priv->has_thrpt_enh3) {
773 u32 reg = 0;
774
775 if (sdio_priv->irq_gpio)
776 reg = val & (BIT(MAX_NUM_INT) - 1);
777
778
779 if (val & SEL_VMM_TBL0)
780 reg |= BIT(5);
781
782 if (val & SEL_VMM_TBL1)
783 reg |= BIT(6);
784
785 if (val & EN_VMM)
786 reg |= BIT(7);
787 if (reg) {
788 struct sdio_cmd52 cmd;
789
790 cmd.read_write = 1;
791 cmd.function = 0;
792 cmd.raw = 0;
793 cmd.address = WILC_SDIO_IRQ_CLEAR_FLAG_REG;
794 cmd.data = reg;
795
796 ret = wilc_sdio_cmd52(wilc, &cmd);
797 if (ret) {
798 dev_err(&func->dev,
799 "Failed cmd52, set (%02x) data (%d) ...\n",
800 cmd.address, __LINE__);
801 return ret;
802 }
803 }
804 return 0;
805 }
806 if (sdio_priv->irq_gpio) {
807
808
809
810
811
812 u32 flags;
813 int i;
814
815 flags = val & (BIT(MAX_NUM_INT) - 1);
816 for (i = 0; i < NUM_INT_EXT && flags; i++) {
817 if (flags & BIT(i)) {
818 struct sdio_cmd52 cmd;
819
820 cmd.read_write = 1;
821 cmd.function = 0;
822 cmd.raw = 0;
823 cmd.address = WILC_SDIO_IRQ_CLEAR_FLAG_REG;
824 cmd.data = BIT(i);
825
826 ret = wilc_sdio_cmd52(wilc, &cmd);
827 if (ret) {
828 dev_err(&func->dev,
829 "Failed cmd52, set (%02x) data (%d) ...\n",
830 cmd.address, __LINE__);
831 return ret;
832 }
833 flags &= ~BIT(i);
834 }
835 }
836
837 for (i = NUM_INT_EXT; i < MAX_NUM_INT && flags; i++) {
838 if (flags & BIT(i)) {
839 dev_err(&func->dev,
840 "Unexpected interrupt cleared %d...\n",
841 i);
842 flags &= ~BIT(i);
843 }
844 }
845 }
846
847 vmm_ctl = 0;
848
849 if (val & SEL_VMM_TBL0)
850 vmm_ctl |= BIT(0);
851
852 if (val & SEL_VMM_TBL1)
853 vmm_ctl |= BIT(1);
854
855 if (val & EN_VMM)
856 vmm_ctl |= BIT(2);
857
858 if (vmm_ctl) {
859 struct sdio_cmd52 cmd;
860
861 cmd.read_write = 1;
862 cmd.function = 0;
863 cmd.raw = 0;
864 cmd.address = WILC_SDIO_VMM_TBL_CTRL_REG;
865 cmd.data = vmm_ctl;
866 ret = wilc_sdio_cmd52(wilc, &cmd);
867 if (ret) {
868 dev_err(&func->dev,
869 "Failed cmd52, set (%02x) data (%d) ...\n",
870 cmd.address, __LINE__);
871 return ret;
872 }
873 }
874 return 0;
875}
876
877static int wilc_sdio_sync_ext(struct wilc *wilc, int nint)
878{
879 struct sdio_func *func = dev_to_sdio_func(wilc->dev);
880 struct wilc_sdio *sdio_priv = wilc->bus_data;
881 u32 reg;
882
883 if (nint > MAX_NUM_INT) {
884 dev_err(&func->dev, "Too many interrupts (%d)...\n", nint);
885 return -EINVAL;
886 }
887
888
889
890
891 if (wilc_sdio_read_reg(wilc, WILC_MISC, ®)) {
892 dev_err(&func->dev, "Failed read misc reg...\n");
893 return -EINVAL;
894 }
895
896 reg &= ~BIT(8);
897 if (wilc_sdio_write_reg(wilc, WILC_MISC, reg)) {
898 dev_err(&func->dev, "Failed write misc reg...\n");
899 return -EINVAL;
900 }
901
902 if (sdio_priv->irq_gpio) {
903 u32 reg;
904 int ret, i;
905
906
907
908
909 ret = wilc_sdio_read_reg(wilc, WILC_PIN_MUX_0, ®);
910 if (ret) {
911 dev_err(&func->dev, "Failed read reg (%08x)...\n",
912 WILC_PIN_MUX_0);
913 return ret;
914 }
915 reg |= BIT(8);
916 ret = wilc_sdio_write_reg(wilc, WILC_PIN_MUX_0, reg);
917 if (ret) {
918 dev_err(&func->dev, "Failed write reg (%08x)...\n",
919 WILC_PIN_MUX_0);
920 return ret;
921 }
922
923
924
925
926 ret = wilc_sdio_read_reg(wilc, WILC_INTR_ENABLE, ®);
927 if (ret) {
928 dev_err(&func->dev, "Failed read reg (%08x)...\n",
929 WILC_INTR_ENABLE);
930 return ret;
931 }
932
933 for (i = 0; (i < 5) && (nint > 0); i++, nint--)
934 reg |= BIT((27 + i));
935 ret = wilc_sdio_write_reg(wilc, WILC_INTR_ENABLE, reg);
936 if (ret) {
937 dev_err(&func->dev, "Failed write reg (%08x)...\n",
938 WILC_INTR_ENABLE);
939 return ret;
940 }
941 if (nint) {
942 ret = wilc_sdio_read_reg(wilc, WILC_INTR2_ENABLE, ®);
943 if (ret) {
944 dev_err(&func->dev,
945 "Failed read reg (%08x)...\n",
946 WILC_INTR2_ENABLE);
947 return ret;
948 }
949
950 for (i = 0; (i < 3) && (nint > 0); i++, nint--)
951 reg |= BIT(i);
952
953 ret = wilc_sdio_write_reg(wilc, WILC_INTR2_ENABLE, reg);
954 if (ret) {
955 dev_err(&func->dev,
956 "Failed write reg (%08x)...\n",
957 WILC_INTR2_ENABLE);
958 return ret;
959 }
960 }
961 }
962 return 0;
963}
964
965
966static const struct wilc_hif_func wilc_hif_sdio = {
967 .hif_init = wilc_sdio_init,
968 .hif_deinit = wilc_sdio_deinit,
969 .hif_read_reg = wilc_sdio_read_reg,
970 .hif_write_reg = wilc_sdio_write_reg,
971 .hif_block_rx = wilc_sdio_read,
972 .hif_block_tx = wilc_sdio_write,
973 .hif_read_int = wilc_sdio_read_int,
974 .hif_clear_int_ext = wilc_sdio_clear_int_ext,
975 .hif_read_size = wilc_sdio_read_size,
976 .hif_block_tx_ext = wilc_sdio_write,
977 .hif_block_rx_ext = wilc_sdio_read,
978 .hif_sync_ext = wilc_sdio_sync_ext,
979 .enable_interrupt = wilc_sdio_enable_interrupt,
980 .disable_interrupt = wilc_sdio_disable_interrupt,
981};
982
983static int wilc_sdio_resume(struct device *dev)
984{
985 struct sdio_func *func = dev_to_sdio_func(dev);
986 struct wilc *wilc = sdio_get_drvdata(func);
987
988 dev_info(dev, "sdio resume\n");
989 sdio_release_host(func);
990 chip_wakeup(wilc);
991 wilc_sdio_init(wilc, true);
992
993 if (wilc->suspend_event)
994 host_wakeup_notify(wilc);
995
996 chip_allow_sleep(wilc);
997
998 return 0;
999}
1000
1001static const struct of_device_id wilc_of_match[] = {
1002 { .compatible = "microchip,wilc1000", },
1003 { }
1004};
1005MODULE_DEVICE_TABLE(of, wilc_of_match);
1006
1007static const struct dev_pm_ops wilc_sdio_pm_ops = {
1008 .suspend = wilc_sdio_suspend,
1009 .resume = wilc_sdio_resume,
1010};
1011
1012static struct sdio_driver wilc_sdio_driver = {
1013 .name = SDIO_MODALIAS,
1014 .id_table = wilc_sdio_ids,
1015 .probe = wilc_sdio_probe,
1016 .remove = wilc_sdio_remove,
1017 .drv = {
1018 .pm = &wilc_sdio_pm_ops,
1019 .of_match_table = wilc_of_match,
1020 }
1021};
1022module_driver(wilc_sdio_driver,
1023 sdio_register_driver,
1024 sdio_unregister_driver);
1025MODULE_LICENSE("GPL");
1026
