linux/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8192e2ant.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/* Copyright(c) 2012  Realtek Corporation.*/
   3
   4/**************************************************************
   5 *   include files
   6 **************************************************************/
   7#include "halbt_precomp.h"
   8/**************************************************************
   9 *   Global variables, these are static variables
  10 **************************************************************/
  11static struct coex_dm_8192e_2ant glcoex_dm_8192e_2ant;
  12static struct coex_dm_8192e_2ant *coex_dm = &glcoex_dm_8192e_2ant;
  13static struct coex_sta_8192e_2ant glcoex_sta_8192e_2ant;
  14static struct coex_sta_8192e_2ant *coex_sta = &glcoex_sta_8192e_2ant;
  15
  16static const char *const glbt_info_src_8192e_2ant[] = {
  17        "BT Info[wifi fw]",
  18        "BT Info[bt rsp]",
  19        "BT Info[bt auto report]",
  20};
  21
  22static u32 glcoex_ver_date_8192e_2ant = 20130902;
  23static u32 glcoex_ver_8192e_2ant = 0x34;
  24
  25/**************************************************************
  26 *   local function proto type if needed
  27 **************************************************************/
  28/**************************************************************
  29 *   local function start with btc8192e2ant_
  30 **************************************************************/
  31static u8 btc8192e2ant_bt_rssi_state(struct btc_coexist *btcoexist,
  32                                     u8 level_num, u8 rssi_thresh,
  33                                     u8 rssi_thresh1)
  34{
  35        struct rtl_priv *rtlpriv = btcoexist->adapter;
  36        int bt_rssi = 0;
  37        u8 bt_rssi_state = coex_sta->pre_bt_rssi_state;
  38
  39        bt_rssi = coex_sta->bt_rssi;
  40
  41        if (level_num == 2) {
  42                if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  43                    (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  44                        if (bt_rssi >=
  45                            (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  46                                bt_rssi_state = BTC_RSSI_STATE_HIGH;
  47                        else
  48                                bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  49                } else {
  50                        if (bt_rssi < rssi_thresh)
  51                                bt_rssi_state = BTC_RSSI_STATE_LOW;
  52                        else
  53                                bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  54                }
  55        } else if (level_num == 3) {
  56                if (rssi_thresh > rssi_thresh1) {
  57                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
  58                                "[BTCoex], BT Rssi thresh error!!\n");
  59                        return coex_sta->pre_bt_rssi_state;
  60                }
  61
  62                if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  63                    (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  64                        if (bt_rssi >=
  65                            (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  66                                bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
  67                        else
  68                                bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  69                } else if ((coex_sta->pre_bt_rssi_state ==
  70                            BTC_RSSI_STATE_MEDIUM) ||
  71                           (coex_sta->pre_bt_rssi_state ==
  72                            BTC_RSSI_STATE_STAY_MEDIUM)) {
  73                        if (bt_rssi >= (rssi_thresh1 +
  74                                        BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  75                                bt_rssi_state = BTC_RSSI_STATE_HIGH;
  76                        else if (bt_rssi < rssi_thresh)
  77                                bt_rssi_state = BTC_RSSI_STATE_LOW;
  78                        else
  79                                bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
  80                } else {
  81                        if (bt_rssi < rssi_thresh1)
  82                                bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
  83                        else
  84                                bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  85                }
  86        }
  87
  88        coex_sta->pre_bt_rssi_state = bt_rssi_state;
  89
  90        return bt_rssi_state;
  91}
  92
  93static u8 btc8192e2ant_wifi_rssi_state(struct btc_coexist *btcoexist,
  94                                       u8 index, u8 level_num, u8 rssi_thresh,
  95                                       u8 rssi_thresh1)
  96{
  97        struct rtl_priv *rtlpriv = btcoexist->adapter;
  98        int wifi_rssi = 0;
  99        u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index];
 100
 101        btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
 102
 103        if (level_num == 2) {
 104                if ((coex_sta->pre_wifi_rssi_state[index] ==
 105                     BTC_RSSI_STATE_LOW) ||
 106                    (coex_sta->pre_wifi_rssi_state[index] ==
 107                     BTC_RSSI_STATE_STAY_LOW)) {
 108                        if (wifi_rssi >=
 109                            (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
 110                                wifi_rssi_state = BTC_RSSI_STATE_HIGH;
 111                        else
 112                                wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
 113                } else {
 114                        if (wifi_rssi < rssi_thresh)
 115                                wifi_rssi_state = BTC_RSSI_STATE_LOW;
 116                        else
 117                                wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
 118                }
 119        } else if (level_num == 3) {
 120                if (rssi_thresh > rssi_thresh1) {
 121                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 122                                "[BTCoex], wifi RSSI thresh error!!\n");
 123                        return coex_sta->pre_wifi_rssi_state[index];
 124                }
 125
 126                if ((coex_sta->pre_wifi_rssi_state[index] ==
 127                     BTC_RSSI_STATE_LOW) ||
 128                    (coex_sta->pre_wifi_rssi_state[index] ==
 129                     BTC_RSSI_STATE_STAY_LOW)) {
 130                        if (wifi_rssi >=
 131                            (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
 132                                wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
 133                        else
 134                                wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
 135                } else if ((coex_sta->pre_wifi_rssi_state[index] ==
 136                            BTC_RSSI_STATE_MEDIUM) ||
 137                           (coex_sta->pre_wifi_rssi_state[index] ==
 138                            BTC_RSSI_STATE_STAY_MEDIUM)) {
 139                        if (wifi_rssi >= (rssi_thresh1 +
 140                                         BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
 141                                wifi_rssi_state = BTC_RSSI_STATE_HIGH;
 142                        else if (wifi_rssi < rssi_thresh)
 143                                wifi_rssi_state = BTC_RSSI_STATE_LOW;
 144                        else
 145                                wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
 146                } else {
 147                        if (wifi_rssi < rssi_thresh1)
 148                                wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
 149                        else
 150                                wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
 151                }
 152        }
 153
 154        coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state;
 155
 156        return wifi_rssi_state;
 157}
 158
 159static void btc8192e2ant_monitor_bt_enable_disable(struct btc_coexist
 160                                                   *btcoexist)
 161{
 162        struct rtl_priv *rtlpriv = btcoexist->adapter;
 163        static bool pre_bt_disabled;
 164        static u32 bt_disable_cnt;
 165        bool bt_active = true, bt_disabled = false;
 166
 167        /* This function check if bt is disabled */
 168
 169        if (coex_sta->high_priority_tx == 0 &&
 170            coex_sta->high_priority_rx == 0 &&
 171            coex_sta->low_priority_tx == 0 &&
 172            coex_sta->low_priority_rx == 0)
 173                bt_active = false;
 174
 175        if (coex_sta->high_priority_tx == 0xffff &&
 176            coex_sta->high_priority_rx == 0xffff &&
 177            coex_sta->low_priority_tx == 0xffff &&
 178            coex_sta->low_priority_rx == 0xffff)
 179                bt_active = false;
 180
 181        if (bt_active) {
 182                bt_disable_cnt = 0;
 183                bt_disabled = false;
 184                btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
 185                                   &bt_disabled);
 186                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 187                        "[BTCoex], BT is enabled !!\n");
 188        } else {
 189                bt_disable_cnt++;
 190                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 191                        "[BTCoex], bt all counters = 0, %d times!!\n",
 192                        bt_disable_cnt);
 193                if (bt_disable_cnt >= 2) {
 194                        bt_disabled = true;
 195                        btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
 196                                           &bt_disabled);
 197                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 198                                "[BTCoex], BT is disabled !!\n");
 199                }
 200        }
 201        if (pre_bt_disabled != bt_disabled) {
 202                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 203                        "[BTCoex], BT is from %s to %s!!\n",
 204                        (pre_bt_disabled ? "disabled" : "enabled"),
 205                        (bt_disabled ? "disabled" : "enabled"));
 206                pre_bt_disabled = bt_disabled;
 207        }
 208}
 209
 210static u32 btc8192e2ant_decide_ra_mask(struct btc_coexist *btcoexist,
 211                                       u8 ss_type, u32 ra_mask_type)
 212{
 213        u32 dis_ra_mask = 0x0;
 214
 215        switch (ra_mask_type) {
 216        case 0: /* normal mode */
 217                if (ss_type == 2)
 218                        dis_ra_mask = 0x0; /* enable 2ss */
 219                else
 220                        dis_ra_mask = 0xfff00000; /* disable 2ss */
 221                break;
 222        case 1: /* disable cck 1/2 */
 223                if (ss_type == 2)
 224                        dis_ra_mask = 0x00000003; /* enable 2ss */
 225                else
 226                        dis_ra_mask = 0xfff00003; /* disable 2ss */
 227                break;
 228        case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
 229                if (ss_type == 2)
 230                        dis_ra_mask = 0x0001f1f7; /* enable 2ss */
 231                else
 232                        dis_ra_mask = 0xfff1f1f7; /* disable 2ss */
 233                break;
 234        default:
 235                break;
 236        }
 237
 238        return dis_ra_mask;
 239}
 240
 241static void btc8192e2ant_update_ra_mask(struct btc_coexist *btcoexist,
 242                                        bool force_exec, u32 dis_rate_mask)
 243{
 244        coex_dm->cur_ra_mask = dis_rate_mask;
 245
 246        if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask))
 247                btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK,
 248                                   &coex_dm->cur_ra_mask);
 249        coex_dm->pre_ra_mask = coex_dm->cur_ra_mask;
 250}
 251
 252static void btc8192e2ant_auto_rate_fallback_retry(struct btc_coexist *btcoexist,
 253                                                  bool force_exec, u8 type)
 254{
 255        bool wifi_under_b_mode = false;
 256
 257        coex_dm->cur_arfr_type = type;
 258
 259        if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) {
 260                switch (coex_dm->cur_arfr_type) {
 261                case 0: /* normal mode */
 262                        btcoexist->btc_write_4byte(btcoexist, 0x430,
 263                                                   coex_dm->backup_arfr_cnt1);
 264                        btcoexist->btc_write_4byte(btcoexist, 0x434,
 265                                                   coex_dm->backup_arfr_cnt2);
 266                        break;
 267                case 1:
 268                        btcoexist->btc_get(btcoexist,
 269                                           BTC_GET_BL_WIFI_UNDER_B_MODE,
 270                                           &wifi_under_b_mode);
 271                        if (wifi_under_b_mode) {
 272                                btcoexist->btc_write_4byte(btcoexist, 0x430,
 273                                                           0x0);
 274                                btcoexist->btc_write_4byte(btcoexist, 0x434,
 275                                                           0x01010101);
 276                        } else {
 277                                btcoexist->btc_write_4byte(btcoexist, 0x430,
 278                                                           0x0);
 279                                btcoexist->btc_write_4byte(btcoexist, 0x434,
 280                                                           0x04030201);
 281                        }
 282                        break;
 283                default:
 284                        break;
 285                }
 286        }
 287
 288        coex_dm->pre_arfr_type = coex_dm->cur_arfr_type;
 289}
 290
 291static void btc8192e2ant_retry_limit(struct btc_coexist *btcoexist,
 292                                     bool force_exec, u8 type)
 293{
 294        coex_dm->cur_retry_limit_type = type;
 295
 296        if (force_exec || (coex_dm->pre_retry_limit_type !=
 297                           coex_dm->cur_retry_limit_type)) {
 298                switch (coex_dm->cur_retry_limit_type) {
 299                case 0: /* normal mode */
 300                        btcoexist->btc_write_2byte(btcoexist, 0x42a,
 301                                                   coex_dm->backup_retry_limit);
 302                        break;
 303                case 1: /* retry limit = 8 */
 304                        btcoexist->btc_write_2byte(btcoexist, 0x42a, 0x0808);
 305                        break;
 306                default:
 307                        break;
 308                }
 309        }
 310
 311        coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type;
 312}
 313
 314static void btc8192e2ant_ampdu_maxtime(struct btc_coexist *btcoexist,
 315                                       bool force_exec, u8 type)
 316{
 317        coex_dm->cur_ampdu_time_type = type;
 318
 319        if (force_exec || (coex_dm->pre_ampdu_time_type !=
 320                           coex_dm->cur_ampdu_time_type)) {
 321                switch (coex_dm->cur_ampdu_time_type) {
 322                case 0: /* normal mode */
 323                        btcoexist->btc_write_1byte(btcoexist, 0x456,
 324                                                coex_dm->backup_ampdu_maxtime);
 325                        break;
 326                case 1: /* AMPDU time = 0x38 * 32us */
 327                        btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38);
 328                        break;
 329                default:
 330                        break;
 331                }
 332        }
 333
 334        coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type;
 335}
 336
 337static void btc8192e2ant_limited_tx(struct btc_coexist *btcoexist,
 338                                    bool force_exec, u8 ra_mask_type,
 339                                    u8 arfr_type, u8 retry_limit_type,
 340                                    u8 ampdu_time_type)
 341{
 342        u32 dis_ra_mask = 0x0;
 343
 344        coex_dm->cur_ra_mask_type = ra_mask_type;
 345        dis_ra_mask =
 346                 btc8192e2ant_decide_ra_mask(btcoexist, coex_dm->cur_ss_type,
 347                                             ra_mask_type);
 348        btc8192e2ant_update_ra_mask(btcoexist, force_exec, dis_ra_mask);
 349        btc8192e2ant_auto_rate_fallback_retry(btcoexist, force_exec, arfr_type);
 350        btc8192e2ant_retry_limit(btcoexist, force_exec, retry_limit_type);
 351        btc8192e2ant_ampdu_maxtime(btcoexist, force_exec, ampdu_time_type);
 352}
 353
 354static void btc8192e2ant_limited_rx(struct btc_coexist *btcoexist,
 355                                    bool force_exec, bool rej_ap_agg_pkt,
 356                                    bool bt_ctrl_agg_buf_size,
 357                                    u8 agg_buf_size)
 358{
 359        bool reject_rx_agg = rej_ap_agg_pkt;
 360        bool bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
 361        u8 rx_agg_size = agg_buf_size;
 362
 363        /*********************************************
 364         *      Rx Aggregation related setting
 365         *********************************************/
 366        btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
 367                           &reject_rx_agg);
 368        /* decide BT control aggregation buf size or not */
 369        btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
 370                           &bt_ctrl_rx_agg_size);
 371        /* aggregation buf size, only work
 372         * when BT control Rx aggregation size.
 373         */
 374        btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
 375        /* real update aggregation setting */
 376        btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
 377}
 378
 379static void btc8192e2ant_monitor_bt_ctr(struct btc_coexist *btcoexist)
 380{
 381        struct rtl_priv *rtlpriv = btcoexist->adapter;
 382        u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
 383        u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
 384
 385        reg_hp_txrx = 0x770;
 386        reg_lp_txrx = 0x774;
 387
 388        u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
 389        reg_hp_tx = u32tmp & MASKLWORD;
 390        reg_hp_rx = (u32tmp & MASKHWORD) >> 16;
 391
 392        u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
 393        reg_lp_tx = u32tmp & MASKLWORD;
 394        reg_lp_rx = (u32tmp & MASKHWORD) >> 16;
 395
 396        coex_sta->high_priority_tx = reg_hp_tx;
 397        coex_sta->high_priority_rx = reg_hp_rx;
 398        coex_sta->low_priority_tx = reg_lp_tx;
 399        coex_sta->low_priority_rx = reg_lp_rx;
 400
 401        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 402                "[BTCoex] High Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n",
 403                reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
 404        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 405                "[BTCoex] Low Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n",
 406                reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
 407
 408        /* reset counter */
 409        btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
 410}
 411
 412static void btc8192e2ant_query_bt_info(struct btc_coexist *btcoexist)
 413{
 414        struct rtl_priv *rtlpriv = btcoexist->adapter;
 415        u8 h2c_parameter[1] = {0};
 416
 417        coex_sta->c2h_bt_info_req_sent = true;
 418
 419        h2c_parameter[0] |= BIT0; /* trigger */
 420
 421        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 422                "[BTCoex], Query Bt Info, FW write 0x61 = 0x%x\n",
 423                h2c_parameter[0]);
 424
 425        btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
 426}
 427
 428static
 429bool btc8192e2ant_is_wifi_status_changed(struct btc_coexist *btcoexist)
 430{
 431        static bool pre_wifi_busy = false, pre_under_4way = false,
 432                    pre_bt_hs_on = false;
 433        bool wifi_busy = false, under_4way = false, bt_hs_on = false;
 434        bool wifi_connected = false;
 435
 436        btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 437                           &wifi_connected);
 438        btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 439        btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 440        btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
 441                           &under_4way);
 442
 443        if (wifi_connected) {
 444                if (wifi_busy != pre_wifi_busy) {
 445                        pre_wifi_busy = wifi_busy;
 446                        return true;
 447                }
 448                if (under_4way != pre_under_4way) {
 449                        pre_under_4way = under_4way;
 450                        return true;
 451                }
 452                if (bt_hs_on != pre_bt_hs_on) {
 453                        pre_bt_hs_on = bt_hs_on;
 454                        return true;
 455                }
 456        }
 457
 458        return false;
 459}
 460
 461static void btc8192e2ant_update_bt_link_info(struct btc_coexist *btcoexist)
 462{
 463        struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 464        bool bt_hs_on = false;
 465
 466        btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 467
 468        bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
 469        bt_link_info->sco_exist = coex_sta->sco_exist;
 470        bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
 471        bt_link_info->pan_exist = coex_sta->pan_exist;
 472        bt_link_info->hid_exist = coex_sta->hid_exist;
 473
 474        /* work around for HS mode. */
 475        if (bt_hs_on) {
 476                bt_link_info->pan_exist = true;
 477                bt_link_info->bt_link_exist = true;
 478        }
 479
 480        /* check if Sco only */
 481        if (bt_link_info->sco_exist &&
 482            !bt_link_info->a2dp_exist &&
 483            !bt_link_info->pan_exist &&
 484            !bt_link_info->hid_exist)
 485                bt_link_info->sco_only = true;
 486        else
 487                bt_link_info->sco_only = false;
 488
 489        /* check if A2dp only */
 490        if (!bt_link_info->sco_exist &&
 491            bt_link_info->a2dp_exist &&
 492            !bt_link_info->pan_exist &&
 493            !bt_link_info->hid_exist)
 494                bt_link_info->a2dp_only = true;
 495        else
 496                bt_link_info->a2dp_only = false;
 497
 498        /* check if Pan only */
 499        if (!bt_link_info->sco_exist &&
 500            !bt_link_info->a2dp_exist &&
 501            bt_link_info->pan_exist &&
 502            !bt_link_info->hid_exist)
 503                bt_link_info->pan_only = true;
 504        else
 505                bt_link_info->pan_only = false;
 506
 507        /* check if Hid only */
 508        if (!bt_link_info->sco_exist &&
 509            !bt_link_info->a2dp_exist &&
 510            !bt_link_info->pan_exist &&
 511            bt_link_info->hid_exist)
 512                bt_link_info->hid_only = true;
 513        else
 514                bt_link_info->hid_only = false;
 515}
 516
 517static u8 btc8192e2ant_action_algorithm(struct btc_coexist *btcoexist)
 518{
 519        struct rtl_priv *rtlpriv = btcoexist->adapter;
 520        struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 521        struct btc_stack_info *stack_info = &btcoexist->stack_info;
 522        bool bt_hs_on = false;
 523        u8 algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED;
 524        u8 num_of_diff_profile = 0;
 525
 526        btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 527
 528        if (!bt_link_info->bt_link_exist) {
 529                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 530                        "No BT link exists!!!\n");
 531                return algorithm;
 532        }
 533
 534        if (bt_link_info->sco_exist)
 535                num_of_diff_profile++;
 536        if (bt_link_info->hid_exist)
 537                num_of_diff_profile++;
 538        if (bt_link_info->pan_exist)
 539                num_of_diff_profile++;
 540        if (bt_link_info->a2dp_exist)
 541                num_of_diff_profile++;
 542
 543        if (num_of_diff_profile == 1) {
 544                if (bt_link_info->sco_exist) {
 545                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 546                                "SCO only\n");
 547                        algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 548                } else {
 549                        if (bt_link_info->hid_exist) {
 550                                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 551                                        "HID only\n");
 552                                algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
 553                        } else if (bt_link_info->a2dp_exist) {
 554                                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 555                                        "A2DP only\n");
 556                                algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP;
 557                        } else if (bt_link_info->pan_exist) {
 558                                if (bt_hs_on) {
 559                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 560                                                DBG_LOUD,
 561                                                "PAN(HS) only\n");
 562                                        algorithm =
 563                                                BT_8192E_2ANT_COEX_ALGO_PANHS;
 564                                } else {
 565                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 566                                                DBG_LOUD,
 567                                                "PAN(EDR) only\n");
 568                                        algorithm =
 569                                                BT_8192E_2ANT_COEX_ALGO_PANEDR;
 570                                }
 571                        }
 572                }
 573        } else if (num_of_diff_profile == 2) {
 574                if (bt_link_info->sco_exist) {
 575                        if (bt_link_info->hid_exist) {
 576                                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 577                                        "SCO + HID\n");
 578                                algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 579                        } else if (bt_link_info->a2dp_exist) {
 580                                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 581                                        "SCO + A2DP ==> SCO\n");
 582                                algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 583                        } else if (bt_link_info->pan_exist) {
 584                                if (bt_hs_on) {
 585                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 586                                                DBG_LOUD,
 587                                                 "SCO + PAN(HS)\n");
 588                                        algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 589                                } else {
 590                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 591                                                DBG_LOUD,
 592                                                 "SCO + PAN(EDR)\n");
 593                                        algorithm =
 594                                                BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
 595                                }
 596                        }
 597                } else {
 598                        if (bt_link_info->hid_exist &&
 599                            bt_link_info->a2dp_exist) {
 600                                if (stack_info->num_of_hid >= 2) {
 601                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 602                                                DBG_LOUD,
 603                                                 "HID*2 + A2DP\n");
 604                                        algorithm =
 605                                        BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
 606                                } else {
 607                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 608                                                DBG_LOUD,
 609                                                 "HID + A2DP\n");
 610                                        algorithm =
 611                                            BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
 612                                }
 613                        } else if (bt_link_info->hid_exist &&
 614                                   bt_link_info->pan_exist) {
 615                                if (bt_hs_on) {
 616                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 617                                                DBG_LOUD,
 618                                                 "HID + PAN(HS)\n");
 619                                        algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
 620                                } else {
 621                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 622                                                DBG_LOUD,
 623                                                "HID + PAN(EDR)\n");
 624                                        algorithm =
 625                                            BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 626                                }
 627                        } else if (bt_link_info->pan_exist &&
 628                                   bt_link_info->a2dp_exist) {
 629                                if (bt_hs_on) {
 630                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 631                                                DBG_LOUD,
 632                                                "A2DP + PAN(HS)\n");
 633                                        algorithm =
 634                                            BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS;
 635                                } else {
 636                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 637                                                DBG_LOUD,
 638                                                "A2DP + PAN(EDR)\n");
 639                                        algorithm =
 640                                            BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP;
 641                                }
 642                        }
 643                }
 644        } else if (num_of_diff_profile == 3) {
 645                if (bt_link_info->sco_exist) {
 646                        if (bt_link_info->hid_exist &&
 647                            bt_link_info->a2dp_exist) {
 648                                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 649                                        "SCO + HID + A2DP ==> HID\n");
 650                                algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 651                        } else if (bt_link_info->hid_exist &&
 652                                   bt_link_info->pan_exist) {
 653                                if (bt_hs_on) {
 654                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 655                                                DBG_LOUD,
 656                                                "SCO + HID + PAN(HS)\n");
 657                                        algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 658                                } else {
 659                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 660                                                DBG_LOUD,
 661                                                "SCO + HID + PAN(EDR)\n");
 662                                        algorithm =
 663                                                BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
 664                                }
 665                        } else if (bt_link_info->pan_exist &&
 666                                   bt_link_info->a2dp_exist) {
 667                                if (bt_hs_on) {
 668                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 669                                                DBG_LOUD,
 670                                                "SCO + A2DP + PAN(HS)\n");
 671                                        algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 672                                } else {
 673                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 674                                                DBG_LOUD,
 675                                                "SCO + A2DP + PAN(EDR)\n");
 676                                        algorithm =
 677                                            BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 678                                }
 679                        }
 680                } else {
 681                        if (bt_link_info->hid_exist &&
 682                            bt_link_info->pan_exist &&
 683                            bt_link_info->a2dp_exist) {
 684                                if (bt_hs_on) {
 685                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 686                                                DBG_LOUD,
 687                                                "HID + A2DP + PAN(HS)\n");
 688                                        algorithm =
 689                                            BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
 690                                } else {
 691                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 692                                                DBG_LOUD,
 693                                                "HID + A2DP + PAN(EDR)\n");
 694                                        algorithm =
 695                                        BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
 696                                }
 697                        }
 698                }
 699        } else if (num_of_diff_profile >= 3) {
 700                if (bt_link_info->sco_exist) {
 701                        if (bt_link_info->hid_exist &&
 702                            bt_link_info->pan_exist &&
 703                            bt_link_info->a2dp_exist) {
 704                                if (bt_hs_on) {
 705                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 706                                                DBG_LOUD,
 707                                                "ErrorSCO+HID+A2DP+PAN(HS)\n");
 708
 709                                } else {
 710                                        rtl_dbg(rtlpriv, COMP_BT_COEXIST,
 711                                                DBG_LOUD,
 712                                                "SCO+HID+A2DP+PAN(EDR)\n");
 713                                        algorithm =
 714                                            BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 715                                }
 716                        }
 717                }
 718        }
 719
 720        return algorithm;
 721}
 722
 723static void btc8192e2ant_set_fw_dac_swing_level(struct btc_coexist *btcoexist,
 724                                                u8 dac_swing_lvl)
 725{
 726        struct rtl_priv *rtlpriv = btcoexist->adapter;
 727        u8 h2c_parameter[1] = {0};
 728
 729        /* There are several type of dacswing
 730         * 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6
 731         */
 732        h2c_parameter[0] = dac_swing_lvl;
 733
 734        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 735                "[BTCoex], Set Dac Swing Level = 0x%x\n", dac_swing_lvl);
 736        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 737                "[BTCoex], FW write 0x64 = 0x%x\n", h2c_parameter[0]);
 738
 739        btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
 740}
 741
 742static void btc8192e2ant_set_fw_dec_bt_pwr(struct btc_coexist *btcoexist,
 743                                           u8 dec_bt_pwr_lvl)
 744{
 745        struct rtl_priv *rtlpriv = btcoexist->adapter;
 746        u8 h2c_parameter[1] = {0};
 747
 748        h2c_parameter[0] = dec_bt_pwr_lvl;
 749
 750        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 751                "[BTCoex] decrease Bt Power level = %d, FW write 0x62 = 0x%x\n",
 752                dec_bt_pwr_lvl, h2c_parameter[0]);
 753
 754        btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
 755}
 756
 757static void btc8192e2ant_dec_bt_pwr(struct btc_coexist *btcoexist,
 758                                    bool force_exec, u8 dec_bt_pwr_lvl)
 759{
 760        struct rtl_priv *rtlpriv = btcoexist->adapter;
 761
 762        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 763                "[BTCoex], %s Dec BT power level = %d\n",
 764                force_exec ? "force to" : "", dec_bt_pwr_lvl);
 765        coex_dm->cur_dec_bt_pwr = dec_bt_pwr_lvl;
 766
 767        if (!force_exec) {
 768                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 769                        "[BTCoex], preBtDecPwrLvl=%d, curBtDecPwrLvl=%d\n",
 770                        coex_dm->pre_dec_bt_pwr, coex_dm->cur_dec_bt_pwr);
 771        }
 772        btc8192e2ant_set_fw_dec_bt_pwr(btcoexist, coex_dm->cur_dec_bt_pwr);
 773
 774        coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr;
 775}
 776
 777static void btc8192e2ant_set_bt_auto_report(struct btc_coexist *btcoexist,
 778                                            bool enable_auto_report)
 779{
 780        struct rtl_priv *rtlpriv = btcoexist->adapter;
 781        u8 h2c_parameter[1] = {0};
 782
 783        h2c_parameter[0] = 0;
 784
 785        if (enable_auto_report)
 786                h2c_parameter[0] |= BIT0;
 787
 788        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 789                "[BTCoex], BT FW auto report : %s, FW write 0x68 = 0x%x\n",
 790                (enable_auto_report ? "Enabled!!" : "Disabled!!"),
 791                 h2c_parameter[0]);
 792
 793        btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
 794}
 795
 796static void btc8192e2ant_bt_auto_report(struct btc_coexist *btcoexist,
 797                                        bool force_exec,
 798                                        bool enable_auto_report)
 799{
 800        struct rtl_priv *rtlpriv = btcoexist->adapter;
 801
 802        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 803                "[BTCoex], %s BT Auto report = %s\n",
 804                (force_exec ? "force to" : ""),
 805                 ((enable_auto_report) ? "Enabled" : "Disabled"));
 806        coex_dm->cur_bt_auto_report = enable_auto_report;
 807
 808        if (!force_exec) {
 809                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 810                        "[BTCoex] bPreBtAutoReport=%d, bCurBtAutoReport=%d\n",
 811                        coex_dm->pre_bt_auto_report,
 812                        coex_dm->cur_bt_auto_report);
 813
 814                if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
 815                        return;
 816        }
 817        btc8192e2ant_set_bt_auto_report(btcoexist,
 818                                        coex_dm->cur_bt_auto_report);
 819
 820        coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
 821}
 822
 823static void btc8192e2ant_fw_dac_swing_lvl(struct btc_coexist *btcoexist,
 824                                          bool force_exec, u8 fw_dac_swing_lvl)
 825{
 826        struct rtl_priv *rtlpriv = btcoexist->adapter;
 827
 828        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 829                "[BTCoex], %s set FW Dac Swing level = %d\n",
 830                (force_exec ? "force to" : ""), fw_dac_swing_lvl);
 831        coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
 832
 833        if (!force_exec) {
 834                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 835                        "[BTCoex] preFwDacSwingLvl=%d, curFwDacSwingLvl=%d\n",
 836                        coex_dm->pre_fw_dac_swing_lvl,
 837                        coex_dm->cur_fw_dac_swing_lvl);
 838
 839                if (coex_dm->pre_fw_dac_swing_lvl ==
 840                    coex_dm->cur_fw_dac_swing_lvl)
 841                        return;
 842        }
 843
 844        btc8192e2ant_set_fw_dac_swing_level(btcoexist,
 845                                            coex_dm->cur_fw_dac_swing_lvl);
 846
 847        coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
 848}
 849
 850static void btc8192e2ant_set_sw_rf_rx_lpf_corner(struct btc_coexist *btcoexist,
 851                                                 bool rx_rf_shrink_on)
 852{
 853        struct rtl_priv *rtlpriv = btcoexist->adapter;
 854
 855        if (rx_rf_shrink_on) {
 856                /* Shrink RF Rx LPF corner */
 857                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 858                        "[BTCoex], Shrink RF Rx LPF corner!!\n");
 859                btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
 860                                          0xfffff, 0xffffc);
 861        } else {
 862                /* Resume RF Rx LPF corner
 863                 * After initialized, we can use coex_dm->btRf0x1eBackup
 864                 */
 865                if (btcoexist->initialized) {
 866                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 867                                "[BTCoex], Resume RF Rx LPF corner!!\n");
 868                        btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
 869                                                  0xfffff,
 870                                                  coex_dm->bt_rf0x1e_backup);
 871                }
 872        }
 873}
 874
 875static void btc8192e2ant_rf_shrink(struct btc_coexist *btcoexist,
 876                                   bool force_exec, bool rx_rf_shrink_on)
 877{
 878        struct rtl_priv *rtlpriv = btcoexist->adapter;
 879
 880        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 881                "[BTCoex], %s turn Rx RF Shrink = %s\n",
 882                (force_exec ? "force to" : ""),
 883                ((rx_rf_shrink_on) ? "ON" : "OFF"));
 884        coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
 885
 886        if (!force_exec) {
 887                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 888                        "[BTCoex]bPreRfRxLpfShrink=%d,bCurRfRxLpfShrink=%d\n",
 889                        coex_dm->pre_rf_rx_lpf_shrink,
 890                        coex_dm->cur_rf_rx_lpf_shrink);
 891
 892                if (coex_dm->pre_rf_rx_lpf_shrink ==
 893                    coex_dm->cur_rf_rx_lpf_shrink)
 894                        return;
 895        }
 896        btc8192e2ant_set_sw_rf_rx_lpf_corner(btcoexist,
 897                                             coex_dm->cur_rf_rx_lpf_shrink);
 898
 899        coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
 900}
 901
 902static void btc8192e2ant_set_dac_swing_reg(struct btc_coexist *btcoexist,
 903                                           u32 level)
 904{
 905        struct rtl_priv *rtlpriv = btcoexist->adapter;
 906        u8 val = (u8)level;
 907
 908        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 909                "[BTCoex], Write SwDacSwing = 0x%x\n", level);
 910        btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
 911}
 912
 913static void btc8192e2ant_set_sw_full_swing(struct btc_coexist *btcoexist,
 914                                           bool sw_dac_swing_on,
 915                                           u32 sw_dac_swing_lvl)
 916{
 917        if (sw_dac_swing_on)
 918                btc8192e2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl);
 919        else
 920                btc8192e2ant_set_dac_swing_reg(btcoexist, 0x18);
 921}
 922
 923static void btc8192e2ant_dac_swing(struct btc_coexist *btcoexist,
 924                                   bool force_exec, bool dac_swing_on,
 925                                   u32 dac_swing_lvl)
 926{
 927        struct rtl_priv *rtlpriv = btcoexist->adapter;
 928
 929        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 930                "[BTCoex], %s turn DacSwing=%s, dac_swing_lvl = 0x%x\n",
 931                (force_exec ? "force to" : ""),
 932                ((dac_swing_on) ? "ON" : "OFF"), dac_swing_lvl);
 933        coex_dm->cur_dac_swing_on = dac_swing_on;
 934        coex_dm->cur_dac_swing_lvl = dac_swing_lvl;
 935
 936        if (!force_exec) {
 937                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 938                        "[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl = 0x%x, ",
 939                        coex_dm->pre_dac_swing_on,
 940                        coex_dm->pre_dac_swing_lvl);
 941                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 942                        "bCurDacSwingOn=%d, curDacSwingLvl = 0x%x\n",
 943                        coex_dm->cur_dac_swing_on,
 944                        coex_dm->cur_dac_swing_lvl);
 945
 946                if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
 947                    (coex_dm->pre_dac_swing_lvl == coex_dm->cur_dac_swing_lvl))
 948                        return;
 949        }
 950        mdelay(30);
 951        btc8192e2ant_set_sw_full_swing(btcoexist, dac_swing_on, dac_swing_lvl);
 952
 953        coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
 954        coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
 955}
 956
 957static void btc8192e2ant_set_agc_table(struct btc_coexist *btcoexist,
 958                                       bool agc_table_en)
 959{
 960        struct rtl_priv *rtlpriv = btcoexist->adapter;
 961
 962        /* BB AGC Gain Table */
 963        if (agc_table_en) {
 964                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 965                        "[BTCoex], BB Agc Table On!\n");
 966                btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x0a1A0001);
 967                btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x091B0001);
 968                btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x081C0001);
 969                btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x071D0001);
 970                btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x061E0001);
 971                btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x051F0001);
 972        } else {
 973                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 974                        "[BTCoex], BB Agc Table Off!\n");
 975                btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
 976                btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
 977                btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
 978                btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
 979                btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
 980                btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
 981        }
 982}
 983
 984static void btc8192e2ant_agc_table(struct btc_coexist *btcoexist,
 985                                   bool force_exec, bool agc_table_en)
 986{
 987        struct rtl_priv *rtlpriv = btcoexist->adapter;
 988
 989        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 990                "[BTCoex], %s %s Agc Table\n",
 991                (force_exec ? "force to" : ""),
 992                ((agc_table_en) ? "Enable" : "Disable"));
 993        coex_dm->cur_agc_table_en = agc_table_en;
 994
 995        if (!force_exec) {
 996                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
 997                        "[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n",
 998                        coex_dm->pre_agc_table_en,
 999                        coex_dm->cur_agc_table_en);
1000
1001                if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
1002                        return;
1003        }
1004        btc8192e2ant_set_agc_table(btcoexist, agc_table_en);
1005
1006        coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
1007}
1008
1009static void btc8192e2ant_set_coex_table(struct btc_coexist *btcoexist,
1010                                        u32 val0x6c0, u32 val0x6c4,
1011                                        u32 val0x6c8, u8 val0x6cc)
1012{
1013        struct rtl_priv *rtlpriv = btcoexist->adapter;
1014
1015        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1016                "[BTCoex], set coex table, set 0x6c0 = 0x%x\n", val0x6c0);
1017        btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
1018
1019        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1020                "[BTCoex], set coex table, set 0x6c4 = 0x%x\n", val0x6c4);
1021        btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
1022
1023        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1024                "[BTCoex], set coex table, set 0x6c8 = 0x%x\n", val0x6c8);
1025        btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
1026
1027        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1028                "[BTCoex], set coex table, set 0x6cc = 0x%x\n", val0x6cc);
1029        btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
1030}
1031
1032static void btc8192e2ant_coex_table(struct btc_coexist *btcoexist,
1033                                    bool force_exec, u32 val0x6c0, u32 val0x6c4,
1034                                    u32 val0x6c8, u8 val0x6cc)
1035{
1036        struct rtl_priv *rtlpriv = btcoexist->adapter;
1037
1038        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1039                "[BTCoex], %s write Coex Table 0x6c0 = 0x%x, ",
1040                (force_exec ? "force to" : ""), val0x6c0);
1041        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1042                "0x6c4 = 0x%x, 0x6c8 = 0x%x, 0x6cc = 0x%x\n",
1043                val0x6c4, val0x6c8, val0x6cc);
1044        coex_dm->cur_val0x6c0 = val0x6c0;
1045        coex_dm->cur_val0x6c4 = val0x6c4;
1046        coex_dm->cur_val0x6c8 = val0x6c8;
1047        coex_dm->cur_val0x6cc = val0x6cc;
1048
1049        if (!force_exec) {
1050                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1051                        "[BTCoex], preVal0x6c0 = 0x%x, preVal0x6c4 = 0x%x, ",
1052                        coex_dm->pre_val0x6c0, coex_dm->pre_val0x6c4);
1053                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1054                        "preVal0x6c8 = 0x%x, preVal0x6cc = 0x%x !!\n",
1055                        coex_dm->pre_val0x6c8, coex_dm->pre_val0x6cc);
1056                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1057                        "[BTCoex], curVal0x6c0 = 0x%x, curVal0x6c4 = 0x%x\n",
1058                        coex_dm->cur_val0x6c0, coex_dm->cur_val0x6c4);
1059                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1060                        "curVal0x6c8 = 0x%x, curVal0x6cc = 0x%x !!\n",
1061                        coex_dm->cur_val0x6c8, coex_dm->cur_val0x6cc);
1062
1063                if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
1064                    (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
1065                    (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
1066                    (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
1067                        return;
1068        }
1069        btc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
1070                                    val0x6cc);
1071
1072        coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
1073        coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
1074        coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
1075        coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
1076}
1077
1078static void btc8192e2ant_coex_table_with_type(struct btc_coexist *btcoexist,
1079                                              bool force_exec, u8 type)
1080{
1081        switch (type) {
1082        case 0:
1083                btc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
1084                                        0x5a5a5a5a, 0xffffff, 0x3);
1085                break;
1086        case 1:
1087                btc8192e2ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a,
1088                                        0x5a5a5a5a, 0xffffff, 0x3);
1089                break;
1090        case 2:
1091                btc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
1092                                        0x5ffb5ffb, 0xffffff, 0x3);
1093                break;
1094        case 3:
1095                btc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
1096                                        0x5fdb5fdb, 0xffffff, 0x3);
1097                break;
1098        case 4:
1099                btc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
1100                                        0x5ffb5ffb, 0xffffff, 0x3);
1101                break;
1102        default:
1103                break;
1104        }
1105}
1106
1107static void btc8192e2ant_set_fw_ignore_wlan_act(struct btc_coexist *btcoexist,
1108                                                bool enable)
1109{
1110        struct rtl_priv *rtlpriv = btcoexist->adapter;
1111        u8 h2c_parameter[1] = {0};
1112
1113        if (enable)
1114                h2c_parameter[0] |= BIT0; /* function enable */
1115
1116        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1117                "[BTCoex]set FW for BT Ignore Wlan_Act, FW write 0x63 = 0x%x\n",
1118                h2c_parameter[0]);
1119
1120        btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
1121}
1122
1123static void btc8192e2ant_ignore_wlan_act(struct btc_coexist *btcoexist,
1124                                         bool force_exec, bool enable)
1125{
1126        struct rtl_priv *rtlpriv = btcoexist->adapter;
1127
1128        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1129                "[BTCoex], %s turn Ignore WlanAct %s\n",
1130                (force_exec ? "force to" : ""), (enable ? "ON" : "OFF"));
1131        coex_dm->cur_ignore_wlan_act = enable;
1132
1133        if (!force_exec) {
1134                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1135                        "[BTCoex], bPreIgnoreWlanAct = %d ",
1136                        coex_dm->pre_ignore_wlan_act);
1137                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1138                        "bCurIgnoreWlanAct = %d!!\n",
1139                        coex_dm->cur_ignore_wlan_act);
1140
1141                if (coex_dm->pre_ignore_wlan_act ==
1142                    coex_dm->cur_ignore_wlan_act)
1143                        return;
1144        }
1145        btc8192e2ant_set_fw_ignore_wlan_act(btcoexist, enable);
1146
1147        coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
1148}
1149
1150static void btc8192e2ant_set_fw_ps_tdma(struct btc_coexist *btcoexist, u8 byte1,
1151                                        u8 byte2, u8 byte3, u8 byte4, u8 byte5)
1152{
1153        struct rtl_priv *rtlpriv = btcoexist->adapter;
1154
1155        u8 h2c_parameter[5] = {0};
1156
1157        h2c_parameter[0] = byte1;
1158        h2c_parameter[1] = byte2;
1159        h2c_parameter[2] = byte3;
1160        h2c_parameter[3] = byte4;
1161        h2c_parameter[4] = byte5;
1162
1163        coex_dm->ps_tdma_para[0] = byte1;
1164        coex_dm->ps_tdma_para[1] = byte2;
1165        coex_dm->ps_tdma_para[2] = byte3;
1166        coex_dm->ps_tdma_para[3] = byte4;
1167        coex_dm->ps_tdma_para[4] = byte5;
1168
1169        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1170                "[BTCoex], FW write 0x60(5bytes) = 0x%x%08x\n",
1171                h2c_parameter[0],
1172                h2c_parameter[1] << 24 | h2c_parameter[2] << 16 |
1173                h2c_parameter[3] << 8 | h2c_parameter[4]);
1174
1175        btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1176}
1177
1178static void btc8192e2ant_sw_mechanism1(struct btc_coexist *btcoexist,
1179                                       bool shrink_rx_lpf, bool low_penalty_ra,
1180                                       bool limited_dig, bool btlan_constrain)
1181{
1182        btc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
1183}
1184
1185static void btc8192e2ant_sw_mechanism2(struct btc_coexist *btcoexist,
1186                                       bool agc_table_shift, bool adc_backoff,
1187                                       bool sw_dac_swing, u32 dac_swing_lvl)
1188{
1189        btc8192e2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift);
1190        btc8192e2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing,
1191                               dac_swing_lvl);
1192}
1193
1194static void btc8192e2ant_ps_tdma(struct btc_coexist *btcoexist,
1195                                 bool force_exec, bool turn_on, u8 type)
1196{
1197        struct rtl_priv *rtlpriv = btcoexist->adapter;
1198
1199        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1200                "[BTCoex], %s turn %s PS TDMA, type=%d\n",
1201                (force_exec ? "force to" : ""),
1202                (turn_on ? "ON" : "OFF"), type);
1203        coex_dm->cur_ps_tdma_on = turn_on;
1204        coex_dm->cur_ps_tdma = type;
1205
1206        if (!force_exec) {
1207                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1208                        "[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n",
1209                        coex_dm->pre_ps_tdma_on, coex_dm->cur_ps_tdma_on);
1210                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1211                        "[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n",
1212                        coex_dm->pre_ps_tdma, coex_dm->cur_ps_tdma);
1213
1214                if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
1215                    (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
1216                        return;
1217        }
1218        if (turn_on) {
1219                switch (type) {
1220                case 1:
1221                default:
1222                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
1223                                                    0x1a, 0xe1, 0x90);
1224                        break;
1225                case 2:
1226                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
1227                                                    0x12, 0xe1, 0x90);
1228                        break;
1229                case 3:
1230                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c,
1231                                                    0x3, 0xf1, 0x90);
1232                        break;
1233                case 4:
1234                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x10,
1235                                                    0x3, 0xf1, 0x90);
1236                        break;
1237                case 5:
1238                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
1239                                                    0x1a, 0x60, 0x90);
1240                        break;
1241                case 6:
1242                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
1243                                                    0x12, 0x60, 0x90);
1244                        break;
1245                case 7:
1246                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c,
1247                                                    0x3, 0x70, 0x90);
1248                        break;
1249                case 8:
1250                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xa3, 0x10,
1251                                                    0x3, 0x70, 0x90);
1252                        break;
1253                case 9:
1254                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
1255                                                    0x1a, 0xe1, 0x10);
1256                        break;
1257                case 10:
1258                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
1259                                                    0x12, 0xe1, 0x10);
1260                        break;
1261                case 11:
1262                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c,
1263                                                    0x3, 0xf1, 0x10);
1264                        break;
1265                case 12:
1266                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x10,
1267                                                    0x3, 0xf1, 0x10);
1268                        break;
1269                case 13:
1270                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
1271                                                    0x1a, 0xe0, 0x10);
1272                        break;
1273                case 14:
1274                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
1275                                                    0x12, 0xe0, 0x10);
1276                        break;
1277                case 15:
1278                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c,
1279                                                    0x3, 0xf0, 0x10);
1280                        break;
1281                case 16:
1282                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
1283                                                    0x3, 0xf0, 0x10);
1284                        break;
1285                case 17:
1286                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0x61, 0x20,
1287                                                    0x03, 0x10, 0x10);
1288                        break;
1289                case 18:
1290                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x5,
1291                                                    0x5, 0xe1, 0x90);
1292                        break;
1293                case 19:
1294                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x25,
1295                                                    0x25, 0xe1, 0x90);
1296                        break;
1297                case 20:
1298                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x25,
1299                                                    0x25, 0x60, 0x90);
1300                        break;
1301                case 21:
1302                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x15,
1303                                                    0x03, 0x70, 0x90);
1304                        break;
1305                case 71:
1306                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
1307                                                    0x1a, 0xe1, 0x90);
1308                        break;
1309                }
1310        } else {
1311                /* disable PS tdma */
1312                switch (type) {
1313                default:
1314                case 0:
1315                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0x8, 0x0, 0x0,
1316                                                    0x0, 0x0);
1317                        btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
1318                        break;
1319                case 1:
1320                        btc8192e2ant_set_fw_ps_tdma(btcoexist, 0x0, 0x0, 0x0,
1321                                                    0x8, 0x0);
1322                        mdelay(5);
1323                        btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
1324                        break;
1325                }
1326        }
1327
1328        /* update pre state */
1329        coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
1330        coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
1331}
1332
1333static void btc8192e2ant_set_switch_ss_type(struct btc_coexist *btcoexist,
1334                                            u8 ss_type)
1335{
1336        struct rtl_priv *rtlpriv = btcoexist->adapter;
1337        u8 mimops = BTC_MIMO_PS_DYNAMIC;
1338        u32 dis_ra_mask = 0x0;
1339
1340        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1341                "[BTCoex], REAL set SS Type = %d\n", ss_type);
1342
1343        dis_ra_mask = btc8192e2ant_decide_ra_mask(btcoexist, ss_type,
1344                                                  coex_dm->cur_ra_mask_type);
1345        btc8192e2ant_update_ra_mask(btcoexist, FORCE_EXEC, dis_ra_mask);
1346
1347        if (ss_type == 1) {
1348                btc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1349                /* switch ofdm path */
1350                btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11);
1351                btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1);
1352                btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81111111);
1353                /* switch cck patch */
1354                btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1);
1355                btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81);
1356                mimops = BTC_MIMO_PS_STATIC;
1357        } else if (ss_type == 2) {
1358                btc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
1359                btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33);
1360                btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3);
1361                btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313);
1362                btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x0);
1363                btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x41);
1364                mimops = BTC_MIMO_PS_DYNAMIC;
1365        }
1366        /* set rx 1ss or 2ss */
1367        btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS, &mimops);
1368}
1369
1370static void btc8192e2ant_switch_ss_type(struct btc_coexist *btcoexist,
1371                                        bool force_exec, u8 new_ss_type)
1372{
1373        struct rtl_priv *rtlpriv = btcoexist->adapter;
1374
1375        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1376                "[BTCoex], %s Switch SS Type = %d\n",
1377                (force_exec ? "force to" : ""), new_ss_type);
1378        coex_dm->cur_ss_type = new_ss_type;
1379
1380        if (!force_exec) {
1381                if (coex_dm->pre_ss_type == coex_dm->cur_ss_type)
1382                        return;
1383        }
1384        btc8192e2ant_set_switch_ss_type(btcoexist, coex_dm->cur_ss_type);
1385
1386        coex_dm->pre_ss_type = coex_dm->cur_ss_type;
1387}
1388
1389static void btc8192e2ant_coex_all_off(struct btc_coexist *btcoexist)
1390{
1391        /* fw all off */
1392        btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1393        btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1394        btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1395
1396        /* sw all off */
1397        btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1398        btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1399
1400        /* hw all off */
1401        btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1402}
1403
1404static void btc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
1405{
1406        /* force to reset coex mechanism */
1407
1408        btc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1409        btc8192e2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
1410        btc8192e2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0);
1411
1412        btc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
1413        btc8192e2ant_switch_ss_type(btcoexist, FORCE_EXEC, 2);
1414
1415        btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1416        btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1417}
1418
1419static void btc8192e2ant_action_bt_inquiry(struct btc_coexist *btcoexist)
1420{
1421        bool low_pwr_disable = true;
1422
1423        btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1424                           &low_pwr_disable);
1425
1426        btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
1427
1428        btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
1429        btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1430        btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1431        btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1432
1433        btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1434        btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1435}
1436
1437static bool btc8192e2ant_is_common_action(struct btc_coexist *btcoexist)
1438{
1439        struct rtl_priv *rtlpriv = btcoexist->adapter;
1440        struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
1441        bool common = false, wifi_connected = false, wifi_busy = false;
1442        bool bt_hs_on = false, low_pwr_disable = false;
1443
1444        btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
1445        btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1446                           &wifi_connected);
1447        btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1448
1449        if (bt_link_info->sco_exist || bt_link_info->hid_exist)
1450                btc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0);
1451        else
1452                btc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
1453
1454        if (!wifi_connected) {
1455                low_pwr_disable = false;
1456                btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1457                                   &low_pwr_disable);
1458
1459                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1460                        "[BTCoex], Wifi non-connected idle!!\n");
1461
1462                if ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1463                     coex_dm->bt_status) ||
1464                    (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1465                     coex_dm->bt_status)) {
1466                        btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2);
1467                        btc8192e2ant_coex_table_with_type(btcoexist,
1468                                                          NORMAL_EXEC, 1);
1469                        btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
1470                } else {
1471                        btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
1472                        btc8192e2ant_coex_table_with_type(btcoexist,
1473                                                          NORMAL_EXEC, 0);
1474                        btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1475                }
1476
1477                btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1478                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1479
1480                btc8192e2ant_sw_mechanism1(btcoexist, false, false, false,
1481                                           false);
1482                btc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
1483                                           0x18);
1484
1485                common = true;
1486        } else {
1487                if (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1488                    coex_dm->bt_status) {
1489                        low_pwr_disable = false;
1490                        btcoexist->btc_set(btcoexist,
1491                                           BTC_SET_ACT_DISABLE_LOW_POWER,
1492                                           &low_pwr_disable);
1493
1494                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1495                                "Wifi connected + BT non connected-idle!!\n");
1496
1497                        btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2);
1498                        btc8192e2ant_coex_table_with_type(btcoexist,
1499                                                          NORMAL_EXEC, 1);
1500                        btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
1501                        btc8192e2ant_fw_dac_swing_lvl(btcoexist,
1502                                                      NORMAL_EXEC, 6);
1503                        btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1504
1505                        btc8192e2ant_sw_mechanism1(btcoexist, false, false,
1506                                                   false, false);
1507                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
1508                                                   false, 0x18);
1509
1510                        common = true;
1511                } else if (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1512                           coex_dm->bt_status) {
1513                        low_pwr_disable = true;
1514                        btcoexist->btc_set(btcoexist,
1515                                           BTC_SET_ACT_DISABLE_LOW_POWER,
1516                                           &low_pwr_disable);
1517
1518                        if (bt_hs_on)
1519                                return false;
1520                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1521                                "Wifi connected + BT connected-idle!!\n");
1522
1523                        btc8192e2ant_switch_ss_type(btcoexist,
1524                                                    NORMAL_EXEC, 2);
1525                        btc8192e2ant_coex_table_with_type(btcoexist,
1526                                                          NORMAL_EXEC, 1);
1527                        btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1528                                             false, 0);
1529                        btc8192e2ant_fw_dac_swing_lvl(btcoexist,
1530                                                      NORMAL_EXEC, 6);
1531                        btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1532
1533                        btc8192e2ant_sw_mechanism1(btcoexist, true, false,
1534                                                   false, false);
1535                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
1536                                                   false, 0x18);
1537
1538                        common = true;
1539                } else {
1540                        low_pwr_disable = true;
1541                        btcoexist->btc_set(btcoexist,
1542                                           BTC_SET_ACT_DISABLE_LOW_POWER,
1543                                           &low_pwr_disable);
1544
1545                        if (wifi_busy) {
1546                                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1547                                        "Wifi Connected-Busy + BT Busy!!\n");
1548                                common = false;
1549                        } else {
1550                                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1551                                        "Wifi Connected-Idle + BT Busy!!\n");
1552
1553                                btc8192e2ant_switch_ss_type(btcoexist,
1554                                                            NORMAL_EXEC, 1);
1555                                btc8192e2ant_coex_table_with_type(btcoexist,
1556                                                                  NORMAL_EXEC,
1557                                                                  2);
1558                                btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1559                                                     true, 21);
1560                                btc8192e2ant_fw_dac_swing_lvl(btcoexist,
1561                                                              NORMAL_EXEC, 6);
1562                                btc8192e2ant_dec_bt_pwr(btcoexist,
1563                                                        NORMAL_EXEC, 0);
1564                                btc8192e2ant_sw_mechanism1(btcoexist, false,
1565                                                           false, false, false);
1566                                btc8192e2ant_sw_mechanism2(btcoexist, false,
1567                                                           false, false, 0x18);
1568                                common = true;
1569                        }
1570                }
1571        }
1572        return common;
1573}
1574
1575static void btc8192e2ant_tdma_duration_adjust(struct btc_coexist *btcoexist,
1576                                              bool sco_hid, bool tx_pause,
1577                                              u8 max_interval)
1578{
1579        struct rtl_priv *rtlpriv = btcoexist->adapter;
1580        static int up, dn, m, n, wait_cnt;
1581        u8 retry_cnt = 0;
1582
1583        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1584                "[BTCoex], TdmaDurationAdjust()\n");
1585
1586        if (!coex_dm->auto_tdma_adjust) {
1587                coex_dm->auto_tdma_adjust = true;
1588                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1589                        "[BTCoex], first run TdmaDurationAdjust()!!\n");
1590                if (sco_hid) {
1591                        if (tx_pause) {
1592                                if (max_interval == 1) {
1593                                        btc8192e2ant_ps_tdma(btcoexist,
1594                                                             NORMAL_EXEC,
1595                                                             true, 13);
1596                                        coex_dm->tdma_adj_type = 13;
1597                                } else if (max_interval == 2) {
1598                                        btc8192e2ant_ps_tdma(btcoexist,
1599                                                             NORMAL_EXEC,
1600                                                             true, 14);
1601                                        coex_dm->tdma_adj_type = 14;
1602                                } else {
1603                                        btc8192e2ant_ps_tdma(btcoexist,
1604                                                             NORMAL_EXEC,
1605                                                             true, 15);
1606                                        coex_dm->tdma_adj_type = 15;
1607                                }
1608                        } else {
1609                                if (max_interval == 1) {
1610                                        btc8192e2ant_ps_tdma(btcoexist,
1611                                                             NORMAL_EXEC,
1612                                                             true, 9);
1613                                        coex_dm->tdma_adj_type = 9;
1614                                } else if (max_interval == 2) {
1615                                        btc8192e2ant_ps_tdma(btcoexist,
1616                                                             NORMAL_EXEC,
1617                                                             true, 10);
1618                                        coex_dm->tdma_adj_type = 10;
1619                                } else {
1620                                        btc8192e2ant_ps_tdma(btcoexist,
1621                                                             NORMAL_EXEC,
1622                                                             true, 11);
1623                                        coex_dm->tdma_adj_type = 11;
1624                                }
1625                        }
1626                } else {
1627                        if (tx_pause) {
1628                                if (max_interval == 1) {
1629                                        btc8192e2ant_ps_tdma(btcoexist,
1630                                                             NORMAL_EXEC,
1631                                                             true, 5);
1632                                        coex_dm->tdma_adj_type = 5;
1633                                } else if (max_interval == 2) {
1634                                        btc8192e2ant_ps_tdma(btcoexist,
1635                                                             NORMAL_EXEC,
1636                                                             true, 6);
1637                                        coex_dm->tdma_adj_type = 6;
1638                                } else {
1639                                        btc8192e2ant_ps_tdma(btcoexist,
1640                                                             NORMAL_EXEC,
1641                                                             true, 7);
1642                                        coex_dm->tdma_adj_type = 7;
1643                                }
1644                        } else {
1645                                if (max_interval == 1) {
1646                                        btc8192e2ant_ps_tdma(btcoexist,
1647                                                             NORMAL_EXEC,
1648                                                             true, 1);
1649                                        coex_dm->tdma_adj_type = 1;
1650                                } else if (max_interval == 2) {
1651                                        btc8192e2ant_ps_tdma(btcoexist,
1652                                                             NORMAL_EXEC,
1653                                                             true, 2);
1654                                        coex_dm->tdma_adj_type = 2;
1655                                } else {
1656                                        btc8192e2ant_ps_tdma(btcoexist,
1657                                                             NORMAL_EXEC,
1658                                                             true, 3);
1659                                        coex_dm->tdma_adj_type = 3;
1660                                }
1661                        }
1662                }
1663
1664                up = 0;
1665                dn = 0;
1666                m = 1;
1667                n = 3;
1668                wait_cnt = 0;
1669        } else {
1670                /* accquire the BT TRx retry count from BT_Info byte2 */
1671                retry_cnt = coex_sta->bt_retry_cnt;
1672                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1673                        "[BTCoex], retry_cnt = %d\n", retry_cnt);
1674                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1675                        "[BTCoex], up=%d, dn=%d, m=%d, n=%d, wait_cnt=%d\n",
1676                        up, dn, m, n, wait_cnt);
1677                wait_cnt++;
1678                /* no retry in the last 2-second duration */
1679                if (retry_cnt == 0) {
1680                        up++;
1681                        dn--;
1682
1683                        if (dn <= 0)
1684                                dn = 0;
1685
1686                        if (up >= n) {
1687                                wait_cnt = 0;
1688                                n = 3;
1689                                up = 0;
1690                                dn = 0;
1691                                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1692                                        "[BTCoex]Increase wifi duration!!\n");
1693                        }
1694                } else if (retry_cnt <= 3) {
1695                        up--;
1696                        dn++;
1697
1698                        if (up <= 0)
1699                                up = 0;
1700
1701                        if (dn == 2) {
1702                                if (wait_cnt <= 2)
1703                                        m++;
1704                                else
1705                                        m = 1;
1706
1707                                if (m >= 20)
1708                                        m = 20;
1709
1710                                n = 3 * m;
1711                                up = 0;
1712                                dn = 0;
1713                                wait_cnt = 0;
1714                                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1715                                        "Reduce wifi duration for retry<3\n");
1716                        }
1717                } else {
1718                        if (wait_cnt == 1)
1719                                m++;
1720                        else
1721                                m = 1;
1722
1723                        if (m >= 20)
1724                                m = 20;
1725
1726                        n = 3*m;
1727                        up = 0;
1728                        dn = 0;
1729                        wait_cnt = 0;
1730                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1731                                "Decrease wifi duration for retryCounter>3!!\n");
1732                }
1733
1734                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1735                        "[BTCoex], max Interval = %d\n", max_interval);
1736        }
1737
1738        /* if current PsTdma not match with
1739         * the recorded one (when scan, dhcp...),
1740         * then we have to adjust it back to the previous record one.
1741         */
1742        if (coex_dm->cur_ps_tdma != coex_dm->tdma_adj_type) {
1743                bool scan = false, link = false, roam = false;
1744
1745                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1746                        "[BTCoex], PsTdma type mismatch!!!, ");
1747                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1748                        "curPsTdma=%d, recordPsTdma=%d\n",
1749                         coex_dm->cur_ps_tdma, coex_dm->tdma_adj_type);
1750
1751                btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
1752                btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
1753                btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
1754
1755                if (!scan && !link && !roam)
1756                        btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1757                                             true, coex_dm->tdma_adj_type);
1758                else
1759                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1760                                "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
1761        }
1762}
1763
1764/* SCO only or SCO+PAN(HS) */
1765static void btc8192e2ant_action_sco(struct btc_coexist *btcoexist)
1766{
1767        u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
1768        u32 wifi_bw;
1769
1770        wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
1771
1772        btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
1773        btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
1774
1775        btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1776
1777        btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
1778
1779        bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
1780
1781        if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
1782            (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
1783                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1784                btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
1785        } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
1786                   (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
1787                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
1788                btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
1789        } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
1790                   (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
1791                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
1792                btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
1793        }
1794
1795        btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
1796
1797        /* sw mechanism */
1798        if (BTC_WIFI_BW_HT40 == wifi_bw) {
1799                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
1800                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
1801                        btc8192e2ant_sw_mechanism1(btcoexist, true, true,
1802                                                   false, false);
1803                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
1804                                                   false, 0x6);
1805                } else {
1806                        btc8192e2ant_sw_mechanism1(btcoexist, true, true,
1807                                                   false, false);
1808                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
1809                                                   false, 0x6);
1810                }
1811        } else {
1812                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
1813                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
1814                        btc8192e2ant_sw_mechanism1(btcoexist, false, true,
1815                                                   false, false);
1816                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
1817                                                   false, 0x6);
1818                } else {
1819                        btc8192e2ant_sw_mechanism1(btcoexist, false, true,
1820                                                   false, false);
1821                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
1822                                                   false, 0x6);
1823                }
1824        }
1825}
1826
1827static void btc8192e2ant_action_sco_pan(struct btc_coexist *btcoexist)
1828{
1829        u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
1830        u32 wifi_bw;
1831
1832        wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
1833
1834        btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
1835        btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
1836
1837        btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1838
1839        btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
1840
1841        bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
1842
1843        if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
1844            (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
1845                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1846                btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
1847        } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
1848                   (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
1849                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
1850                btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
1851        } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
1852                   (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
1853                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
1854                btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
1855        }
1856
1857        btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
1858
1859        /* sw mechanism */
1860        if (BTC_WIFI_BW_HT40 == wifi_bw) {
1861                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
1862                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
1863                        btc8192e2ant_sw_mechanism1(btcoexist, true, true,
1864                                                   false, false);
1865                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
1866                                                   false, 0x6);
1867                } else {
1868                        btc8192e2ant_sw_mechanism1(btcoexist, true, true,
1869                                                   false, false);
1870                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
1871                                                   false, 0x6);
1872                }
1873        } else {
1874                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
1875                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
1876                        btc8192e2ant_sw_mechanism1(btcoexist, false, true,
1877                                                   false, false);
1878                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
1879                                                   false, 0x6);
1880                } else {
1881                        btc8192e2ant_sw_mechanism1(btcoexist, false, true,
1882                                                   false, false);
1883                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
1884                                                   false, 0x6);
1885                }
1886        }
1887}
1888
1889static void btc8192e2ant_action_hid(struct btc_coexist *btcoexist)
1890{
1891        u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
1892        u32 wifi_bw;
1893
1894        wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
1895        bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
1896
1897        btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
1898        btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
1899
1900        btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1901
1902        btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
1903
1904        btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
1905
1906        if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
1907            (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
1908                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1909                btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
1910        } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
1911                   (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
1912                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
1913                btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
1914        } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
1915                   (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
1916                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
1917                btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
1918        }
1919
1920        /* sw mechanism */
1921        if (BTC_WIFI_BW_HT40 == wifi_bw) {
1922                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
1923                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
1924                        btc8192e2ant_sw_mechanism1(btcoexist, true, true,
1925                                                   false, false);
1926                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
1927                                                   false, 0x18);
1928                } else {
1929                        btc8192e2ant_sw_mechanism1(btcoexist, true, true,
1930                                                   false, false);
1931                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
1932                                                   false, 0x18);
1933                }
1934        } else {
1935                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
1936                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
1937                        btc8192e2ant_sw_mechanism1(btcoexist, false, true,
1938                                                   false, false);
1939                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
1940                                                   false, 0x18);
1941                } else {
1942                        btc8192e2ant_sw_mechanism1(btcoexist, false, true,
1943                                                   false, false);
1944                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
1945                                                   false, 0x18);
1946                }
1947        }
1948}
1949
1950/* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
1951static void btc8192e2ant_action_a2dp(struct btc_coexist *btcoexist)
1952{
1953        struct rtl_priv *rtlpriv = btcoexist->adapter;
1954        u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
1955        u32 wifi_bw;
1956        bool long_dist = false;
1957
1958        wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
1959        bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
1960
1961        if ((bt_rssi_state == BTC_RSSI_STATE_LOW ||
1962             bt_rssi_state == BTC_RSSI_STATE_STAY_LOW) &&
1963            (wifi_rssi_state == BTC_RSSI_STATE_LOW ||
1964             wifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
1965                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
1966                        "[BTCoex], A2dp, wifi/bt rssi both LOW!!\n");
1967                long_dist = true;
1968        }
1969        if (long_dist) {
1970                btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2);
1971                btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true,
1972                                        0x4);
1973        } else {
1974                btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
1975                btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
1976                                        0x8);
1977        }
1978
1979        btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1980
1981        if (long_dist)
1982                btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1983        else
1984                btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
1985
1986        if (long_dist) {
1987                btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17);
1988                coex_dm->auto_tdma_adjust = false;
1989                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1990        } else {
1991                if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
1992                    (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
1993                        btc8192e2ant_tdma_duration_adjust(btcoexist, false,
1994                                                          true, 1);
1995                        btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1996                } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
1997                           (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
1998                        btc8192e2ant_tdma_duration_adjust(btcoexist, false,
1999                                                          false, 1);
2000                        btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2001                } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2002                           (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2003                        btc8192e2ant_tdma_duration_adjust(btcoexist, false,
2004                                                          false, 1);
2005                        btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2006                }
2007        }
2008
2009        /* sw mechanism */
2010        btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2011        if (BTC_WIFI_BW_HT40 == wifi_bw) {
2012                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2013                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2014                        btc8192e2ant_sw_mechanism1(btcoexist, true, false,
2015                                                   false, false);
2016                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
2017                                                   false, 0x18);
2018                } else {
2019                        btc8192e2ant_sw_mechanism1(btcoexist, true, false,
2020                                                   false, false);
2021                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
2022                                                   false, 0x18);
2023                }
2024        } else {
2025                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2026                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2027                        btc8192e2ant_sw_mechanism1(btcoexist, false, false,
2028                                                   false, false);
2029                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
2030                                                   false, 0x18);
2031                } else {
2032                        btc8192e2ant_sw_mechanism1(btcoexist, false, false,
2033                                                   false, false);
2034                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
2035                                                   false, 0x18);
2036                }
2037        }
2038}
2039
2040static void btc8192e2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist)
2041{
2042        u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2043        u32 wifi_bw;
2044
2045        wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
2046        bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
2047
2048        btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2049        btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2050
2051        btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2052        btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2053
2054        if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2055            (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2056                btc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2);
2057                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2058        } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2059                   (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2060                btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 2);
2061                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2062        } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2063                   (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2064                btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 2);
2065                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2066        }
2067
2068        /* sw mechanism */
2069        btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2070        if (BTC_WIFI_BW_HT40 == wifi_bw) {
2071                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2072                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2073                        btc8192e2ant_sw_mechanism1(btcoexist, true, false,
2074                                                   false, false);
2075                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
2076                                                   true, 0x6);
2077                } else {
2078                        btc8192e2ant_sw_mechanism1(btcoexist, true, false,
2079                                                   false, false);
2080                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
2081                                                   true, 0x6);
2082                }
2083        } else {
2084                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2085                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2086                        btc8192e2ant_sw_mechanism1(btcoexist, false, false,
2087                                                   false, false);
2088                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
2089                                                   true, 0x6);
2090                } else {
2091                        btc8192e2ant_sw_mechanism1(btcoexist, false, false,
2092                                                   false, false);
2093                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
2094                                                   true, 0x6);
2095                }
2096        }
2097}
2098
2099static void btc8192e2ant_action_pan_edr(struct btc_coexist *btcoexist)
2100{
2101        u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2102        u32 wifi_bw;
2103
2104        wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
2105        bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
2106
2107        btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2108        btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2109
2110        btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2111
2112        btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2113
2114        if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2115            (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2116                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2117                btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
2118        } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2119                   (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2120                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2121                btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
2122        } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2123                   (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2124                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2125                btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
2126        }
2127
2128        /* sw mechanism */
2129        btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2130        if (BTC_WIFI_BW_HT40 == wifi_bw) {
2131                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2132                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2133                        btc8192e2ant_sw_mechanism1(btcoexist, true, false,
2134                                                   false, false);
2135                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
2136                                                   false, 0x18);
2137                } else {
2138                        btc8192e2ant_sw_mechanism1(btcoexist, true, false,
2139                                                   false, false);
2140                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
2141                                                   false, 0x18);
2142                }
2143        } else {
2144                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2145                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2146                        btc8192e2ant_sw_mechanism1(btcoexist, false, false,
2147                                                   false, false);
2148                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
2149                                                   false, 0x18);
2150                } else {
2151                        btc8192e2ant_sw_mechanism1(btcoexist, false, false,
2152                                                   false, false);
2153                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
2154                                                   false, 0x18);
2155                }
2156        }
2157}
2158
2159/* PAN(HS) only */
2160static void btc8192e2ant_action_pan_hs(struct btc_coexist *btcoexist)
2161{
2162        u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2163        u32 wifi_bw;
2164
2165        wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
2166        bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
2167
2168        btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2169        btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2170
2171        btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2172
2173        btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2174
2175        if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2176            (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2177                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2178        } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2179                   (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2180                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2181        } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2182                   (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2183                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2184        }
2185        btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
2186
2187        btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2188        if (BTC_WIFI_BW_HT40 == wifi_bw) {
2189                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2190                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2191                        btc8192e2ant_sw_mechanism1(btcoexist, true, false,
2192                                                   false, false);
2193                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
2194                                                   false, 0x18);
2195                } else {
2196                        btc8192e2ant_sw_mechanism1(btcoexist, true, false,
2197                                                   false, false);
2198                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
2199                                                   false, 0x18);
2200                }
2201        } else {
2202                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2203                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2204                        btc8192e2ant_sw_mechanism1(btcoexist, false, false,
2205                                                   false, false);
2206                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
2207                                                   false, 0x18);
2208                } else {
2209                        btc8192e2ant_sw_mechanism1(btcoexist, false, false,
2210                                                   false, false);
2211                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
2212                                                   false, 0x18);
2213                }
2214        }
2215}
2216
2217/* PAN(EDR)+A2DP */
2218static void btc8192e2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
2219{
2220        u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2221        u32 wifi_bw;
2222
2223        wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
2224        bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
2225
2226        btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2227        btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2228
2229        btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2230
2231        btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2232
2233        btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2234
2235        if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2236            (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2237                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2238                btc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 3);
2239        } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2240                   (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2241                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2242                btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 3);
2243        } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2244                   (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2245                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2246                btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 3);
2247        }
2248
2249        /* sw mechanism */
2250        if (BTC_WIFI_BW_HT40 == wifi_bw) {
2251                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2252                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2253                        btc8192e2ant_sw_mechanism1(btcoexist, true, false,
2254                                                   false, false);
2255                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
2256                                                   false, 0x18);
2257                } else {
2258                        btc8192e2ant_sw_mechanism1(btcoexist, true, false,
2259                                                   false, false);
2260                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
2261                                                   false, 0x18);
2262                }
2263        } else {
2264                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2265                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2266                        btc8192e2ant_sw_mechanism1(btcoexist, false, false,
2267                                                   false, false);
2268                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
2269                                                   false, 0x18);
2270                } else {
2271                        btc8192e2ant_sw_mechanism1(btcoexist, false, false,
2272                                                   false, false);
2273                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
2274                                                   false, 0x18);
2275                }
2276        }
2277}
2278
2279static void btc8192e2ant_action_pan_edr_hid(struct btc_coexist *btcoexist)
2280{
2281        u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2282        u32 wifi_bw;
2283
2284        wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
2285        bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
2286
2287        btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2288
2289        btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2290        btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2291
2292        btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2293
2294        btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
2295
2296        if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2297            (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2298                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2299                btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
2300        } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2301                   (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2302                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2303                btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2304        } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2305                   (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2306                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2307                btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2308                                     true, 10);
2309        }
2310
2311        /* sw mechanism */
2312        if (BTC_WIFI_BW_HT40 == wifi_bw) {
2313                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2314                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2315                        btc8192e2ant_sw_mechanism1(btcoexist, true, true,
2316                                                   false, false);
2317                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
2318                                                   false, 0x18);
2319                } else {
2320                        btc8192e2ant_sw_mechanism1(btcoexist, true, true,
2321                                                   false, false);
2322                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
2323                                                   false, 0x18);
2324                }
2325        } else {
2326                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2327                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2328                        btc8192e2ant_sw_mechanism1(btcoexist, false, true,
2329                                                   false, false);
2330                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
2331                                                   false, 0x18);
2332                } else {
2333                        btc8192e2ant_sw_mechanism1(btcoexist, false, true,
2334                                                   false, false);
2335                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
2336                                                   false, 0x18);
2337                }
2338        }
2339}
2340
2341/* HID+A2DP+PAN(EDR) */
2342static void btc8192e2ant_action_hid_a2dp_pan_edr(struct btc_coexist *btcoexist)
2343{
2344        u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2345        u32 wifi_bw;
2346
2347        wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
2348        bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
2349
2350        btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2351        btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2352
2353        btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2354
2355        btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2356
2357        btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
2358
2359        if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2360            (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2361                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2362                btc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 3);
2363        } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2364                   (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2365                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2366                btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
2367        } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2368                   (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2369                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2370                btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
2371        }
2372
2373        /* sw mechanism */
2374        if (BTC_WIFI_BW_HT40 == wifi_bw) {
2375                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2376                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2377                        btc8192e2ant_sw_mechanism1(btcoexist, true, true,
2378                                                   false, false);
2379                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
2380                                                   false, 0x18);
2381                } else {
2382                        btc8192e2ant_sw_mechanism1(btcoexist, true, true,
2383                                                   false, false);
2384                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
2385                                                   false, 0x18);
2386                }
2387        } else {
2388                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2389                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2390                        btc8192e2ant_sw_mechanism1(btcoexist, false, true,
2391                                                   false, false);
2392                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
2393                                                   false, 0x18);
2394                } else {
2395                        btc8192e2ant_sw_mechanism1(btcoexist, false, true,
2396                                                   false, false);
2397                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
2398                                                   false, 0x18);
2399                }
2400        }
2401}
2402
2403static void btc8192e2ant_action_hid_a2dp(struct btc_coexist *btcoexist)
2404{
2405        u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2406        u32 wifi_bw;
2407
2408        wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
2409        bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
2410
2411        btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2412        btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2413
2414        btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2415
2416        btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
2417
2418        if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2419            (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2420                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2421                btc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 2);
2422        } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2423                   (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM))       {
2424                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2425                btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
2426        } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2427                   (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2428                btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2429                btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
2430        }
2431
2432        /* sw mechanism */
2433        if (BTC_WIFI_BW_HT40 == wifi_bw) {
2434                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2435                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2436                        btc8192e2ant_sw_mechanism1(btcoexist, true, true,
2437                                                   false, false);
2438                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
2439                                                   false, 0x18);
2440                } else {
2441                        btc8192e2ant_sw_mechanism1(btcoexist, true, true,
2442                                                   false, false);
2443                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
2444                                                   false, 0x18);
2445                }
2446        } else {
2447                if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2448                    (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2449                        btc8192e2ant_sw_mechanism1(btcoexist, false, true,
2450                                                   false, false);
2451                        btc8192e2ant_sw_mechanism2(btcoexist, true, false,
2452                                                   false, 0x18);
2453                } else {
2454                        btc8192e2ant_sw_mechanism1(btcoexist, false, true,
2455                                                   false, false);
2456                        btc8192e2ant_sw_mechanism2(btcoexist, false, false,
2457                                                   false, 0x18);
2458                }
2459        }
2460}
2461
2462static void btc8192e2ant_run_coexist_mechanism(struct btc_coexist *btcoexist)
2463{
2464        struct rtl_priv *rtlpriv = btcoexist->adapter;
2465        u8 algorithm = 0;
2466
2467        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2468                "[BTCoex], RunCoexistMechanism()===>\n");
2469
2470        if (btcoexist->manual_control) {
2471                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2472                        "[BTCoex], return for Manual CTRL <===\n");
2473                return;
2474        }
2475
2476        if (coex_sta->under_ips) {
2477                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2478                        "[BTCoex], wifi is under IPS !!!\n");
2479                return;
2480        }
2481
2482        algorithm = btc8192e2ant_action_algorithm(btcoexist);
2483        if (coex_sta->c2h_bt_inquiry_page &&
2484            (BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) {
2485                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2486                        "[BTCoex], BT is under inquiry/page scan !!\n");
2487                btc8192e2ant_action_bt_inquiry(btcoexist);
2488                return;
2489        }
2490
2491        coex_dm->cur_algorithm = algorithm;
2492        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2493                "[BTCoex], Algorithm = %d\n", coex_dm->cur_algorithm);
2494
2495        if (btc8192e2ant_is_common_action(btcoexist)) {
2496                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2497                        "[BTCoex], Action 2-Ant common\n");
2498                coex_dm->auto_tdma_adjust = false;
2499        } else {
2500                if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
2501                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2502                                "[BTCoex] preAlgorithm=%d, curAlgorithm=%d\n",
2503                                 coex_dm->pre_algorithm,
2504                                 coex_dm->cur_algorithm);
2505                        coex_dm->auto_tdma_adjust = false;
2506                }
2507                switch (coex_dm->cur_algorithm) {
2508                case BT_8192E_2ANT_COEX_ALGO_SCO:
2509                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2510                                "Action 2-Ant, algorithm = SCO\n");
2511                        btc8192e2ant_action_sco(btcoexist);
2512                        break;
2513                case BT_8192E_2ANT_COEX_ALGO_SCO_PAN:
2514                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2515                                "Action 2-Ant, algorithm = SCO+PAN(EDR)\n");
2516                        btc8192e2ant_action_sco_pan(btcoexist);
2517                        break;
2518                case BT_8192E_2ANT_COEX_ALGO_HID:
2519                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2520                                "Action 2-Ant, algorithm = HID\n");
2521                        btc8192e2ant_action_hid(btcoexist);
2522                        break;
2523                case BT_8192E_2ANT_COEX_ALGO_A2DP:
2524                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2525                                "Action 2-Ant, algorithm = A2DP\n");
2526                        btc8192e2ant_action_a2dp(btcoexist);
2527                        break;
2528                case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS:
2529                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2530                                "Action 2-Ant, algorithm = A2DP+PAN(HS)\n");
2531                        btc8192e2ant_action_a2dp_pan_hs(btcoexist);
2532                        break;
2533                case BT_8192E_2ANT_COEX_ALGO_PANEDR:
2534                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2535                                "Action 2-Ant, algorithm = PAN(EDR)\n");
2536                        btc8192e2ant_action_pan_edr(btcoexist);
2537                        break;
2538                case BT_8192E_2ANT_COEX_ALGO_PANHS:
2539                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2540                                "Action 2-Ant, algorithm = HS mode\n");
2541                        btc8192e2ant_action_pan_hs(btcoexist);
2542                        break;
2543                case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP:
2544                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2545                                "Action 2-Ant, algorithm = PAN+A2DP\n");
2546                        btc8192e2ant_action_pan_edr_a2dp(btcoexist);
2547                        break;
2548                case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID:
2549                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2550                                "Action 2-Ant, algorithm = PAN(EDR)+HID\n");
2551                        btc8192e2ant_action_pan_edr_hid(btcoexist);
2552                        break;
2553                case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
2554                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2555                                "Action 2-Ant, algorithm = HID+A2DP+PAN\n");
2556                        btc8192e2ant_action_hid_a2dp_pan_edr(btcoexist);
2557                        break;
2558                case BT_8192E_2ANT_COEX_ALGO_HID_A2DP:
2559                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2560                                "Action 2-Ant, algorithm = HID+A2DP\n");
2561                        btc8192e2ant_action_hid_a2dp(btcoexist);
2562                        break;
2563                default:
2564                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2565                                "Action 2-Ant, algorithm = unknown!!\n");
2566                        /* btc8192e2ant_coex_all_off(btcoexist); */
2567                        break;
2568                }
2569                coex_dm->pre_algorithm = coex_dm->cur_algorithm;
2570        }
2571}
2572
2573static void btc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist,
2574                                       bool backup)
2575{
2576        struct rtl_priv *rtlpriv = btcoexist->adapter;
2577        u16 u16tmp = 0;
2578        u8 u8tmp = 0;
2579
2580        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2581                "[BTCoex], 2Ant Init HW Config!!\n");
2582
2583        if (backup) {
2584                /* backup rf 0x1e value */
2585                coex_dm->bt_rf0x1e_backup =
2586                        btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A,
2587                                                  0x1e, 0xfffff);
2588
2589                coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist,
2590                                                                      0x430);
2591                coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
2592                                                                     0x434);
2593                coex_dm->backup_retry_limit = btcoexist->btc_read_2byte(
2594                                                                    btcoexist,
2595                                                                    0x42a);
2596                coex_dm->backup_ampdu_maxtime = btcoexist->btc_read_1byte(
2597                                                                    btcoexist,
2598                                                                    0x456);
2599        }
2600
2601        /* antenna sw ctrl to bt */
2602        btcoexist->btc_write_1byte(btcoexist, 0x4f, 0x6);
2603        btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24);
2604        btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700);
2605        btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
2606        if (btcoexist->chip_interface == BTC_INTF_USB)
2607                btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
2608        else
2609                btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
2610
2611        btc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
2612
2613        /* antenna switch control parameter */
2614        btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555);
2615
2616        /* coex parameters */
2617        btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
2618        /* 0x790[5:0] = 0x5 */
2619        u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
2620        u8tmp &= 0xc0;
2621        u8tmp |= 0x5;
2622        btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
2623
2624        /* enable counter statistics */
2625        btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
2626
2627        /* enable PTA */
2628        btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20);
2629        /* enable mailbox interface */
2630        u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40);
2631        u16tmp |= BIT9;
2632        btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp);
2633
2634        /* enable PTA I2C mailbox */
2635        u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101);
2636        u8tmp |= BIT4;
2637        btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp);
2638
2639        /* enable bt clock when wifi is disabled. */
2640        u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93);
2641        u8tmp |= BIT0;
2642        btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp);
2643        /* enable bt clock when suspend. */
2644        u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7);
2645        u8tmp |= BIT0;
2646        btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp);
2647}
2648
2649/************************************************************
2650 *   extern function start with ex_btc8192e2ant_
2651 ************************************************************/
2652
2653void ex_btc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist)
2654{
2655        btc8192e2ant_init_hwconfig(btcoexist, true);
2656}
2657
2658void ex_btc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
2659{
2660        struct rtl_priv *rtlpriv = btcoexist->adapter;
2661
2662        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2663                "[BTCoex], Coex Mechanism Init!!\n");
2664        btc8192e2ant_init_coex_dm(btcoexist);
2665}
2666
2667void ex_btc8192e2ant_display_coex_info(struct btc_coexist *btcoexist,
2668                                       struct seq_file *m)
2669{
2670        struct btc_board_info *board_info = &btcoexist->board_info;
2671        struct btc_stack_info *stack_info = &btcoexist->stack_info;
2672        u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
2673        u16 u16tmp[4];
2674        u32 u32tmp[4];
2675        bool roam = false, scan = false, link = false, wifi_under_5g = false;
2676        bool bt_hs_on = false, wifi_busy = false;
2677        int wifi_rssi = 0, bt_hs_rssi = 0;
2678        u32 wifi_bw, wifi_traffic_dir;
2679        u8 wifi_dot11_chnl, wifi_hs_chnl;
2680        u32 fw_ver = 0, bt_patch_ver = 0;
2681
2682        seq_puts(m, "\n ============[BT Coexist info]============");
2683
2684        if (btcoexist->manual_control) {
2685                seq_puts(m, "\n ===========[Under Manual Control]===========");
2686                seq_puts(m, "\n ==========================================");
2687        }
2688
2689        seq_printf(m, "\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:",
2690                   board_info->pg_ant_num, board_info->btdm_ant_num);
2691
2692        seq_printf(m, "\n %-35s = %s / %d", "BT stack/ hci ext ver",
2693                   ((stack_info->profile_notified) ? "Yes" : "No"),
2694                   stack_info->hci_version);
2695
2696        btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
2697        btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
2698        seq_printf(m, "\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)",
2699                   "CoexVer/ FwVer/ PatchVer",
2700                   glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
2701                   fw_ver, bt_patch_ver, bt_patch_ver);
2702
2703        btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
2704        btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_DOT11_CHNL,
2705                           &wifi_dot11_chnl);
2706        btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifi_hs_chnl);
2707        seq_printf(m, "\n %-35s = %d / %d(%d)",
2708                   "Dot11 channel / HsMode(HsChnl)",
2709                   wifi_dot11_chnl, bt_hs_on, wifi_hs_chnl);
2710
2711        seq_printf(m, "\n %-35s = %3ph ",
2712                   "H2C Wifi inform bt chnl Info", coex_dm->wifi_chnl_info);
2713
2714        btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
2715        btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi);
2716        seq_printf(m, "\n %-35s = %d/ %d",
2717                   "Wifi rssi/ HS rssi", wifi_rssi, bt_hs_rssi);
2718
2719        btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
2720        btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
2721        btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
2722        seq_printf(m, "\n %-35s = %d/ %d/ %d ",
2723                   "Wifi link/ roam/ scan", link, roam, scan);
2724
2725        btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
2726        btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2727        btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
2728        btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
2729                           &wifi_traffic_dir);
2730        seq_printf(m, "\n %-35s = %s / %s/ %s ",
2731                   "Wifi status", (wifi_under_5g ? "5G" : "2.4G"),
2732                   ((BTC_WIFI_BW_LEGACY == wifi_bw) ? "Legacy" :
2733                        (((BTC_WIFI_BW_HT40 == wifi_bw) ? "HT40" : "HT20"))),
2734                   ((!wifi_busy) ? "idle" :
2735                        ((BTC_WIFI_TRAFFIC_TX == wifi_traffic_dir) ?
2736                                "uplink" : "downlink")));
2737
2738        seq_printf(m, "\n %-35s = [%s/ %d/ %d] ",
2739                   "BT [status/ rssi/ retryCnt]",
2740                   ((btcoexist->bt_info.bt_disabled) ? ("disabled") :
2741                    ((coex_sta->c2h_bt_inquiry_page) ?
2742                     ("inquiry/page scan") :
2743                      ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
2744                        coex_dm->bt_status) ? "non-connected idle" :
2745                         ((BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
2746                           coex_dm->bt_status) ? "connected-idle" : "busy")))),
2747                   coex_sta->bt_rssi, coex_sta->bt_retry_cnt);
2748
2749        seq_printf(m, "\n %-35s = %d / %d / %d / %d",
2750                   "SCO/HID/PAN/A2DP", stack_info->sco_exist,
2751                   stack_info->hid_exist, stack_info->pan_exist,
2752                   stack_info->a2dp_exist);
2753        btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO, m);
2754
2755        bt_info_ext = coex_sta->bt_info_ext;
2756        seq_printf(m, "\n %-35s = %s",
2757                   "BT Info A2DP rate",
2758                   (bt_info_ext&BIT0) ? "Basic rate" : "EDR rate");
2759
2760        for (i = 0; i < BT_INFO_SRC_8192E_2ANT_MAX; i++) {
2761                if (coex_sta->bt_info_c2h_cnt[i]) {
2762                        seq_printf(m, "\n %-35s = %7ph(%d)",
2763                                   glbt_info_src_8192e_2ant[i],
2764                                   coex_sta->bt_info_c2h[i],
2765                                   coex_sta->bt_info_c2h_cnt[i]);
2766                }
2767        }
2768
2769        seq_printf(m, "\n %-35s = %s/%s",
2770                   "PS state, IPS/LPS",
2771                   ((coex_sta->under_ips ? "IPS ON" : "IPS OFF")),
2772                   ((coex_sta->under_lps ? "LPS ON" : "LPS OFF")));
2773        btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD, m);
2774
2775        seq_printf(m, "\n %-35s = 0x%x ", "SS Type",
2776                   coex_dm->cur_ss_type);
2777
2778        /* Sw mechanism */
2779        seq_printf(m, "\n %-35s",
2780                   "============[Sw mechanism]============");
2781        seq_printf(m, "\n %-35s = %d/ %d/ %d ",
2782                   "SM1[ShRf/ LpRA/ LimDig]", coex_dm->cur_rf_rx_lpf_shrink,
2783                   coex_dm->cur_low_penalty_ra, coex_dm->limited_dig);
2784        seq_printf(m, "\n %-35s = %d/ %d/ %d(0x%x) ",
2785                   "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
2786                   coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
2787                   coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
2788
2789        seq_printf(m, "\n %-35s = 0x%x ", "Rate Mask",
2790                   btcoexist->bt_info.ra_mask);
2791
2792        /* Fw mechanism */
2793        seq_printf(m, "\n %-35s",
2794                   "============[Fw mechanism]============");
2795
2796        ps_tdma_case = coex_dm->cur_ps_tdma;
2797        seq_printf(m,
2798                   "\n %-35s = %5ph case-%d (auto:%d)",
2799                   "PS TDMA", coex_dm->ps_tdma_para,
2800                   ps_tdma_case, coex_dm->auto_tdma_adjust);
2801
2802        seq_printf(m, "\n %-35s = %d/ %d ",
2803                   "DecBtPwr/ IgnWlanAct",
2804                   coex_dm->cur_dec_bt_pwr, coex_dm->cur_ignore_wlan_act);
2805
2806        /* Hw setting */
2807        seq_printf(m, "\n %-35s",
2808                   "============[Hw setting]============");
2809
2810        seq_printf(m, "\n %-35s = 0x%x",
2811                   "RF-A, 0x1e initVal", coex_dm->bt_rf0x1e_backup);
2812
2813        seq_printf(m, "\n %-35s = 0x%x/0x%x/0x%x/0x%x",
2814                   "backup ARFR1/ARFR2/RL/AMaxTime", coex_dm->backup_arfr_cnt1,
2815                   coex_dm->backup_arfr_cnt2, coex_dm->backup_retry_limit,
2816                   coex_dm->backup_ampdu_maxtime);
2817
2818        u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
2819        u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
2820        u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
2821        u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
2822        seq_printf(m, "\n %-35s = 0x%x/0x%x/0x%x/0x%x",
2823                   "0x430/0x434/0x42a/0x456",
2824                   u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
2825
2826        u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04);
2827        u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04);
2828        u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c);
2829        seq_printf(m, "\n %-35s = 0x%x/ 0x%x/ 0x%x",
2830                   "0xc04/ 0xd04/ 0x90c", u32tmp[0], u32tmp[1], u32tmp[2]);
2831
2832        u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
2833        seq_printf(m, "\n %-35s = 0x%x", "0x778", u8tmp[0]);
2834
2835        u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c);
2836        u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930);
2837        seq_printf(m, "\n %-35s = 0x%x/ 0x%x",
2838                   "0x92c/ 0x930", (u8tmp[0]), u32tmp[0]);
2839
2840        u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40);
2841        u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f);
2842        seq_printf(m, "\n %-35s = 0x%x/ 0x%x",
2843                   "0x40/ 0x4f", u8tmp[0], u8tmp[1]);
2844
2845        u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
2846        u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
2847        seq_printf(m, "\n %-35s = 0x%x/ 0x%x",
2848                   "0x550(bcn ctrl)/0x522", u32tmp[0], u8tmp[0]);
2849
2850        u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
2851        seq_printf(m, "\n %-35s = 0x%x", "0xc50(dig)",
2852                   u32tmp[0]);
2853
2854        u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
2855        u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
2856        u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
2857        u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
2858        seq_printf(m,
2859                   "\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
2860                   "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
2861                   u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
2862
2863        seq_printf(m, "\n %-35s = %d/ %d",
2864                   "0x770(hp rx[31:16]/tx[15:0])",
2865                   coex_sta->high_priority_rx, coex_sta->high_priority_tx);
2866        seq_printf(m, "\n %-35s = %d/ %d",
2867                   "0x774(lp rx[31:16]/tx[15:0])",
2868                   coex_sta->low_priority_rx, coex_sta->low_priority_tx);
2869        if (btcoexist->auto_report_2ant)
2870                btc8192e2ant_monitor_bt_ctr(btcoexist);
2871        btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS, m);
2872}
2873
2874void ex_btc8192e2ant_ips_notify(struct btc_coexist *btcoexist, u8 type)
2875{
2876        struct rtl_priv *rtlpriv = btcoexist->adapter;
2877
2878        if (BTC_IPS_ENTER == type) {
2879                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2880                        "[BTCoex], IPS ENTER notify\n");
2881                coex_sta->under_ips = true;
2882                btc8192e2ant_coex_all_off(btcoexist);
2883        } else if (BTC_IPS_LEAVE == type) {
2884                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2885                        "[BTCoex], IPS LEAVE notify\n");
2886                coex_sta->under_ips = false;
2887        }
2888}
2889
2890void ex_btc8192e2ant_lps_notify(struct btc_coexist *btcoexist, u8 type)
2891{
2892        struct rtl_priv *rtlpriv = btcoexist->adapter;
2893
2894        if (BTC_LPS_ENABLE == type) {
2895                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2896                        "[BTCoex], LPS ENABLE notify\n");
2897                coex_sta->under_lps = true;
2898        } else if (BTC_LPS_DISABLE == type) {
2899                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2900                        "[BTCoex], LPS DISABLE notify\n");
2901                coex_sta->under_lps = false;
2902        }
2903}
2904
2905void ex_btc8192e2ant_scan_notify(struct btc_coexist *btcoexist, u8 type)
2906{
2907        struct rtl_priv *rtlpriv = btcoexist->adapter;
2908
2909        if (BTC_SCAN_START == type)
2910                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2911                        "[BTCoex], SCAN START notify\n");
2912        else if (BTC_SCAN_FINISH == type)
2913                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2914                        "[BTCoex], SCAN FINISH notify\n");
2915}
2916
2917void ex_btc8192e2ant_connect_notify(struct btc_coexist *btcoexist, u8 type)
2918{
2919        struct rtl_priv *rtlpriv = btcoexist->adapter;
2920
2921        if (BTC_ASSOCIATE_START == type)
2922                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2923                        "[BTCoex], CONNECT START notify\n");
2924        else if (BTC_ASSOCIATE_FINISH == type)
2925                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2926                        "[BTCoex], CONNECT FINISH notify\n");
2927}
2928
2929void ex_btc8192e2ant_media_status_notify(struct btc_coexist *btcoexist,
2930                                         u8 type)
2931{
2932        struct rtl_priv *rtlpriv = btcoexist->adapter;
2933        u8 h2c_parameter[3] = {0};
2934        u32 wifi_bw;
2935        u8 wifi_center_chnl;
2936
2937        if (btcoexist->manual_control ||
2938            btcoexist->stop_coex_dm ||
2939            btcoexist->bt_info.bt_disabled)
2940                return;
2941
2942        if (BTC_MEDIA_CONNECT == type)
2943                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2944                        "[BTCoex], MEDIA connect notify\n");
2945        else
2946                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2947                        "[BTCoex], MEDIA disconnect notify\n");
2948
2949        /* only 2.4G we need to inform bt the chnl mask */
2950        btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
2951                           &wifi_center_chnl);
2952        if ((BTC_MEDIA_CONNECT == type) &&
2953            (wifi_center_chnl <= 14)) {
2954                h2c_parameter[0] = 0x1;
2955                h2c_parameter[1] = wifi_center_chnl;
2956                btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2957                if (BTC_WIFI_BW_HT40 == wifi_bw)
2958                        h2c_parameter[2] = 0x30;
2959                else
2960                        h2c_parameter[2] = 0x20;
2961        }
2962
2963        coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
2964        coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
2965        coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
2966
2967        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2968                "[BTCoex], FW write 0x66 = 0x%x\n",
2969                h2c_parameter[0] << 16 | h2c_parameter[1] << 8 |
2970                h2c_parameter[2]);
2971
2972        btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
2973}
2974
2975void ex_btc8192e2ant_special_packet_notify(struct btc_coexist *btcoexist,
2976                                           u8 type)
2977{
2978        struct rtl_priv *rtlpriv = btcoexist->adapter;
2979
2980        if (type == BTC_PACKET_DHCP)
2981                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
2982                        "[BTCoex], DHCP Packet notify\n");
2983}
2984
2985void ex_btc8192e2ant_bt_info_notify(struct btc_coexist *btcoexist,
2986                                    u8 *tmp_buf, u8 length)
2987{
2988        struct rtl_priv *rtlpriv = btcoexist->adapter;
2989        u8 bt_info = 0;
2990        u8 i, rsp_source = 0;
2991        bool bt_busy = false, limited_dig = false;
2992        bool wifi_connected = false;
2993
2994        coex_sta->c2h_bt_info_req_sent = false;
2995
2996        rsp_source = tmp_buf[0] & 0xf;
2997        if (rsp_source >= BT_INFO_SRC_8192E_2ANT_MAX)
2998                rsp_source = BT_INFO_SRC_8192E_2ANT_WIFI_FW;
2999        coex_sta->bt_info_c2h_cnt[rsp_source]++;
3000
3001        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
3002                "[BTCoex], Bt info[%d], length=%d, hex data = [",
3003                rsp_source, length);
3004        for (i = 0; i < length; i++) {
3005                coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
3006                if (i == 1)
3007                        bt_info = tmp_buf[i];
3008                if (i == length-1)
3009                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
3010                                "0x%02x]\n", tmp_buf[i]);
3011                else
3012                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
3013                                "0x%02x, ", tmp_buf[i]);
3014        }
3015
3016        if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rsp_source) {
3017                /* [3:0] */
3018                coex_sta->bt_retry_cnt =
3019                        coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
3020
3021                coex_sta->bt_rssi =
3022                        coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10;
3023
3024                coex_sta->bt_info_ext =
3025                        coex_sta->bt_info_c2h[rsp_source][4];
3026
3027                /* Here we need to resend some wifi info to BT
3028                 * because bt is reset and loss of the info.
3029                 */
3030                if ((coex_sta->bt_info_ext & BIT1)) {
3031                        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
3032                                "bit1, send wifi BW&Chnl to BT!!\n");
3033                        btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
3034                                           &wifi_connected);
3035                        if (wifi_connected)
3036                                ex_btc8192e2ant_media_status_notify(
3037                                                        btcoexist,
3038                                                        BTC_MEDIA_CONNECT);
3039                        else
3040                                ex_btc8192e2ant_media_status_notify(
3041                                                        btcoexist,
3042                                                        BTC_MEDIA_DISCONNECT);
3043                }
3044
3045                if ((coex_sta->bt_info_ext & BIT3)) {
3046                        if (!btcoexist->manual_control &&
3047                            !btcoexist->stop_coex_dm) {
3048                                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
3049                                        "bit3, BT NOT ignore Wlan active!\n");
3050                                btc8192e2ant_ignore_wlan_act(btcoexist,
3051                                                             FORCE_EXEC,
3052                                                             false);
3053                        }
3054                } else {
3055                        /* BT already NOT ignore Wlan active,
3056                         * do nothing here.
3057                         */
3058                }
3059
3060                if (!btcoexist->auto_report_2ant) {
3061                        if (!(coex_sta->bt_info_ext & BIT4))
3062                                btc8192e2ant_bt_auto_report(btcoexist,
3063                                                            FORCE_EXEC,
3064                                                            true);
3065                }
3066        }
3067
3068        /* check BIT2 first ==> check if bt is under inquiry or page scan */
3069        if (bt_info & BT_INFO_8192E_2ANT_B_INQ_PAGE)
3070                coex_sta->c2h_bt_inquiry_page = true;
3071        else
3072                coex_sta->c2h_bt_inquiry_page = false;
3073
3074        /* set link exist status */
3075        if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) {
3076                coex_sta->bt_link_exist = false;
3077                coex_sta->pan_exist = false;
3078                coex_sta->a2dp_exist = false;
3079                coex_sta->hid_exist = false;
3080                coex_sta->sco_exist = false;
3081        } else {/* connection exists */
3082                coex_sta->bt_link_exist = true;
3083                if (bt_info & BT_INFO_8192E_2ANT_B_FTP)
3084                        coex_sta->pan_exist = true;
3085                else
3086                        coex_sta->pan_exist = false;
3087                if (bt_info & BT_INFO_8192E_2ANT_B_A2DP)
3088                        coex_sta->a2dp_exist = true;
3089                else
3090                        coex_sta->a2dp_exist = false;
3091                if (bt_info & BT_INFO_8192E_2ANT_B_HID)
3092                        coex_sta->hid_exist = true;
3093                else
3094                        coex_sta->hid_exist = false;
3095                if (bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO)
3096                        coex_sta->sco_exist = true;
3097                else
3098                        coex_sta->sco_exist = false;
3099        }
3100
3101        btc8192e2ant_update_bt_link_info(btcoexist);
3102
3103        if (!(bt_info & BT_INFO_8192E_2ANT_B_CONNECTION)) {
3104                coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
3105                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
3106                        "[BTCoex], BT Non-Connected idle!!!\n");
3107        } else if (bt_info == BT_INFO_8192E_2ANT_B_CONNECTION) {
3108                coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE;
3109                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
3110                        "[BTCoex], bt_infoNotify(), BT Connected-idle!!!\n");
3111        } else if ((bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO) ||
3112                   (bt_info & BT_INFO_8192E_2ANT_B_SCO_BUSY)) {
3113                coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY;
3114                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
3115                        "[BTCoex], bt_infoNotify(), BT SCO busy!!!\n");
3116        } else if (bt_info & BT_INFO_8192E_2ANT_B_ACL_BUSY) {
3117                coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY;
3118                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
3119                        "[BTCoex], bt_infoNotify(), BT ACL busy!!!\n");
3120        } else {
3121                coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_MAX;
3122                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
3123                        "[BTCoex]bt_infoNotify(), BT Non-Defined state!!!\n");
3124        }
3125
3126        if ((BT_8192E_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
3127            (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
3128            (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
3129                bt_busy = true;
3130                limited_dig = true;
3131        } else {
3132                bt_busy = false;
3133                limited_dig = false;
3134        }
3135
3136        btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
3137
3138        coex_dm->limited_dig = limited_dig;
3139        btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
3140
3141        btc8192e2ant_run_coexist_mechanism(btcoexist);
3142}
3143
3144void ex_btc8192e2ant_halt_notify(struct btc_coexist *btcoexist)
3145{
3146        struct rtl_priv *rtlpriv = btcoexist->adapter;
3147
3148        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, "[BTCoex], Halt notify\n");
3149
3150        btc8192e2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
3151        ex_btc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
3152}
3153
3154void ex_btc8192e2ant_periodical(struct btc_coexist *btcoexist)
3155{
3156        struct rtl_priv *rtlpriv = btcoexist->adapter;
3157        static u8 dis_ver_info_cnt;
3158        u32 fw_ver = 0, bt_patch_ver = 0;
3159        struct btc_board_info *board_info = &btcoexist->board_info;
3160        struct btc_stack_info *stack_info = &btcoexist->stack_info;
3161
3162        rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
3163                "=======================Periodical=======================\n");
3164        if (dis_ver_info_cnt <= 5) {
3165                dis_ver_info_cnt += 1;
3166                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
3167                        "************************************************\n");
3168                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
3169                        "Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n",
3170                        board_info->pg_ant_num, board_info->btdm_ant_num,
3171                        board_info->btdm_ant_pos);
3172                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
3173                        "BT stack/ hci ext ver = %s / %d\n",
3174                        ((stack_info->profile_notified) ? "Yes" : "No"),
3175                        stack_info->hci_version);
3176                btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
3177                                   &bt_patch_ver);
3178                btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
3179                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
3180                        "CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n",
3181                        glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
3182                        fw_ver, bt_patch_ver, bt_patch_ver);
3183                rtl_dbg(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
3184                        "************************************************\n");
3185        }
3186
3187        if (!btcoexist->auto_report_2ant) {
3188                btc8192e2ant_query_bt_info(btcoexist);
3189                btc8192e2ant_monitor_bt_ctr(btcoexist);
3190                btc8192e2ant_monitor_bt_enable_disable(btcoexist);
3191        } else {
3192                if (btc8192e2ant_is_wifi_status_changed(btcoexist) ||
3193                    coex_dm->auto_tdma_adjust)
3194                        btc8192e2ant_run_coexist_mechanism(btcoexist);
3195        }
3196}
3197