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11#ifndef __RX_H__
12#define __RX_H__
13
14#include <linux/bitops.h>
15
16#define WL1271_RX_MAX_RSSI -30
17#define WL1271_RX_MIN_RSSI -95
18
19#define RSSI_LEVEL_BITMASK 0x7F
20#define ANT_DIVERSITY_BITMASK BIT(7)
21
22#define SHORT_PREAMBLE_BIT BIT(0)
23#define OFDM_RATE_BIT BIT(6)
24#define PBCC_RATE_BIT BIT(7)
25
26#define PLCP_HEADER_LENGTH 8
27#define RX_DESC_PACKETID_SHIFT 11
28#define RX_MAX_PACKET_ID 3
29
30#define RX_DESC_VALID_FCS 0x0001
31#define RX_DESC_MATCH_RXADDR1 0x0002
32#define RX_DESC_MCAST 0x0004
33#define RX_DESC_STAINTIM 0x0008
34#define RX_DESC_VIRTUAL_BM 0x0010
35#define RX_DESC_BCAST 0x0020
36#define RX_DESC_MATCH_SSID 0x0040
37#define RX_DESC_MATCH_BSSID 0x0080
38#define RX_DESC_ENCRYPTION_MASK 0x0300
39#define RX_DESC_MEASURMENT 0x0400
40#define RX_DESC_SEQNUM_MASK 0x1800
41#define RX_DESC_MIC_FAIL 0x2000
42#define RX_DESC_DECRYPT_FAIL 0x4000
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52
53#define WL1271_RX_DESC_BAND_MASK 0x03
54#define WL1271_RX_DESC_ENCRYPT_MASK 0xE0
55
56#define WL1271_RX_DESC_BAND_BG 0x00
57#define WL1271_RX_DESC_BAND_J 0x01
58#define WL1271_RX_DESC_BAND_A 0x02
59
60#define WL1271_RX_DESC_STBC BIT(2)
61#define WL1271_RX_DESC_A_MPDU BIT(3)
62#define WL1271_RX_DESC_HT BIT(4)
63
64#define WL1271_RX_DESC_ENCRYPT_WEP 0x20
65#define WL1271_RX_DESC_ENCRYPT_TKIP 0x40
66#define WL1271_RX_DESC_ENCRYPT_AES 0x60
67#define WL1271_RX_DESC_ENCRYPT_GEM 0x80
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75
76#define WL1271_RX_DESC_STATUS_MASK 0x07
77
78#define WL1271_RX_DESC_SUCCESS 0x00
79#define WL1271_RX_DESC_DECRYPT_FAIL 0x01
80#define WL1271_RX_DESC_MIC_FAIL 0x02
81
82#define RX_MEM_BLOCK_MASK 0xFF
83#define RX_BUF_SIZE_MASK 0xFFF00
84#define RX_BUF_SIZE_SHIFT_DIV 6
85#define ALIGNED_RX_BUF_SIZE_MASK 0xFFFF00
86#define ALIGNED_RX_BUF_SIZE_SHIFT 8
87
88
89#define RX_BUF_UNALIGNED_PAYLOAD BIT(20)
90
91
92#define RX_BUF_PADDED_PAYLOAD BIT(30)
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97
98#define RX_BUF_ALIGN 2
99
100
101enum wl_rx_buf_align {
102 WLCORE_RX_BUF_ALIGNED,
103 WLCORE_RX_BUF_UNALIGNED,
104 WLCORE_RX_BUF_PADDED,
105};
106
107enum {
108 WL12XX_RX_CLASS_UNKNOWN,
109 WL12XX_RX_CLASS_MANAGEMENT,
110 WL12XX_RX_CLASS_DATA,
111 WL12XX_RX_CLASS_QOS_DATA,
112 WL12XX_RX_CLASS_BCN_PRBRSP,
113 WL12XX_RX_CLASS_EAPOL,
114 WL12XX_RX_CLASS_BA_EVENT,
115 WL12XX_RX_CLASS_AMSDU,
116 WL12XX_RX_CLASS_LOGGER,
117};
118
119struct wl1271_rx_descriptor {
120 __le16 length;
121 u8 status;
122 u8 flags;
123 u8 rate;
124 u8 channel;
125 s8 rssi;
126 u8 snr;
127 __le32 timestamp;
128 u8 packet_class;
129 u8 hlid;
130 u8 pad_len;
131 u8 reserved;
132} __packed;
133
134int wlcore_rx(struct wl1271 *wl, struct wl_fw_status *status);
135u8 wl1271_rate_to_idx(int rate, enum nl80211_band band);
136int wl1271_rx_filter_enable(struct wl1271 *wl,
137 int index, bool enable,
138 struct wl12xx_rx_filter *filter);
139int wl1271_rx_filter_clear_all(struct wl1271 *wl);
140
141#endif
142