1
2
3
4
5
6
7config HAVE_PCI
8 bool
9
10
11config FORCE_PCI
12 bool
13 select HAVE_PCI
14 select PCI
15
16menuconfig PCI
17 bool "PCI support"
18 depends on HAVE_PCI
19 help
20 This option enables support for the PCI local bus, including
21 support for PCI-X and the foundations for PCI Express support.
22 Say 'Y' here unless you know what you are doing.
23
24if PCI
25
26config PCI_DOMAINS
27 bool
28 depends on PCI
29
30config PCI_DOMAINS_GENERIC
31 bool
32 select PCI_DOMAINS
33
34config PCI_SYSCALL
35 bool
36
37source "drivers/pci/pcie/Kconfig"
38
39config PCI_MSI
40 bool "Message Signaled Interrupts (MSI and MSI-X)"
41 select GENERIC_MSI_IRQ
42 help
43 This allows device drivers to enable MSI (Message Signaled
44 Interrupts). Message Signaled Interrupts enable a device to
45 generate an interrupt using an inbound Memory Write on its
46 PCI bus instead of asserting a device IRQ pin.
47
48 Use of PCI MSI interrupts can be disabled at kernel boot time
49 by using the 'pci=nomsi' option. This disables MSI for the
50 entire system.
51
52 If you don't know what to do here, say Y.
53
54config PCI_MSI_IRQ_DOMAIN
55 def_bool y
56 depends on PCI_MSI
57 select GENERIC_MSI_IRQ_DOMAIN
58
59config PCI_MSI_ARCH_FALLBACKS
60 bool
61
62config PCI_QUIRKS
63 default y
64 bool "Enable PCI quirk workarounds" if EXPERT
65 help
66 This enables workarounds for various PCI chipset bugs/quirks.
67 Disable this only if your target machine is unaffected by PCI
68 quirks.
69
70config PCI_DEBUG
71 bool "PCI Debugging"
72 depends on DEBUG_KERNEL
73 help
74 Say Y here if you want the PCI core to produce a bunch of debug
75 messages to the system log. Select this if you are having a
76 problem with PCI support and want to see more of what is going on.
77
78 When in doubt, say N.
79
80config PCI_REALLOC_ENABLE_AUTO
81 bool "Enable PCI resource re-allocation detection"
82 depends on PCI_IOV
83 help
84 Say Y here if you want the PCI core to detect if PCI resource
85 re-allocation needs to be enabled. You can always use pci=realloc=on
86 or pci=realloc=off to override it. It will automatically
87 re-allocate PCI resources if SR-IOV BARs have not been allocated by
88 the BIOS.
89
90 When in doubt, say N.
91
92config PCI_STUB
93 tristate "PCI Stub driver"
94 help
95 Say Y or M here if you want be able to reserve a PCI device
96 when it is going to be assigned to a guest operating system.
97
98 When in doubt, say N.
99
100config PCI_PF_STUB
101 tristate "PCI PF Stub driver"
102 depends on PCI_IOV
103 help
104 Say Y or M here if you want to enable support for devices that
105 require SR-IOV support, while at the same time the PF (Physical
106 Function) itself is not providing any actual services on the
107 host itself such as storage or networking.
108
109 When in doubt, say N.
110
111config XEN_PCIDEV_FRONTEND
112 tristate "Xen PCI Frontend"
113 depends on XEN_PV
114 select PCI_XEN
115 select XEN_XENBUS_FRONTEND
116 default y
117 help
118 The PCI device frontend driver allows the kernel to import arbitrary
119 PCI devices from a PCI backend to support PCI driver domains.
120
121config PCI_ATS
122 bool
123
124config PCI_ECAM
125 bool
126
127config PCI_LOCKLESS_CONFIG
128 bool
129
130config PCI_BRIDGE_EMUL
131 bool
132
133config PCI_IOV
134 bool "PCI IOV support"
135 select PCI_ATS
136 help
137 I/O Virtualization is a PCI feature supported by some devices
138 which allows them to create virtual devices which share their
139 physical resources.
140
141 If unsure, say N.
142
143config PCI_PRI
144 bool "PCI PRI support"
145 select PCI_ATS
146 help
147 PRI is the PCI Page Request Interface. It allows PCI devices that are
148 behind an IOMMU to recover from page faults.
149
150 If unsure, say N.
151
152config PCI_PASID
153 bool "PCI PASID support"
154 select PCI_ATS
155 help
156 Process Address Space Identifiers (PASIDs) can be used by PCI devices
157 to access more than one IO address space at the same time. To make
158 use of this feature an IOMMU is required which also supports PASIDs.
159 Select this option if you have such an IOMMU and want to compile the
160 driver for it into your kernel.
161
162 If unsure, say N.
163
164config PCI_P2PDMA
165 bool "PCI peer-to-peer transfer support"
166 depends on ZONE_DEVICE
167 select GENERIC_ALLOCATOR
168 help
169 Enableѕ drivers to do PCI peer-to-peer transactions to and from
170 BARs that are exposed in other devices that are the part of
171 the hierarchy where peer-to-peer DMA is guaranteed by the PCI
172 specification to work (ie. anything below a single PCI bridge).
173
174 Many PCIe root complexes do not support P2P transactions and
175 it's hard to tell which support it at all, so at this time,
176 P2P DMA transactions must be between devices behind the same root
177 port.
178
179 If unsure, say N.
180
181config PCI_LABEL
182 def_bool y if (DMI || ACPI)
183 select NLS
184
185config PCI_HYPERV
186 tristate "Hyper-V PCI Frontend"
187 depends on X86_64 && HYPERV && PCI_MSI && PCI_MSI_IRQ_DOMAIN && SYSFS
188 select PCI_HYPERV_INTERFACE
189 help
190 The PCI device frontend driver allows the kernel to import arbitrary
191 PCI devices from a PCI backend to support PCI driver domains.
192
193choice
194 prompt "PCI Express hierarchy optimization setting"
195 default PCIE_BUS_DEFAULT
196 depends on PCI && EXPERT
197 help
198 MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe
199 device parameters that affect performance and the ability to
200 support hotplug and peer-to-peer DMA.
201
202 The following choices set the MPS and MRRS optimization strategy
203 at compile-time. The choices are the same as those offered for
204 the kernel command-line parameter 'pci', i.e.,
205 'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe',
206 'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'.
207
208 This is a compile-time setting and can be overridden by the above
209 command-line parameters. If unsure, choose PCIE_BUS_DEFAULT.
210
211config PCIE_BUS_TUNE_OFF
212 bool "Tune Off"
213 depends on PCI
214 help
215 Use the BIOS defaults; don't touch MPS at all. This is the same
216 as booting with 'pci=pcie_bus_tune_off'.
217
218config PCIE_BUS_DEFAULT
219 bool "Default"
220 depends on PCI
221 help
222 Default choice; ensure that the MPS matches upstream bridge.
223
224config PCIE_BUS_SAFE
225 bool "Safe"
226 depends on PCI
227 help
228 Use largest MPS that boot-time devices support. If you have a
229 closed system with no possibility of adding new devices, this
230 will use the largest MPS that's supported by all devices. This
231 is the same as booting with 'pci=pcie_bus_safe'.
232
233config PCIE_BUS_PERFORMANCE
234 bool "Performance"
235 depends on PCI
236 help
237 Use MPS and MRRS for best performance. Ensure that a given
238 device's MPS is no larger than its parent MPS, which allows us to
239 keep all switches/bridges to the max MPS supported by their
240 parent. This is the same as booting with 'pci=pcie_bus_perf'.
241
242config PCIE_BUS_PEER2PEER
243 bool "Peer2peer"
244 depends on PCI
245 help
246 Set MPS = 128 for all devices. MPS configuration effected by the
247 other options could cause the MPS on one root port to be
248 different than that of the MPS on another, which may cause
249 hot-added devices or peer-to-peer DMA to fail. Set MPS to the
250 smallest possible value (128B) system-wide to avoid these issues.
251 This is the same as booting with 'pci=pcie_bus_peer2peer'.
252
253endchoice
254
255source "drivers/pci/hotplug/Kconfig"
256source "drivers/pci/controller/Kconfig"
257source "drivers/pci/endpoint/Kconfig"
258source "drivers/pci/switch/Kconfig"
259
260endif
261
