LXR linux/drivers/pci/pcie/portdrv.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * Purpose:     PCI Express Port Bus Driver's Internal Data Structures
   4 *
   5 * Copyright (C) 2004 Intel
   6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
   7 */
   8
   9#ifndef _PORTDRV_H_
  10#define _PORTDRV_H_
  11
  12#include <linux/compiler.h>
  13
  14/* Service Type */
  15#define PCIE_PORT_SERVICE_PME_SHIFT     0       /* Power Management Event */
  16#define PCIE_PORT_SERVICE_PME           (1 << PCIE_PORT_SERVICE_PME_SHIFT)
  17#define PCIE_PORT_SERVICE_AER_SHIFT     1       /* Advanced Error Reporting */
  18#define PCIE_PORT_SERVICE_AER           (1 << PCIE_PORT_SERVICE_AER_SHIFT)
  19#define PCIE_PORT_SERVICE_HP_SHIFT      2       /* Native Hotplug */
  20#define PCIE_PORT_SERVICE_HP            (1 << PCIE_PORT_SERVICE_HP_SHIFT)
  21#define PCIE_PORT_SERVICE_DPC_SHIFT     3       /* Downstream Port Containment */
  22#define PCIE_PORT_SERVICE_DPC           (1 << PCIE_PORT_SERVICE_DPC_SHIFT)
  23#define PCIE_PORT_SERVICE_BWNOTIF_SHIFT 4       /* Bandwidth notification */
  24#define PCIE_PORT_SERVICE_BWNOTIF       (1 << PCIE_PORT_SERVICE_BWNOTIF_SHIFT)
  25
  26#define PCIE_PORT_DEVICE_MAXSERVICES   5
  27
  28extern bool pcie_ports_dpc_native;
  29
  30#ifdef CONFIG_PCIEAER
  31int pcie_aer_init(void);
  32int pcie_aer_is_native(struct pci_dev *dev);
  33#else
  34static inline int pcie_aer_init(void) { return 0; }
  35static inline int pcie_aer_is_native(struct pci_dev *dev) { return 0; }
  36#endif
  37
  38#ifdef CONFIG_HOTPLUG_PCI_PCIE
  39int pcie_hp_init(void);
  40#else
  41static inline int pcie_hp_init(void) { return 0; }
  42#endif
  43
  44#ifdef CONFIG_PCIE_PME
  45int pcie_pme_init(void);
  46#else
  47static inline int pcie_pme_init(void) { return 0; }
  48#endif
  49
  50#ifdef CONFIG_PCIE_DPC
  51int pcie_dpc_init(void);
  52#else
  53static inline int pcie_dpc_init(void) { return 0; }
  54#endif
  55
  56/* Port Type */
  57#define PCIE_ANY_PORT                   (~0)
  58
  59struct pcie_device {
  60        int             irq;        /* Service IRQ/MSI/MSI-X Vector */
  61        struct pci_dev *port;       /* Root/Upstream/Downstream Port */
  62        u32             service;    /* Port service this device represents */
  63        void            *priv_data; /* Service Private Data */
  64        struct device   device;     /* Generic Device Interface */
  65};
  66#define to_pcie_device(d) container_of(d, struct pcie_device, device)
  67
  68static inline void set_service_data(struct pcie_device *dev, void *data)
  69{
  70        dev->priv_data = data;
  71}
  72
  73static inline void *get_service_data(struct pcie_device *dev)
  74{
  75        return dev->priv_data;
  76}
  77
  78struct pcie_port_service_driver {
  79        const char *name;
  80        int (*probe)(struct pcie_device *dev);
  81        void (*remove)(struct pcie_device *dev);
  82        int (*suspend)(struct pcie_device *dev);
  83        int (*resume_noirq)(struct pcie_device *dev);
  84        int (*resume)(struct pcie_device *dev);
  85        int (*runtime_suspend)(struct pcie_device *dev);
  86        int (*runtime_resume)(struct pcie_device *dev);
  87
  88        /* Device driver may resume normal operations */
  89        void (*error_resume)(struct pci_dev *dev);
  90
  91        int port_type;  /* Type of the port this driver can handle */
  92        u32 service;    /* Port service this device represents */
  93
  94        struct device_driver driver;
  95};
  96#define to_service_driver(d) \
  97        container_of(d, struct pcie_port_service_driver, driver)
  98
  99int pcie_port_service_register(struct pcie_port_service_driver *new);
 100void pcie_port_service_unregister(struct pcie_port_service_driver *new);
 101
 102/*
 103 * The PCIe Capability Interrupt Message Number (PCIe r3.1, sec 7.8.2) must
 104 * be one of the first 32 MSI-X entries.  Per PCI r3.0, sec 6.8.3.1, MSI
 105 * supports a maximum of 32 vectors per function.
 106 */
 107#define PCIE_PORT_MAX_MSI_ENTRIES       32
 108
 109#define get_descriptor_id(type, service) (((type - 4) << 8) | service)
 110
 111extern struct bus_type pcie_port_bus_type;
 112int pcie_port_device_register(struct pci_dev *dev);
 113#ifdef CONFIG_PM
 114int pcie_port_device_suspend(struct device *dev);
 115int pcie_port_device_resume_noirq(struct device *dev);
 116int pcie_port_device_resume(struct device *dev);
 117int pcie_port_device_runtime_suspend(struct device *dev);
 118int pcie_port_device_runtime_resume(struct device *dev);
 119#endif
 120void pcie_port_device_remove(struct pci_dev *dev);
 121int __must_check pcie_port_bus_register(void);
 122void pcie_port_bus_unregister(void);
 123
 124struct pci_dev;
 125
 126#ifdef CONFIG_PCIE_PME
 127extern bool pcie_pme_msi_disabled;
 128
 129static inline void pcie_pme_disable_msi(void)
 130{
 131        pcie_pme_msi_disabled = true;
 132}
 133
 134static inline bool pcie_pme_no_msi(void)
 135{
 136        return pcie_pme_msi_disabled;
 137}
 138
 139void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable);
 140#else /* !CONFIG_PCIE_PME */
 141static inline void pcie_pme_disable_msi(void) {}
 142static inline bool pcie_pme_no_msi(void) { return false; }
 143static inline void pcie_pme_interrupt_enable(struct pci_dev *dev, bool en) {}
 144#endif /* !CONFIG_PCIE_PME */
 145
 146struct device *pcie_port_find_device(struct pci_dev *dev, u32 service);
 147#endif /* _PORTDRV_H_ */
 148