LXR linux/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/* Copyright (C) 2019 IBM Corp. */
   3#include <linux/bitops.h>
   4#include <linux/init.h>
   5#include <linux/io.h>
   6#include <linux/kernel.h>
   7#include <linux/mfd/syscon.h>
   8#include <linux/mutex.h>
   9#include <linux/of.h>
  10#include <linux/platform_device.h>
  11#include <linux/pinctrl/pinctrl.h>
  12#include <linux/pinctrl/pinmux.h>
  13#include <linux/string.h>
  14#include <linux/types.h>
  15
  16#include "../core.h"
  17#include "../pinctrl-utils.h"
  18#include "pinctrl-aspeed.h"
  19
  20#define SCU400          0x400 /* Multi-function Pin Control #1  */
  21#define SCU404          0x404 /* Multi-function Pin Control #2  */
  22#define SCU40C          0x40C /* Multi-function Pin Control #3  */
  23#define SCU410          0x410 /* Multi-function Pin Control #4  */
  24#define SCU414          0x414 /* Multi-function Pin Control #5  */
  25#define SCU418          0x418 /* Multi-function Pin Control #6  */
  26#define SCU41C          0x41C /* Multi-function Pin Control #7  */
  27#define SCU430          0x430 /* Multi-function Pin Control #8  */
  28#define SCU434          0x434 /* Multi-function Pin Control #9  */
  29#define SCU438          0x438 /* Multi-function Pin Control #10 */
  30#define SCU440          0x440 /* USB Multi-function Pin Control #12 */
  31#define SCU450          0x450 /* Multi-function Pin Control #14 */
  32#define SCU454          0x454 /* Multi-function Pin Control #15 */
  33#define SCU458          0x458 /* Multi-function Pin Control #16 */
  34#define SCU4B0          0x4B0 /* Multi-function Pin Control #17 */
  35#define SCU4B4          0x4B4 /* Multi-function Pin Control #18 */
  36#define SCU4B8          0x4B8 /* Multi-function Pin Control #19 */
  37#define SCU4BC          0x4BC /* Multi-function Pin Control #20 */
  38#define SCU4D4          0x4D4 /* Multi-function Pin Control #22 */
  39#define SCU4D8          0x4D8 /* Multi-function Pin Control #23 */
  40#define SCU500          0x500 /* Hardware Strap 1 */
  41#define SCU510          0x510 /* Hardware Strap 2 */
  42#define SCU610          0x610 /* Disable GPIO Internal Pull-Down #0 */
  43#define SCU614          0x614 /* Disable GPIO Internal Pull-Down #1 */
  44#define SCU618          0x618 /* Disable GPIO Internal Pull-Down #2 */
  45#define SCU61C          0x61c /* Disable GPIO Internal Pull-Down #3 */
  46#define SCU620          0x620 /* Disable GPIO Internal Pull-Down #4 */
  47#define SCU634          0x634 /* Disable GPIO Internal Pull-Down #5 */
  48#define SCU638          0x638 /* Disable GPIO Internal Pull-Down #6 */
  49#define SCU690          0x690 /* Multi-function Pin Control #24 */
  50#define SCU694          0x694 /* Multi-function Pin Control #25 */
  51#define SCU69C          0x69C /* Multi-function Pin Control #27 */
  52#define SCU6D0          0x6D0 /* Multi-function Pin Control #29 */
  53#define SCUC20          0xC20 /* PCIE configuration Setting Control */
  54
  55#define ASPEED_G6_NR_PINS 256
  56
  57#define M24 0
  58SIG_EXPR_LIST_DECL_SESG(M24, MDC3, MDIO3, SIG_DESC_SET(SCU410, 0));
  59SIG_EXPR_LIST_DECL_SESG(M24, SCL11, I2C11, SIG_DESC_SET(SCU4B0, 0));
  60PIN_DECL_2(M24, GPIOA0, MDC3, SCL11);
  61
  62#define M25 1
  63SIG_EXPR_LIST_DECL_SESG(M25, MDIO3, MDIO3, SIG_DESC_SET(SCU410, 1));
  64SIG_EXPR_LIST_DECL_SESG(M25, SDA11, I2C11, SIG_DESC_SET(SCU4B0, 1));
  65PIN_DECL_2(M25, GPIOA1, MDIO3, SDA11);
  66
  67FUNC_GROUP_DECL(MDIO3, M24, M25);
  68FUNC_GROUP_DECL(I2C11, M24, M25);
  69
  70#define L26 2
  71SIG_EXPR_LIST_DECL_SESG(L26, MDC4, MDIO4, SIG_DESC_SET(SCU410, 2));
  72SIG_EXPR_LIST_DECL_SESG(L26, SCL12, I2C12, SIG_DESC_SET(SCU4B0, 2));
  73PIN_DECL_2(L26, GPIOA2, MDC4, SCL12);
  74
  75#define K24 3
  76SIG_EXPR_LIST_DECL_SESG(K24, MDIO4, MDIO4, SIG_DESC_SET(SCU410, 3));
  77SIG_EXPR_LIST_DECL_SESG(K24, SDA12, I2C12, SIG_DESC_SET(SCU4B0, 3));
  78PIN_DECL_2(K24, GPIOA3, MDIO4, SDA12);
  79
  80FUNC_GROUP_DECL(MDIO4, L26, K24);
  81FUNC_GROUP_DECL(I2C12, L26, K24);
  82
  83#define K26 4
  84SIG_EXPR_LIST_DECL_SESG(K26, MACLINK1, MACLINK1, SIG_DESC_SET(SCU410, 4));
  85SIG_EXPR_LIST_DECL_SESG(K26, SCL13, I2C13, SIG_DESC_SET(SCU4B0, 4));
  86SIG_EXPR_LIST_DECL_SESG(K26, SGPS2CK, SGPS2, SIG_DESC_SET(SCU690, 4));
  87SIG_EXPR_LIST_DECL_SESG(K26, SGPM2CLK, SGPM2, SIG_DESC_SET(SCU6D0, 4));
  88PIN_DECL_4(K26, GPIOA4, MACLINK1, SCL13, SGPS2CK, SGPM2CLK);
  89FUNC_GROUP_DECL(MACLINK1, K26);
  90
  91#define L24 5
  92SIG_EXPR_LIST_DECL_SESG(L24, MACLINK2, MACLINK2, SIG_DESC_SET(SCU410, 5));
  93SIG_EXPR_LIST_DECL_SESG(L24, SDA13, I2C13, SIG_DESC_SET(SCU4B0, 5));
  94SIG_EXPR_LIST_DECL_SESG(L24, SGPS2LD, SGPS2, SIG_DESC_SET(SCU690, 5));
  95SIG_EXPR_LIST_DECL_SESG(L24, SGPM2LD, SGPM2, SIG_DESC_SET(SCU6D0, 5));
  96PIN_DECL_4(L24, GPIOA5, MACLINK2, SDA13, SGPS2LD, SGPM2LD);
  97FUNC_GROUP_DECL(MACLINK2, L24);
  98
  99FUNC_GROUP_DECL(I2C13, K26, L24);
 100
 101#define L23 6
 102SIG_EXPR_LIST_DECL_SESG(L23, MACLINK3, MACLINK3, SIG_DESC_SET(SCU410, 6));
 103SIG_EXPR_LIST_DECL_SESG(L23, SCL14, I2C14, SIG_DESC_SET(SCU4B0, 6));
 104SIG_EXPR_LIST_DECL_SESG(L23, SGPS2O, SGPS2, SIG_DESC_SET(SCU690, 6));
 105SIG_EXPR_LIST_DECL_SESG(L23, SGPM2O, SGPM2, SIG_DESC_SET(SCU6D0, 6));
 106PIN_DECL_4(L23, GPIOA6, MACLINK3, SCL14, SGPS2O, SGPM2O);
 107FUNC_GROUP_DECL(MACLINK3, L23);
 108
 109#define K25 7
 110SIG_EXPR_LIST_DECL_SESG(K25, MACLINK4, MACLINK4, SIG_DESC_SET(SCU410, 7));
 111SIG_EXPR_LIST_DECL_SESG(K25, SDA14, I2C14, SIG_DESC_SET(SCU4B0, 7));
 112SIG_EXPR_LIST_DECL_SESG(K25, SGPS2I, SGPS2, SIG_DESC_SET(SCU690, 7));
 113SIG_EXPR_LIST_DECL_SESG(K25, SGPM2I, SGPM2, SIG_DESC_SET(SCU6D0, 7));
 114PIN_DECL_4(K25, GPIOA7, MACLINK4, SDA14, SGPS2I, SGPM2I);
 115FUNC_GROUP_DECL(MACLINK4, K25);
 116
 117FUNC_GROUP_DECL(I2C14, L23, K25);
 118FUNC_GROUP_DECL(SGPM2, K26, L24, L23, K25);
 119FUNC_GROUP_DECL(SGPS2, K26, L24, L23, K25);
 120
 121#define J26 8
 122SIG_EXPR_LIST_DECL_SESG(J26, SALT1, SALT1, SIG_DESC_SET(SCU410, 8));
 123SIG_EXPR_LIST_DECL_SESG(J26, LHAD0, LPCHC, SIG_DESC_SET(SCU4B0, 8));
 124PIN_DECL_2(J26, GPIOB0, SALT1, LHAD0);
 125FUNC_GROUP_DECL(SALT1, J26);
 126
 127#define K23 9
 128SIG_EXPR_LIST_DECL_SESG(K23, SALT2, SALT2, SIG_DESC_SET(SCU410, 9));
 129SIG_EXPR_LIST_DECL_SESG(K23, LHAD1, LPCHC, SIG_DESC_SET(SCU4B0, 9));
 130PIN_DECL_2(K23, GPIOB1, SALT2, LHAD1);
 131FUNC_GROUP_DECL(SALT2, K23);
 132
 133#define H26 10
 134SIG_EXPR_LIST_DECL_SESG(H26, SALT3, SALT3, SIG_DESC_SET(SCU410, 10));
 135SIG_EXPR_LIST_DECL_SESG(H26, LHAD2, LPCHC, SIG_DESC_SET(SCU4B0, 10));
 136PIN_DECL_2(H26, GPIOB2, SALT3, LHAD2);
 137FUNC_GROUP_DECL(SALT3, H26);
 138
 139#define J25 11
 140SIG_EXPR_LIST_DECL_SESG(J25, SALT4, SALT4, SIG_DESC_SET(SCU410, 11));
 141SIG_EXPR_LIST_DECL_SESG(J25, LHAD3, LPCHC, SIG_DESC_SET(SCU4B0, 11));
 142PIN_DECL_2(J25, GPIOB3, SALT4, LHAD3);
 143FUNC_GROUP_DECL(SALT4, J25);
 144
 145#define J23 12
 146SIG_EXPR_LIST_DECL_SESG(J23, MDC2, MDIO2, SIG_DESC_SET(SCU410, 12));
 147SIG_EXPR_LIST_DECL_SESG(J23, LHCLK, LPCHC, SIG_DESC_SET(SCU4B0, 12));
 148PIN_DECL_2(J23, GPIOB4, MDC2, LHCLK);
 149
 150#define G26 13
 151SIG_EXPR_LIST_DECL_SESG(G26, MDIO2, MDIO2, SIG_DESC_SET(SCU410, 13));
 152SIG_EXPR_LIST_DECL_SESG(G26, LHFRAME, LPCHC, SIG_DESC_SET(SCU4B0, 13));
 153PIN_DECL_2(G26, GPIOB5, MDIO2, LHFRAME);
 154
 155FUNC_GROUP_DECL(MDIO2, J23, G26);
 156
 157#define H25 14
 158SIG_EXPR_LIST_DECL_SESG(H25, TXD4, TXD4, SIG_DESC_SET(SCU410, 14));
 159SIG_EXPR_LIST_DECL_SESG(H25, LHSIRQ, LHSIRQ, SIG_DESC_SET(SCU4B0, 14));
 160PIN_DECL_2(H25, GPIOB6, TXD4, LHSIRQ);
 161FUNC_GROUP_DECL(TXD4, H25);
 162FUNC_GROUP_DECL(LHSIRQ, H25);
 163
 164#define J24 15
 165SIG_EXPR_LIST_DECL_SESG(J24, RXD4, RXD4, SIG_DESC_SET(SCU410, 15));
 166SIG_EXPR_LIST_DECL_SESG(J24, LHRST, LPCHC, SIG_DESC_SET(SCU4B0, 15));
 167PIN_DECL_2(J24, GPIOB7, RXD4, LHRST);
 168FUNC_GROUP_DECL(RXD4, J24);
 169
 170FUNC_GROUP_DECL(LPCHC, J26, K23, H26, J25, J23, G26, H25, J24);
 171
 172#define H24 16
 173SIG_EXPR_LIST_DECL_SESG(H24, RGMII3TXCK, RGMII3, SIG_DESC_SET(SCU410, 16),
 174                          SIG_DESC_SET(SCU510, 0));
 175SIG_EXPR_LIST_DECL_SESG(H24, RMII3RCLKO, RMII3, SIG_DESC_SET(SCU410, 16),
 176                          SIG_DESC_CLEAR(SCU510, 0));
 177PIN_DECL_2(H24, GPIOC0, RGMII3TXCK, RMII3RCLKO);
 178
 179#define J22 17
 180SIG_EXPR_LIST_DECL_SESG(J22, RGMII3TXCTL, RGMII3, SIG_DESC_SET(SCU410, 17),
 181                          SIG_DESC_SET(SCU510, 0));
 182SIG_EXPR_LIST_DECL_SESG(J22, RMII3TXEN, RMII3, SIG_DESC_SET(SCU410, 17),
 183                          SIG_DESC_CLEAR(SCU510, 0));
 184PIN_DECL_2(J22, GPIOC1, RGMII3TXCTL, RMII3TXEN);
 185
 186#define H22 18
 187SIG_EXPR_LIST_DECL_SESG(H22, RGMII3TXD0, RGMII3, SIG_DESC_SET(SCU410, 18),
 188                          SIG_DESC_SET(SCU510, 0));
 189SIG_EXPR_LIST_DECL_SESG(H22, RMII3TXD0, RMII3, SIG_DESC_SET(SCU410, 18),
 190                          SIG_DESC_CLEAR(SCU510, 0));
 191PIN_DECL_2(H22, GPIOC2, RGMII3TXD0, RMII3TXD0);
 192
 193#define H23 19
 194SIG_EXPR_LIST_DECL_SESG(H23, RGMII3TXD1, RGMII3, SIG_DESC_SET(SCU410, 19),
 195                          SIG_DESC_SET(SCU510, 0));
 196SIG_EXPR_LIST_DECL_SESG(H23, RMII3TXD1, RMII3, SIG_DESC_SET(SCU410, 19),
 197                          SIG_DESC_CLEAR(SCU510, 0));
 198PIN_DECL_2(H23, GPIOC3, RGMII3TXD1, RMII3TXD1);
 199
 200#define G22 20
 201SIG_EXPR_LIST_DECL_SESG(G22, RGMII3TXD2, RGMII3, SIG_DESC_SET(SCU410, 20),
 202                          SIG_DESC_SET(SCU510, 0));
 203PIN_DECL_1(G22, GPIOC4, RGMII3TXD2);
 204
 205#define F22 21
 206SIG_EXPR_LIST_DECL_SESG(F22, RGMII3TXD3, RGMII3, SIG_DESC_SET(SCU410, 21),
 207                          SIG_DESC_SET(SCU510, 0));
 208PIN_DECL_1(F22, GPIOC5, RGMII3TXD3);
 209
 210#define G23 22
 211SIG_EXPR_LIST_DECL_SESG(G23, RGMII3RXCK, RGMII3, SIG_DESC_SET(SCU410, 22),
 212                          SIG_DESC_SET(SCU510, 0));
 213SIG_EXPR_LIST_DECL_SESG(G23, RMII3RCLKI, RMII3, SIG_DESC_SET(SCU410, 22),
 214                          SIG_DESC_CLEAR(SCU510, 0));
 215PIN_DECL_2(G23, GPIOC6, RGMII3RXCK, RMII3RCLKI);
 216
 217#define G24 23
 218SIG_EXPR_LIST_DECL_SESG(G24, RGMII3RXCTL, RGMII3, SIG_DESC_SET(SCU410, 23),
 219                          SIG_DESC_SET(SCU510, 0));
 220PIN_DECL_1(G24, GPIOC7, RGMII3RXCTL);
 221
 222#define F23 24
 223SIG_EXPR_LIST_DECL_SESG(F23, RGMII3RXD0, RGMII3, SIG_DESC_SET(SCU410, 24),
 224                          SIG_DESC_SET(SCU510, 0));
 225SIG_EXPR_LIST_DECL_SESG(F23, RMII3RXD0, RMII3, SIG_DESC_SET(SCU410, 24),
 226                          SIG_DESC_CLEAR(SCU510, 0));
 227PIN_DECL_2(F23, GPIOD0, RGMII3RXD0, RMII3RXD0);
 228
 229#define F26 25
 230SIG_EXPR_LIST_DECL_SESG(F26, RGMII3RXD1, RGMII3, SIG_DESC_SET(SCU410, 25),
 231                          SIG_DESC_SET(SCU510, 0));
 232SIG_EXPR_LIST_DECL_SESG(F26, RMII3RXD1, RMII3, SIG_DESC_SET(SCU410, 25),
 233                          SIG_DESC_CLEAR(SCU510, 0));
 234PIN_DECL_2(F26, GPIOD1, RGMII3RXD1, RMII3RXD1);
 235
 236#define F25 26
 237SIG_EXPR_LIST_DECL_SESG(F25, RGMII3RXD2, RGMII3, SIG_DESC_SET(SCU410, 26),
 238                          SIG_DESC_SET(SCU510, 0));
 239SIG_EXPR_LIST_DECL_SESG(F25, RMII3CRSDV, RMII3, SIG_DESC_SET(SCU410, 26),
 240                          SIG_DESC_CLEAR(SCU510, 0));
 241PIN_DECL_2(F25, GPIOD2, RGMII3RXD2, RMII3CRSDV);
 242
 243#define E26 27
 244SIG_EXPR_LIST_DECL_SESG(E26, RGMII3RXD3, RGMII3, SIG_DESC_SET(SCU410, 27),
 245                          SIG_DESC_SET(SCU510, 0));
 246SIG_EXPR_LIST_DECL_SESG(E26, RMII3RXER, RMII3, SIG_DESC_SET(SCU410, 27),
 247                          SIG_DESC_CLEAR(SCU510, 0));
 248PIN_DECL_2(E26, GPIOD3, RGMII3RXD3, RMII3RXER);
 249
 250FUNC_GROUP_DECL(RGMII3, H24, J22, H22, H23, G22, F22, G23, G24, F23, F26, F25,
 251                E26);
 252FUNC_GROUP_DECL(RMII3, H24, J22, H22, H23, G23, F23, F26, F25, E26);
 253
 254#define F24 28
 255SIG_EXPR_LIST_DECL_SESG(F24, NCTS3, NCTS3, SIG_DESC_SET(SCU410, 28));
 256SIG_EXPR_LIST_DECL_SESG(F24, RGMII4TXCK, RGMII4, SIG_DESC_SET(SCU4B0, 28),
 257                          SIG_DESC_SET(SCU510, 1));
 258SIG_EXPR_LIST_DECL_SESG(F24, RMII4RCLKO, RMII4, SIG_DESC_SET(SCU4B0, 28),
 259                          SIG_DESC_CLEAR(SCU510, 1));
 260PIN_DECL_3(F24, GPIOD4, NCTS3, RGMII4TXCK, RMII4RCLKO);
 261FUNC_GROUP_DECL(NCTS3, F24);
 262
 263#define E23 29
 264SIG_EXPR_LIST_DECL_SESG(E23, NDCD3, NDCD3, SIG_DESC_SET(SCU410, 29));
 265SIG_EXPR_LIST_DECL_SESG(E23, RGMII4TXCTL, RGMII4, SIG_DESC_SET(SCU4B0, 29),
 266                          SIG_DESC_SET(SCU510, 1));
 267SIG_EXPR_LIST_DECL_SESG(E23, RMII4TXEN, RMII4, SIG_DESC_SET(SCU4B0, 29),
 268                          SIG_DESC_CLEAR(SCU510, 1));
 269PIN_DECL_3(E23, GPIOD5, NDCD3, RGMII4TXCTL, RMII4TXEN);
 270FUNC_GROUP_DECL(NDCD3, E23);
 271
 272#define E24 30
 273SIG_EXPR_LIST_DECL_SESG(E24, NDSR3, NDSR3, SIG_DESC_SET(SCU410, 30));
 274SIG_EXPR_LIST_DECL_SESG(E24, RGMII4TXD0, RGMII4, SIG_DESC_SET(SCU4B0, 30),
 275                          SIG_DESC_SET(SCU510, 1));
 276SIG_EXPR_LIST_DECL_SESG(E24, RMII4TXD0, RMII4, SIG_DESC_SET(SCU4B0, 30),
 277                          SIG_DESC_CLEAR(SCU510, 1));
 278PIN_DECL_3(E24, GPIOD6, NDSR3, RGMII4TXD0, RMII4TXD0);
 279FUNC_GROUP_DECL(NDSR3, E24);
 280
 281#define E25 31
 282SIG_EXPR_LIST_DECL_SESG(E25, NRI3, NRI3, SIG_DESC_SET(SCU410, 31));
 283SIG_EXPR_LIST_DECL_SESG(E25, RGMII4TXD1, RGMII4, SIG_DESC_SET(SCU4B0, 31),
 284                          SIG_DESC_SET(SCU510, 1));
 285SIG_EXPR_LIST_DECL_SESG(E25, RMII4TXD1, RMII4, SIG_DESC_SET(SCU4B0, 31),
 286                          SIG_DESC_CLEAR(SCU510, 1));
 287PIN_DECL_3(E25, GPIOD7, NRI3, RGMII4TXD1, RMII4TXD1);
 288FUNC_GROUP_DECL(NRI3, E25);
 289
 290#define D26 32
 291SIG_EXPR_LIST_DECL_SESG(D26, NDTR3, NDTR3, SIG_DESC_SET(SCU414, 0));
 292SIG_EXPR_LIST_DECL_SESG(D26, RGMII4TXD2, RGMII4, SIG_DESC_SET(SCU4B4, 0),
 293                          SIG_DESC_SET(SCU510, 1));
 294PIN_DECL_2(D26, GPIOE0, NDTR3, RGMII4TXD2);
 295FUNC_GROUP_DECL(NDTR3, D26);
 296
 297#define D24 33
 298SIG_EXPR_LIST_DECL_SESG(D24, NRTS3, NRTS3, SIG_DESC_SET(SCU414, 1));
 299SIG_EXPR_LIST_DECL_SESG(D24, RGMII4TXD3, RGMII4, SIG_DESC_SET(SCU4B4, 1),
 300                          SIG_DESC_SET(SCU510, 1));
 301PIN_DECL_2(D24, GPIOE1, NRTS3, RGMII4TXD3);
 302FUNC_GROUP_DECL(NRTS3, D24);
 303
 304#define C25 34
 305SIG_EXPR_LIST_DECL_SESG(C25, NCTS4, NCTS4, SIG_DESC_SET(SCU414, 2));
 306SIG_EXPR_LIST_DECL_SESG(C25, RGMII4RXCK, RGMII4, SIG_DESC_SET(SCU4B4, 2),
 307                          SIG_DESC_SET(SCU510, 1));
 308SIG_EXPR_LIST_DECL_SESG(C25, RMII4RCLKI, RMII4, SIG_DESC_SET(SCU4B4, 2),
 309                          SIG_DESC_CLEAR(SCU510, 1));
 310PIN_DECL_3(C25, GPIOE2, NCTS4, RGMII4RXCK, RMII4RCLKI);
 311FUNC_GROUP_DECL(NCTS4, C25);
 312
 313#define C26 35
 314SIG_EXPR_LIST_DECL_SESG(C26, NDCD4, NDCD4, SIG_DESC_SET(SCU414, 3));
 315SIG_EXPR_LIST_DECL_SESG(C26, RGMII4RXCTL, RGMII4, SIG_DESC_SET(SCU4B4, 3),
 316                          SIG_DESC_SET(SCU510, 1));
 317PIN_DECL_2(C26, GPIOE3, NDCD4, RGMII4RXCTL);
 318FUNC_GROUP_DECL(NDCD4, C26);
 319
 320#define C24 36
 321SIG_EXPR_LIST_DECL_SESG(C24, NDSR4, NDSR4, SIG_DESC_SET(SCU414, 4));
 322SIG_EXPR_LIST_DECL_SESG(C24, RGMII4RXD0, RGMII4, SIG_DESC_SET(SCU4B4, 4),
 323                          SIG_DESC_SET(SCU510, 1));
 324SIG_EXPR_LIST_DECL_SESG(C24, RMII4RXD0, RMII4, SIG_DESC_SET(SCU4B4, 4),
 325                          SIG_DESC_CLEAR(SCU510, 1));
 326PIN_DECL_3(C24, GPIOE4, NDSR4, RGMII4RXD0, RMII4RXD0);
 327FUNC_GROUP_DECL(NDSR4, C24);
 328
 329#define B26 37
 330SIG_EXPR_LIST_DECL_SESG(B26, NRI4, NRI4, SIG_DESC_SET(SCU414, 5));
 331SIG_EXPR_LIST_DECL_SESG(B26, RGMII4RXD1, RGMII4, SIG_DESC_SET(SCU4B4, 5),
 332                          SIG_DESC_SET(SCU510, 1));
 333SIG_EXPR_LIST_DECL_SESG(B26, RMII4RXD1, RMII4, SIG_DESC_SET(SCU4B4, 5),
 334                          SIG_DESC_CLEAR(SCU510, 1));
 335PIN_DECL_3(B26, GPIOE5, NRI4, RGMII4RXD1, RMII4RXD1);
 336FUNC_GROUP_DECL(NRI4, B26);
 337
 338#define B25 38
 339SIG_EXPR_LIST_DECL_SESG(B25, NDTR4, NDTR4, SIG_DESC_SET(SCU414, 6));
 340SIG_EXPR_LIST_DECL_SESG(B25, RGMII4RXD2, RGMII4, SIG_DESC_SET(SCU4B4, 6),
 341                          SIG_DESC_SET(SCU510, 1));
 342SIG_EXPR_LIST_DECL_SESG(B25, RMII4CRSDV, RMII4, SIG_DESC_SET(SCU4B4, 6),
 343                          SIG_DESC_CLEAR(SCU510, 1));
 344PIN_DECL_3(B25, GPIOE6, NDTR4, RGMII4RXD2, RMII4CRSDV);
 345FUNC_GROUP_DECL(NDTR4, B25);
 346
 347#define B24 39
 348SIG_EXPR_LIST_DECL_SESG(B24, NRTS4, NRTS4, SIG_DESC_SET(SCU414, 7));
 349SIG_EXPR_LIST_DECL_SESG(B24, RGMII4RXD3, RGMII4, SIG_DESC_SET(SCU4B4, 7),
 350                          SIG_DESC_SET(SCU510, 1));
 351SIG_EXPR_LIST_DECL_SESG(B24, RMII4RXER, RMII4, SIG_DESC_SET(SCU4B4, 7),
 352                          SIG_DESC_CLEAR(SCU510, 1));
 353PIN_DECL_3(B24, GPIOE7, NRTS4, RGMII4RXD3, RMII4RXER);
 354FUNC_GROUP_DECL(NRTS4, B24);
 355
 356FUNC_GROUP_DECL(RGMII4, F24, E23, E24, E25, D26, D24, C25, C26, C24, B26, B25,
 357                B24);
 358FUNC_GROUP_DECL(RMII4, F24, E23, E24, E25, C25, C24, B26, B25, B24);
 359
 360#define D22 40
 361SIG_EXPR_LIST_DECL_SESG(D22, SD1CLK, SD1, SIG_DESC_SET(SCU414, 8));
 362SIG_EXPR_LIST_DECL_SEMG(D22, PWM8, PWM8G0, PWM8, SIG_DESC_SET(SCU4B4, 8));
 363PIN_DECL_2(D22, GPIOF0, SD1CLK, PWM8);
 364GROUP_DECL(PWM8G0, D22);
 365
 366#define E22 41
 367SIG_EXPR_LIST_DECL_SESG(E22, SD1CMD, SD1, SIG_DESC_SET(SCU414, 9));
 368SIG_EXPR_LIST_DECL_SEMG(E22, PWM9, PWM9G0, PWM9, SIG_DESC_SET(SCU4B4, 9));
 369PIN_DECL_2(E22, GPIOF1, SD1CMD, PWM9);
 370GROUP_DECL(PWM9G0, E22);
 371
 372#define D23 42
 373SIG_EXPR_LIST_DECL_SESG(D23, SD1DAT0, SD1, SIG_DESC_SET(SCU414, 10));
 374SIG_EXPR_LIST_DECL_SEMG(D23, PWM10, PWM10G0, PWM10, SIG_DESC_SET(SCU4B4, 10));
 375PIN_DECL_2(D23, GPIOF2, SD1DAT0, PWM10);
 376GROUP_DECL(PWM10G0, D23);
 377
 378#define C23 43
 379SIG_EXPR_LIST_DECL_SESG(C23, SD1DAT1, SD1, SIG_DESC_SET(SCU414, 11));
 380SIG_EXPR_LIST_DECL_SEMG(C23, PWM11, PWM11G0, PWM11, SIG_DESC_SET(SCU4B4, 11));
 381PIN_DECL_2(C23, GPIOF3, SD1DAT1, PWM11);
 382GROUP_DECL(PWM11G0, C23);
 383
 384#define C22 44
 385SIG_EXPR_LIST_DECL_SESG(C22, SD1DAT2, SD1, SIG_DESC_SET(SCU414, 12));
 386SIG_EXPR_LIST_DECL_SEMG(C22, PWM12, PWM12G0, PWM12, SIG_DESC_SET(SCU4B4, 12));
 387PIN_DECL_2(C22, GPIOF4, SD1DAT2, PWM12);
 388GROUP_DECL(PWM12G0, C22);
 389
 390#define A25 45
 391SIG_EXPR_LIST_DECL_SESG(A25, SD1DAT3, SD1, SIG_DESC_SET(SCU414, 13));
 392SIG_EXPR_LIST_DECL_SEMG(A25, PWM13, PWM13G0, PWM13, SIG_DESC_SET(SCU4B4, 13));
 393PIN_DECL_2(A25, GPIOF5, SD1DAT3, PWM13);
 394GROUP_DECL(PWM13G0, A25);
 395
 396#define A24 46
 397SIG_EXPR_LIST_DECL_SESG(A24, SD1CD, SD1, SIG_DESC_SET(SCU414, 14));
 398SIG_EXPR_LIST_DECL_SEMG(A24, PWM14, PWM14G0, PWM14, SIG_DESC_SET(SCU4B4, 14));
 399PIN_DECL_2(A24, GPIOF6, SD1CD, PWM14);
 400GROUP_DECL(PWM14G0, A24);
 401
 402#define A23 47
 403SIG_EXPR_LIST_DECL_SESG(A23, SD1WP, SD1, SIG_DESC_SET(SCU414, 15));
 404SIG_EXPR_LIST_DECL_SEMG(A23, PWM15, PWM15G0, PWM15, SIG_DESC_SET(SCU4B4, 15));
 405PIN_DECL_2(A23, GPIOF7, SD1WP, PWM15);
 406GROUP_DECL(PWM15G0, A23);
 407
 408FUNC_GROUP_DECL(SD1, D22, E22, D23, C23, C22, A25, A24, A23);
 409
 410#define E21 48
 411SIG_EXPR_LIST_DECL_SESG(E21, TXD6, UART6, SIG_DESC_SET(SCU414, 16));
 412SIG_EXPR_LIST_DECL_SESG(E21, SD2CLK, SD2, SIG_DESC_SET(SCU4B4, 16),
 413                          SIG_DESC_SET(SCU450, 1));
 414SIG_EXPR_LIST_DECL_SEMG(E21, SALT9, SALT9G0, SALT9, SIG_DESC_SET(SCU694, 16));
 415PIN_DECL_3(E21, GPIOG0, TXD6, SD2CLK, SALT9);
 416GROUP_DECL(SALT9G0, E21);
 417
 418#define B22 49
 419SIG_EXPR_LIST_DECL_SESG(B22, RXD6, UART6, SIG_DESC_SET(SCU414, 17));
 420SIG_EXPR_LIST_DECL_SESG(B22, SD2CMD, SD2, SIG_DESC_SET(SCU4B4, 17),
 421                          SIG_DESC_SET(SCU450, 1));
 422SIG_EXPR_LIST_DECL_SEMG(B22, SALT10, SALT10G0, SALT10,
 423                        SIG_DESC_SET(SCU694, 17));
 424PIN_DECL_3(B22, GPIOG1, RXD6, SD2CMD, SALT10);
 425GROUP_DECL(SALT10G0, B22);
 426
 427FUNC_GROUP_DECL(UART6, E21, B22);
 428
 429#define C21 50
 430SIG_EXPR_LIST_DECL_SESG(C21, TXD7, UART7, SIG_DESC_SET(SCU414, 18));
 431SIG_EXPR_LIST_DECL_SESG(C21, SD2DAT0, SD2, SIG_DESC_SET(SCU4B4, 18),
 432                          SIG_DESC_SET(SCU450, 1));
 433SIG_EXPR_LIST_DECL_SEMG(C21, SALT11, SALT11G0, SALT11,
 434                        SIG_DESC_SET(SCU694, 18));
 435PIN_DECL_3(C21, GPIOG2, TXD7, SD2DAT0, SALT11);
 436GROUP_DECL(SALT11G0, C21);
 437
 438#define A22 51
 439SIG_EXPR_LIST_DECL_SESG(A22, RXD7, UART7, SIG_DESC_SET(SCU414, 19));
 440SIG_EXPR_LIST_DECL_SESG(A22, SD2DAT1, SD2, SIG_DESC_SET(SCU4B4, 19),
 441                          SIG_DESC_SET(SCU450, 1));
 442SIG_EXPR_LIST_DECL_SEMG(A22, SALT12, SALT12G0, SALT12,
 443                        SIG_DESC_SET(SCU694, 19));
 444PIN_DECL_3(A22, GPIOG3, RXD7, SD2DAT1, SALT12);
 445GROUP_DECL(SALT12G0, A22);
 446
 447FUNC_GROUP_DECL(UART7, C21, A22);
 448
 449#define A21 52
 450SIG_EXPR_LIST_DECL_SESG(A21, TXD8, UART8, SIG_DESC_SET(SCU414, 20));
 451SIG_EXPR_LIST_DECL_SESG(A21, SD2DAT2, SD2, SIG_DESC_SET(SCU4B4, 20),
 452                          SIG_DESC_SET(SCU450, 1));
 453SIG_EXPR_LIST_DECL_SEMG(A21, SALT13, SALT13G0, SALT13,
 454                        SIG_DESC_SET(SCU694, 20));
 455PIN_DECL_3(A21, GPIOG4, TXD8, SD2DAT2, SALT13);
 456GROUP_DECL(SALT13G0, A21);
 457
 458#define E20 53
 459SIG_EXPR_LIST_DECL_SESG(E20, RXD8, UART8, SIG_DESC_SET(SCU414, 21));
 460SIG_EXPR_LIST_DECL_SESG(E20, SD2DAT3, SD2, SIG_DESC_SET(SCU4B4, 21),
 461                          SIG_DESC_SET(SCU450, 1));
 462SIG_EXPR_LIST_DECL_SEMG(E20, SALT14, SALT14G0, SALT14,
 463                        SIG_DESC_SET(SCU694, 21));
 464PIN_DECL_3(E20, GPIOG5, RXD8, SD2DAT3, SALT14);
 465GROUP_DECL(SALT14G0, E20);
 466
 467FUNC_GROUP_DECL(UART8, A21, E20);
 468
 469#define D21 54
 470SIG_EXPR_LIST_DECL_SESG(D21, TXD9, UART9, SIG_DESC_SET(SCU414, 22));
 471SIG_EXPR_LIST_DECL_SESG(D21, SD2CD, SD2, SIG_DESC_SET(SCU4B4, 22),
 472                          SIG_DESC_SET(SCU450, 1));
 473SIG_EXPR_LIST_DECL_SEMG(D21, SALT15, SALT15G0, SALT15,
 474                        SIG_DESC_SET(SCU694, 22));
 475PIN_DECL_3(D21, GPIOG6, TXD9, SD2CD, SALT15);
 476GROUP_DECL(SALT15G0, D21);
 477
 478#define B21 55
 479SIG_EXPR_LIST_DECL_SESG(B21, RXD9, UART9, SIG_DESC_SET(SCU414, 23));
 480SIG_EXPR_LIST_DECL_SESG(B21, SD2WP, SD2, SIG_DESC_SET(SCU4B4, 23),
 481                        SIG_DESC_SET(SCU450, 1));
 482SIG_EXPR_LIST_DECL_SEMG(B21, SALT16, SALT16G0, SALT16,
 483                        SIG_DESC_SET(SCU694, 23));
 484PIN_DECL_3(B21, GPIOG7, RXD9, SD2WP, SALT16);
 485GROUP_DECL(SALT16G0, B21);
 486
 487FUNC_GROUP_DECL(UART9, D21, B21);
 488
 489FUNC_GROUP_DECL(SD2, E21, B22, C21, A22, A21, E20, D21, B21);
 490
 491#define A18 56
 492SIG_EXPR_LIST_DECL_SESG(A18, SGPM1CLK, SGPM1, SIG_DESC_SET(SCU414, 24));
 493PIN_DECL_1(A18, GPIOH0, SGPM1CLK);
 494
 495#define B18 57
 496SIG_EXPR_LIST_DECL_SESG(B18, SGPM1LD, SGPM1, SIG_DESC_SET(SCU414, 25));
 497PIN_DECL_1(B18, GPIOH1, SGPM1LD);
 498
 499#define C18 58
 500SIG_EXPR_LIST_DECL_SESG(C18, SGPM1O, SGPM1, SIG_DESC_SET(SCU414, 26));
 501PIN_DECL_1(C18, GPIOH2, SGPM1O);
 502
 503#define A17 59
 504SIG_EXPR_LIST_DECL_SESG(A17, SGPM1I, SGPM1, SIG_DESC_SET(SCU414, 27));
 505PIN_DECL_1(A17, GPIOH3, SGPM1I);
 506
 507FUNC_GROUP_DECL(SGPM1, A18, B18, C18, A17);
 508
 509#define D18 60
 510SIG_EXPR_LIST_DECL_SESG(D18, SGPS1CK, SGPS1, SIG_DESC_SET(SCU414, 28));
 511SIG_EXPR_LIST_DECL_SESG(D18, SCL15, I2C15, SIG_DESC_SET(SCU4B4, 28));
 512PIN_DECL_2(D18, GPIOH4, SGPS1CK, SCL15);
 513
 514#define B17 61
 515SIG_EXPR_LIST_DECL_SESG(B17, SGPS1LD, SGPS1, SIG_DESC_SET(SCU414, 29));
 516SIG_EXPR_LIST_DECL_SESG(B17, SDA15, I2C15, SIG_DESC_SET(SCU4B4, 29));
 517PIN_DECL_2(B17, GPIOH5, SGPS1LD, SDA15);
 518
 519FUNC_GROUP_DECL(I2C15, D18, B17);
 520
 521#define C17 62
 522SIG_EXPR_LIST_DECL_SESG(C17, SGPS1O, SGPS1, SIG_DESC_SET(SCU414, 30));
 523SIG_EXPR_LIST_DECL_SESG(C17, SCL16, I2C16, SIG_DESC_SET(SCU4B4, 30));
 524PIN_DECL_2(C17, GPIOH6, SGPS1O, SCL16);
 525
 526#define E18 63
 527SIG_EXPR_LIST_DECL_SESG(E18, SGPS1I, SGPS1, SIG_DESC_SET(SCU414, 31));
 528SIG_EXPR_LIST_DECL_SESG(E18, SDA16, I2C16, SIG_DESC_SET(SCU4B4, 31));
 529PIN_DECL_2(E18, GPIOH7, SGPS1I, SDA16);
 530
 531FUNC_GROUP_DECL(I2C16, C17, E18);
 532FUNC_GROUP_DECL(SGPS1, D18, B17, C17, E18);
 533
 534#define D17 64
 535SIG_EXPR_LIST_DECL_SESG(D17, MTRSTN, JTAGM, SIG_DESC_SET(SCU418, 0));
 536SIG_EXPR_LIST_DECL_SEMG(D17, TXD12, UART12G0, UART12, SIG_DESC_SET(SCU4B8, 0));
 537PIN_DECL_2(D17, GPIOI0, MTRSTN, TXD12);
 538
 539#define A16 65
 540SIG_EXPR_LIST_DECL_SESG(A16, MTDI, JTAGM, SIG_DESC_SET(SCU418, 1));
 541SIG_EXPR_LIST_DECL_SEMG(A16, RXD12, UART12G0, UART12, SIG_DESC_SET(SCU4B8, 1));
 542PIN_DECL_2(A16, GPIOI1, MTDI, RXD12);
 543
 544GROUP_DECL(UART12G0, D17, A16);
 545
 546#define E17 66
 547SIG_EXPR_LIST_DECL_SESG(E17, MTCK, JTAGM, SIG_DESC_SET(SCU418, 2));
 548SIG_EXPR_LIST_DECL_SEMG(E17, TXD13, UART13G0, UART13, SIG_DESC_SET(SCU4B8, 2));
 549PIN_DECL_2(E17, GPIOI2, MTCK, TXD13);
 550
 551#define D16 67
 552SIG_EXPR_LIST_DECL_SESG(D16, MTMS, JTAGM, SIG_DESC_SET(SCU418, 3));
 553SIG_EXPR_LIST_DECL_SEMG(D16, RXD13, UART13G0, UART13, SIG_DESC_SET(SCU4B8, 3));
 554PIN_DECL_2(D16, GPIOI3, MTMS, RXD13);
 555
 556GROUP_DECL(UART13G0, E17, D16);
 557
 558#define C16 68
 559SIG_EXPR_LIST_DECL_SESG(C16, MTDO, JTAGM, SIG_DESC_SET(SCU418, 4));
 560PIN_DECL_1(C16, GPIOI4, MTDO);
 561
 562FUNC_GROUP_DECL(JTAGM, D17, A16, E17, D16, C16);
 563
 564#define E16 69
 565SIG_EXPR_LIST_DECL_SESG(E16, SIOPBO, SIOPBO, SIG_DESC_SET(SCU418, 5));
 566PIN_DECL_1(E16, GPIOI5, SIOPBO);
 567FUNC_GROUP_DECL(SIOPBO, E16);
 568
 569#define B16 70
 570SIG_EXPR_LIST_DECL_SESG(B16, SIOPBI, SIOPBI, SIG_DESC_SET(SCU418, 6));
 571PIN_DECL_1(B16, GPIOI6, SIOPBI);
 572FUNC_GROUP_DECL(SIOPBI, B16);
 573
 574#define A15 71
 575SIG_EXPR_LIST_DECL_SESG(A15, BMCINT, BMCINT, SIG_DESC_SET(SCU418, 7));
 576SIG_EXPR_LIST_DECL_SESG(A15, SIOSCI, SIOSCI, SIG_DESC_SET(SCU4B8, 7));
 577PIN_DECL_2(A15, GPIOI7, BMCINT, SIOSCI);
 578FUNC_GROUP_DECL(BMCINT, A15);
 579FUNC_GROUP_DECL(SIOSCI, A15);
 580
 581#define B20 72
 582SIG_EXPR_LIST_DECL_SEMG(B20, I3C3SCL, HVI3C3, I3C3, SIG_DESC_SET(SCU418, 8));
 583SIG_EXPR_LIST_DECL_SESG(B20, SCL1, I2C1, SIG_DESC_SET(SCU4B8, 8));
 584PIN_DECL_2(B20, GPIOJ0, I3C3SCL, SCL1);
 585
 586#define A20 73
 587SIG_EXPR_LIST_DECL_SEMG(A20, I3C3SDA, HVI3C3, I3C3, SIG_DESC_SET(SCU418, 9));
 588SIG_EXPR_LIST_DECL_SESG(A20, SDA1, I2C1, SIG_DESC_SET(SCU4B8, 9));
 589PIN_DECL_2(A20, GPIOJ1, I3C3SDA, SDA1);
 590
 591GROUP_DECL(HVI3C3, B20, A20);
 592FUNC_GROUP_DECL(I2C1, B20, A20);
 593
 594#define E19 74
 595SIG_EXPR_LIST_DECL_SEMG(E19, I3C4SCL, HVI3C4, I3C4, SIG_DESC_SET(SCU418, 10));
 596SIG_EXPR_LIST_DECL_SESG(E19, SCL2, I2C2, SIG_DESC_SET(SCU4B8, 10));
 597PIN_DECL_2(E19, GPIOJ2, I3C4SCL, SCL2);
 598
 599#define D20 75
 600SIG_EXPR_LIST_DECL_SEMG(D20, I3C4SDA, HVI3C4, I3C4, SIG_DESC_SET(SCU418, 11));
 601SIG_EXPR_LIST_DECL_SESG(D20, SDA2, I2C2, SIG_DESC_SET(SCU4B8, 11));
 602PIN_DECL_2(D20, GPIOJ3, I3C4SDA, SDA2);
 603
 604GROUP_DECL(HVI3C4, E19, D20);
 605FUNC_GROUP_DECL(I2C2, E19, D20);
 606
 607#define C19 76
 608SIG_EXPR_LIST_DECL_SESG(C19, I3C5SCL, I3C5, SIG_DESC_SET(SCU418, 12));
 609SIG_EXPR_LIST_DECL_SESG(C19, SCL3, I2C3, SIG_DESC_SET(SCU4B8, 12));
 610PIN_DECL_2(C19, GPIOJ4, I3C5SCL, SCL3);
 611
 612#define A19 77
 613SIG_EXPR_LIST_DECL_SESG(A19, I3C5SDA, I3C5, SIG_DESC_SET(SCU418, 13));
 614SIG_EXPR_LIST_DECL_SESG(A19, SDA3, I2C3, SIG_DESC_SET(SCU4B8, 13));
 615PIN_DECL_2(A19, GPIOJ5, I3C5SDA, SDA3);
 616
 617FUNC_GROUP_DECL(I3C5, C19, A19);
 618FUNC_GROUP_DECL(I2C3, C19, A19);
 619
 620#define C20 78
 621SIG_EXPR_LIST_DECL_SESG(C20, I3C6SCL, I3C6, SIG_DESC_SET(SCU418, 14));
 622SIG_EXPR_LIST_DECL_SESG(C20, SCL4, I2C4, SIG_DESC_SET(SCU4B8, 14));
 623PIN_DECL_2(C20, GPIOJ6, I3C6SCL, SCL4);
 624
 625#define D19 79
 626SIG_EXPR_LIST_DECL_SESG(D19, I3C6SDA, I3C6, SIG_DESC_SET(SCU418, 15));
 627SIG_EXPR_LIST_DECL_SESG(D19, SDA4, I2C4, SIG_DESC_SET(SCU4B8, 15));
 628PIN_DECL_2(D19, GPIOJ7, I3C6SDA, SDA4);
 629
 630FUNC_GROUP_DECL(I3C6, C20, D19);
 631FUNC_GROUP_DECL(I2C4, C20, D19);
 632
 633#define A11 80
 634SIG_EXPR_LIST_DECL_SESG(A11, SCL5, I2C5, SIG_DESC_SET(SCU418, 16));
 635PIN_DECL_1(A11, GPIOK0, SCL5);
 636
 637#define C11 81
 638SIG_EXPR_LIST_DECL_SESG(C11, SDA5, I2C5, SIG_DESC_SET(SCU418, 17));
 639PIN_DECL_1(C11, GPIOK1, SDA5);
 640
 641FUNC_GROUP_DECL(I2C5, A11, C11);
 642
 643#define D12 82
 644SIG_EXPR_LIST_DECL_SESG(D12, SCL6, I2C6, SIG_DESC_SET(SCU418, 18));
 645PIN_DECL_1(D12, GPIOK2, SCL6);
 646
 647#define E13 83
 648SIG_EXPR_LIST_DECL_SESG(E13, SDA6, I2C6, SIG_DESC_SET(SCU418, 19));
 649PIN_DECL_1(E13, GPIOK3, SDA6);
 650
 651FUNC_GROUP_DECL(I2C6, D12, E13);
 652
 653#define D11 84
 654SIG_EXPR_LIST_DECL_SESG(D11, SCL7, I2C7, SIG_DESC_SET(SCU418, 20));
 655PIN_DECL_1(D11, GPIOK4, SCL7);
 656
 657#define E11 85
 658SIG_EXPR_LIST_DECL_SESG(E11, SDA7, I2C7, SIG_DESC_SET(SCU418, 21));
 659PIN_DECL_1(E11, GPIOK5, SDA7);
 660
 661FUNC_GROUP_DECL(I2C7, D11, E11);
 662
 663#define F13 86
 664SIG_EXPR_LIST_DECL_SESG(F13, SCL8, I2C8, SIG_DESC_SET(SCU418, 22));
 665PIN_DECL_1(F13, GPIOK6, SCL8);
 666
 667#define E12 87
 668SIG_EXPR_LIST_DECL_SESG(E12, SDA8, I2C8, SIG_DESC_SET(SCU418, 23));
 669PIN_DECL_1(E12, GPIOK7, SDA8);
 670
 671FUNC_GROUP_DECL(I2C8, F13, E12);
 672
 673#define D15 88
 674SIG_EXPR_LIST_DECL_SESG(D15, SCL9, I2C9, SIG_DESC_SET(SCU418, 24));
 675PIN_DECL_1(D15, GPIOL0, SCL9);
 676
 677#define A14 89
 678SIG_EXPR_LIST_DECL_SESG(A14, SDA9, I2C9, SIG_DESC_SET(SCU418, 25));
 679PIN_DECL_1(A14, GPIOL1, SDA9);
 680
 681FUNC_GROUP_DECL(I2C9, D15, A14);
 682
 683#define E15 90
 684SIG_EXPR_LIST_DECL_SESG(E15, SCL10, I2C10, SIG_DESC_SET(SCU418, 26));
 685PIN_DECL_1(E15, GPIOL2, SCL10);
 686
 687#define A13 91
 688SIG_EXPR_LIST_DECL_SESG(A13, SDA10, I2C10, SIG_DESC_SET(SCU418, 27));
 689PIN_DECL_1(A13, GPIOL3, SDA10);
 690
 691FUNC_GROUP_DECL(I2C10, E15, A13);
 692
 693#define C15 92
 694SSSF_PIN_DECL(C15, GPIOL4, TXD3, SIG_DESC_SET(SCU418, 28));
 695
 696#define F15 93
 697SSSF_PIN_DECL(F15, GPIOL5, RXD3, SIG_DESC_SET(SCU418, 29));
 698
 699#define B14 94
 700SSSF_PIN_DECL(B14, GPIOL6, VGAHS, SIG_DESC_SET(SCU418, 30));
 701
 702#define C14 95
 703SSSF_PIN_DECL(C14, GPIOL7, VGAVS, SIG_DESC_SET(SCU418, 31));
 704
 705#define D14 96
 706SSSF_PIN_DECL(D14, GPIOM0, NCTS1, SIG_DESC_SET(SCU41C, 0));
 707
 708#define B13 97
 709SSSF_PIN_DECL(B13, GPIOM1, NDCD1, SIG_DESC_SET(SCU41C, 1));
 710
 711#define A12 98
 712SSSF_PIN_DECL(A12, GPIOM2, NDSR1, SIG_DESC_SET(SCU41C, 2));
 713
 714#define E14 99
 715SSSF_PIN_DECL(E14, GPIOM3, NRI1, SIG_DESC_SET(SCU41C, 3));
 716
 717#define B12 100
 718SSSF_PIN_DECL(B12, GPIOM4, NDTR1, SIG_DESC_SET(SCU41C, 4));
 719
 720#define C12 101
 721SSSF_PIN_DECL(C12, GPIOM5, NRTS1, SIG_DESC_SET(SCU41C, 5));
 722
 723#define C13 102
 724SSSF_PIN_DECL(C13, GPIOM6, TXD1, SIG_DESC_SET(SCU41C, 6));
 725
 726#define D13 103
 727SSSF_PIN_DECL(D13, GPIOM7, RXD1, SIG_DESC_SET(SCU41C, 7));
 728
 729#define P25 104
 730SSSF_PIN_DECL(P25, GPION0, NCTS2, SIG_DESC_SET(SCU41C, 8));
 731
 732#define N23 105
 733SSSF_PIN_DECL(N23, GPION1, NDCD2, SIG_DESC_SET(SCU41C, 9));
 734
 735#define N25 106
 736SSSF_PIN_DECL(N25, GPION2, NDSR2, SIG_DESC_SET(SCU41C, 10));
 737
 738#define N24 107
 739SSSF_PIN_DECL(N24, GPION3, NRI2, SIG_DESC_SET(SCU41C, 11));
 740
 741#define P26 108
 742SSSF_PIN_DECL(P26, GPION4, NDTR2, SIG_DESC_SET(SCU41C, 12));
 743
 744#define M23 109
 745SSSF_PIN_DECL(M23, GPION5, NRTS2, SIG_DESC_SET(SCU41C, 13));
 746
 747#define N26 110
 748SSSF_PIN_DECL(N26, GPION6, TXD2, SIG_DESC_SET(SCU41C, 14));
 749
 750#define M26 111
 751SSSF_PIN_DECL(M26, GPION7, RXD2, SIG_DESC_SET(SCU41C, 15));
 752
 753#define AD26 112
 754SSSF_PIN_DECL(AD26, GPIOO0, PWM0, SIG_DESC_SET(SCU41C, 16));
 755
 756#define AD22 113
 757SSSF_PIN_DECL(AD22, GPIOO1, PWM1, SIG_DESC_SET(SCU41C, 17));
 758
 759#define AD23 114
 760SSSF_PIN_DECL(AD23, GPIOO2, PWM2, SIG_DESC_SET(SCU41C, 18));
 761
 762#define AD24 115
 763SSSF_PIN_DECL(AD24, GPIOO3, PWM3, SIG_DESC_SET(SCU41C, 19));
 764
 765#define AD25 116
 766SSSF_PIN_DECL(AD25, GPIOO4, PWM4, SIG_DESC_SET(SCU41C, 20));
 767
 768#define AC22 117
 769SSSF_PIN_DECL(AC22, GPIOO5, PWM5, SIG_DESC_SET(SCU41C, 21));
 770
 771#define AC24 118
 772SSSF_PIN_DECL(AC24, GPIOO6, PWM6, SIG_DESC_SET(SCU41C, 22));
 773
 774#define AC23 119
 775SSSF_PIN_DECL(AC23, GPIOO7, PWM7, SIG_DESC_SET(SCU41C, 23));
 776
 777#define AB22 120
 778SIG_EXPR_LIST_DECL_SEMG(AB22, PWM8, PWM8G1, PWM8, SIG_DESC_SET(SCU41C, 24));
 779SIG_EXPR_LIST_DECL_SESG(AB22, THRUIN0, THRU0, SIG_DESC_SET(SCU4BC, 24));
 780PIN_DECL_2(AB22, GPIOP0, PWM8, THRUIN0);
 781GROUP_DECL(PWM8G1, AB22);
 782FUNC_DECL_2(PWM8, PWM8G0, PWM8G1);
 783
 784#define W24 121
 785SIG_EXPR_LIST_DECL_SEMG(W24, PWM9, PWM9G1, PWM9, SIG_DESC_SET(SCU41C, 25));
 786SIG_EXPR_LIST_DECL_SESG(W24, THRUOUT0, THRU0, SIG_DESC_SET(SCU4BC, 25));
 787PIN_DECL_2(W24, GPIOP1, PWM9, THRUOUT0);
 788
 789FUNC_GROUP_DECL(THRU0, AB22, W24);
 790
 791GROUP_DECL(PWM9G1, W24);
 792FUNC_DECL_2(PWM9, PWM9G0, PWM9G1);
 793
 794#define AA23 122
 795SIG_EXPR_LIST_DECL_SEMG(AA23, PWM10, PWM10G1, PWM10, SIG_DESC_SET(SCU41C, 26));
 796SIG_EXPR_LIST_DECL_SESG(AA23, THRUIN1, THRU1, SIG_DESC_SET(SCU4BC, 26));
 797PIN_DECL_2(AA23, GPIOP2, PWM10, THRUIN1);
 798GROUP_DECL(PWM10G1, AA23);
 799FUNC_DECL_2(PWM10, PWM10G0, PWM10G1);
 800
 801#define AA24 123
 802SIG_EXPR_LIST_DECL_SEMG(AA24, PWM11, PWM11G1, PWM11, SIG_DESC_SET(SCU41C, 27));
 803SIG_EXPR_LIST_DECL_SESG(AA24, THRUOUT1, THRU1, SIG_DESC_SET(SCU4BC, 27));
 804PIN_DECL_2(AA24, GPIOP3, PWM11, THRUOUT1);
 805GROUP_DECL(PWM11G1, AA24);
 806FUNC_DECL_2(PWM11, PWM11G0, PWM11G1);
 807
 808FUNC_GROUP_DECL(THRU1, AA23, AA24);
 809
 810#define W23 124
 811SIG_EXPR_LIST_DECL_SEMG(W23, PWM12, PWM12G1, PWM12, SIG_DESC_SET(SCU41C, 28));
 812SIG_EXPR_LIST_DECL_SESG(W23, THRUIN2, THRU2, SIG_DESC_SET(SCU4BC, 28));
 813PIN_DECL_2(W23, GPIOP4, PWM12, THRUIN2);
 814GROUP_DECL(PWM12G1, W23);
 815FUNC_DECL_2(PWM12, PWM12G0, PWM12G1);
 816
 817#define AB23 125
 818SIG_EXPR_LIST_DECL_SEMG(AB23, PWM13, PWM13G1, PWM13, SIG_DESC_SET(SCU41C, 29));
 819SIG_EXPR_LIST_DECL_SESG(AB23, THRUOUT2, THRU2, SIG_DESC_SET(SCU4BC, 29));
 820PIN_DECL_2(AB23, GPIOP5, PWM13, THRUOUT2);
 821GROUP_DECL(PWM13G1, AB23);
 822FUNC_DECL_2(PWM13, PWM13G0, PWM13G1);
 823
 824FUNC_GROUP_DECL(THRU2, W23, AB23);
 825
 826#define AB24 126
 827SIG_EXPR_LIST_DECL_SEMG(AB24, PWM14, PWM14G1, PWM14, SIG_DESC_SET(SCU41C, 30));
 828SIG_EXPR_LIST_DECL_SESG(AB24, THRUIN3, THRU3, SIG_DESC_SET(SCU4BC, 30));
 829PIN_DECL_2(AB24, GPIOP6, PWM14, THRUIN3);
 830GROUP_DECL(PWM14G1, AB24);
 831FUNC_DECL_2(PWM14, PWM14G0, PWM14G1);
 832
 833#define Y23 127
 834SIG_EXPR_LIST_DECL_SEMG(Y23, PWM15, PWM15G1, PWM15, SIG_DESC_SET(SCU41C, 31));
 835SIG_EXPR_LIST_DECL_SESG(Y23, THRUOUT3, THRU3, SIG_DESC_SET(SCU4BC, 31));
 836SIG_EXPR_LIST_DECL_SESG(Y23, HEARTBEAT, HEARTBEAT, SIG_DESC_SET(SCU69C, 31));
 837PIN_DECL_3(Y23, GPIOP7, PWM15, THRUOUT3, HEARTBEAT);
 838GROUP_DECL(PWM15G1, Y23);
 839FUNC_DECL_2(PWM15, PWM15G0, PWM15G1);
 840
 841FUNC_GROUP_DECL(THRU3, AB24, Y23);
 842FUNC_GROUP_DECL(HEARTBEAT, Y23);
 843
 844#define AA25 128
 845SSSF_PIN_DECL(AA25, GPIOQ0, TACH0, SIG_DESC_SET(SCU430, 0));
 846
 847#define AB25 129
 848SSSF_PIN_DECL(AB25, GPIOQ1, TACH1, SIG_DESC_SET(SCU430, 1));
 849
 850#define Y24 130
 851SSSF_PIN_DECL(Y24, GPIOQ2, TACH2, SIG_DESC_SET(SCU430, 2));
 852
 853#define AB26 131
 854SSSF_PIN_DECL(AB26, GPIOQ3, TACH3, SIG_DESC_SET(SCU430, 3));
 855
 856#define Y26 132
 857SSSF_PIN_DECL(Y26, GPIOQ4, TACH4, SIG_DESC_SET(SCU430, 4));
 858
 859#define AC26 133
 860SSSF_PIN_DECL(AC26, GPIOQ5, TACH5, SIG_DESC_SET(SCU430, 5));
 861
 862#define Y25 134
 863SSSF_PIN_DECL(Y25, GPIOQ6, TACH6, SIG_DESC_SET(SCU430, 6));
 864
 865#define AA26 135
 866SSSF_PIN_DECL(AA26, GPIOQ7, TACH7, SIG_DESC_SET(SCU430, 7));
 867
 868#define V25 136
 869SSSF_PIN_DECL(V25, GPIOR0, TACH8, SIG_DESC_SET(SCU430, 8));
 870
 871#define U24 137
 872SSSF_PIN_DECL(U24, GPIOR1, TACH9, SIG_DESC_SET(SCU430, 9));
 873
 874#define V24 138
 875SSSF_PIN_DECL(V24, GPIOR2, TACH10, SIG_DESC_SET(SCU430, 10));
 876
 877#define V26 139
 878SSSF_PIN_DECL(V26, GPIOR3, TACH11, SIG_DESC_SET(SCU430, 11));
 879
 880#define U25 140
 881SSSF_PIN_DECL(U25, GPIOR4, TACH12, SIG_DESC_SET(SCU430, 12));
 882
 883#define T23 141
 884SSSF_PIN_DECL(T23, GPIOR5, TACH13, SIG_DESC_SET(SCU430, 13));
 885
 886#define W26 142
 887SSSF_PIN_DECL(W26, GPIOR6, TACH14, SIG_DESC_SET(SCU430, 14));
 888
 889#define U26 143
 890SSSF_PIN_DECL(U26, GPIOR7, TACH15, SIG_DESC_SET(SCU430, 15));
 891
 892#define R23 144
 893SIG_EXPR_LIST_DECL_SESG(R23, MDC1, MDIO1, SIG_DESC_SET(SCU430, 16));
 894PIN_DECL_1(R23, GPIOS0, MDC1);
 895
 896#define T25 145
 897SIG_EXPR_LIST_DECL_SESG(T25, MDIO1, MDIO1, SIG_DESC_SET(SCU430, 17));
 898PIN_DECL_1(T25, GPIOS1, MDIO1);
 899
 900FUNC_GROUP_DECL(MDIO1, R23, T25);
 901
 902#define T26 146
 903SSSF_PIN_DECL(T26, GPIOS2, PEWAKE, SIG_DESC_SET(SCU430, 18));
 904
 905#define R24 147
 906SSSF_PIN_DECL(R24, GPIOS3, OSCCLK, SIG_DESC_SET(SCU430, 19));
 907
 908#define R26 148
 909SIG_EXPR_LIST_DECL_SESG(R26, TXD10, UART10, SIG_DESC_SET(SCU430, 20));
 910PIN_DECL_1(R26, GPIOS4, TXD10);
 911
 912#define P24 149
 913SIG_EXPR_LIST_DECL_SESG(P24, RXD10, UART10, SIG_DESC_SET(SCU430, 21));
 914PIN_DECL_1(P24, GPIOS5, RXD10);
 915
 916FUNC_GROUP_DECL(UART10, R26, P24);
 917
 918#define P23 150
 919SIG_EXPR_LIST_DECL_SESG(P23, TXD11, UART11, SIG_DESC_SET(SCU430, 22));
 920PIN_DECL_1(P23, GPIOS6, TXD11);
 921
 922#define T24 151
 923SIG_EXPR_LIST_DECL_SESG(T24, RXD11, UART11, SIG_DESC_SET(SCU430, 23));
 924PIN_DECL_1(T24, GPIOS7, RXD11);
 925
 926FUNC_GROUP_DECL(UART11, P23, T24);
 927
 928#define AD20 152
 929SIG_EXPR_LIST_DECL_SESG(AD20, GPIT0, GPIT0, SIG_DESC_SET(SCU430, 24));
 930SIG_EXPR_LIST_DECL_SESG(AD20, ADC0, ADC0);
 931PIN_DECL_(AD20, SIG_EXPR_LIST_PTR(AD20, GPIT0), SIG_EXPR_LIST_PTR(AD20, ADC0));
 932FUNC_GROUP_DECL(GPIT0, AD20);
 933FUNC_GROUP_DECL(ADC0, AD20);
 934
 935#define AC18 153
 936SIG_EXPR_LIST_DECL_SESG(AC18, GPIT1, GPIT1, SIG_DESC_SET(SCU430, 25));
 937SIG_EXPR_LIST_DECL_SESG(AC18, ADC1, ADC1);
 938PIN_DECL_(AC18, SIG_EXPR_LIST_PTR(AC18, GPIT1), SIG_EXPR_LIST_PTR(AC18, ADC1));
 939FUNC_GROUP_DECL(GPIT1, AC18);
 940FUNC_GROUP_DECL(ADC1, AC18);
 941
 942#define AE19 154
 943SIG_EXPR_LIST_DECL_SESG(AE19, GPIT2, GPIT2, SIG_DESC_SET(SCU430, 26));
 944SIG_EXPR_LIST_DECL_SESG(AE19, ADC2, ADC2);
 945PIN_DECL_(AE19, SIG_EXPR_LIST_PTR(AE19, GPIT2), SIG_EXPR_LIST_PTR(AE19, ADC2));
 946FUNC_GROUP_DECL(GPIT2, AE19);
 947FUNC_GROUP_DECL(ADC2, AE19);
 948
 949#define AD19 155
 950SIG_EXPR_LIST_DECL_SESG(AD19, GPIT3, GPIT3, SIG_DESC_SET(SCU430, 27));
 951SIG_EXPR_LIST_DECL_SESG(AD19, ADC3, ADC3);
 952PIN_DECL_(AD19, SIG_EXPR_LIST_PTR(AD19, GPIT3), SIG_EXPR_LIST_PTR(AD19, ADC3));
 953FUNC_GROUP_DECL(GPIT3, AD19);
 954FUNC_GROUP_DECL(ADC3, AD19);
 955
 956#define AC19 156
 957SIG_EXPR_LIST_DECL_SESG(AC19, GPIT4, GPIT4, SIG_DESC_SET(SCU430, 28));
 958SIG_EXPR_LIST_DECL_SESG(AC19, ADC4, ADC4);
 959PIN_DECL_(AC19, SIG_EXPR_LIST_PTR(AC19, GPIT4), SIG_EXPR_LIST_PTR(AC19, ADC4));
 960FUNC_GROUP_DECL(GPIT4, AC19);
 961FUNC_GROUP_DECL(ADC4, AC19);
 962
 963#define AB19 157
 964SIG_EXPR_LIST_DECL_SESG(AB19, GPIT5, GPIT5, SIG_DESC_SET(SCU430, 29));
 965SIG_EXPR_LIST_DECL_SESG(AB19, ADC5, ADC5);
 966PIN_DECL_(AB19, SIG_EXPR_LIST_PTR(AB19, GPIT5), SIG_EXPR_LIST_PTR(AB19, ADC5));
 967FUNC_GROUP_DECL(GPIT5, AB19);
 968FUNC_GROUP_DECL(ADC5, AB19);
 969
 970#define AB18 158
 971SIG_EXPR_LIST_DECL_SESG(AB18, GPIT6, GPIT6, SIG_DESC_SET(SCU430, 30));
 972SIG_EXPR_LIST_DECL_SESG(AB18, ADC6, ADC6);
 973PIN_DECL_(AB18, SIG_EXPR_LIST_PTR(AB18, GPIT6), SIG_EXPR_LIST_PTR(AB18, ADC6));
 974FUNC_GROUP_DECL(GPIT6, AB18);
 975FUNC_GROUP_DECL(ADC6, AB18);
 976
 977#define AE18 159
 978SIG_EXPR_LIST_DECL_SESG(AE18, GPIT7, GPIT7, SIG_DESC_SET(SCU430, 31));
 979SIG_EXPR_LIST_DECL_SESG(AE18, ADC7, ADC7);
 980PIN_DECL_(AE18, SIG_EXPR_LIST_PTR(AE18, GPIT7), SIG_EXPR_LIST_PTR(AE18, ADC7));
 981FUNC_GROUP_DECL(GPIT7, AE18);
 982FUNC_GROUP_DECL(ADC7, AE18);
 983
 984#define AB16 160
 985SIG_EXPR_LIST_DECL_SEMG(AB16, SALT9, SALT9G1, SALT9, SIG_DESC_SET(SCU434, 0),
 986                        SIG_DESC_CLEAR(SCU694, 16));
 987SIG_EXPR_LIST_DECL_SESG(AB16, GPIU0, GPIU0, SIG_DESC_SET(SCU434, 0),
 988                        SIG_DESC_SET(SCU694, 16));
 989SIG_EXPR_LIST_DECL_SESG(AB16, ADC8, ADC8);
 990PIN_DECL_(AB16, SIG_EXPR_LIST_PTR(AB16, SALT9), SIG_EXPR_LIST_PTR(AB16, GPIU0),
 991          SIG_EXPR_LIST_PTR(AB16, ADC8));
 992GROUP_DECL(SALT9G1, AB16);
 993FUNC_DECL_2(SALT9, SALT9G0, SALT9G1);
 994FUNC_GROUP_DECL(GPIU0, AB16);
 995FUNC_GROUP_DECL(ADC8, AB16);
 996
 997#define AA17 161
 998SIG_EXPR_LIST_DECL_SEMG(AA17, SALT10, SALT10G1, SALT10, SIG_DESC_SET(SCU434, 1),
 999                        SIG_DESC_CLEAR(SCU694, 17));
1000SIG_EXPR_LIST_DECL_SESG(AA17, GPIU1, GPIU1, SIG_DESC_SET(SCU434, 1),

1001                        SIG_DESC_SET(SCU694, 17));
1002SIG_EXPR_LIST_DECL_SESG(AA17, ADC9, ADC9);
1003PIN_DECL_(AA17, SIG_EXPR_LIST_PTR(AA17, SALT10), SIG_EXPR_LIST_PTR(AA17, GPIU1),
1004          SIG_EXPR_LIST_PTR(AA17, ADC9));
1005GROUP_DECL(SALT10G1, AA17);
1006FUNC_DECL_2(SALT10, SALT10G0, SALT10G1);
1007FUNC_GROUP_DECL(GPIU1, AA17);
1008FUNC_GROUP_DECL(ADC9, AA17);
1009
1010#define AB17 162
1011SIG_EXPR_LIST_DECL_SEMG(AB17, SALT11, SALT11G1, SALT11, SIG_DESC_SET(SCU434, 2),
1012                        SIG_DESC_CLEAR(SCU694, 18));
1013SIG_EXPR_LIST_DECL_SESG(AB17, GPIU2, GPIU2, SIG_DESC_SET(SCU434, 2),
1014                        SIG_DESC_SET(SCU694, 18));
1015SIG_EXPR_LIST_DECL_SESG(AB17, ADC10, ADC10);
1016PIN_DECL_(AB17, SIG_EXPR_LIST_PTR(AB17, SALT11), SIG_EXPR_LIST_PTR(AB17, GPIU2),
1017          SIG_EXPR_LIST_PTR(AB17, ADC10));
1018GROUP_DECL(SALT11G1, AB17);
1019FUNC_DECL_2(SALT11, SALT11G0, SALT11G1);
1020FUNC_GROUP_DECL(GPIU2, AB17);
1021FUNC_GROUP_DECL(ADC10, AB17);
1022
1023#define AE16 163
1024SIG_EXPR_LIST_DECL_SEMG(AE16, SALT12, SALT12G1, SALT12, SIG_DESC_SET(SCU434, 3),
1025                        SIG_DESC_CLEAR(SCU694, 19));
1026SIG_EXPR_LIST_DECL_SESG(AE16, GPIU3, GPIU3, SIG_DESC_SET(SCU434, 3),
1027                        SIG_DESC_SET(SCU694, 19));
1028SIG_EXPR_LIST_DECL_SESG(AE16, ADC11, ADC11);
1029PIN_DECL_(AE16, SIG_EXPR_LIST_PTR(AE16, SALT12), SIG_EXPR_LIST_PTR(AE16, GPIU3),
1030          SIG_EXPR_LIST_PTR(AE16, ADC11));
1031GROUP_DECL(SALT12G1, AE16);
1032FUNC_DECL_2(SALT12, SALT12G0, SALT12G1);
1033FUNC_GROUP_DECL(GPIU3, AE16);
1034FUNC_GROUP_DECL(ADC11, AE16);
1035
1036#define AC16 164
1037SIG_EXPR_LIST_DECL_SEMG(AC16, SALT13, SALT13G1, SALT13, SIG_DESC_SET(SCU434, 4),
1038                        SIG_DESC_CLEAR(SCU694, 20));
1039SIG_EXPR_LIST_DECL_SESG(AC16, GPIU4, GPIU4, SIG_DESC_SET(SCU434, 4),
1040                        SIG_DESC_SET(SCU694, 20));
1041SIG_EXPR_LIST_DECL_SESG(AC16, ADC12, ADC12);
1042PIN_DECL_(AC16, SIG_EXPR_LIST_PTR(AC16, SALT13), SIG_EXPR_LIST_PTR(AC16, GPIU4),
1043          SIG_EXPR_LIST_PTR(AC16, ADC12));
1044GROUP_DECL(SALT13G1, AC16);
1045FUNC_DECL_2(SALT13, SALT13G0, SALT13G1);
1046FUNC_GROUP_DECL(GPIU4, AC16);
1047FUNC_GROUP_DECL(ADC12, AC16);
1048
1049#define AA16 165
1050SIG_EXPR_LIST_DECL_SEMG(AA16, SALT14, SALT14G1, SALT14, SIG_DESC_SET(SCU434, 5),
1051                        SIG_DESC_CLEAR(SCU694, 21));
1052SIG_EXPR_LIST_DECL_SESG(AA16, GPIU5, GPIU5, SIG_DESC_SET(SCU434, 5),
1053                        SIG_DESC_SET(SCU694, 21));
1054SIG_EXPR_LIST_DECL_SESG(AA16, ADC13, ADC13);
1055PIN_DECL_(AA16, SIG_EXPR_LIST_PTR(AA16, SALT14), SIG_EXPR_LIST_PTR(AA16, GPIU5),
1056          SIG_EXPR_LIST_PTR(AA16, ADC13));
1057GROUP_DECL(SALT14G1, AA16);
1058FUNC_DECL_2(SALT14, SALT14G0, SALT14G1);
1059FUNC_GROUP_DECL(GPIU5, AA16);
1060FUNC_GROUP_DECL(ADC13, AA16);
1061
1062#define AD16 166
1063SIG_EXPR_LIST_DECL_SEMG(AD16, SALT15, SALT15G1, SALT15, SIG_DESC_SET(SCU434, 6),
1064                        SIG_DESC_CLEAR(SCU694, 22));
1065SIG_EXPR_LIST_DECL_SESG(AD16, GPIU6, GPIU6, SIG_DESC_SET(SCU434, 6),
1066                        SIG_DESC_SET(SCU694, 22));
1067SIG_EXPR_LIST_DECL_SESG(AD16, ADC14, ADC14);
1068PIN_DECL_(AD16, SIG_EXPR_LIST_PTR(AD16, SALT15), SIG_EXPR_LIST_PTR(AD16, GPIU6),
1069          SIG_EXPR_LIST_PTR(AD16, ADC14));
1070GROUP_DECL(SALT15G1, AD16);
1071FUNC_DECL_2(SALT15, SALT15G0, SALT15G1);
1072FUNC_GROUP_DECL(GPIU6, AD16);
1073FUNC_GROUP_DECL(ADC14, AD16);
1074
1075#define AC17 167
1076SIG_EXPR_LIST_DECL_SEMG(AC17, SALT16, SALT16G1, SALT16, SIG_DESC_SET(SCU434, 7),
1077                        SIG_DESC_CLEAR(SCU694, 23));
1078SIG_EXPR_LIST_DECL_SESG(AC17, GPIU7, GPIU7, SIG_DESC_SET(SCU434, 7),
1079                        SIG_DESC_SET(SCU694, 23));
1080SIG_EXPR_LIST_DECL_SESG(AC17, ADC15, ADC15);
1081PIN_DECL_(AC17, SIG_EXPR_LIST_PTR(AC17, SALT16), SIG_EXPR_LIST_PTR(AC17, GPIU7),
1082          SIG_EXPR_LIST_PTR(AC17, ADC15));
1083GROUP_DECL(SALT16G1, AC17);
1084FUNC_DECL_2(SALT16, SALT16G0, SALT16G1);
1085FUNC_GROUP_DECL(GPIU7, AC17);
1086FUNC_GROUP_DECL(ADC15, AC17);
1087
1088#define AB15 168
1089SSSF_PIN_DECL(AB15, GPIOV0, SIOS3, SIG_DESC_SET(SCU434, 8));
1090
1091#define AF14 169
1092SSSF_PIN_DECL(AF14, GPIOV1, SIOS5, SIG_DESC_SET(SCU434, 9));
1093
1094#define AD14 170
1095SSSF_PIN_DECL(AD14, GPIOV2, SIOPWREQ, SIG_DESC_SET(SCU434, 10));
1096
1097#define AC15 171
1098SSSF_PIN_DECL(AC15, GPIOV3, SIOONCTRL, SIG_DESC_SET(SCU434, 11));
1099
1100#define AE15 172
1101SSSF_PIN_DECL(AE15, GPIOV4, SIOPWRGD, SIG_DESC_SET(SCU434, 12));
1102
1103#define AE14 173
1104SIG_EXPR_LIST_DECL_SESG(AE14, LPCPD, LPCPD, SIG_DESC_SET(SCU434, 13));
1105SIG_EXPR_LIST_DECL_SESG(AE14, LHPD, LHPD, SIG_DESC_SET(SCU4D4, 13));
1106PIN_DECL_2(AE14, GPIOV5, LPCPD, LHPD);
1107FUNC_GROUP_DECL(LPCPD, AE14);
1108FUNC_GROUP_DECL(LHPD, AE14);
1109
1110#define AD15 174
1111SSSF_PIN_DECL(AD15, GPIOV6, LPCPME, SIG_DESC_SET(SCU434, 14));
1112
1113#define AF15 175
1114SSSF_PIN_DECL(AF15, GPIOV7, LPCSMI, SIG_DESC_SET(SCU434, 15));
1115
1116#define AB7 176
1117SIG_EXPR_LIST_DECL_SESG(AB7, LAD0, LPC, SIG_DESC_SET(SCU434, 16),
1118                          SIG_DESC_SET(SCU510, 6));
1119SIG_EXPR_LIST_DECL_SESG(AB7, ESPID0, ESPI, SIG_DESC_SET(SCU434, 16));
1120PIN_DECL_2(AB7, GPIOW0, LAD0, ESPID0);
1121
1122#define AB8 177
1123SIG_EXPR_LIST_DECL_SESG(AB8, LAD1, LPC, SIG_DESC_SET(SCU434, 17),
1124                          SIG_DESC_SET(SCU510, 6));
1125SIG_EXPR_LIST_DECL_SESG(AB8, ESPID1, ESPI, SIG_DESC_SET(SCU434, 17));
1126PIN_DECL_2(AB8, GPIOW1, LAD1, ESPID1);
1127
1128#define AC8 178
1129SIG_EXPR_LIST_DECL_SESG(AC8, LAD2, LPC, SIG_DESC_SET(SCU434, 18),
1130                          SIG_DESC_SET(SCU510, 6));
1131SIG_EXPR_LIST_DECL_SESG(AC8, ESPID2, ESPI, SIG_DESC_SET(SCU434, 18));
1132PIN_DECL_2(AC8, GPIOW2, LAD2, ESPID2);
1133
1134#define AC7 179
1135SIG_EXPR_LIST_DECL_SESG(AC7, LAD3, LPC, SIG_DESC_SET(SCU434, 19),
1136                          SIG_DESC_SET(SCU510, 6));
1137SIG_EXPR_LIST_DECL_SESG(AC7, ESPID3, ESPI, SIG_DESC_SET(SCU434, 19));
1138PIN_DECL_2(AC7, GPIOW3, LAD3, ESPID3);
1139
1140#define AE7 180
1141SIG_EXPR_LIST_DECL_SESG(AE7, LCLK, LPC, SIG_DESC_SET(SCU434, 20),
1142                          SIG_DESC_SET(SCU510, 6));
1143SIG_EXPR_LIST_DECL_SESG(AE7, ESPICK, ESPI, SIG_DESC_SET(SCU434, 20));
1144PIN_DECL_2(AE7, GPIOW4, LCLK, ESPICK);
1145
1146#define AF7 181
1147SIG_EXPR_LIST_DECL_SESG(AF7, LFRAME, LPC, SIG_DESC_SET(SCU434, 21),
1148                          SIG_DESC_SET(SCU510, 6));
1149SIG_EXPR_LIST_DECL_SESG(AF7, ESPICS, ESPI, SIG_DESC_SET(SCU434, 21));
1150PIN_DECL_2(AF7, GPIOW5, LFRAME, ESPICS);
1151
1152#define AD7 182
1153SIG_EXPR_LIST_DECL_SESG(AD7, LSIRQ, LSIRQ, SIG_DESC_SET(SCU434, 22),
1154                          SIG_DESC_SET(SCU510, 6));
1155SIG_EXPR_LIST_DECL_SESG(AD7, ESPIALT, ESPIALT, SIG_DESC_SET(SCU434, 22));
1156PIN_DECL_2(AD7, GPIOW6, LSIRQ, ESPIALT);
1157FUNC_GROUP_DECL(LSIRQ, AD7);
1158FUNC_GROUP_DECL(ESPIALT, AD7);
1159
1160#define AD8 183
1161SIG_EXPR_LIST_DECL_SESG(AD8, LPCRST, LPC, SIG_DESC_SET(SCU434, 23),
1162                          SIG_DESC_SET(SCU510, 6));
1163SIG_EXPR_LIST_DECL_SESG(AD8, ESPIRST, ESPI, SIG_DESC_SET(SCU434, 23));
1164PIN_DECL_2(AD8, GPIOW7, LPCRST, ESPIRST);
1165
1166FUNC_GROUP_DECL(LPC, AB7, AB8, AC8, AC7, AE7, AF7, AD8);
1167FUNC_GROUP_DECL(ESPI, AB7, AB8, AC8, AC7, AE7, AF7, AD8);
1168
1169#define AE8 184
1170SIG_EXPR_LIST_DECL_SEMG(AE8, SPI2CS0, SPI2, SPI2, SIG_DESC_SET(SCU434, 24));
1171PIN_DECL_1(AE8, GPIOX0, SPI2CS0);
1172
1173#define AA9 185
1174SSSF_PIN_DECL(AA9, GPIOX1, SPI2CS1, SIG_DESC_SET(SCU434, 25));
1175
1176#define AC9 186
1177SSSF_PIN_DECL(AC9, GPIOX2, SPI2CS2, SIG_DESC_SET(SCU434, 26));
1178
1179#define AF8 187
1180SIG_EXPR_LIST_DECL_SEMG(AF8, SPI2CK, SPI2, SPI2, SIG_DESC_SET(SCU434, 27));
1181PIN_DECL_1(AF8, GPIOX3, SPI2CK);
1182
1183#define AB9 188
1184SIG_EXPR_LIST_DECL_SEMG(AB9, SPI2MOSI, SPI2, SPI2, SIG_DESC_SET(SCU434, 28));
1185PIN_DECL_1(AB9, GPIOX4, SPI2MOSI);
1186
1187#define AD9 189
1188SIG_EXPR_LIST_DECL_SEMG(AD9, SPI2MISO, SPI2, SPI2, SIG_DESC_SET(SCU434, 29));
1189PIN_DECL_1(AD9, GPIOX5, SPI2MISO);
1190
1191GROUP_DECL(SPI2, AE8, AF8, AB9, AD9);
1192
1193#define AF9 190
1194SIG_EXPR_LIST_DECL_SEMG(AF9, SPI2DQ2, QSPI2, SPI2, SIG_DESC_SET(SCU434, 30));
1195SIG_EXPR_LIST_DECL_SEMG(AF9, TXD12, UART12G1, UART12, SIG_DESC_SET(SCU4D4, 30));
1196PIN_DECL_2(AF9, GPIOX6, SPI2DQ2, TXD12);
1197
1198#define AB10 191
1199SIG_EXPR_LIST_DECL_SEMG(AB10, SPI2DQ3, QSPI2, SPI2, SIG_DESC_SET(SCU434, 31));
1200SIG_EXPR_LIST_DECL_SEMG(AB10, RXD12, UART12G1, UART12,
1201                        SIG_DESC_SET(SCU4D4, 31));
1202PIN_DECL_2(AB10, GPIOX7, SPI2DQ3, RXD12);
1203
1204GROUP_DECL(QSPI2, AE8, AF8, AB9, AD9, AF9, AB10);
1205FUNC_DECL_2(SPI2, SPI2, QSPI2);
1206
1207GROUP_DECL(UART12G1, AF9, AB10);
1208FUNC_DECL_2(UART12, UART12G0, UART12G1);
1209
1210#define AF11 192
1211SIG_EXPR_LIST_DECL_SESG(AF11, SALT5, SALT5, SIG_DESC_SET(SCU438, 0));
1212SIG_EXPR_LIST_DECL_SESG(AF11, WDTRST1, WDTRST1, SIG_DESC_SET(SCU4D8, 0));
1213PIN_DECL_2(AF11, GPIOY0, SALT5, WDTRST1);
1214FUNC_GROUP_DECL(SALT5, AF11);
1215FUNC_GROUP_DECL(WDTRST1, AF11);
1216
1217#define AD12 193
1218SIG_EXPR_LIST_DECL_SESG(AD12, SALT6, SALT6, SIG_DESC_SET(SCU438, 1));
1219SIG_EXPR_LIST_DECL_SESG(AD12, WDTRST2, WDTRST2, SIG_DESC_SET(SCU4D8, 1));
1220PIN_DECL_2(AD12, GPIOY1, SALT6, WDTRST2);
1221FUNC_GROUP_DECL(SALT6, AD12);
1222FUNC_GROUP_DECL(WDTRST2, AD12);
1223
1224#define AE11 194
1225SIG_EXPR_LIST_DECL_SESG(AE11, SALT7, SALT7, SIG_DESC_SET(SCU438, 2));
1226SIG_EXPR_LIST_DECL_SESG(AE11, WDTRST3, WDTRST3, SIG_DESC_SET(SCU4D8, 2));
1227PIN_DECL_2(AE11, GPIOY2, SALT7, WDTRST3);
1228FUNC_GROUP_DECL(SALT7, AE11);
1229FUNC_GROUP_DECL(WDTRST3, AE11);
1230
1231#define AA12 195
1232SIG_EXPR_LIST_DECL_SESG(AA12, SALT8, SALT8, SIG_DESC_SET(SCU438, 3));
1233SIG_EXPR_LIST_DECL_SESG(AA12, WDTRST4, WDTRST4, SIG_DESC_SET(SCU4D8, 3));
1234PIN_DECL_2(AA12, GPIOY3, SALT8, WDTRST4);
1235FUNC_GROUP_DECL(SALT8, AA12);
1236FUNC_GROUP_DECL(WDTRST4, AA12);
1237
1238#define AE12 196
1239SIG_EXPR_LIST_DECL_SEMG(AE12, FWSPIDQ2, FWQSPID, FWSPID,
1240                        SIG_DESC_SET(SCU438, 4));
1241SIG_EXPR_LIST_DECL_SESG(AE12, GPIOY4, GPIOY4);
1242PIN_DECL_(AE12, SIG_EXPR_LIST_PTR(AE12, FWSPIDQ2),
1243          SIG_EXPR_LIST_PTR(AE12, GPIOY4));
1244
1245#define AF12 197
1246SIG_EXPR_LIST_DECL_SEMG(AF12, FWSPIDQ3, FWQSPID, FWSPID,
1247                        SIG_DESC_SET(SCU438, 5));
1248SIG_EXPR_LIST_DECL_SESG(AF12, GPIOY5, GPIOY5);
1249PIN_DECL_(AF12, SIG_EXPR_LIST_PTR(AF12, FWSPIDQ3),
1250          SIG_EXPR_LIST_PTR(AF12, GPIOY5));
1251
1252#define AC12 198
1253SSSF_PIN_DECL(AC12, GPIOY6, FWSPIABR, SIG_DESC_SET(SCU438, 6));
1254
1255#define AB12 199
1256SSSF_PIN_DECL(AB12, GPIOY7, FWSPIWP, SIG_DESC_SET(SCU438, 7));
1257
1258#define AC10 200
1259SSSF_PIN_DECL(AC10, GPIOZ0, SPI1CS1, SIG_DESC_SET(SCU438, 8));
1260
1261#define AD10 201
1262SSSF_PIN_DECL(AD10, GPIOZ1, SPI1ABR, SIG_DESC_SET(SCU438, 9));
1263
1264#define AE10 202
1265SSSF_PIN_DECL(AE10, GPIOZ2, SPI1WP, SIG_DESC_SET(SCU438, 10));
1266
1267#define AB11 203
1268SIG_EXPR_LIST_DECL_SEMG(AB11, SPI1CK, SPI1, SPI1, SIG_DESC_SET(SCU438, 11));
1269PIN_DECL_1(AB11, GPIOZ3, SPI1CK);
1270
1271#define AC11 204
1272SIG_EXPR_LIST_DECL_SEMG(AC11, SPI1MOSI, SPI1, SPI1, SIG_DESC_SET(SCU438, 12));
1273PIN_DECL_1(AC11, GPIOZ4, SPI1MOSI);
1274
1275#define AA11 205
1276SIG_EXPR_LIST_DECL_SEMG(AA11, SPI1MISO, SPI1, SPI1, SIG_DESC_SET(SCU438, 13));
1277PIN_DECL_1(AA11, GPIOZ5, SPI1MISO);
1278
1279GROUP_DECL(SPI1, AB11, AC11, AA11);
1280
1281#define AD11 206
1282SIG_EXPR_LIST_DECL_SEMG(AD11, SPI1DQ2, QSPI1, SPI1, SIG_DESC_SET(SCU438, 14));
1283SIG_EXPR_LIST_DECL_SEMG(AD11, TXD13, UART13G1, UART13,
1284                        SIG_DESC_CLEAR(SCU4B8, 2), SIG_DESC_SET(SCU4D8, 14));
1285PIN_DECL_2(AD11, GPIOZ6, SPI1DQ2, TXD13);
1286
1287#define AF10 207
1288SIG_EXPR_LIST_DECL_SEMG(AF10, SPI1DQ3, QSPI1, SPI1, SIG_DESC_SET(SCU438, 15));
1289SIG_EXPR_LIST_DECL_SEMG(AF10, RXD13, UART13G1, UART13,
1290                        SIG_DESC_CLEAR(SCU4B8, 3), SIG_DESC_SET(SCU4D8, 15));
1291PIN_DECL_2(AF10, GPIOZ7, SPI1DQ3, RXD13);
1292
1293GROUP_DECL(QSPI1, AB11, AC11, AA11, AD11, AF10);
1294FUNC_DECL_2(SPI1, SPI1, QSPI1);
1295
1296GROUP_DECL(UART13G1, AD11, AF10);
1297FUNC_DECL_2(UART13, UART13G0, UART13G1);
1298
1299#define C6 208
1300SIG_EXPR_LIST_DECL_SESG(C6, RGMII1TXCK, RGMII1, SIG_DESC_SET(SCU400, 0),
1301                          SIG_DESC_SET(SCU500, 6));
1302SIG_EXPR_LIST_DECL_SESG(C6, RMII1RCLKO, RMII1, SIG_DESC_SET(SCU400, 0),
1303                          SIG_DESC_CLEAR(SCU500, 6));
1304PIN_DECL_2(C6, GPIO18A0, RGMII1TXCK, RMII1RCLKO);
1305
1306#define D6 209
1307SIG_EXPR_LIST_DECL_SESG(D6, RGMII1TXCTL, RGMII1, SIG_DESC_SET(SCU400, 1),
1308                          SIG_DESC_SET(SCU500, 6));
1309SIG_EXPR_LIST_DECL_SESG(D6, RMII1TXEN, RMII1, SIG_DESC_SET(SCU400, 1),
1310                          SIG_DESC_CLEAR(SCU500, 6));
1311PIN_DECL_2(D6, GPIO18A1, RGMII1TXCTL, RMII1TXEN);
1312
1313#define D5 210
1314SIG_EXPR_LIST_DECL_SESG(D5, RGMII1TXD0, RGMII1, SIG_DESC_SET(SCU400, 2),
1315                          SIG_DESC_SET(SCU500, 6));
1316SIG_EXPR_LIST_DECL_SESG(D5, RMII1TXD0, RMII1, SIG_DESC_SET(SCU400, 2),
1317                          SIG_DESC_CLEAR(SCU500, 6));
1318PIN_DECL_2(D5, GPIO18A2, RGMII1TXD0, RMII1TXD0);
1319
1320#define A3 211
1321SIG_EXPR_LIST_DECL_SESG(A3, RGMII1TXD1, RGMII1, SIG_DESC_SET(SCU400, 3),
1322                          SIG_DESC_SET(SCU500, 6));
1323SIG_EXPR_LIST_DECL_SESG(A3, RMII1TXD1, RMII1, SIG_DESC_SET(SCU400, 3),
1324                          SIG_DESC_CLEAR(SCU500, 6));
1325PIN_DECL_2(A3, GPIO18A3, RGMII1TXD1, RMII1TXD1);
1326
1327#define C5 212
1328SIG_EXPR_LIST_DECL_SESG(C5, RGMII1TXD2, RGMII1, SIG_DESC_SET(SCU400, 4),
1329                          SIG_DESC_SET(SCU500, 6));
1330PIN_DECL_1(C5, GPIO18A4, RGMII1TXD2);
1331
1332#define E6 213
1333SIG_EXPR_LIST_DECL_SESG(E6, RGMII1TXD3, RGMII1, SIG_DESC_SET(SCU400, 5),
1334                          SIG_DESC_SET(SCU500, 6));
1335PIN_DECL_1(E6, GPIO18A5, RGMII1TXD3);
1336
1337#define B3 214
1338SIG_EXPR_LIST_DECL_SESG(B3, RGMII1RXCK, RGMII1, SIG_DESC_SET(SCU400, 6),
1339                          SIG_DESC_SET(SCU500, 6));
1340SIG_EXPR_LIST_DECL_SESG(B3, RMII1RCLKI, RMII1, SIG_DESC_SET(SCU400, 6),
1341                          SIG_DESC_CLEAR(SCU500, 6));
1342PIN_DECL_2(B3, GPIO18A6, RGMII1RXCK, RMII1RCLKI);
1343
1344#define A2 215
1345SIG_EXPR_LIST_DECL_SESG(A2, RGMII1RXCTL, RGMII1, SIG_DESC_SET(SCU400, 7),
1346                          SIG_DESC_SET(SCU500, 6));
1347PIN_DECL_1(A2, GPIO18A7, RGMII1RXCTL);
1348
1349#define B2 216
1350SIG_EXPR_LIST_DECL_SESG(B2, RGMII1RXD0, RGMII1, SIG_DESC_SET(SCU400, 8),
1351                          SIG_DESC_SET(SCU500, 6));
1352SIG_EXPR_LIST_DECL_SESG(B2, RMII1RXD0, RMII1, SIG_DESC_SET(SCU400, 8),
1353                          SIG_DESC_CLEAR(SCU500, 6));
1354PIN_DECL_2(B2, GPIO18B0, RGMII1RXD0, RMII1RXD0);
1355
1356#define B1 217
1357SIG_EXPR_LIST_DECL_SESG(B1, RGMII1RXD1, RGMII1, SIG_DESC_SET(SCU400, 9),
1358                          SIG_DESC_SET(SCU500, 6));
1359SIG_EXPR_LIST_DECL_SESG(B1, RMII1RXD1, RMII1, SIG_DESC_SET(SCU400, 9),
1360                          SIG_DESC_CLEAR(SCU500, 6));
1361PIN_DECL_2(B1, GPIO18B1, RGMII1RXD1, RMII1RXD1);
1362
1363#define C4 218
1364SIG_EXPR_LIST_DECL_SESG(C4, RGMII1RXD2, RGMII1, SIG_DESC_SET(SCU400, 10),
1365                          SIG_DESC_SET(SCU500, 6));
1366SIG_EXPR_LIST_DECL_SESG(C4, RMII1CRSDV, RMII1, SIG_DESC_SET(SCU400, 10),
1367                          SIG_DESC_CLEAR(SCU500, 6));
1368PIN_DECL_2(C4, GPIO18B2, RGMII1RXD2, RMII1CRSDV);
1369
1370#define E5 219
1371SIG_EXPR_LIST_DECL_SESG(E5, RGMII1RXD3, RGMII1, SIG_DESC_SET(SCU400, 11),
1372                          SIG_DESC_SET(SCU500, 6));
1373SIG_EXPR_LIST_DECL_SESG(E5, RMII1RXER, RMII1, SIG_DESC_SET(SCU400, 11),
1374                          SIG_DESC_CLEAR(SCU500, 6));
1375PIN_DECL_2(E5, GPIO18B3, RGMII1RXD3, RMII1RXER);
1376
1377FUNC_GROUP_DECL(RGMII1, C6, D6, D5, A3, C5, E6, B3, A2, B2, B1, C4, E5);
1378FUNC_GROUP_DECL(RMII1, C6, D6, D5, A3, B3, B2, B1, C4, E5);
1379
1380#define D4 220
1381SIG_EXPR_LIST_DECL_SESG(D4, RGMII2TXCK, RGMII2, SIG_DESC_SET(SCU400, 12),
1382                          SIG_DESC_SET(SCU500, 7));
1383SIG_EXPR_LIST_DECL_SESG(D4, RMII2RCLKO, RMII2, SIG_DESC_SET(SCU400, 12),
1384                          SIG_DESC_CLEAR(SCU500, 7));
1385PIN_DECL_2(D4, GPIO18B4, RGMII2TXCK, RMII2RCLKO);
1386
1387#define C2 221
1388SIG_EXPR_LIST_DECL_SESG(C2, RGMII2TXCTL, RGMII2, SIG_DESC_SET(SCU400, 13),
1389                          SIG_DESC_SET(SCU500, 7));
1390SIG_EXPR_LIST_DECL_SESG(C2, RMII2TXEN, RMII2, SIG_DESC_SET(SCU400, 13),
1391                          SIG_DESC_CLEAR(SCU500, 7));
1392PIN_DECL_2(C2, GPIO18B5, RGMII2TXCTL, RMII2TXEN);
1393
1394#define C1 222
1395SIG_EXPR_LIST_DECL_SESG(C1, RGMII2TXD0, RGMII2, SIG_DESC_SET(SCU400, 14),
1396                          SIG_DESC_SET(SCU500, 7));
1397SIG_EXPR_LIST_DECL_SESG(C1, RMII2TXD0, RMII2, SIG_DESC_SET(SCU400, 14),
1398                          SIG_DESC_CLEAR(SCU500, 7));
1399PIN_DECL_2(C1, GPIO18B6, RGMII2TXD0, RMII2TXD0);
1400
1401#define D3 223
1402SIG_EXPR_LIST_DECL_SESG(D3, RGMII2TXD1, RGMII2, SIG_DESC_SET(SCU400, 15),
1403                          SIG_DESC_SET(SCU500, 7));
1404SIG_EXPR_LIST_DECL_SESG(D3, RMII2TXD1, RMII2, SIG_DESC_SET(SCU400, 15),
1405                          SIG_DESC_CLEAR(SCU500, 7));
1406PIN_DECL_2(D3, GPIO18B7, RGMII2TXD1, RMII2TXD1);
1407
1408#define E4 224
1409SIG_EXPR_LIST_DECL_SESG(E4, RGMII2TXD2, RGMII2, SIG_DESC_SET(SCU400, 16),
1410                          SIG_DESC_SET(SCU500, 7));
1411PIN_DECL_1(E4, GPIO18C0, RGMII2TXD2);
1412
1413#define F5 225
1414SIG_EXPR_LIST_DECL_SESG(F5, RGMII2TXD3, RGMII2, SIG_DESC_SET(SCU400, 17),
1415                          SIG_DESC_SET(SCU500, 7));
1416PIN_DECL_1(F5, GPIO18C1, RGMII2TXD3);
1417
1418#define D2 226
1419SIG_EXPR_LIST_DECL_SESG(D2, RGMII2RXCK, RGMII2, SIG_DESC_SET(SCU400, 18),
1420                          SIG_DESC_SET(SCU500, 7));
1421SIG_EXPR_LIST_DECL_SESG(D2, RMII2RCLKI, RMII2, SIG_DESC_SET(SCU400, 18),
1422                          SIG_DESC_CLEAR(SCU500, 7));
1423PIN_DECL_2(D2, GPIO18C2, RGMII2RXCK, RMII2RCLKI);
1424
1425#define E3 227
1426SIG_EXPR_LIST_DECL_SESG(E3, RGMII2RXCTL, RGMII2, SIG_DESC_SET(SCU400, 19),
1427                          SIG_DESC_SET(SCU500, 7));
1428PIN_DECL_1(E3, GPIO18C3, RGMII2RXCTL);
1429
1430#define D1 228
1431SIG_EXPR_LIST_DECL_SESG(D1, RGMII2RXD0, RGMII2, SIG_DESC_SET(SCU400, 20),
1432                          SIG_DESC_SET(SCU500, 7));
1433SIG_EXPR_LIST_DECL_SESG(D1, RMII2RXD0, RMII2, SIG_DESC_SET(SCU400, 20),
1434                          SIG_DESC_CLEAR(SCU500, 7));
1435PIN_DECL_2(D1, GPIO18C4, RGMII2RXD0, RMII2RXD0);
1436
1437#define F4 229
1438SIG_EXPR_LIST_DECL_SESG(F4, RGMII2RXD1, RGMII2, SIG_DESC_SET(SCU400, 21),
1439                          SIG_DESC_SET(SCU500, 7));
1440SIG_EXPR_LIST_DECL_SESG(F4, RMII2RXD1, RMII2, SIG_DESC_SET(SCU400, 21),
1441                          SIG_DESC_CLEAR(SCU500, 7));
1442PIN_DECL_2(F4, GPIO18C5, RGMII2RXD1, RMII2RXD1);
1443
1444#define E2 230
1445SIG_EXPR_LIST_DECL_SESG(E2, RGMII2RXD2, RGMII2, SIG_DESC_SET(SCU400, 22),
1446                          SIG_DESC_SET(SCU500, 7));
1447SIG_EXPR_LIST_DECL_SESG(E2, RMII2CRSDV, RMII2, SIG_DESC_SET(SCU400, 22),
1448                          SIG_DESC_CLEAR(SCU500, 7));
1449PIN_DECL_2(E2, GPIO18C6, RGMII2RXD2, RMII2CRSDV);
1450
1451#define E1 231
1452SIG_EXPR_LIST_DECL_SESG(E1, RGMII2RXD3, RGMII2, SIG_DESC_SET(SCU400, 23),
1453                          SIG_DESC_SET(SCU500, 7));
1454SIG_EXPR_LIST_DECL_SESG(E1, RMII2RXER, RMII2, SIG_DESC_SET(SCU400, 23),
1455                          SIG_DESC_CLEAR(SCU500, 7));
1456PIN_DECL_2(E1, GPIO18C7, RGMII2RXD3, RMII2RXER);
1457
1458FUNC_GROUP_DECL(RGMII2, D4, C2, C1, D3, E4, F5, D2, E3, D1, F4, E2, E1);
1459FUNC_GROUP_DECL(RMII2, D4, C2, C1, D3, D2, D1, F4, E2, E1);
1460
1461#define AB4 232
1462SIG_EXPR_LIST_DECL_SEMG(AB4, EMMCCLK, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 24));
1463PIN_DECL_1(AB4, GPIO18D0, EMMCCLK);
1464
1465#define AA4 233
1466SIG_EXPR_LIST_DECL_SEMG(AA4, EMMCCMD, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 25));
1467PIN_DECL_1(AA4, GPIO18D1, EMMCCMD);
1468
1469#define AC4 234
1470SIG_EXPR_LIST_DECL_SEMG(AC4, EMMCDAT0, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 26));
1471PIN_DECL_1(AC4, GPIO18D2, EMMCDAT0);
1472
1473#define AA5 235
1474SIG_EXPR_LIST_DECL_SEMG(AA5, EMMCDAT1, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 27));
1475PIN_DECL_1(AA5, GPIO18D3, EMMCDAT1);
1476
1477#define Y5 236
1478SIG_EXPR_LIST_DECL_SEMG(Y5, EMMCDAT2, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 28));
1479PIN_DECL_1(Y5, GPIO18D4, EMMCDAT2);
1480
1481#define AB5 237
1482SIG_EXPR_LIST_DECL_SEMG(AB5, EMMCDAT3, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 29));
1483PIN_DECL_1(AB5, GPIO18D5, EMMCDAT3);
1484
1485#define AB6 238
1486SIG_EXPR_LIST_DECL_SEMG(AB6, EMMCCD, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 30));
1487PIN_DECL_1(AB6, GPIO18D6, EMMCCD);
1488
1489#define AC5 239
1490SIG_EXPR_LIST_DECL_SEMG(AC5, EMMCWP, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 31));
1491PIN_DECL_1(AC5, GPIO18D7, EMMCWP);
1492
1493GROUP_DECL(EMMCG1, AB4, AA4, AC4, AB6, AC5);
1494GROUP_DECL(EMMCG4, AB4, AA4, AC4, AA5, Y5, AB5, AB6, AC5);
1495
1496#define Y1 240
1497SIG_EXPR_LIST_DECL_SEMG(Y1, FWSPIDCS, FWSPID, FWSPID, SIG_DESC_SET(SCU500, 3));
1498SIG_EXPR_LIST_DECL_SESG(Y1, VBCS, VB, SIG_DESC_SET(SCU500, 5));
1499SIG_EXPR_LIST_DECL_SEMG(Y1, EMMCDAT4, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 0));
1500PIN_DECL_3(Y1, GPIO18E0, FWSPIDCS, VBCS, EMMCDAT4);
1501
1502#define Y2 241
1503SIG_EXPR_LIST_DECL_SEMG(Y2, FWSPIDCK, FWSPID, FWSPID, SIG_DESC_SET(SCU500, 3));
1504SIG_EXPR_LIST_DECL_SESG(Y2, VBCK, VB, SIG_DESC_SET(SCU500, 5));
1505SIG_EXPR_LIST_DECL_SEMG(Y2, EMMCDAT5, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 1));
1506PIN_DECL_3(Y2, GPIO18E1, FWSPIDCK, VBCK, EMMCDAT5);
1507
1508#define Y3 242
1509SIG_EXPR_LIST_DECL_SEMG(Y3, FWSPIDMOSI, FWSPID, FWSPID,
1510                        SIG_DESC_SET(SCU500, 3));
1511SIG_EXPR_LIST_DECL_SESG(Y3, VBMOSI, VB, SIG_DESC_SET(SCU500, 5));
1512SIG_EXPR_LIST_DECL_SEMG(Y3, EMMCDAT6, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 2));
1513PIN_DECL_3(Y3, GPIO18E2, FWSPIDMOSI, VBMOSI, EMMCDAT6);
1514
1515#define Y4 243
1516SIG_EXPR_LIST_DECL_SEMG(Y4, FWSPIDMISO, FWSPID, FWSPID,
1517                        SIG_DESC_SET(SCU500, 3));
1518SIG_EXPR_LIST_DECL_SESG(Y4, VBMISO, VB, SIG_DESC_SET(SCU500, 5));
1519SIG_EXPR_LIST_DECL_SEMG(Y4, EMMCDAT7, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 3));
1520PIN_DECL_3(Y4, GPIO18E3, FWSPIDMISO, VBMISO, EMMCDAT7);
1521
1522GROUP_DECL(FWSPID, Y1, Y2, Y3, Y4);
1523GROUP_DECL(FWQSPID, Y1, Y2, Y3, Y4, AE12, AF12);
1524GROUP_DECL(EMMCG8, AB4, AA4, AC4, AA5, Y5, AB5, AB6, AC5, Y1, Y2, Y3, Y4);
1525FUNC_DECL_2(FWSPID, FWSPID, FWQSPID);
1526FUNC_GROUP_DECL(VB, Y1, Y2, Y3, Y4);
1527FUNC_DECL_3(EMMC, EMMCG1, EMMCG4, EMMCG8);
1528/*
1529 * FIXME: Confirm bits and priorities are the right way around for the
1530 * following 4 pins
1531 */
1532#define AF25 244
1533SIG_EXPR_LIST_DECL_SEMG(AF25, I3C3SCL, I3C3, I3C3, SIG_DESC_SET(SCU438, 20));
1534SIG_EXPR_LIST_DECL_SESG(AF25, FSI1CLK, FSI1, SIG_DESC_SET(SCU4D8, 20));
1535PIN_DECL_(AF25, SIG_EXPR_LIST_PTR(AF25, I3C3SCL),
1536          SIG_EXPR_LIST_PTR(AF25, FSI1CLK));
1537
1538#define AE26 245
1539SIG_EXPR_LIST_DECL_SEMG(AE26, I3C3SDA, I3C3, I3C3, SIG_DESC_SET(SCU438, 21));
1540SIG_EXPR_LIST_DECL_SESG(AE26, FSI1DATA, FSI1, SIG_DESC_SET(SCU4D8, 21));
1541PIN_DECL_(AE26, SIG_EXPR_LIST_PTR(AE26, I3C3SDA),
1542          SIG_EXPR_LIST_PTR(AE26, FSI1DATA));
1543
1544GROUP_DECL(I3C3, AF25, AE26);
1545FUNC_DECL_2(I3C3, HVI3C3, I3C3);
1546FUNC_GROUP_DECL(FSI1, AF25, AE26);
1547
1548#define AE25 246
1549SIG_EXPR_LIST_DECL_SEMG(AE25, I3C4SCL, I3C4, I3C4, SIG_DESC_SET(SCU438, 22));
1550SIG_EXPR_LIST_DECL_SESG(AE25, FSI2CLK, FSI2, SIG_DESC_SET(SCU4D8, 22));
1551PIN_DECL_(AE25, SIG_EXPR_LIST_PTR(AE25, I3C4SCL),
1552          SIG_EXPR_LIST_PTR(AE25, FSI2CLK));
1553
1554#define AF24 247
1555SIG_EXPR_LIST_DECL_SEMG(AF24, I3C4SDA, I3C4, I3C4, SIG_DESC_SET(SCU438, 23));
1556SIG_EXPR_LIST_DECL_SESG(AF24, FSI2DATA, FSI2, SIG_DESC_SET(SCU4D8, 23));
1557PIN_DECL_(AF24, SIG_EXPR_LIST_PTR(AF24, I3C4SDA),
1558          SIG_EXPR_LIST_PTR(AF24, FSI2DATA));
1559
1560GROUP_DECL(I3C4, AE25, AF24);
1561FUNC_DECL_2(I3C4, HVI3C4, I3C4);
1562FUNC_GROUP_DECL(FSI2, AE25, AF24);
1563
1564#define AF23 248
1565SIG_EXPR_LIST_DECL_SESG(AF23, I3C1SCL, I3C1, SIG_DESC_SET(SCU438, 16));
1566PIN_DECL_(AF23, SIG_EXPR_LIST_PTR(AF23, I3C1SCL));
1567
1568#define AE24 249
1569SIG_EXPR_LIST_DECL_SESG(AE24, I3C1SDA, I3C1, SIG_DESC_SET(SCU438, 17));
1570PIN_DECL_(AE24, SIG_EXPR_LIST_PTR(AE24, I3C1SDA));
1571
1572FUNC_GROUP_DECL(I3C1, AF23, AE24);
1573
1574#define AF22 250
1575SIG_EXPR_LIST_DECL_SESG(AF22, I3C2SCL, I3C2, SIG_DESC_SET(SCU438, 18));
1576PIN_DECL_(AF22, SIG_EXPR_LIST_PTR(AF22, I3C2SCL));
1577
1578#define AE22 251
1579SIG_EXPR_LIST_DECL_SESG(AE22, I3C2SDA, I3C2, SIG_DESC_SET(SCU438, 19));
1580PIN_DECL_(AE22, SIG_EXPR_LIST_PTR(AE22, I3C2SDA));
1581
1582FUNC_GROUP_DECL(I3C2, AF22, AE22);
1583
1584#define USB2ADP_DESC   { ASPEED_IP_SCU, SCU440, GENMASK(25, 24), 0, 0 }
1585#define USB2AD_DESC    { ASPEED_IP_SCU, SCU440, GENMASK(25, 24), 1, 0 }
1586#define USB2AH_DESC    { ASPEED_IP_SCU, SCU440, GENMASK(25, 24), 2, 0 }
1587#define USB2AHP_DESC   { ASPEED_IP_SCU, SCU440, GENMASK(25, 24), 3, 0 }
1588#define USB11BHID_DESC { ASPEED_IP_SCU, SCU440, GENMASK(29, 28), 0, 0 }
1589#define USB2BD_DESC    { ASPEED_IP_SCU, SCU440, GENMASK(29, 28), 1, 0 }
1590#define USB2BH_DESC    { ASPEED_IP_SCU, SCU440, GENMASK(29, 28), 2, 0 }
1591
1592#define A4 252
1593SIG_EXPR_LIST_DECL_SEMG(A4, USB2ADPDP, USBA, USB2ADP, USB2ADP_DESC,
1594                        SIG_DESC_SET(SCUC20, 16));
1595SIG_EXPR_LIST_DECL_SEMG(A4, USB2ADDP, USBA, USB2AD, USB2AD_DESC);
1596SIG_EXPR_LIST_DECL_SEMG(A4, USB2AHDP, USBA, USB2AH, USB2AH_DESC);
1597SIG_EXPR_LIST_DECL_SEMG(A4, USB2AHPDP, USBA, USB2AHP, USB2AHP_DESC);
1598PIN_DECL_(A4, SIG_EXPR_LIST_PTR(A4, USB2ADPDP), SIG_EXPR_LIST_PTR(A4, USB2ADDP),
1599          SIG_EXPR_LIST_PTR(A4, USB2AHDP));
1600
1601#define B4 253
1602SIG_EXPR_LIST_DECL_SEMG(B4, USB2ADPDN, USBA, USB2ADP, USB2ADP_DESC);
1603SIG_EXPR_LIST_DECL_SEMG(B4, USB2ADDN, USBA, USB2AD, USB2AD_DESC);
1604SIG_EXPR_LIST_DECL_SEMG(B4, USB2AHDN, USBA, USB2AH, USB2AH_DESC);
1605SIG_EXPR_LIST_DECL_SEMG(B4, USB2AHPDN, USBA, USB2AHP, USB2AHP_DESC);
1606PIN_DECL_(B4, SIG_EXPR_LIST_PTR(B4, USB2ADPDN), SIG_EXPR_LIST_PTR(B4, USB2ADDN),
1607          SIG_EXPR_LIST_PTR(B4, USB2AHDN));
1608
1609GROUP_DECL(USBA, A4, B4);
1610
1611FUNC_DECL_1(USB2ADP, USBA);
1612FUNC_DECL_1(USB2AD, USBA);
1613FUNC_DECL_1(USB2AH, USBA);
1614FUNC_DECL_1(USB2AHP, USBA);
1615
1616#define A6 254
1617SIG_EXPR_LIST_DECL_SEMG(A6, USB11BDP, USBB, USB11BHID, USB11BHID_DESC);
1618SIG_EXPR_LIST_DECL_SEMG(A6, USB2BDDP, USBB, USB2BD, USB2BD_DESC);
1619SIG_EXPR_LIST_DECL_SEMG(A6, USB2BHDP, USBB, USB2BH, USB2BH_DESC);
1620PIN_DECL_(A6, SIG_EXPR_LIST_PTR(A6, USB11BDP), SIG_EXPR_LIST_PTR(A6, USB2BDDP),
1621          SIG_EXPR_LIST_PTR(A6, USB2BHDP));
1622
1623#define B6 255
1624SIG_EXPR_LIST_DECL_SEMG(B6, USB11BDN, USBB, USB11BHID, USB11BHID_DESC);
1625SIG_EXPR_LIST_DECL_SEMG(B6, USB2BDDN, USBB, USB2BD, USB2BD_DESC);
1626SIG_EXPR_LIST_DECL_SEMG(B6, USB2BHDN, USBB, USB2BH, USB2BH_DESC);
1627PIN_DECL_(B6, SIG_EXPR_LIST_PTR(B6, USB11BDN), SIG_EXPR_LIST_PTR(B6, USB2BDDN),
1628          SIG_EXPR_LIST_PTR(B6, USB2BHDN));
1629
1630GROUP_DECL(USBB, A6, B6);
1631
1632FUNC_DECL_1(USB11BHID, USBB);
1633FUNC_DECL_1(USB2BD, USBB);
1634FUNC_DECL_1(USB2BH, USBB);
1635
1636/* Pins, groups and functions are sort(1):ed alphabetically for sanity */
1637
1638static struct pinctrl_pin_desc aspeed_g6_pins[ASPEED_G6_NR_PINS] = {
1639        ASPEED_PINCTRL_PIN(A11),
1640        ASPEED_PINCTRL_PIN(A12),
1641        ASPEED_PINCTRL_PIN(A13),
1642        ASPEED_PINCTRL_PIN(A14),
1643        ASPEED_PINCTRL_PIN(A15),
1644        ASPEED_PINCTRL_PIN(A16),
1645        ASPEED_PINCTRL_PIN(A17),
1646        ASPEED_PINCTRL_PIN(A18),
1647        ASPEED_PINCTRL_PIN(A19),
1648        ASPEED_PINCTRL_PIN(A2),
1649        ASPEED_PINCTRL_PIN(A20),
1650        ASPEED_PINCTRL_PIN(A21),
1651        ASPEED_PINCTRL_PIN(A22),
1652        ASPEED_PINCTRL_PIN(A23),
1653        ASPEED_PINCTRL_PIN(A24),
1654        ASPEED_PINCTRL_PIN(A25),
1655        ASPEED_PINCTRL_PIN(A3),
1656        ASPEED_PINCTRL_PIN(A4),
1657        ASPEED_PINCTRL_PIN(A6),
1658        ASPEED_PINCTRL_PIN(AA11),
1659        ASPEED_PINCTRL_PIN(AA12),
1660        ASPEED_PINCTRL_PIN(AA16),
1661        ASPEED_PINCTRL_PIN(AA17),
1662        ASPEED_PINCTRL_PIN(AA23),
1663        ASPEED_PINCTRL_PIN(AA24),
1664        ASPEED_PINCTRL_PIN(AA25),
1665        ASPEED_PINCTRL_PIN(AA26),
1666        ASPEED_PINCTRL_PIN(AA4),
1667        ASPEED_PINCTRL_PIN(AA5),
1668        ASPEED_PINCTRL_PIN(AA9),
1669        ASPEED_PINCTRL_PIN(AB10),
1670        ASPEED_PINCTRL_PIN(AB11),
1671        ASPEED_PINCTRL_PIN(AB12),
1672        ASPEED_PINCTRL_PIN(AB15),
1673        ASPEED_PINCTRL_PIN(AB16),
1674        ASPEED_PINCTRL_PIN(AB17),
1675        ASPEED_PINCTRL_PIN(AB18),
1676        ASPEED_PINCTRL_PIN(AB19),
1677        ASPEED_PINCTRL_PIN(AB22),
1678        ASPEED_PINCTRL_PIN(AB23),
1679        ASPEED_PINCTRL_PIN(AB24),
1680        ASPEED_PINCTRL_PIN(AB25),
1681        ASPEED_PINCTRL_PIN(AB26),
1682        ASPEED_PINCTRL_PIN(AB4),
1683        ASPEED_PINCTRL_PIN(AB5),
1684        ASPEED_PINCTRL_PIN(AB6),
1685        ASPEED_PINCTRL_PIN(AB7),
1686        ASPEED_PINCTRL_PIN(AB8),
1687        ASPEED_PINCTRL_PIN(AB9),
1688        ASPEED_PINCTRL_PIN(AC10),
1689        ASPEED_PINCTRL_PIN(AC11),
1690        ASPEED_PINCTRL_PIN(AC12),
1691        ASPEED_PINCTRL_PIN(AC15),
1692        ASPEED_PINCTRL_PIN(AC16),
1693        ASPEED_PINCTRL_PIN(AC17),
1694        ASPEED_PINCTRL_PIN(AC18),
1695        ASPEED_PINCTRL_PIN(AC19),
1696        ASPEED_PINCTRL_PIN(AC22),
1697        ASPEED_PINCTRL_PIN(AC23),
1698        ASPEED_PINCTRL_PIN(AC24),
1699        ASPEED_PINCTRL_PIN(AC26),
1700        ASPEED_PINCTRL_PIN(AC4),
1701        ASPEED_PINCTRL_PIN(AC5),
1702        ASPEED_PINCTRL_PIN(AC7),
1703        ASPEED_PINCTRL_PIN(AC8),
1704        ASPEED_PINCTRL_PIN(AC9),
1705        ASPEED_PINCTRL_PIN(AD10),
1706        ASPEED_PINCTRL_PIN(AD11),
1707        ASPEED_PINCTRL_PIN(AD12),
1708        ASPEED_PINCTRL_PIN(AD14),
1709        ASPEED_PINCTRL_PIN(AD15),
1710        ASPEED_PINCTRL_PIN(AD16),
1711        ASPEED_PINCTRL_PIN(AD19),
1712        ASPEED_PINCTRL_PIN(AD20),
1713        ASPEED_PINCTRL_PIN(AD22),
1714        ASPEED_PINCTRL_PIN(AD23),
1715        ASPEED_PINCTRL_PIN(AD24),
1716        ASPEED_PINCTRL_PIN(AD25),
1717        ASPEED_PINCTRL_PIN(AD26),
1718        ASPEED_PINCTRL_PIN(AD7),
1719        ASPEED_PINCTRL_PIN(AD8),
1720        ASPEED_PINCTRL_PIN(AD9),
1721        ASPEED_PINCTRL_PIN(AE10),
1722        ASPEED_PINCTRL_PIN(AE11),
1723        ASPEED_PINCTRL_PIN(AE12),
1724        ASPEED_PINCTRL_PIN(AE14),
1725        ASPEED_PINCTRL_PIN(AE15),
1726        ASPEED_PINCTRL_PIN(AE16),
1727        ASPEED_PINCTRL_PIN(AE18),
1728        ASPEED_PINCTRL_PIN(AE19),
1729        ASPEED_PINCTRL_PIN(AE22),
1730        ASPEED_PINCTRL_PIN(AE24),
1731        ASPEED_PINCTRL_PIN(AE25),
1732        ASPEED_PINCTRL_PIN(AE26),
1733        ASPEED_PINCTRL_PIN(AE7),
1734        ASPEED_PINCTRL_PIN(AE8),
1735        ASPEED_PINCTRL_PIN(AF10),
1736        ASPEED_PINCTRL_PIN(AF11),
1737        ASPEED_PINCTRL_PIN(AF12),
1738        ASPEED_PINCTRL_PIN(AF14),
1739        ASPEED_PINCTRL_PIN(AF15),
1740        ASPEED_PINCTRL_PIN(AF22),
1741        ASPEED_PINCTRL_PIN(AF23),
1742        ASPEED_PINCTRL_PIN(AF24),
1743        ASPEED_PINCTRL_PIN(AF25),
1744        ASPEED_PINCTRL_PIN(AF7),
1745        ASPEED_PINCTRL_PIN(AF8),
1746        ASPEED_PINCTRL_PIN(AF9),
1747        ASPEED_PINCTRL_PIN(B1),
1748        ASPEED_PINCTRL_PIN(B12),
1749        ASPEED_PINCTRL_PIN(B13),
1750        ASPEED_PINCTRL_PIN(B14),
1751        ASPEED_PINCTRL_PIN(B16),
1752        ASPEED_PINCTRL_PIN(B17),
1753        ASPEED_PINCTRL_PIN(B18),
1754        ASPEED_PINCTRL_PIN(B2),
1755        ASPEED_PINCTRL_PIN(B20),
1756        ASPEED_PINCTRL_PIN(B21),
1757        ASPEED_PINCTRL_PIN(B22),
1758        ASPEED_PINCTRL_PIN(B24),
1759        ASPEED_PINCTRL_PIN(B25),
1760        ASPEED_PINCTRL_PIN(B26),
1761        ASPEED_PINCTRL_PIN(B3),
1762        ASPEED_PINCTRL_PIN(B4),
1763        ASPEED_PINCTRL_PIN(B6),
1764        ASPEED_PINCTRL_PIN(C1),
1765        ASPEED_PINCTRL_PIN(C11),
1766        ASPEED_PINCTRL_PIN(C12),
1767        ASPEED_PINCTRL_PIN(C13),
1768        ASPEED_PINCTRL_PIN(C14),
1769        ASPEED_PINCTRL_PIN(C15),
1770        ASPEED_PINCTRL_PIN(C16),
1771        ASPEED_PINCTRL_PIN(C17),
1772        ASPEED_PINCTRL_PIN(C18),
1773        ASPEED_PINCTRL_PIN(C19),
1774        ASPEED_PINCTRL_PIN(C2),
1775        ASPEED_PINCTRL_PIN(C20),
1776        ASPEED_PINCTRL_PIN(C21),
1777        ASPEED_PINCTRL_PIN(C22),
1778        ASPEED_PINCTRL_PIN(C23),
1779        ASPEED_PINCTRL_PIN(C24),
1780        ASPEED_PINCTRL_PIN(C25),
1781        ASPEED_PINCTRL_PIN(C26),
1782        ASPEED_PINCTRL_PIN(C4),
1783        ASPEED_PINCTRL_PIN(C5),
1784        ASPEED_PINCTRL_PIN(C6),
1785        ASPEED_PINCTRL_PIN(D1),
1786        ASPEED_PINCTRL_PIN(D11),
1787        ASPEED_PINCTRL_PIN(D12),
1788        ASPEED_PINCTRL_PIN(D13),
1789        ASPEED_PINCTRL_PIN(D14),
1790        ASPEED_PINCTRL_PIN(D15),
1791        ASPEED_PINCTRL_PIN(D16),
1792        ASPEED_PINCTRL_PIN(D17),
1793        ASPEED_PINCTRL_PIN(D18),
1794        ASPEED_PINCTRL_PIN(D19),
1795        ASPEED_PINCTRL_PIN(D2),
1796        ASPEED_PINCTRL_PIN(D20),
1797        ASPEED_PINCTRL_PIN(D21),
1798        ASPEED_PINCTRL_PIN(D22),
1799        ASPEED_PINCTRL_PIN(D23),
1800        ASPEED_PINCTRL_PIN(D24),
1801        ASPEED_PINCTRL_PIN(D26),
1802        ASPEED_PINCTRL_PIN(D3),
1803        ASPEED_PINCTRL_PIN(D4),
1804        ASPEED_PINCTRL_PIN(D5),
1805        ASPEED_PINCTRL_PIN(D6),
1806        ASPEED_PINCTRL_PIN(E1),
1807        ASPEED_PINCTRL_PIN(E11),
1808        ASPEED_PINCTRL_PIN(E12),
1809        ASPEED_PINCTRL_PIN(E13),
1810        ASPEED_PINCTRL_PIN(E14),
1811        ASPEED_PINCTRL_PIN(E15),
1812        ASPEED_PINCTRL_PIN(E16),
1813        ASPEED_PINCTRL_PIN(E17),
1814        ASPEED_PINCTRL_PIN(E18),
1815        ASPEED_PINCTRL_PIN(E19),
1816        ASPEED_PINCTRL_PIN(E2),
1817        ASPEED_PINCTRL_PIN(E20),
1818        ASPEED_PINCTRL_PIN(E21),
1819        ASPEED_PINCTRL_PIN(E22),
1820        ASPEED_PINCTRL_PIN(E23),
1821        ASPEED_PINCTRL_PIN(E24),
1822        ASPEED_PINCTRL_PIN(E25),
1823        ASPEED_PINCTRL_PIN(E26),
1824        ASPEED_PINCTRL_PIN(E3),
1825        ASPEED_PINCTRL_PIN(E4),
1826        ASPEED_PINCTRL_PIN(E5),
1827        ASPEED_PINCTRL_PIN(E6),
1828        ASPEED_PINCTRL_PIN(F13),
1829        ASPEED_PINCTRL_PIN(F15),
1830        ASPEED_PINCTRL_PIN(F22),
1831        ASPEED_PINCTRL_PIN(F23),
1832        ASPEED_PINCTRL_PIN(F24),
1833        ASPEED_PINCTRL_PIN(F25),
1834        ASPEED_PINCTRL_PIN(F26),
1835        ASPEED_PINCTRL_PIN(F4),
1836        ASPEED_PINCTRL_PIN(F5),
1837        ASPEED_PINCTRL_PIN(G22),
1838        ASPEED_PINCTRL_PIN(G23),
1839        ASPEED_PINCTRL_PIN(G24),
1840        ASPEED_PINCTRL_PIN(G26),
1841        ASPEED_PINCTRL_PIN(H22),
1842        ASPEED_PINCTRL_PIN(H23),
1843        ASPEED_PINCTRL_PIN(H24),
1844        ASPEED_PINCTRL_PIN(H25),
1845        ASPEED_PINCTRL_PIN(H26),
1846        ASPEED_PINCTRL_PIN(J22),
1847        ASPEED_PINCTRL_PIN(J23),
1848        ASPEED_PINCTRL_PIN(J24),
1849        ASPEED_PINCTRL_PIN(J25),
1850        ASPEED_PINCTRL_PIN(J26),
1851        ASPEED_PINCTRL_PIN(K23),
1852        ASPEED_PINCTRL_PIN(K24),
1853        ASPEED_PINCTRL_PIN(K25),
1854        ASPEED_PINCTRL_PIN(K26),
1855        ASPEED_PINCTRL_PIN(L23),
1856        ASPEED_PINCTRL_PIN(L24),
1857        ASPEED_PINCTRL_PIN(L26),
1858        ASPEED_PINCTRL_PIN(M23),
1859        ASPEED_PINCTRL_PIN(M24),
1860        ASPEED_PINCTRL_PIN(M25),
1861        ASPEED_PINCTRL_PIN(M26),
1862        ASPEED_PINCTRL_PIN(N23),
1863        ASPEED_PINCTRL_PIN(N24),
1864        ASPEED_PINCTRL_PIN(N25),
1865        ASPEED_PINCTRL_PIN(N26),
1866        ASPEED_PINCTRL_PIN(P23),
1867        ASPEED_PINCTRL_PIN(P24),
1868        ASPEED_PINCTRL_PIN(P25),
1869        ASPEED_PINCTRL_PIN(P26),
1870        ASPEED_PINCTRL_PIN(R23),
1871        ASPEED_PINCTRL_PIN(R24),
1872        ASPEED_PINCTRL_PIN(R26),
1873        ASPEED_PINCTRL_PIN(T23),
1874        ASPEED_PINCTRL_PIN(T24),
1875        ASPEED_PINCTRL_PIN(T25),
1876        ASPEED_PINCTRL_PIN(T26),
1877        ASPEED_PINCTRL_PIN(U24),
1878        ASPEED_PINCTRL_PIN(U25),
1879        ASPEED_PINCTRL_PIN(U26),
1880        ASPEED_PINCTRL_PIN(V24),
1881        ASPEED_PINCTRL_PIN(V25),
1882        ASPEED_PINCTRL_PIN(V26),
1883        ASPEED_PINCTRL_PIN(W23),
1884        ASPEED_PINCTRL_PIN(W24),
1885        ASPEED_PINCTRL_PIN(W26),
1886        ASPEED_PINCTRL_PIN(Y1),
1887        ASPEED_PINCTRL_PIN(Y2),
1888        ASPEED_PINCTRL_PIN(Y23),
1889        ASPEED_PINCTRL_PIN(Y24),
1890        ASPEED_PINCTRL_PIN(Y25),
1891        ASPEED_PINCTRL_PIN(Y26),
1892        ASPEED_PINCTRL_PIN(Y3),
1893        ASPEED_PINCTRL_PIN(Y4),
1894        ASPEED_PINCTRL_PIN(Y5),
1895};
1896
1897static const struct aspeed_pin_group aspeed_g6_groups[] = {
1898        ASPEED_PINCTRL_GROUP(ADC0),
1899        ASPEED_PINCTRL_GROUP(ADC1),
1900        ASPEED_PINCTRL_GROUP(ADC10),
1901        ASPEED_PINCTRL_GROUP(ADC11),
1902        ASPEED_PINCTRL_GROUP(ADC12),
1903        ASPEED_PINCTRL_GROUP(ADC13),
1904        ASPEED_PINCTRL_GROUP(ADC14),
1905        ASPEED_PINCTRL_GROUP(ADC15),
1906        ASPEED_PINCTRL_GROUP(ADC2),
1907        ASPEED_PINCTRL_GROUP(ADC3),
1908        ASPEED_PINCTRL_GROUP(ADC4),
1909        ASPEED_PINCTRL_GROUP(ADC5),
1910        ASPEED_PINCTRL_GROUP(ADC6),
1911        ASPEED_PINCTRL_GROUP(ADC7),
1912        ASPEED_PINCTRL_GROUP(ADC8),
1913        ASPEED_PINCTRL_GROUP(ADC9),
1914        ASPEED_PINCTRL_GROUP(BMCINT),
1915        ASPEED_PINCTRL_GROUP(ESPI),
1916        ASPEED_PINCTRL_GROUP(ESPIALT),
1917        ASPEED_PINCTRL_GROUP(FSI1),
1918        ASPEED_PINCTRL_GROUP(FSI2),
1919        ASPEED_PINCTRL_GROUP(FWSPIABR),
1920        ASPEED_PINCTRL_GROUP(FWSPID),
1921        ASPEED_PINCTRL_GROUP(FWQSPID),
1922        ASPEED_PINCTRL_GROUP(FWSPIWP),
1923        ASPEED_PINCTRL_GROUP(GPIT0),
1924        ASPEED_PINCTRL_GROUP(GPIT1),
1925        ASPEED_PINCTRL_GROUP(GPIT2),
1926        ASPEED_PINCTRL_GROUP(GPIT3),
1927        ASPEED_PINCTRL_GROUP(GPIT4),
1928        ASPEED_PINCTRL_GROUP(GPIT5),
1929        ASPEED_PINCTRL_GROUP(GPIT6),
1930        ASPEED_PINCTRL_GROUP(GPIT7),
1931        ASPEED_PINCTRL_GROUP(GPIU0),
1932        ASPEED_PINCTRL_GROUP(GPIU1),
1933        ASPEED_PINCTRL_GROUP(GPIU2),
1934        ASPEED_PINCTRL_GROUP(GPIU3),
1935        ASPEED_PINCTRL_GROUP(GPIU4),
1936        ASPEED_PINCTRL_GROUP(GPIU5),
1937        ASPEED_PINCTRL_GROUP(GPIU6),
1938        ASPEED_PINCTRL_GROUP(GPIU7),
1939        ASPEED_PINCTRL_GROUP(HEARTBEAT),
1940        ASPEED_PINCTRL_GROUP(HVI3C3),
1941        ASPEED_PINCTRL_GROUP(HVI3C4),
1942        ASPEED_PINCTRL_GROUP(I2C1),
1943        ASPEED_PINCTRL_GROUP(I2C10),
1944        ASPEED_PINCTRL_GROUP(I2C11),
1945        ASPEED_PINCTRL_GROUP(I2C12),
1946        ASPEED_PINCTRL_GROUP(I2C13),
1947        ASPEED_PINCTRL_GROUP(I2C14),
1948        ASPEED_PINCTRL_GROUP(I2C15),
1949        ASPEED_PINCTRL_GROUP(I2C16),
1950        ASPEED_PINCTRL_GROUP(I2C2),
1951        ASPEED_PINCTRL_GROUP(I2C3),
1952        ASPEED_PINCTRL_GROUP(I2C4),
1953        ASPEED_PINCTRL_GROUP(I2C5),
1954        ASPEED_PINCTRL_GROUP(I2C6),
1955        ASPEED_PINCTRL_GROUP(I2C7),
1956        ASPEED_PINCTRL_GROUP(I2C8),
1957        ASPEED_PINCTRL_GROUP(I2C9),
1958        ASPEED_PINCTRL_GROUP(I3C1),
1959        ASPEED_PINCTRL_GROUP(I3C2),
1960        ASPEED_PINCTRL_GROUP(I3C3),
1961        ASPEED_PINCTRL_GROUP(I3C4),
1962        ASPEED_PINCTRL_GROUP(I3C5),
1963        ASPEED_PINCTRL_GROUP(I3C6),
1964        ASPEED_PINCTRL_GROUP(JTAGM),
1965        ASPEED_PINCTRL_GROUP(LHPD),
1966        ASPEED_PINCTRL_GROUP(LHSIRQ),
1967        ASPEED_PINCTRL_GROUP(LPC),
1968        ASPEED_PINCTRL_GROUP(LPCHC),
1969        ASPEED_PINCTRL_GROUP(LPCPD),
1970        ASPEED_PINCTRL_GROUP(LPCPME),
1971        ASPEED_PINCTRL_GROUP(LPCSMI),
1972        ASPEED_PINCTRL_GROUP(LSIRQ),
1973        ASPEED_PINCTRL_GROUP(MACLINK1),
1974        ASPEED_PINCTRL_GROUP(MACLINK2),
1975        ASPEED_PINCTRL_GROUP(MACLINK3),
1976        ASPEED_PINCTRL_GROUP(MACLINK4),
1977        ASPEED_PINCTRL_GROUP(MDIO1),
1978        ASPEED_PINCTRL_GROUP(MDIO2),
1979        ASPEED_PINCTRL_GROUP(MDIO3),
1980        ASPEED_PINCTRL_GROUP(MDIO4),
1981        ASPEED_PINCTRL_GROUP(NCTS1),
1982        ASPEED_PINCTRL_GROUP(NCTS2),
1983        ASPEED_PINCTRL_GROUP(NCTS3),
1984        ASPEED_PINCTRL_GROUP(NCTS4),
1985        ASPEED_PINCTRL_GROUP(NDCD1),
1986        ASPEED_PINCTRL_GROUP(NDCD2),
1987        ASPEED_PINCTRL_GROUP(NDCD3),
1988        ASPEED_PINCTRL_GROUP(NDCD4),
1989        ASPEED_PINCTRL_GROUP(NDSR1),
1990        ASPEED_PINCTRL_GROUP(NDSR2),
1991        ASPEED_PINCTRL_GROUP(NDSR3),
1992        ASPEED_PINCTRL_GROUP(NDSR4),
1993        ASPEED_PINCTRL_GROUP(NDTR1),
1994        ASPEED_PINCTRL_GROUP(NDTR2),
1995        ASPEED_PINCTRL_GROUP(NDTR3),
1996        ASPEED_PINCTRL_GROUP(NDTR4),
1997        ASPEED_PINCTRL_GROUP(NRI1),
1998        ASPEED_PINCTRL_GROUP(NRI2),
1999        ASPEED_PINCTRL_GROUP(NRI3),
2000        ASPEED_PINCTRL_GROUP(NRI4),

2001        ASPEED_PINCTRL_GROUP(NRTS1),
2002        ASPEED_PINCTRL_GROUP(NRTS2),
2003        ASPEED_PINCTRL_GROUP(NRTS3),
2004        ASPEED_PINCTRL_GROUP(NRTS4),
2005        ASPEED_PINCTRL_GROUP(OSCCLK),
2006        ASPEED_PINCTRL_GROUP(PEWAKE),
2007        ASPEED_PINCTRL_GROUP(PWM0),
2008        ASPEED_PINCTRL_GROUP(PWM1),
2009        ASPEED_PINCTRL_GROUP(PWM10G0),
2010        ASPEED_PINCTRL_GROUP(PWM10G1),
2011        ASPEED_PINCTRL_GROUP(PWM11G0),
2012        ASPEED_PINCTRL_GROUP(PWM11G1),
2013        ASPEED_PINCTRL_GROUP(PWM12G0),
2014        ASPEED_PINCTRL_GROUP(PWM12G1),
2015        ASPEED_PINCTRL_GROUP(PWM13G0),
2016        ASPEED_PINCTRL_GROUP(PWM13G1),
2017        ASPEED_PINCTRL_GROUP(PWM14G0),
2018        ASPEED_PINCTRL_GROUP(PWM14G1),
2019        ASPEED_PINCTRL_GROUP(PWM15G0),
2020        ASPEED_PINCTRL_GROUP(PWM15G1),
2021        ASPEED_PINCTRL_GROUP(PWM2),
2022        ASPEED_PINCTRL_GROUP(PWM3),
2023        ASPEED_PINCTRL_GROUP(PWM4),
2024        ASPEED_PINCTRL_GROUP(PWM5),
2025        ASPEED_PINCTRL_GROUP(PWM6),
2026        ASPEED_PINCTRL_GROUP(PWM7),
2027        ASPEED_PINCTRL_GROUP(PWM8G0),
2028        ASPEED_PINCTRL_GROUP(PWM8G1),
2029        ASPEED_PINCTRL_GROUP(PWM9G0),
2030        ASPEED_PINCTRL_GROUP(PWM9G1),
2031        ASPEED_PINCTRL_GROUP(QSPI1),
2032        ASPEED_PINCTRL_GROUP(QSPI2),
2033        ASPEED_PINCTRL_GROUP(RGMII1),
2034        ASPEED_PINCTRL_GROUP(RGMII2),
2035        ASPEED_PINCTRL_GROUP(RGMII3),
2036        ASPEED_PINCTRL_GROUP(RGMII4),
2037        ASPEED_PINCTRL_GROUP(RMII1),
2038        ASPEED_PINCTRL_GROUP(RMII2),
2039        ASPEED_PINCTRL_GROUP(RMII3),
2040        ASPEED_PINCTRL_GROUP(RMII4),
2041        ASPEED_PINCTRL_GROUP(RXD1),
2042        ASPEED_PINCTRL_GROUP(RXD2),
2043        ASPEED_PINCTRL_GROUP(RXD3),
2044        ASPEED_PINCTRL_GROUP(RXD4),
2045        ASPEED_PINCTRL_GROUP(SALT1),
2046        ASPEED_PINCTRL_GROUP(SALT10G0),
2047        ASPEED_PINCTRL_GROUP(SALT10G1),
2048        ASPEED_PINCTRL_GROUP(SALT11G0),
2049        ASPEED_PINCTRL_GROUP(SALT11G1),
2050        ASPEED_PINCTRL_GROUP(SALT12G0),
2051        ASPEED_PINCTRL_GROUP(SALT12G1),
2052        ASPEED_PINCTRL_GROUP(SALT13G0),
2053        ASPEED_PINCTRL_GROUP(SALT13G1),
2054        ASPEED_PINCTRL_GROUP(SALT14G0),
2055        ASPEED_PINCTRL_GROUP(SALT14G1),
2056        ASPEED_PINCTRL_GROUP(SALT15G0),
2057        ASPEED_PINCTRL_GROUP(SALT15G1),
2058        ASPEED_PINCTRL_GROUP(SALT16G0),
2059        ASPEED_PINCTRL_GROUP(SALT16G1),
2060        ASPEED_PINCTRL_GROUP(SALT2),
2061        ASPEED_PINCTRL_GROUP(SALT3),
2062        ASPEED_PINCTRL_GROUP(SALT4),
2063        ASPEED_PINCTRL_GROUP(SALT5),
2064        ASPEED_PINCTRL_GROUP(SALT6),
2065        ASPEED_PINCTRL_GROUP(SALT7),
2066        ASPEED_PINCTRL_GROUP(SALT8),
2067        ASPEED_PINCTRL_GROUP(SALT9G0),
2068        ASPEED_PINCTRL_GROUP(SALT9G1),
2069        ASPEED_PINCTRL_GROUP(SD1),
2070        ASPEED_PINCTRL_GROUP(SD2),
2071        ASPEED_PINCTRL_GROUP(EMMCG1),
2072        ASPEED_PINCTRL_GROUP(EMMCG4),
2073        ASPEED_PINCTRL_GROUP(EMMCG8),
2074        ASPEED_PINCTRL_GROUP(SGPM1),
2075        ASPEED_PINCTRL_GROUP(SGPM2),
2076        ASPEED_PINCTRL_GROUP(SGPS1),
2077        ASPEED_PINCTRL_GROUP(SGPS2),
2078        ASPEED_PINCTRL_GROUP(SIOONCTRL),
2079        ASPEED_PINCTRL_GROUP(SIOPBI),
2080        ASPEED_PINCTRL_GROUP(SIOPBO),
2081        ASPEED_PINCTRL_GROUP(SIOPWREQ),
2082        ASPEED_PINCTRL_GROUP(SIOPWRGD),
2083        ASPEED_PINCTRL_GROUP(SIOS3),
2084        ASPEED_PINCTRL_GROUP(SIOS5),
2085        ASPEED_PINCTRL_GROUP(SIOSCI),
2086        ASPEED_PINCTRL_GROUP(SPI1),
2087        ASPEED_PINCTRL_GROUP(SPI1ABR),
2088        ASPEED_PINCTRL_GROUP(SPI1CS1),
2089        ASPEED_PINCTRL_GROUP(SPI1WP),
2090        ASPEED_PINCTRL_GROUP(SPI2),
2091        ASPEED_PINCTRL_GROUP(SPI2CS1),
2092        ASPEED_PINCTRL_GROUP(SPI2CS2),
2093        ASPEED_PINCTRL_GROUP(TACH0),
2094        ASPEED_PINCTRL_GROUP(TACH1),
2095        ASPEED_PINCTRL_GROUP(TACH10),
2096        ASPEED_PINCTRL_GROUP(TACH11),
2097        ASPEED_PINCTRL_GROUP(TACH12),
2098        ASPEED_PINCTRL_GROUP(TACH13),
2099        ASPEED_PINCTRL_GROUP(TACH14),
2100        ASPEED_PINCTRL_GROUP(TACH15),
2101        ASPEED_PINCTRL_GROUP(TACH2),
2102        ASPEED_PINCTRL_GROUP(TACH3),
2103        ASPEED_PINCTRL_GROUP(TACH4),
2104        ASPEED_PINCTRL_GROUP(TACH5),
2105        ASPEED_PINCTRL_GROUP(TACH6),
2106        ASPEED_PINCTRL_GROUP(TACH7),
2107        ASPEED_PINCTRL_GROUP(TACH8),
2108        ASPEED_PINCTRL_GROUP(TACH9),
2109        ASPEED_PINCTRL_GROUP(THRU0),
2110        ASPEED_PINCTRL_GROUP(THRU1),
2111        ASPEED_PINCTRL_GROUP(THRU2),
2112        ASPEED_PINCTRL_GROUP(THRU3),
2113        ASPEED_PINCTRL_GROUP(TXD1),
2114        ASPEED_PINCTRL_GROUP(TXD2),
2115        ASPEED_PINCTRL_GROUP(TXD3),
2116        ASPEED_PINCTRL_GROUP(TXD4),
2117        ASPEED_PINCTRL_GROUP(UART10),
2118        ASPEED_PINCTRL_GROUP(UART11),
2119        ASPEED_PINCTRL_GROUP(UART12G0),
2120        ASPEED_PINCTRL_GROUP(UART12G1),
2121        ASPEED_PINCTRL_GROUP(UART13G0),
2122        ASPEED_PINCTRL_GROUP(UART13G1),
2123        ASPEED_PINCTRL_GROUP(UART6),
2124        ASPEED_PINCTRL_GROUP(UART7),
2125        ASPEED_PINCTRL_GROUP(UART8),
2126        ASPEED_PINCTRL_GROUP(UART9),
2127        ASPEED_PINCTRL_GROUP(USBA),
2128        ASPEED_PINCTRL_GROUP(USBB),
2129        ASPEED_PINCTRL_GROUP(VB),
2130        ASPEED_PINCTRL_GROUP(VGAHS),
2131        ASPEED_PINCTRL_GROUP(VGAVS),
2132        ASPEED_PINCTRL_GROUP(WDTRST1),
2133        ASPEED_PINCTRL_GROUP(WDTRST2),
2134        ASPEED_PINCTRL_GROUP(WDTRST3),
2135        ASPEED_PINCTRL_GROUP(WDTRST4),
2136};
2137
2138static const struct aspeed_pin_function aspeed_g6_functions[] = {
2139        ASPEED_PINCTRL_FUNC(ADC0),
2140        ASPEED_PINCTRL_FUNC(ADC1),
2141        ASPEED_PINCTRL_FUNC(ADC10),
2142        ASPEED_PINCTRL_FUNC(ADC11),
2143        ASPEED_PINCTRL_FUNC(ADC12),
2144        ASPEED_PINCTRL_FUNC(ADC13),
2145        ASPEED_PINCTRL_FUNC(ADC14),
2146        ASPEED_PINCTRL_FUNC(ADC15),
2147        ASPEED_PINCTRL_FUNC(ADC2),
2148        ASPEED_PINCTRL_FUNC(ADC3),
2149        ASPEED_PINCTRL_FUNC(ADC4),
2150        ASPEED_PINCTRL_FUNC(ADC5),
2151        ASPEED_PINCTRL_FUNC(ADC6),
2152        ASPEED_PINCTRL_FUNC(ADC7),
2153        ASPEED_PINCTRL_FUNC(ADC8),
2154        ASPEED_PINCTRL_FUNC(ADC9),
2155        ASPEED_PINCTRL_FUNC(BMCINT),
2156        ASPEED_PINCTRL_FUNC(EMMC),
2157        ASPEED_PINCTRL_FUNC(ESPI),
2158        ASPEED_PINCTRL_FUNC(ESPIALT),
2159        ASPEED_PINCTRL_FUNC(FSI1),
2160        ASPEED_PINCTRL_FUNC(FSI2),
2161        ASPEED_PINCTRL_FUNC(FWSPIABR),
2162        ASPEED_PINCTRL_FUNC(FWSPID),
2163        ASPEED_PINCTRL_FUNC(FWSPIWP),
2164        ASPEED_PINCTRL_FUNC(GPIT0),
2165        ASPEED_PINCTRL_FUNC(GPIT1),
2166        ASPEED_PINCTRL_FUNC(GPIT2),
2167        ASPEED_PINCTRL_FUNC(GPIT3),
2168        ASPEED_PINCTRL_FUNC(GPIT4),
2169        ASPEED_PINCTRL_FUNC(GPIT5),
2170        ASPEED_PINCTRL_FUNC(GPIT6),
2171        ASPEED_PINCTRL_FUNC(GPIT7),
2172        ASPEED_PINCTRL_FUNC(GPIU0),
2173        ASPEED_PINCTRL_FUNC(GPIU1),
2174        ASPEED_PINCTRL_FUNC(GPIU2),
2175        ASPEED_PINCTRL_FUNC(GPIU3),
2176        ASPEED_PINCTRL_FUNC(GPIU4),
2177        ASPEED_PINCTRL_FUNC(GPIU5),
2178        ASPEED_PINCTRL_FUNC(GPIU6),
2179        ASPEED_PINCTRL_FUNC(GPIU7),
2180        ASPEED_PINCTRL_FUNC(HEARTBEAT),
2181        ASPEED_PINCTRL_FUNC(I2C1),
2182        ASPEED_PINCTRL_FUNC(I2C10),
2183        ASPEED_PINCTRL_FUNC(I2C11),
2184        ASPEED_PINCTRL_FUNC(I2C12),
2185        ASPEED_PINCTRL_FUNC(I2C13),
2186        ASPEED_PINCTRL_FUNC(I2C14),
2187        ASPEED_PINCTRL_FUNC(I2C15),
2188        ASPEED_PINCTRL_FUNC(I2C16),
2189        ASPEED_PINCTRL_FUNC(I2C2),
2190        ASPEED_PINCTRL_FUNC(I2C3),
2191        ASPEED_PINCTRL_FUNC(I2C4),
2192        ASPEED_PINCTRL_FUNC(I2C5),
2193        ASPEED_PINCTRL_FUNC(I2C6),
2194        ASPEED_PINCTRL_FUNC(I2C7),
2195        ASPEED_PINCTRL_FUNC(I2C8),
2196        ASPEED_PINCTRL_FUNC(I2C9),
2197        ASPEED_PINCTRL_FUNC(I3C1),
2198        ASPEED_PINCTRL_FUNC(I3C2),
2199        ASPEED_PINCTRL_FUNC(I3C3),
2200        ASPEED_PINCTRL_FUNC(I3C4),
2201        ASPEED_PINCTRL_FUNC(I3C5),
2202        ASPEED_PINCTRL_FUNC(I3C6),
2203        ASPEED_PINCTRL_FUNC(JTAGM),
2204        ASPEED_PINCTRL_FUNC(LHPD),
2205        ASPEED_PINCTRL_FUNC(LHSIRQ),
2206        ASPEED_PINCTRL_FUNC(LPC),
2207        ASPEED_PINCTRL_FUNC(LPCHC),
2208        ASPEED_PINCTRL_FUNC(LPCPD),
2209        ASPEED_PINCTRL_FUNC(LPCPME),
2210        ASPEED_PINCTRL_FUNC(LPCSMI),
2211        ASPEED_PINCTRL_FUNC(LSIRQ),
2212        ASPEED_PINCTRL_FUNC(MACLINK1),
2213        ASPEED_PINCTRL_FUNC(MACLINK2),
2214        ASPEED_PINCTRL_FUNC(MACLINK3),
2215        ASPEED_PINCTRL_FUNC(MACLINK4),
2216        ASPEED_PINCTRL_FUNC(MDIO1),
2217        ASPEED_PINCTRL_FUNC(MDIO2),
2218        ASPEED_PINCTRL_FUNC(MDIO3),
2219        ASPEED_PINCTRL_FUNC(MDIO4),
2220        ASPEED_PINCTRL_FUNC(NCTS1),
2221        ASPEED_PINCTRL_FUNC(NCTS2),
2222        ASPEED_PINCTRL_FUNC(NCTS3),
2223        ASPEED_PINCTRL_FUNC(NCTS4),
2224        ASPEED_PINCTRL_FUNC(NDCD1),
2225        ASPEED_PINCTRL_FUNC(NDCD2),
2226        ASPEED_PINCTRL_FUNC(NDCD3),
2227        ASPEED_PINCTRL_FUNC(NDCD4),
2228        ASPEED_PINCTRL_FUNC(NDSR1),
2229        ASPEED_PINCTRL_FUNC(NDSR2),
2230        ASPEED_PINCTRL_FUNC(NDSR3),
2231        ASPEED_PINCTRL_FUNC(NDSR4),
2232        ASPEED_PINCTRL_FUNC(NDTR1),
2233        ASPEED_PINCTRL_FUNC(NDTR2),
2234        ASPEED_PINCTRL_FUNC(NDTR3),
2235        ASPEED_PINCTRL_FUNC(NDTR4),
2236        ASPEED_PINCTRL_FUNC(NRI1),
2237        ASPEED_PINCTRL_FUNC(NRI2),
2238        ASPEED_PINCTRL_FUNC(NRI3),
2239        ASPEED_PINCTRL_FUNC(NRI4),
2240        ASPEED_PINCTRL_FUNC(NRTS1),
2241        ASPEED_PINCTRL_FUNC(NRTS2),
2242        ASPEED_PINCTRL_FUNC(NRTS3),
2243        ASPEED_PINCTRL_FUNC(NRTS4),
2244        ASPEED_PINCTRL_FUNC(OSCCLK),
2245        ASPEED_PINCTRL_FUNC(PEWAKE),
2246        ASPEED_PINCTRL_FUNC(PWM0),
2247        ASPEED_PINCTRL_FUNC(PWM1),
2248        ASPEED_PINCTRL_FUNC(PWM10),
2249        ASPEED_PINCTRL_FUNC(PWM11),
2250        ASPEED_PINCTRL_FUNC(PWM12),
2251        ASPEED_PINCTRL_FUNC(PWM13),
2252        ASPEED_PINCTRL_FUNC(PWM14),
2253        ASPEED_PINCTRL_FUNC(PWM15),
2254        ASPEED_PINCTRL_FUNC(PWM2),
2255        ASPEED_PINCTRL_FUNC(PWM3),
2256        ASPEED_PINCTRL_FUNC(PWM4),
2257        ASPEED_PINCTRL_FUNC(PWM5),
2258        ASPEED_PINCTRL_FUNC(PWM6),
2259        ASPEED_PINCTRL_FUNC(PWM7),
2260        ASPEED_PINCTRL_FUNC(PWM8),
2261        ASPEED_PINCTRL_FUNC(PWM9),
2262        ASPEED_PINCTRL_FUNC(RGMII1),
2263        ASPEED_PINCTRL_FUNC(RGMII2),
2264        ASPEED_PINCTRL_FUNC(RGMII3),
2265        ASPEED_PINCTRL_FUNC(RGMII4),
2266        ASPEED_PINCTRL_FUNC(RMII1),
2267        ASPEED_PINCTRL_FUNC(RMII2),
2268        ASPEED_PINCTRL_FUNC(RMII3),
2269        ASPEED_PINCTRL_FUNC(RMII4),
2270        ASPEED_PINCTRL_FUNC(RXD1),
2271        ASPEED_PINCTRL_FUNC(RXD2),
2272        ASPEED_PINCTRL_FUNC(RXD3),
2273        ASPEED_PINCTRL_FUNC(RXD4),
2274        ASPEED_PINCTRL_FUNC(SALT1),
2275        ASPEED_PINCTRL_FUNC(SALT10),
2276        ASPEED_PINCTRL_FUNC(SALT11),
2277        ASPEED_PINCTRL_FUNC(SALT12),
2278        ASPEED_PINCTRL_FUNC(SALT13),
2279        ASPEED_PINCTRL_FUNC(SALT14),
2280        ASPEED_PINCTRL_FUNC(SALT15),
2281        ASPEED_PINCTRL_FUNC(SALT16),
2282        ASPEED_PINCTRL_FUNC(SALT2),
2283        ASPEED_PINCTRL_FUNC(SALT3),
2284        ASPEED_PINCTRL_FUNC(SALT4),
2285        ASPEED_PINCTRL_FUNC(SALT5),
2286        ASPEED_PINCTRL_FUNC(SALT6),
2287        ASPEED_PINCTRL_FUNC(SALT7),
2288        ASPEED_PINCTRL_FUNC(SALT8),
2289        ASPEED_PINCTRL_FUNC(SALT9),
2290        ASPEED_PINCTRL_FUNC(SD1),
2291        ASPEED_PINCTRL_FUNC(SD2),
2292        ASPEED_PINCTRL_FUNC(SGPM1),
2293        ASPEED_PINCTRL_FUNC(SGPM2),
2294        ASPEED_PINCTRL_FUNC(SGPS1),
2295        ASPEED_PINCTRL_FUNC(SGPS2),
2296        ASPEED_PINCTRL_FUNC(SIOONCTRL),
2297        ASPEED_PINCTRL_FUNC(SIOPBI),
2298        ASPEED_PINCTRL_FUNC(SIOPBO),
2299        ASPEED_PINCTRL_FUNC(SIOPWREQ),
2300        ASPEED_PINCTRL_FUNC(SIOPWRGD),
2301        ASPEED_PINCTRL_FUNC(SIOS3),
2302        ASPEED_PINCTRL_FUNC(SIOS5),
2303        ASPEED_PINCTRL_FUNC(SIOSCI),
2304        ASPEED_PINCTRL_FUNC(SPI1),
2305        ASPEED_PINCTRL_FUNC(SPI1ABR),
2306        ASPEED_PINCTRL_FUNC(SPI1CS1),
2307        ASPEED_PINCTRL_FUNC(SPI1WP),
2308        ASPEED_PINCTRL_FUNC(SPI2),
2309        ASPEED_PINCTRL_FUNC(SPI2CS1),
2310        ASPEED_PINCTRL_FUNC(SPI2CS2),
2311        ASPEED_PINCTRL_FUNC(TACH0),
2312        ASPEED_PINCTRL_FUNC(TACH1),
2313        ASPEED_PINCTRL_FUNC(TACH10),
2314        ASPEED_PINCTRL_FUNC(TACH11),
2315        ASPEED_PINCTRL_FUNC(TACH12),
2316        ASPEED_PINCTRL_FUNC(TACH13),
2317        ASPEED_PINCTRL_FUNC(TACH14),
2318        ASPEED_PINCTRL_FUNC(TACH15),
2319        ASPEED_PINCTRL_FUNC(TACH2),
2320        ASPEED_PINCTRL_FUNC(TACH3),
2321        ASPEED_PINCTRL_FUNC(TACH4),
2322        ASPEED_PINCTRL_FUNC(TACH5),
2323        ASPEED_PINCTRL_FUNC(TACH6),
2324        ASPEED_PINCTRL_FUNC(TACH7),
2325        ASPEED_PINCTRL_FUNC(TACH8),
2326        ASPEED_PINCTRL_FUNC(TACH9),
2327        ASPEED_PINCTRL_FUNC(THRU0),
2328        ASPEED_PINCTRL_FUNC(THRU1),
2329        ASPEED_PINCTRL_FUNC(THRU2),
2330        ASPEED_PINCTRL_FUNC(THRU3),
2331        ASPEED_PINCTRL_FUNC(TXD1),
2332        ASPEED_PINCTRL_FUNC(TXD2),
2333        ASPEED_PINCTRL_FUNC(TXD3),
2334        ASPEED_PINCTRL_FUNC(TXD4),
2335        ASPEED_PINCTRL_FUNC(UART10),
2336        ASPEED_PINCTRL_FUNC(UART11),
2337        ASPEED_PINCTRL_FUNC(UART12),
2338        ASPEED_PINCTRL_FUNC(UART13),
2339        ASPEED_PINCTRL_FUNC(UART6),
2340        ASPEED_PINCTRL_FUNC(UART7),
2341        ASPEED_PINCTRL_FUNC(UART8),
2342        ASPEED_PINCTRL_FUNC(UART9),
2343        ASPEED_PINCTRL_FUNC(USB11BHID),
2344        ASPEED_PINCTRL_FUNC(USB2AD),
2345        ASPEED_PINCTRL_FUNC(USB2ADP),
2346        ASPEED_PINCTRL_FUNC(USB2AH),
2347        ASPEED_PINCTRL_FUNC(USB2AHP),
2348        ASPEED_PINCTRL_FUNC(USB2BD),
2349        ASPEED_PINCTRL_FUNC(USB2BH),
2350        ASPEED_PINCTRL_FUNC(VB),
2351        ASPEED_PINCTRL_FUNC(VGAHS),
2352        ASPEED_PINCTRL_FUNC(VGAVS),
2353        ASPEED_PINCTRL_FUNC(WDTRST1),
2354        ASPEED_PINCTRL_FUNC(WDTRST2),
2355        ASPEED_PINCTRL_FUNC(WDTRST3),
2356        ASPEED_PINCTRL_FUNC(WDTRST4),
2357};
2358
2359static struct aspeed_pin_config aspeed_g6_configs[] = {
2360        /* GPIOB7 */
2361        ASPEED_PULL_DOWN_PINCONF(J24, SCU610, 15),
2362        /* GPIOB6 */
2363        ASPEED_PULL_DOWN_PINCONF(H25, SCU610, 14),
2364        /* GPIOB5 */
2365        ASPEED_PULL_DOWN_PINCONF(G26, SCU610, 13),
2366        /* GPIOB4 */
2367        ASPEED_PULL_DOWN_PINCONF(J23, SCU610, 12),
2368        /* GPIOB3 */
2369        ASPEED_PULL_DOWN_PINCONF(J25, SCU610, 11),
2370        /* GPIOB2 */
2371        ASPEED_PULL_DOWN_PINCONF(H26, SCU610, 10),
2372        /* GPIOB1 */
2373        ASPEED_PULL_DOWN_PINCONF(K23, SCU610, 9),
2374        /* GPIOB0 */
2375        ASPEED_PULL_DOWN_PINCONF(J26, SCU610, 8),
2376
2377        /* GPIOH3 */
2378        ASPEED_PULL_DOWN_PINCONF(A17, SCU614, 27),
2379        /* GPIOH2 */
2380        ASPEED_PULL_DOWN_PINCONF(C18, SCU614, 26),
2381        /* GPIOH1 */
2382        ASPEED_PULL_DOWN_PINCONF(B18, SCU614, 25),
2383        /* GPIOH0 */
2384        ASPEED_PULL_DOWN_PINCONF(A18, SCU614, 24),
2385
2386        /* GPIOL7 */
2387        ASPEED_PULL_DOWN_PINCONF(C14, SCU618, 31),
2388        /* GPIOL6 */
2389        ASPEED_PULL_DOWN_PINCONF(B14, SCU618, 30),
2390        /* GPIOL5 */
2391        ASPEED_PULL_DOWN_PINCONF(F15, SCU618, 29),
2392        /* GPIOL4 */
2393        ASPEED_PULL_DOWN_PINCONF(C15, SCU618, 28),
2394
2395        /* GPIOJ7 */
2396        ASPEED_PULL_UP_PINCONF(D19, SCU618, 15),
2397        /* GPIOJ6 */
2398        ASPEED_PULL_UP_PINCONF(C20, SCU618, 14),
2399        /* GPIOJ5 */
2400        ASPEED_PULL_UP_PINCONF(A19, SCU618, 13),
2401        /* GPIOJ4 */
2402        ASPEED_PULL_UP_PINCONF(C19, SCU618, 12),
2403        /* GPIOJ3 */
2404        ASPEED_PULL_UP_PINCONF(D20, SCU618, 11),
2405        /* GPIOJ2 */
2406        ASPEED_PULL_UP_PINCONF(E19, SCU618, 10),
2407        /* GPIOJ1 */
2408        ASPEED_PULL_UP_PINCONF(A20, SCU618, 9),
2409        /* GPIOJ0 */
2410        ASPEED_PULL_UP_PINCONF(B20, SCU618, 8),
2411
2412        /* GPIOI7 */
2413        ASPEED_PULL_DOWN_PINCONF(A15, SCU618, 7),
2414        /* GPIOI6 */
2415        ASPEED_PULL_DOWN_PINCONF(B16, SCU618, 6),
2416        /* GPIOI5 */
2417        ASPEED_PULL_DOWN_PINCONF(E16, SCU618, 5),
2418        /* GPIOI4 */
2419        ASPEED_PULL_DOWN_PINCONF(C16, SCU618, 4),
2420        /* GPIOI3 */
2421        ASPEED_PULL_DOWN_PINCONF(D16, SCU618, 3),
2422        /* GPIOI2 */
2423        ASPEED_PULL_DOWN_PINCONF(E17, SCU618, 2),
2424        /* GPIOI1 */
2425        ASPEED_PULL_DOWN_PINCONF(A16, SCU618, 1),
2426        /* GPIOI0 */
2427        ASPEED_PULL_DOWN_PINCONF(D17, SCU618, 0),
2428
2429        /* GPIOP7 */
2430        ASPEED_PULL_DOWN_PINCONF(Y23, SCU61C, 31),
2431        /* GPIOP6 */
2432        ASPEED_PULL_DOWN_PINCONF(AB24, SCU61C, 30),
2433        /* GPIOP5 */
2434        ASPEED_PULL_DOWN_PINCONF(AB23, SCU61C, 29),
2435        /* GPIOP4 */
2436        ASPEED_PULL_DOWN_PINCONF(W23, SCU61C, 28),
2437        /* GPIOP3 */
2438        ASPEED_PULL_DOWN_PINCONF(AA24, SCU61C, 27),
2439        /* GPIOP2 */
2440        ASPEED_PULL_DOWN_PINCONF(AA23, SCU61C, 26),
2441        /* GPIOP1 */
2442        ASPEED_PULL_DOWN_PINCONF(W24, SCU61C, 25),
2443        /* GPIOP0 */
2444        ASPEED_PULL_DOWN_PINCONF(AB22, SCU61C, 24),
2445
2446        /* GPIOO7 */
2447        ASPEED_PULL_DOWN_PINCONF(AC23, SCU61C, 23),
2448        /* GPIOO6 */
2449        ASPEED_PULL_DOWN_PINCONF(AC24, SCU61C, 22),
2450        /* GPIOO5 */
2451        ASPEED_PULL_DOWN_PINCONF(AC22, SCU61C, 21),
2452        /* GPIOO4 */
2453        ASPEED_PULL_DOWN_PINCONF(AD25, SCU61C, 20),
2454        /* GPIOO3 */
2455        ASPEED_PULL_DOWN_PINCONF(AD24, SCU61C, 19),
2456        /* GPIOO2 */
2457        ASPEED_PULL_DOWN_PINCONF(AD23, SCU61C, 18),
2458        /* GPIOO1 */
2459        ASPEED_PULL_DOWN_PINCONF(AD22, SCU61C, 17),
2460        /* GPIOO0 */
2461        ASPEED_PULL_DOWN_PINCONF(AD26, SCU61C, 16),
2462
2463        /* GPION7 */
2464        ASPEED_PULL_DOWN_PINCONF(M26, SCU61C, 15),
2465        /* GPION6 */
2466        ASPEED_PULL_DOWN_PINCONF(N26, SCU61C, 14),
2467        /* GPION5 */
2468        ASPEED_PULL_DOWN_PINCONF(M23, SCU61C, 13),
2469        /* GPION4 */
2470        ASPEED_PULL_DOWN_PINCONF(P26, SCU61C, 12),
2471        /* GPION3 */
2472        ASPEED_PULL_DOWN_PINCONF(N24, SCU61C, 11),
2473        /* GPION2 */
2474        ASPEED_PULL_DOWN_PINCONF(N25, SCU61C, 10),
2475        /* GPION1 */
2476        ASPEED_PULL_DOWN_PINCONF(N23, SCU61C, 9),
2477        /* GPION0 */
2478        ASPEED_PULL_DOWN_PINCONF(P25, SCU61C, 8),
2479
2480        /* GPIOM7 */
2481        ASPEED_PULL_DOWN_PINCONF(D13, SCU61C, 7),
2482        /* GPIOM6 */
2483        ASPEED_PULL_DOWN_PINCONF(C13, SCU61C, 6),
2484        /* GPIOM5 */
2485        ASPEED_PULL_DOWN_PINCONF(C12, SCU61C, 5),
2486        /* GPIOM4 */
2487        ASPEED_PULL_DOWN_PINCONF(B12, SCU61C, 4),
2488        /* GPIOM3 */
2489        ASPEED_PULL_DOWN_PINCONF(E14, SCU61C, 3),
2490        /* GPIOM2 */
2491        ASPEED_PULL_DOWN_PINCONF(A12, SCU61C, 2),
2492        /* GPIOM1 */
2493        ASPEED_PULL_DOWN_PINCONF(B13, SCU61C, 1),
2494        /* GPIOM0 */
2495        ASPEED_PULL_DOWN_PINCONF(D14, SCU61C, 0),
2496
2497        /* GPIOS7 */
2498        ASPEED_PULL_DOWN_PINCONF(T24, SCU620, 23),
2499        /* GPIOS6 */
2500        ASPEED_PULL_DOWN_PINCONF(P23, SCU620, 22),
2501        /* GPIOS5 */
2502        ASPEED_PULL_DOWN_PINCONF(P24, SCU620, 21),
2503        /* GPIOS4 */
2504        ASPEED_PULL_DOWN_PINCONF(R26, SCU620, 20),
2505        /* GPIOS3*/
2506        ASPEED_PULL_DOWN_PINCONF(R24, SCU620, 19),
2507        /* GPIOS2 */
2508        ASPEED_PULL_DOWN_PINCONF(T26, SCU620, 18),
2509        /* GPIOS1 */
2510        ASPEED_PULL_DOWN_PINCONF(T25, SCU620, 17),
2511        /* GPIOS0 */
2512        ASPEED_PULL_DOWN_PINCONF(R23, SCU620, 16),
2513
2514        /* GPIOR7 */
2515        ASPEED_PULL_DOWN_PINCONF(U26, SCU620, 15),
2516        /* GPIOR6 */
2517        ASPEED_PULL_DOWN_PINCONF(W26, SCU620, 14),
2518        /* GPIOR5 */
2519        ASPEED_PULL_DOWN_PINCONF(T23, SCU620, 13),
2520        /* GPIOR4 */
2521        ASPEED_PULL_DOWN_PINCONF(U25, SCU620, 12),
2522        /* GPIOR3*/
2523        ASPEED_PULL_DOWN_PINCONF(V26, SCU620, 11),
2524        /* GPIOR2 */
2525        ASPEED_PULL_DOWN_PINCONF(V24, SCU620, 10),
2526        /* GPIOR1 */
2527        ASPEED_PULL_DOWN_PINCONF(U24, SCU620, 9),
2528        /* GPIOR0 */
2529        ASPEED_PULL_DOWN_PINCONF(V25, SCU620, 8),
2530
2531        /* GPIOX7 */
2532        ASPEED_PULL_DOWN_PINCONF(AB10, SCU634, 31),
2533        /* GPIOX6 */
2534        ASPEED_PULL_DOWN_PINCONF(AF9, SCU634, 30),
2535        /* GPIOX5 */
2536        ASPEED_PULL_DOWN_PINCONF(AD9, SCU634, 29),
2537        /* GPIOX4 */
2538        ASPEED_PULL_DOWN_PINCONF(AB9, SCU634, 28),
2539        /* GPIOX3*/
2540        ASPEED_PULL_DOWN_PINCONF(AF8, SCU634, 27),
2541        /* GPIOX2 */
2542        ASPEED_PULL_DOWN_PINCONF(AC9, SCU634, 26),
2543        /* GPIOX1 */
2544        ASPEED_PULL_DOWN_PINCONF(AA9, SCU634, 25),
2545        /* GPIOX0 */
2546        ASPEED_PULL_DOWN_PINCONF(AE8, SCU634, 24),
2547
2548        /* GPIOV7 */
2549        ASPEED_PULL_DOWN_PINCONF(AF15, SCU634, 15),
2550        /* GPIOV6 */
2551        ASPEED_PULL_DOWN_PINCONF(AD15, SCU634, 14),
2552        /* GPIOV5 */
2553        ASPEED_PULL_DOWN_PINCONF(AE14, SCU634, 13),
2554        /* GPIOV4 */
2555        ASPEED_PULL_DOWN_PINCONF(AE15, SCU634, 12),
2556        /* GPIOV3*/
2557        ASPEED_PULL_DOWN_PINCONF(AC15, SCU634, 11),
2558        /* GPIOV2 */
2559        ASPEED_PULL_DOWN_PINCONF(AD14, SCU634, 10),
2560        /* GPIOV1 */
2561        ASPEED_PULL_DOWN_PINCONF(AF14, SCU634, 9),
2562        /* GPIOV0 */
2563        ASPEED_PULL_DOWN_PINCONF(AB15, SCU634, 8),
2564
2565        /* GPIOZ7 */
2566        ASPEED_PULL_DOWN_PINCONF(AF10, SCU638, 15),
2567        /* GPIOZ6 */
2568        ASPEED_PULL_DOWN_PINCONF(AD11, SCU638, 14),
2569        /* GPIOZ5 */
2570        ASPEED_PULL_DOWN_PINCONF(AA11, SCU638, 13),
2571        /* GPIOZ4 */
2572        ASPEED_PULL_DOWN_PINCONF(AC11, SCU638, 12),
2573        /* GPIOZ3*/
2574        ASPEED_PULL_DOWN_PINCONF(AB11, SCU638, 11),
2575
2576        /* GPIOZ1 */
2577        ASPEED_PULL_DOWN_PINCONF(AD10, SCU638, 9),
2578        /* GPIOZ0 */
2579        ASPEED_PULL_DOWN_PINCONF(AC10, SCU638, 8),
2580
2581        /* GPIOY6 */
2582        ASPEED_PULL_DOWN_PINCONF(AC12, SCU638, 6),
2583        /* GPIOY5 */
2584        ASPEED_PULL_DOWN_PINCONF(AF12, SCU638, 5),
2585        /* GPIOY4 */
2586        ASPEED_PULL_DOWN_PINCONF(AE12, SCU638, 4),
2587        /* GPIOY3 */
2588        ASPEED_PULL_DOWN_PINCONF(AA12, SCU638, 3),
2589        /* GPIOY2 */
2590        ASPEED_PULL_DOWN_PINCONF(AE11, SCU638, 2),
2591        /* GPIOY1 */
2592        ASPEED_PULL_DOWN_PINCONF(AD12, SCU638, 1),
2593        /* GPIOY0 */
2594        ASPEED_PULL_DOWN_PINCONF(AF11, SCU638, 0),
2595
2596        /* LAD3 */
2597        { PIN_CONFIG_DRIVE_STRENGTH, { AC7, AC7 }, SCU454, GENMASK(31, 30)},
2598        /* LAD2 */
2599        { PIN_CONFIG_DRIVE_STRENGTH, { AC8, AC8 }, SCU454, GENMASK(29, 28)},
2600        /* LAD1 */
2601        { PIN_CONFIG_DRIVE_STRENGTH, { AB8, AB8 }, SCU454, GENMASK(27, 26)},
2602        /* LAD0 */
2603        { PIN_CONFIG_DRIVE_STRENGTH, { AB7, AB7 }, SCU454, GENMASK(25, 24)},
2604
2605        /* MAC3 */
2606        { PIN_CONFIG_POWER_SOURCE,   { H24, E26 }, SCU458, BIT_MASK(4)},
2607        { PIN_CONFIG_DRIVE_STRENGTH, { H24, E26 }, SCU458, GENMASK(1, 0)},
2608        /* MAC4 */
2609        { PIN_CONFIG_POWER_SOURCE,   { F24, B24 }, SCU458, BIT_MASK(5)},
2610        { PIN_CONFIG_DRIVE_STRENGTH, { F24, B24 }, SCU458, GENMASK(3, 2)},
2611
2612        /* GPIO18E */
2613        ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, Y1, Y4, SCU40C, 4),
2614        ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   Y1, Y4, SCU40C, 4),
2615        /* GPIO18D */
2616        ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, AB4, AC5, SCU40C, 3),
2617        ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   AB4, AC5, SCU40C, 3),
2618        /* GPIO18C */
2619        ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, E4, E1, SCU40C, 2),
2620        ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   E4, E1, SCU40C, 2),
2621        /* GPIO18B */
2622        ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, B2, D3, SCU40C, 1),
2623        ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   B2, D3, SCU40C, 1),
2624        /* GPIO18A */
2625        ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, C6, A2, SCU40C, 0),
2626        ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   C6, A2, SCU40C, 0),
2627};
2628
2629/**
2630 * aspeed_g6_sig_expr_set() - Configure a pin's signal by applying an
2631 * expression's descriptor state for all descriptors in the expression.
2632 *
2633 * @ctx: The pinmux context
2634 * @expr: The expression associated with the function whose signal is to be
2635 *        configured
2636 * @enable: true to enable an function's signal through a pin's signal
2637 *          expression, false to disable the function's signal
2638 *
2639 * Return: 0 if the expression is configured as requested and a negative error
2640 * code otherwise
2641 */
2642static int aspeed_g6_sig_expr_set(struct aspeed_pinmux_data *ctx,
2643                                  const struct aspeed_sig_expr *expr,
2644                                  bool enable)
2645{
2646        int ret;
2647        int i;
2648
2649        for (i = 0; i < expr->ndescs; i++) {
2650                const struct aspeed_sig_desc *desc = &expr->descs[i];
2651                u32 pattern = enable ? desc->enable : desc->disable;
2652                u32 val = (pattern << __ffs(desc->mask));
2653                bool is_strap;
2654
2655                if (!ctx->maps[desc->ip])
2656                        return -ENODEV;
2657
2658                WARN_ON(desc->ip != ASPEED_IP_SCU);
2659                is_strap = desc->reg == SCU500 || desc->reg == SCU510;
2660
2661                if (is_strap) {
2662                        /*
2663                         * The AST2600 has write protection mask registers for
2664                         * the hardware strapping in SCU508 and SCU518. Assume
2665                         * that if the platform doesn't want the strapping
2666                         * values changed that it has set the write mask.
2667                         *
2668                         * The strapping registers implement write-1-clear
2669                         * behaviour. SCU500 is paired with clear writes on
2670                         * SCU504, likewise SCU510 is paired with SCU514.
2671                         */
2672                        u32 clear = ~val & desc->mask;
2673                        u32 w1c = desc->reg + 4;
2674
2675                        if (clear)
2676                                ret = regmap_update_bits(ctx->maps[desc->ip],
2677                                                         w1c, desc->mask,
2678                                                         clear);
2679                }
2680
2681                ret = regmap_update_bits(ctx->maps[desc->ip], desc->reg,
2682                                         desc->mask, val);
2683                if (ret)
2684                        return ret;
2685        }
2686
2687        ret = aspeed_sig_expr_eval(ctx, expr, enable);
2688        if (ret < 0)
2689                return ret;
2690
2691        if (!ret)
2692                return -EPERM;
2693        return 0;
2694}
2695
2696static const struct aspeed_pin_config_map aspeed_g6_pin_config_map[] = {
2697        { PIN_CONFIG_BIAS_PULL_DOWN,  0,   1, BIT_MASK(0)},
2698        { PIN_CONFIG_BIAS_PULL_DOWN, -1,   0, BIT_MASK(0)},
2699        { PIN_CONFIG_BIAS_PULL_UP,    0,   1, BIT_MASK(0)},
2700        { PIN_CONFIG_BIAS_PULL_UP,   -1,   0, BIT_MASK(0)},
2701        { PIN_CONFIG_BIAS_DISABLE,   -1,   1, BIT_MASK(0)},
2702        { PIN_CONFIG_DRIVE_STRENGTH,  4,   0, GENMASK(1, 0)},
2703        { PIN_CONFIG_DRIVE_STRENGTH,  8,   1, GENMASK(1, 0)},
2704        { PIN_CONFIG_DRIVE_STRENGTH, 12,   2, GENMASK(1, 0)},
2705        { PIN_CONFIG_DRIVE_STRENGTH, 16,   3, GENMASK(1, 0)},
2706        { PIN_CONFIG_POWER_SOURCE,   3300, 0, BIT_MASK(0)},
2707        { PIN_CONFIG_POWER_SOURCE,   1800, 1, BIT_MASK(0)},
2708};
2709
2710static const struct aspeed_pinmux_ops aspeed_g5_ops = {
2711        .set = aspeed_g6_sig_expr_set,
2712};
2713
2714static struct aspeed_pinctrl_data aspeed_g6_pinctrl_data = {
2715        .pins = aspeed_g6_pins,
2716        .npins = ARRAY_SIZE(aspeed_g6_pins),
2717        .pinmux = {
2718                .ops = &aspeed_g5_ops,
2719                .groups = aspeed_g6_groups,
2720                .ngroups = ARRAY_SIZE(aspeed_g6_groups),
2721                .functions = aspeed_g6_functions,
2722                .nfunctions = ARRAY_SIZE(aspeed_g6_functions),
2723        },
2724        .configs = aspeed_g6_configs,
2725        .nconfigs = ARRAY_SIZE(aspeed_g6_configs),
2726        .confmaps = aspeed_g6_pin_config_map,
2727        .nconfmaps = ARRAY_SIZE(aspeed_g6_pin_config_map),
2728};
2729
2730static const struct pinmux_ops aspeed_g6_pinmux_ops = {
2731        .get_functions_count = aspeed_pinmux_get_fn_count,
2732        .get_function_name = aspeed_pinmux_get_fn_name,
2733        .get_function_groups = aspeed_pinmux_get_fn_groups,
2734        .set_mux = aspeed_pinmux_set_mux,
2735        .gpio_request_enable = aspeed_gpio_request_enable,
2736        .strict = true,
2737};
2738
2739static const struct pinctrl_ops aspeed_g6_pinctrl_ops = {
2740        .get_groups_count = aspeed_pinctrl_get_groups_count,
2741        .get_group_name = aspeed_pinctrl_get_group_name,
2742        .get_group_pins = aspeed_pinctrl_get_group_pins,
2743        .pin_dbg_show = aspeed_pinctrl_pin_dbg_show,
2744        .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
2745        .dt_free_map = pinctrl_utils_free_map,
2746};
2747
2748static const struct pinconf_ops aspeed_g6_conf_ops = {
2749        .is_generic = true,
2750        .pin_config_get = aspeed_pin_config_get,
2751        .pin_config_set = aspeed_pin_config_set,
2752        .pin_config_group_get = aspeed_pin_config_group_get,
2753        .pin_config_group_set = aspeed_pin_config_group_set,
2754};
2755
2756static struct pinctrl_desc aspeed_g6_pinctrl_desc = {
2757        .name = "aspeed-g6-pinctrl",
2758        .pins = aspeed_g6_pins,
2759        .npins = ARRAY_SIZE(aspeed_g6_pins),
2760        .pctlops = &aspeed_g6_pinctrl_ops,
2761        .pmxops = &aspeed_g6_pinmux_ops,
2762        .confops = &aspeed_g6_conf_ops,
2763};
2764
2765static int aspeed_g6_pinctrl_probe(struct platform_device *pdev)
2766{
2767        int i;
2768
2769        for (i = 0; i < ARRAY_SIZE(aspeed_g6_pins); i++)
2770                aspeed_g6_pins[i].number = i;
2771
2772        return aspeed_pinctrl_probe(pdev, &aspeed_g6_pinctrl_desc,
2773                        &aspeed_g6_pinctrl_data);
2774}
2775
2776static const struct of_device_id aspeed_g6_pinctrl_of_match[] = {
2777        { .compatible = "aspeed,ast2600-pinctrl", },
2778        { },
2779};
2780
2781static struct platform_driver aspeed_g6_pinctrl_driver = {
2782        .probe = aspeed_g6_pinctrl_probe,
2783        .driver = {
2784                .name = "aspeed-g6-pinctrl",
2785                .of_match_table = aspeed_g6_pinctrl_of_match,
2786        },
2787};
2788
2789static int aspeed_g6_pinctrl_init(void)
2790{
2791        return platform_driver_register(&aspeed_g6_pinctrl_driver);
2792}
2793
2794arch_initcall(aspeed_g6_pinctrl_init);
2795