linux/drivers/pinctrl/mvebu/pinctrl-armada-ap806.c
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   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * Marvell Armada ap806 pinctrl driver based on mvebu pinctrl core
   4 *
   5 * Copyright (C) 2017 Marvell
   6 *
   7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   8 * Hanna Hawa <hannah@marvell.com>
   9 */
  10
  11#include <linux/err.h>
  12#include <linux/init.h>
  13#include <linux/io.h>
  14#include <linux/platform_device.h>
  15#include <linux/of.h>
  16#include <linux/of_device.h>
  17#include <linux/pinctrl/pinctrl.h>
  18
  19#include "pinctrl-mvebu.h"
  20
  21static struct mvebu_mpp_mode armada_ap806_mpp_modes[] = {
  22        MPP_MODE(0,
  23                 MPP_FUNCTION(0, "gpio",    NULL),
  24                 MPP_FUNCTION(1, "sdio",    "clk"),
  25                 MPP_FUNCTION(3, "spi0",    "clk")),
  26        MPP_MODE(1,
  27                 MPP_FUNCTION(0, "gpio",    NULL),
  28                 MPP_FUNCTION(1, "sdio",    "cmd"),
  29                 MPP_FUNCTION(3, "spi0",    "miso")),
  30        MPP_MODE(2,
  31                 MPP_FUNCTION(0, "gpio",    NULL),
  32                 MPP_FUNCTION(1, "sdio",    "d0"),
  33                 MPP_FUNCTION(3, "spi0",    "mosi")),
  34        MPP_MODE(3,
  35                 MPP_FUNCTION(0, "gpio",    NULL),
  36                 MPP_FUNCTION(1, "sdio",    "d1"),
  37                 MPP_FUNCTION(3, "spi0",    "cs0n")),
  38        MPP_MODE(4,
  39                 MPP_FUNCTION(0, "gpio",    NULL),
  40                 MPP_FUNCTION(1, "sdio",    "d2"),
  41                 MPP_FUNCTION(3, "i2c0",    "sda")),
  42        MPP_MODE(5,
  43                 MPP_FUNCTION(0, "gpio",    NULL),
  44                 MPP_FUNCTION(1, "sdio",    "d3"),
  45                 MPP_FUNCTION(3, "i2c0",    "sdk")),
  46        MPP_MODE(6,
  47                 MPP_FUNCTION(0, "gpio",    NULL),
  48                 MPP_FUNCTION(1, "sdio",    "ds")),
  49        MPP_MODE(7,
  50                 MPP_FUNCTION(0, "gpio",    NULL),
  51                 MPP_FUNCTION(1, "sdio",    "d4"),
  52                 MPP_FUNCTION(3, "uart1",   "rxd")),
  53        MPP_MODE(8,
  54                 MPP_FUNCTION(0, "gpio",    NULL),
  55                 MPP_FUNCTION(1, "sdio",    "d5"),
  56                 MPP_FUNCTION(3, "uart1",   "txd")),
  57        MPP_MODE(9,
  58                 MPP_FUNCTION(0, "gpio",    NULL),
  59                 MPP_FUNCTION(1, "sdio",    "d6"),
  60                 MPP_FUNCTION(3, "spi0",    "cs1n")),
  61        MPP_MODE(10,
  62                 MPP_FUNCTION(0, "gpio",    NULL),
  63                 MPP_FUNCTION(1, "sdio",    "d7")),
  64        MPP_MODE(11,
  65                 MPP_FUNCTION(0, "gpio",    NULL),
  66                 MPP_FUNCTION(3, "uart0",   "txd")),
  67        MPP_MODE(12,
  68                 MPP_FUNCTION(0, "gpio",    NULL),
  69                 MPP_FUNCTION(1, "sdio",    "pw_off"),
  70                 MPP_FUNCTION(2, "sdio",    "hw_rst")),
  71        MPP_MODE(13,
  72                 MPP_FUNCTION(0, "gpio",    NULL)),
  73        MPP_MODE(14,
  74                 MPP_FUNCTION(0, "gpio",    NULL)),
  75        MPP_MODE(15,
  76                 MPP_FUNCTION(0, "gpio",    NULL)),
  77        MPP_MODE(16,
  78                 MPP_FUNCTION(0, "gpio",    NULL)),
  79        MPP_MODE(17,
  80                 MPP_FUNCTION(0, "gpio",    NULL)),
  81        MPP_MODE(18,
  82                 MPP_FUNCTION(0, "gpio",    NULL)),
  83        MPP_MODE(19,
  84                 MPP_FUNCTION(0, "gpio",    NULL),
  85                 MPP_FUNCTION(3, "uart0",   "rxd"),
  86                 MPP_FUNCTION(4, "sdio",    "pw_off")),
  87};
  88
  89static struct mvebu_pinctrl_soc_info armada_ap806_pinctrl_info;
  90
  91static const struct of_device_id armada_ap806_pinctrl_of_match[] = {
  92        {
  93                .compatible = "marvell,ap806-pinctrl",
  94        },
  95        { },
  96};
  97
  98static const struct mvebu_mpp_ctrl armada_ap806_mpp_controls[] = {
  99        MPP_FUNC_CTRL(0, 19, NULL, mvebu_regmap_mpp_ctrl),
 100};
 101
 102static struct pinctrl_gpio_range armada_ap806_mpp_gpio_ranges[] = {
 103        MPP_GPIO_RANGE(0,   0,  0, 20),
 104};
 105
 106static int armada_ap806_pinctrl_probe(struct platform_device *pdev)
 107{
 108        struct mvebu_pinctrl_soc_info *soc = &armada_ap806_pinctrl_info;
 109        const struct of_device_id *match =
 110                of_match_device(armada_ap806_pinctrl_of_match, &pdev->dev);
 111
 112        if (!match || !pdev->dev.parent)
 113                return -ENODEV;
 114
 115        soc->variant = 0; /* no variants for Armada AP806 */
 116        soc->controls = armada_ap806_mpp_controls;
 117        soc->ncontrols = ARRAY_SIZE(armada_ap806_mpp_controls);
 118        soc->gpioranges = armada_ap806_mpp_gpio_ranges;
 119        soc->ngpioranges = ARRAY_SIZE(armada_ap806_mpp_gpio_ranges);
 120        soc->modes = armada_ap806_mpp_modes;
 121        soc->nmodes = armada_ap806_mpp_controls[0].npins;
 122
 123        pdev->dev.platform_data = soc;
 124
 125        return mvebu_pinctrl_simple_regmap_probe(pdev, pdev->dev.parent, 0);
 126}
 127
 128static struct platform_driver armada_ap806_pinctrl_driver = {
 129        .driver = {
 130                .name = "armada-ap806-pinctrl",
 131                .of_match_table = of_match_ptr(armada_ap806_pinctrl_of_match),
 132        },
 133        .probe = armada_ap806_pinctrl_probe,
 134};
 135
 136builtin_platform_driver(armada_ap806_pinctrl_driver);
 137