1
2
3
4
5
6
7
8#include <linux/module.h>
9#include <linux/of.h>
10#include <linux/platform_device.h>
11#include <linux/pinctrl/pinctrl.h>
12
13#include "pinctrl-msm.h"
14
15static const struct pinctrl_pin_desc mdm9607_pins[] = {
16 PINCTRL_PIN(0, "GPIO_0"),
17 PINCTRL_PIN(1, "GPIO_1"),
18 PINCTRL_PIN(2, "GPIO_2"),
19 PINCTRL_PIN(3, "GPIO_3"),
20 PINCTRL_PIN(4, "GPIO_4"),
21 PINCTRL_PIN(5, "GPIO_5"),
22 PINCTRL_PIN(6, "GPIO_6"),
23 PINCTRL_PIN(7, "GPIO_7"),
24 PINCTRL_PIN(8, "GPIO_8"),
25 PINCTRL_PIN(9, "GPIO_9"),
26 PINCTRL_PIN(10, "GPIO_10"),
27 PINCTRL_PIN(11, "GPIO_11"),
28 PINCTRL_PIN(12, "GPIO_12"),
29 PINCTRL_PIN(13, "GPIO_13"),
30 PINCTRL_PIN(14, "GPIO_14"),
31 PINCTRL_PIN(15, "GPIO_15"),
32 PINCTRL_PIN(16, "GPIO_16"),
33 PINCTRL_PIN(17, "GPIO_17"),
34 PINCTRL_PIN(18, "GPIO_18"),
35 PINCTRL_PIN(19, "GPIO_19"),
36 PINCTRL_PIN(20, "GPIO_20"),
37 PINCTRL_PIN(21, "GPIO_21"),
38 PINCTRL_PIN(22, "GPIO_22"),
39 PINCTRL_PIN(23, "GPIO_23"),
40 PINCTRL_PIN(24, "GPIO_24"),
41 PINCTRL_PIN(25, "GPIO_25"),
42 PINCTRL_PIN(26, "GPIO_26"),
43 PINCTRL_PIN(27, "GPIO_27"),
44 PINCTRL_PIN(28, "GPIO_28"),
45 PINCTRL_PIN(29, "GPIO_29"),
46 PINCTRL_PIN(30, "GPIO_30"),
47 PINCTRL_PIN(31, "GPIO_31"),
48 PINCTRL_PIN(32, "GPIO_32"),
49 PINCTRL_PIN(33, "GPIO_33"),
50 PINCTRL_PIN(34, "GPIO_34"),
51 PINCTRL_PIN(35, "GPIO_35"),
52 PINCTRL_PIN(36, "GPIO_36"),
53 PINCTRL_PIN(37, "GPIO_37"),
54 PINCTRL_PIN(38, "GPIO_38"),
55 PINCTRL_PIN(39, "GPIO_39"),
56 PINCTRL_PIN(40, "GPIO_40"),
57 PINCTRL_PIN(41, "GPIO_41"),
58 PINCTRL_PIN(42, "GPIO_42"),
59 PINCTRL_PIN(43, "GPIO_43"),
60 PINCTRL_PIN(44, "GPIO_44"),
61 PINCTRL_PIN(45, "GPIO_45"),
62 PINCTRL_PIN(46, "GPIO_46"),
63 PINCTRL_PIN(47, "GPIO_47"),
64 PINCTRL_PIN(48, "GPIO_48"),
65 PINCTRL_PIN(49, "GPIO_49"),
66 PINCTRL_PIN(50, "GPIO_50"),
67 PINCTRL_PIN(51, "GPIO_51"),
68 PINCTRL_PIN(52, "GPIO_52"),
69 PINCTRL_PIN(53, "GPIO_53"),
70 PINCTRL_PIN(54, "GPIO_54"),
71 PINCTRL_PIN(55, "GPIO_55"),
72 PINCTRL_PIN(56, "GPIO_56"),
73 PINCTRL_PIN(57, "GPIO_57"),
74 PINCTRL_PIN(58, "GPIO_58"),
75 PINCTRL_PIN(59, "GPIO_59"),
76 PINCTRL_PIN(60, "GPIO_60"),
77 PINCTRL_PIN(61, "GPIO_61"),
78 PINCTRL_PIN(62, "GPIO_62"),
79 PINCTRL_PIN(63, "GPIO_63"),
80 PINCTRL_PIN(64, "GPIO_64"),
81 PINCTRL_PIN(65, "GPIO_65"),
82 PINCTRL_PIN(66, "GPIO_66"),
83 PINCTRL_PIN(67, "GPIO_67"),
84 PINCTRL_PIN(68, "GPIO_68"),
85 PINCTRL_PIN(69, "GPIO_69"),
86 PINCTRL_PIN(70, "GPIO_70"),
87 PINCTRL_PIN(71, "GPIO_71"),
88 PINCTRL_PIN(72, "GPIO_72"),
89 PINCTRL_PIN(73, "GPIO_73"),
90 PINCTRL_PIN(74, "GPIO_74"),
91 PINCTRL_PIN(75, "GPIO_75"),
92 PINCTRL_PIN(76, "GPIO_76"),
93 PINCTRL_PIN(77, "GPIO_77"),
94 PINCTRL_PIN(78, "GPIO_78"),
95 PINCTRL_PIN(79, "GPIO_79"),
96 PINCTRL_PIN(80, "SDC1_CLK"),
97 PINCTRL_PIN(81, "SDC1_CMD"),
98 PINCTRL_PIN(82, "SDC1_DATA"),
99 PINCTRL_PIN(83, "SDC2_CLK"),
100 PINCTRL_PIN(84, "SDC2_CMD"),
101 PINCTRL_PIN(85, "SDC2_DATA"),
102 PINCTRL_PIN(86, "QDSD_CLK"),
103 PINCTRL_PIN(87, "QDSD_CMD"),
104 PINCTRL_PIN(88, "QDSD_DATA0"),
105 PINCTRL_PIN(89, "QDSD_DATA1"),
106 PINCTRL_PIN(90, "QDSD_DATA2"),
107 PINCTRL_PIN(91, "QDSD_DATA3"),
108};
109
110#define DECLARE_MSM_GPIO_PINS(pin) \
111 static const unsigned int gpio##pin##_pins[] = { pin }
112
113DECLARE_MSM_GPIO_PINS(0);
114DECLARE_MSM_GPIO_PINS(1);
115DECLARE_MSM_GPIO_PINS(2);
116DECLARE_MSM_GPIO_PINS(3);
117DECLARE_MSM_GPIO_PINS(4);
118DECLARE_MSM_GPIO_PINS(5);
119DECLARE_MSM_GPIO_PINS(6);
120DECLARE_MSM_GPIO_PINS(7);
121DECLARE_MSM_GPIO_PINS(8);
122DECLARE_MSM_GPIO_PINS(9);
123DECLARE_MSM_GPIO_PINS(10);
124DECLARE_MSM_GPIO_PINS(11);
125DECLARE_MSM_GPIO_PINS(12);
126DECLARE_MSM_GPIO_PINS(13);
127DECLARE_MSM_GPIO_PINS(14);
128DECLARE_MSM_GPIO_PINS(15);
129DECLARE_MSM_GPIO_PINS(16);
130DECLARE_MSM_GPIO_PINS(17);
131DECLARE_MSM_GPIO_PINS(18);
132DECLARE_MSM_GPIO_PINS(19);
133DECLARE_MSM_GPIO_PINS(20);
134DECLARE_MSM_GPIO_PINS(21);
135DECLARE_MSM_GPIO_PINS(22);
136DECLARE_MSM_GPIO_PINS(23);
137DECLARE_MSM_GPIO_PINS(24);
138DECLARE_MSM_GPIO_PINS(25);
139DECLARE_MSM_GPIO_PINS(26);
140DECLARE_MSM_GPIO_PINS(27);
141DECLARE_MSM_GPIO_PINS(28);
142DECLARE_MSM_GPIO_PINS(29);
143DECLARE_MSM_GPIO_PINS(30);
144DECLARE_MSM_GPIO_PINS(31);
145DECLARE_MSM_GPIO_PINS(32);
146DECLARE_MSM_GPIO_PINS(33);
147DECLARE_MSM_GPIO_PINS(34);
148DECLARE_MSM_GPIO_PINS(35);
149DECLARE_MSM_GPIO_PINS(36);
150DECLARE_MSM_GPIO_PINS(37);
151DECLARE_MSM_GPIO_PINS(38);
152DECLARE_MSM_GPIO_PINS(39);
153DECLARE_MSM_GPIO_PINS(40);
154DECLARE_MSM_GPIO_PINS(41);
155DECLARE_MSM_GPIO_PINS(42);
156DECLARE_MSM_GPIO_PINS(43);
157DECLARE_MSM_GPIO_PINS(44);
158DECLARE_MSM_GPIO_PINS(45);
159DECLARE_MSM_GPIO_PINS(46);
160DECLARE_MSM_GPIO_PINS(47);
161DECLARE_MSM_GPIO_PINS(48);
162DECLARE_MSM_GPIO_PINS(49);
163DECLARE_MSM_GPIO_PINS(50);
164DECLARE_MSM_GPIO_PINS(51);
165DECLARE_MSM_GPIO_PINS(52);
166DECLARE_MSM_GPIO_PINS(53);
167DECLARE_MSM_GPIO_PINS(54);
168DECLARE_MSM_GPIO_PINS(55);
169DECLARE_MSM_GPIO_PINS(56);
170DECLARE_MSM_GPIO_PINS(57);
171DECLARE_MSM_GPIO_PINS(58);
172DECLARE_MSM_GPIO_PINS(59);
173DECLARE_MSM_GPIO_PINS(60);
174DECLARE_MSM_GPIO_PINS(61);
175DECLARE_MSM_GPIO_PINS(62);
176DECLARE_MSM_GPIO_PINS(63);
177DECLARE_MSM_GPIO_PINS(64);
178DECLARE_MSM_GPIO_PINS(65);
179DECLARE_MSM_GPIO_PINS(66);
180DECLARE_MSM_GPIO_PINS(67);
181DECLARE_MSM_GPIO_PINS(68);
182DECLARE_MSM_GPIO_PINS(69);
183DECLARE_MSM_GPIO_PINS(70);
184DECLARE_MSM_GPIO_PINS(71);
185DECLARE_MSM_GPIO_PINS(72);
186DECLARE_MSM_GPIO_PINS(73);
187DECLARE_MSM_GPIO_PINS(74);
188DECLARE_MSM_GPIO_PINS(75);
189DECLARE_MSM_GPIO_PINS(76);
190DECLARE_MSM_GPIO_PINS(77);
191DECLARE_MSM_GPIO_PINS(78);
192DECLARE_MSM_GPIO_PINS(79);
193
194static const unsigned int sdc1_clk_pins[] = { 80 };
195static const unsigned int sdc1_cmd_pins[] = { 81 };
196static const unsigned int sdc1_data_pins[] = { 82 };
197static const unsigned int sdc2_clk_pins[] = { 83 };
198static const unsigned int sdc2_cmd_pins[] = { 84 };
199static const unsigned int sdc2_data_pins[] = { 85 };
200static const unsigned int qdsd_clk_pins[] = { 86 };
201static const unsigned int qdsd_cmd_pins[] = { 87 };
202static const unsigned int qdsd_data0_pins[] = { 88 };
203static const unsigned int qdsd_data1_pins[] = { 89 };
204static const unsigned int qdsd_data2_pins[] = { 90 };
205static const unsigned int qdsd_data3_pins[] = { 91 };
206
207#define FUNCTION(fname) \
208 [msm_mux_##fname] = { \
209 .name = #fname, \
210 .groups = fname##_groups, \
211 .ngroups = ARRAY_SIZE(fname##_groups), \
212 }
213
214#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
215 { \
216 .name = "gpio" #id, \
217 .pins = gpio##id##_pins, \
218 .npins = ARRAY_SIZE(gpio##id##_pins), \
219 .funcs = (int[]){ \
220 msm_mux_gpio, \
221 msm_mux_##f1, \
222 msm_mux_##f2, \
223 msm_mux_##f3, \
224 msm_mux_##f4, \
225 msm_mux_##f5, \
226 msm_mux_##f6, \
227 msm_mux_##f7, \
228 msm_mux_##f8, \
229 msm_mux_##f9 \
230 }, \
231 .nfuncs = 10, \
232 .ctl_reg = 0x1000 * id, \
233 .io_reg = 0x4 + 0x1000 * id, \
234 .intr_cfg_reg = 0x8 + 0x1000 * id, \
235 .intr_status_reg = 0xc + 0x1000 * id, \
236 .intr_target_reg = 0x8 + 0x1000 * id, \
237 .mux_bit = 2, \
238 .pull_bit = 0, \
239 .drv_bit = 6, \
240 .oe_bit = 9, \
241 .in_bit = 0, \
242 .out_bit = 1, \
243 .intr_enable_bit = 0, \
244 .intr_status_bit = 0, \
245 .intr_target_bit = 5, \
246 .intr_target_kpss_val = 4, \
247 .intr_raw_status_bit = 4, \
248 .intr_polarity_bit = 1, \
249 .intr_detection_bit = 2, \
250 .intr_detection_width = 2, \
251 }
252
253#define SDC_PINGROUP(pg_name, ctl, pull, drv) \
254 { \
255 .name = #pg_name, \
256 .pins = pg_name##_pins, \
257 .npins = ARRAY_SIZE(pg_name##_pins), \
258 .ctl_reg = ctl, \
259 .io_reg = 0, \
260 .intr_cfg_reg = 0, \
261 .intr_status_reg = 0, \
262 .intr_target_reg = 0, \
263 .mux_bit = -1, \
264 .pull_bit = pull, \
265 .drv_bit = drv, \
266 .oe_bit = -1, \
267 .in_bit = -1, \
268 .out_bit = -1, \
269 .intr_enable_bit = -1, \
270 .intr_status_bit = -1, \
271 .intr_target_bit = -1, \
272 .intr_target_kpss_val = -1, \
273 .intr_raw_status_bit = -1, \
274 .intr_polarity_bit = -1, \
275 .intr_detection_bit = -1, \
276 .intr_detection_width = -1, \
277 }
278
279enum mdm9607_functions {
280 msm_mux_adsp_ext,
281 msm_mux_atest_bbrx0,
282 msm_mux_atest_bbrx1,
283 msm_mux_atest_char,
284 msm_mux_atest_char0,
285 msm_mux_atest_char1,
286 msm_mux_atest_char2,
287 msm_mux_atest_char3,
288 msm_mux_atest_combodac_to_gpio_native,
289 msm_mux_atest_gpsadc_dtest0_native,
290 msm_mux_atest_gpsadc_dtest1_native,
291 msm_mux_atest_tsens,
292 msm_mux_backlight_en_b,
293 msm_mux_bimc_dte0,
294 msm_mux_bimc_dte1,
295 msm_mux_blsp1_spi,
296 msm_mux_blsp2_spi,
297 msm_mux_blsp3_spi,
298 msm_mux_blsp_i2c1,
299 msm_mux_blsp_i2c2,
300 msm_mux_blsp_i2c3,
301 msm_mux_blsp_i2c4,
302 msm_mux_blsp_i2c5,
303 msm_mux_blsp_i2c6,
304 msm_mux_blsp_spi1,
305 msm_mux_blsp_spi2,
306 msm_mux_blsp_spi3,
307 msm_mux_blsp_spi4,
308 msm_mux_blsp_spi5,
309 msm_mux_blsp_spi6,
310 msm_mux_blsp_uart1,
311 msm_mux_blsp_uart2,
312 msm_mux_blsp_uart3,
313 msm_mux_blsp_uart4,
314 msm_mux_blsp_uart5,
315 msm_mux_blsp_uart6,
316 msm_mux_blsp_uim1,
317 msm_mux_blsp_uim2,
318 msm_mux_codec_int,
319 msm_mux_codec_rst,
320 msm_mux_coex_uart,
321 msm_mux_cri_trng,
322 msm_mux_cri_trng0,
323 msm_mux_cri_trng1,
324 msm_mux_dbg_out,
325 msm_mux_ebi0_wrcdc,
326 msm_mux_ebi2_a,
327 msm_mux_ebi2_a_d_8_b,
328 msm_mux_ebi2_lcd,
329 msm_mux_ebi2_lcd_cs_n_b,
330 msm_mux_ebi2_lcd_te_b,
331 msm_mux_eth_irq,
332 msm_mux_eth_rst,
333 msm_mux_gcc_gp1_clk_a,
334 msm_mux_gcc_gp1_clk_b,
335 msm_mux_gcc_gp2_clk_a,
336 msm_mux_gcc_gp2_clk_b,
337 msm_mux_gcc_gp3_clk_a,
338 msm_mux_gcc_gp3_clk_b,
339 msm_mux_gcc_plltest,
340 msm_mux_gcc_tlmm,
341 msm_mux_gmac_mdio,
342 msm_mux_gpio,
343 msm_mux_gsm0_tx,
344 msm_mux_lcd_rst,
345 msm_mux_ldo_en,
346 msm_mux_ldo_update,
347 msm_mux_m_voc,
348 msm_mux_modem_tsync,
349 msm_mux_nav_ptp_pps_in_a,
350 msm_mux_nav_ptp_pps_in_b,
351 msm_mux_nav_tsync_out_a,
352 msm_mux_nav_tsync_out_b,
353 msm_mux_pa_indicator,
354 msm_mux_pbs0,
355 msm_mux_pbs1,
356 msm_mux_pbs2,
357 msm_mux_pri_mi2s_data0_a,
358 msm_mux_pri_mi2s_data1_a,
359 msm_mux_pri_mi2s_mclk_a,
360 msm_mux_pri_mi2s_sck_a,
361 msm_mux_pri_mi2s_ws_a,
362 msm_mux_prng_rosc,
363 msm_mux_ptp_pps_out_a,
364 msm_mux_ptp_pps_out_b,
365 msm_mux_pwr_crypto_enabled_a,
366 msm_mux_pwr_crypto_enabled_b,
367 msm_mux_pwr_modem_enabled_a,
368 msm_mux_pwr_modem_enabled_b,
369 msm_mux_pwr_nav_enabled_a,
370 msm_mux_pwr_nav_enabled_b,
371 msm_mux_qdss_cti_trig_in_a0,
372 msm_mux_qdss_cti_trig_in_a1,
373 msm_mux_qdss_cti_trig_in_b0,
374 msm_mux_qdss_cti_trig_in_b1,
375 msm_mux_qdss_cti_trig_out_a0,
376 msm_mux_qdss_cti_trig_out_a1,
377 msm_mux_qdss_cti_trig_out_b0,
378 msm_mux_qdss_cti_trig_out_b1,
379 msm_mux_qdss_traceclk_a,
380 msm_mux_qdss_traceclk_b,
381 msm_mux_qdss_tracectl_a,
382 msm_mux_qdss_tracectl_b,
383 msm_mux_qdss_tracedata_a,
384 msm_mux_qdss_tracedata_b,
385 msm_mux_rcm_marker1,
386 msm_mux_rcm_marker2,
387 msm_mux_sd_write,
388 msm_mux_sec_mi2s,
389 msm_mux_sensor_en,
390 msm_mux_sensor_int2,
391 msm_mux_sensor_int3,
392 msm_mux_sensor_rst,
393 msm_mux_ssbi1,
394 msm_mux_ssbi2,
395 msm_mux_touch_rst,
396 msm_mux_ts_int,
397 msm_mux_uim1_clk,
398 msm_mux_uim1_data,
399 msm_mux_uim1_present,
400 msm_mux_uim1_reset,
401 msm_mux_uim2_clk,
402 msm_mux_uim2_data,
403 msm_mux_uim2_present,
404 msm_mux_uim2_reset,
405 msm_mux_uim_batt,
406 msm_mux_wlan_en1,
407 msm_mux__,
408};
409
410static const char * const gpio_groups[] = {
411 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
412 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
413 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
414 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
415 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
416 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
417 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
418 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
419 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
420 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
421 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
422 "gpio78", "gpio79",
423};
424static const char * const blsp_spi3_groups[] = {
425 "gpio0", "gpio1", "gpio2", "gpio3",
426};
427static const char * const blsp_uart3_groups[] = {
428 "gpio0", "gpio1", "gpio2", "gpio3",
429};
430static const char * const qdss_tracedata_a_groups[] = {
431 "gpio0", "gpio1", "gpio4", "gpio5", "gpio20", "gpio21", "gpio22",
432 "gpio23", "gpio24", "gpio25", "gpio26", "gpio75", "gpio76", "gpio77",
433 "gpio78", "gpio79",
434};
435static const char * const bimc_dte1_groups[] = {
436 "gpio1", "gpio24",
437};
438static const char * const blsp_i2c3_groups[] = {
439 "gpio2", "gpio3",
440};
441static const char * const qdss_traceclk_a_groups[] = {
442 "gpio2",
443};
444static const char * const bimc_dte0_groups[] = {
445 "gpio2", "gpio15",
446};
447static const char * const qdss_cti_trig_in_a1_groups[] = {
448 "gpio3",
449};
450static const char * const blsp_spi2_groups[] = {
451 "gpio4", "gpio5", "gpio6", "gpio7",
452};
453static const char * const blsp_uart2_groups[] = {
454 "gpio4", "gpio5", "gpio6", "gpio7",
455};
456static const char * const blsp_uim2_groups[] = {
457 "gpio4", "gpio5",
458};
459static const char * const blsp_i2c2_groups[] = {
460 "gpio6", "gpio7",
461};
462static const char * const qdss_tracectl_a_groups[] = {
463 "gpio6",
464};
465static const char * const sensor_int2_groups[] = {
466 "gpio8",
467};
468static const char * const blsp_spi5_groups[] = {
469 "gpio8", "gpio9", "gpio10", "gpio11",
470};
471static const char * const blsp_uart5_groups[] = {
472 "gpio8", "gpio9", "gpio10", "gpio11",
473};
474static const char * const ebi2_lcd_groups[] = {
475 "gpio8", "gpio11", "gpio74", "gpio78",
476};
477static const char * const m_voc_groups[] = {
478 "gpio8", "gpio78",
479};
480static const char * const sensor_int3_groups[] = {
481 "gpio9",
482};
483static const char * const sensor_en_groups[] = {
484 "gpio10",
485};
486static const char * const blsp_i2c5_groups[] = {
487 "gpio10", "gpio11",
488};
489static const char * const ebi2_a_groups[] = {
490 "gpio10",
491};
492static const char * const qdss_tracedata_b_groups[] = {
493 "gpio10", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43", "gpio46",
494 "gpio47", "gpio48", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55",
495 "gpio58", "gpio59",
496};
497static const char * const sensor_rst_groups[] = {
498 "gpio11",
499};
500static const char * const blsp2_spi_groups[] = {
501 "gpio11", "gpio13", "gpio77",
502};
503static const char * const blsp_spi1_groups[] = {
504 "gpio12", "gpio13", "gpio14", "gpio15",
505};
506static const char * const blsp_uart1_groups[] = {
507 "gpio12", "gpio13", "gpio14", "gpio15",
508};
509static const char * const blsp_uim1_groups[] = {
510 "gpio12", "gpio13",
511};
512static const char * const blsp3_spi_groups[] = {
513 "gpio12", "gpio26", "gpio76",
514};
515static const char * const gcc_gp2_clk_b_groups[] = {
516 "gpio12",
517};
518static const char * const gcc_gp3_clk_b_groups[] = {
519 "gpio13",
520};
521static const char * const blsp_i2c1_groups[] = {
522 "gpio14", "gpio15",
523};
524static const char * const gcc_gp1_clk_b_groups[] = {
525 "gpio14",
526};
527static const char * const blsp_spi4_groups[] = {
528 "gpio16", "gpio17", "gpio18", "gpio19",
529};
530static const char * const blsp_uart4_groups[] = {
531 "gpio16", "gpio17", "gpio18", "gpio19",
532};
533static const char * const rcm_marker1_groups[] = {
534 "gpio18",
535};
536static const char * const blsp_i2c4_groups[] = {
537 "gpio18", "gpio19",
538};
539static const char * const qdss_cti_trig_out_a1_groups[] = {
540 "gpio18",
541};
542static const char * const rcm_marker2_groups[] = {
543 "gpio19",
544};
545static const char * const qdss_cti_trig_out_a0_groups[] = {
546 "gpio19",
547};
548static const char * const blsp_spi6_groups[] = {
549 "gpio20", "gpio21", "gpio22", "gpio23",
550};
551static const char * const blsp_uart6_groups[] = {
552 "gpio20", "gpio21", "gpio22", "gpio23",
553};
554static const char * const pri_mi2s_ws_a_groups[] = {
555 "gpio20",
556};
557static const char * const ebi2_lcd_te_b_groups[] = {
558 "gpio20",
559};
560static const char * const blsp1_spi_groups[] = {
561 "gpio20", "gpio21", "gpio78",
562};
563static const char * const backlight_en_b_groups[] = {
564 "gpio21",
565};
566static const char * const pri_mi2s_data0_a_groups[] = {
567 "gpio21",
568};
569static const char * const pri_mi2s_data1_a_groups[] = {
570 "gpio22",
571};
572static const char * const blsp_i2c6_groups[] = {
573 "gpio22", "gpio23",
574};
575static const char * const ebi2_a_d_8_b_groups[] = {
576 "gpio22",
577};
578static const char * const pri_mi2s_sck_a_groups[] = {
579 "gpio23",
580};
581static const char * const ebi2_lcd_cs_n_b_groups[] = {
582 "gpio23",
583};
584static const char * const touch_rst_groups[] = {
585 "gpio24",
586};
587static const char * const pri_mi2s_mclk_a_groups[] = {
588 "gpio24",
589};
590static const char * const pwr_nav_enabled_a_groups[] = {
591 "gpio24",
592};
593static const char * const ts_int_groups[] = {
594 "gpio25",
595};
596static const char * const sd_write_groups[] = {
597 "gpio25",
598};
599static const char * const pwr_crypto_enabled_a_groups[] = {
600 "gpio25",
601};
602static const char * const codec_rst_groups[] = {
603 "gpio26",
604};
605static const char * const adsp_ext_groups[] = {
606 "gpio26",
607};
608static const char * const atest_combodac_to_gpio_native_groups[] = {
609 "gpio26", "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
610 "gpio33", "gpio34", "gpio35", "gpio41", "gpio45", "gpio49", "gpio50",
611 "gpio51", "gpio52", "gpio54", "gpio55", "gpio57", "gpio59",
612};
613static const char * const uim2_data_groups[] = {
614 "gpio27",
615};
616static const char * const gmac_mdio_groups[] = {
617 "gpio27", "gpio28",
618};
619static const char * const gcc_gp1_clk_a_groups[] = {
620 "gpio27",
621};
622static const char * const uim2_clk_groups[] = {
623 "gpio28",
624};
625static const char * const gcc_gp2_clk_a_groups[] = {
626 "gpio28",
627};
628static const char * const eth_irq_groups[] = {
629 "gpio29",
630};
631static const char * const uim2_reset_groups[] = {
632 "gpio29",
633};
634static const char * const gcc_gp3_clk_a_groups[] = {
635 "gpio29",
636};
637static const char * const eth_rst_groups[] = {
638 "gpio30",
639};
640static const char * const uim2_present_groups[] = {
641 "gpio30",
642};
643static const char * const prng_rosc_groups[] = {
644 "gpio30",
645};
646static const char * const uim1_data_groups[] = {
647 "gpio31",
648};
649static const char * const uim1_clk_groups[] = {
650 "gpio32",
651};
652static const char * const uim1_reset_groups[] = {
653 "gpio33",
654};
655static const char * const uim1_present_groups[] = {
656 "gpio34",
657};
658static const char * const gcc_plltest_groups[] = {
659 "gpio34", "gpio35",
660};
661static const char * const uim_batt_groups[] = {
662 "gpio35",
663};
664static const char * const coex_uart_groups[] = {
665 "gpio36", "gpio37",
666};
667static const char * const codec_int_groups[] = {
668 "gpio38",
669};
670static const char * const qdss_cti_trig_in_a0_groups[] = {
671 "gpio38",
672};
673static const char * const atest_bbrx1_groups[] = {
674 "gpio39",
675};
676static const char * const cri_trng0_groups[] = {
677 "gpio40",
678};
679static const char * const atest_bbrx0_groups[] = {
680 "gpio40",
681};
682static const char * const cri_trng_groups[] = {
683 "gpio42",
684};
685static const char * const qdss_cti_trig_in_b0_groups[] = {
686 "gpio44",
687};
688static const char * const atest_gpsadc_dtest0_native_groups[] = {
689 "gpio44",
690};
691static const char * const qdss_cti_trig_out_b0_groups[] = {
692 "gpio45",
693};
694static const char * const qdss_tracectl_b_groups[] = {
695 "gpio49",
696};
697static const char * const qdss_traceclk_b_groups[] = {
698 "gpio50",
699};
700static const char * const pa_indicator_groups[] = {
701 "gpio51",
702};
703static const char * const modem_tsync_groups[] = {
704 "gpio53",
705};
706static const char * const nav_tsync_out_a_groups[] = {
707 "gpio53",
708};
709static const char * const nav_ptp_pps_in_a_groups[] = {
710 "gpio53",
711};
712static const char * const ptp_pps_out_a_groups[] = {
713 "gpio53",
714};
715static const char * const gsm0_tx_groups[] = {
716 "gpio55",
717};
718static const char * const qdss_cti_trig_in_b1_groups[] = {
719 "gpio56",
720};
721static const char * const cri_trng1_groups[] = {
722 "gpio57",
723};
724static const char * const qdss_cti_trig_out_b1_groups[] = {
725 "gpio57",
726};
727static const char * const ssbi1_groups[] = {
728 "gpio58",
729};
730static const char * const atest_gpsadc_dtest1_native_groups[] = {
731 "gpio58",
732};
733static const char * const ssbi2_groups[] = {
734 "gpio59",
735};
736static const char * const atest_char3_groups[] = {
737 "gpio60",
738};
739static const char * const atest_char2_groups[] = {
740 "gpio61",
741};
742static const char * const atest_char1_groups[] = {
743 "gpio62",
744};
745static const char * const atest_char0_groups[] = {
746 "gpio63",
747};
748static const char * const atest_char_groups[] = {
749 "gpio64",
750};
751static const char * const ebi0_wrcdc_groups[] = {
752 "gpio70",
753};
754static const char * const ldo_update_groups[] = {
755 "gpio72",
756};
757static const char * const gcc_tlmm_groups[] = {
758 "gpio72",
759};
760static const char * const ldo_en_groups[] = {
761 "gpio73",
762};
763static const char * const dbg_out_groups[] = {
764 "gpio73",
765};
766static const char * const atest_tsens_groups[] = {
767 "gpio73",
768};
769static const char * const lcd_rst_groups[] = {
770 "gpio74",
771};
772static const char * const wlan_en1_groups[] = {
773 "gpio75",
774};
775static const char * const nav_tsync_out_b_groups[] = {
776 "gpio75",
777};
778static const char * const nav_ptp_pps_in_b_groups[] = {
779 "gpio75",
780};
781static const char * const ptp_pps_out_b_groups[] = {
782 "gpio75",
783};
784static const char * const pbs0_groups[] = {
785 "gpio76",
786};
787static const char * const sec_mi2s_groups[] = {
788 "gpio76", "gpio77", "gpio78", "gpio79",
789};
790static const char * const pwr_modem_enabled_a_groups[] = {
791 "gpio76",
792};
793static const char * const pbs1_groups[] = {
794 "gpio77",
795};
796static const char * const pwr_modem_enabled_b_groups[] = {
797 "gpio77",
798};
799static const char * const pbs2_groups[] = {
800 "gpio78",
801};
802static const char * const pwr_nav_enabled_b_groups[] = {
803 "gpio78",
804};
805static const char * const pwr_crypto_enabled_b_groups[] = {
806 "gpio79",
807};
808
809static const struct msm_function mdm9607_functions[] = {
810 FUNCTION(adsp_ext),
811 FUNCTION(atest_bbrx0),
812 FUNCTION(atest_bbrx1),
813 FUNCTION(atest_char),
814 FUNCTION(atest_char0),
815 FUNCTION(atest_char1),
816 FUNCTION(atest_char2),
817 FUNCTION(atest_char3),
818 FUNCTION(atest_combodac_to_gpio_native),
819 FUNCTION(atest_gpsadc_dtest0_native),
820 FUNCTION(atest_gpsadc_dtest1_native),
821 FUNCTION(atest_tsens),
822 FUNCTION(backlight_en_b),
823 FUNCTION(bimc_dte0),
824 FUNCTION(bimc_dte1),
825 FUNCTION(blsp1_spi),
826 FUNCTION(blsp2_spi),
827 FUNCTION(blsp3_spi),
828 FUNCTION(blsp_i2c1),
829 FUNCTION(blsp_i2c2),
830 FUNCTION(blsp_i2c3),
831 FUNCTION(blsp_i2c4),
832 FUNCTION(blsp_i2c5),
833 FUNCTION(blsp_i2c6),
834 FUNCTION(blsp_spi1),
835 FUNCTION(blsp_spi2),
836 FUNCTION(blsp_spi3),
837 FUNCTION(blsp_spi4),
838 FUNCTION(blsp_spi5),
839 FUNCTION(blsp_spi6),
840 FUNCTION(blsp_uart1),
841 FUNCTION(blsp_uart2),
842 FUNCTION(blsp_uart3),
843 FUNCTION(blsp_uart4),
844 FUNCTION(blsp_uart5),
845 FUNCTION(blsp_uart6),
846 FUNCTION(blsp_uim1),
847 FUNCTION(blsp_uim2),
848 FUNCTION(codec_int),
849 FUNCTION(codec_rst),
850 FUNCTION(coex_uart),
851 FUNCTION(cri_trng),
852 FUNCTION(cri_trng0),
853 FUNCTION(cri_trng1),
854 FUNCTION(dbg_out),
855 FUNCTION(ebi0_wrcdc),
856 FUNCTION(ebi2_a),
857 FUNCTION(ebi2_a_d_8_b),
858 FUNCTION(ebi2_lcd),
859 FUNCTION(ebi2_lcd_cs_n_b),
860 FUNCTION(ebi2_lcd_te_b),
861 FUNCTION(eth_irq),
862 FUNCTION(eth_rst),
863 FUNCTION(gcc_gp1_clk_a),
864 FUNCTION(gcc_gp1_clk_b),
865 FUNCTION(gcc_gp2_clk_a),
866 FUNCTION(gcc_gp2_clk_b),
867 FUNCTION(gcc_gp3_clk_a),
868 FUNCTION(gcc_gp3_clk_b),
869 FUNCTION(gcc_plltest),
870 FUNCTION(gcc_tlmm),
871 FUNCTION(gmac_mdio),
872 FUNCTION(gpio),
873 FUNCTION(gsm0_tx),
874 FUNCTION(lcd_rst),
875 FUNCTION(ldo_en),
876 FUNCTION(ldo_update),
877 FUNCTION(m_voc),
878 FUNCTION(modem_tsync),
879 FUNCTION(nav_ptp_pps_in_a),
880 FUNCTION(nav_ptp_pps_in_b),
881 FUNCTION(nav_tsync_out_a),
882 FUNCTION(nav_tsync_out_b),
883 FUNCTION(pa_indicator),
884 FUNCTION(pbs0),
885 FUNCTION(pbs1),
886 FUNCTION(pbs2),
887 FUNCTION(pri_mi2s_data0_a),
888 FUNCTION(pri_mi2s_data1_a),
889 FUNCTION(pri_mi2s_mclk_a),
890 FUNCTION(pri_mi2s_sck_a),
891 FUNCTION(pri_mi2s_ws_a),
892 FUNCTION(prng_rosc),
893 FUNCTION(ptp_pps_out_a),
894 FUNCTION(ptp_pps_out_b),
895 FUNCTION(pwr_crypto_enabled_a),
896 FUNCTION(pwr_crypto_enabled_b),
897 FUNCTION(pwr_modem_enabled_a),
898 FUNCTION(pwr_modem_enabled_b),
899 FUNCTION(pwr_nav_enabled_a),
900 FUNCTION(pwr_nav_enabled_b),
901 FUNCTION(qdss_cti_trig_in_a0),
902 FUNCTION(qdss_cti_trig_in_a1),
903 FUNCTION(qdss_cti_trig_in_b0),
904 FUNCTION(qdss_cti_trig_in_b1),
905 FUNCTION(qdss_cti_trig_out_a0),
906 FUNCTION(qdss_cti_trig_out_a1),
907 FUNCTION(qdss_cti_trig_out_b0),
908 FUNCTION(qdss_cti_trig_out_b1),
909 FUNCTION(qdss_traceclk_a),
910 FUNCTION(qdss_traceclk_b),
911 FUNCTION(qdss_tracectl_a),
912 FUNCTION(qdss_tracectl_b),
913 FUNCTION(qdss_tracedata_a),
914 FUNCTION(qdss_tracedata_b),
915 FUNCTION(rcm_marker1),
916 FUNCTION(rcm_marker2),
917 FUNCTION(sd_write),
918 FUNCTION(sec_mi2s),
919 FUNCTION(sensor_en),
920 FUNCTION(sensor_int2),
921 FUNCTION(sensor_int3),
922 FUNCTION(sensor_rst),
923 FUNCTION(ssbi1),
924 FUNCTION(ssbi2),
925 FUNCTION(touch_rst),
926 FUNCTION(ts_int),
927 FUNCTION(uim1_clk),
928 FUNCTION(uim1_data),
929 FUNCTION(uim1_present),
930 FUNCTION(uim1_reset),
931 FUNCTION(uim2_clk),
932 FUNCTION(uim2_data),
933 FUNCTION(uim2_present),
934 FUNCTION(uim2_reset),
935 FUNCTION(uim_batt),
936 FUNCTION(wlan_en1)
937};
938
939static const struct msm_pingroup mdm9607_groups[] = {
940 PINGROUP(0, blsp_uart3, blsp_spi3, _, _, _, _, _, qdss_tracedata_a, _),
941 PINGROUP(1, blsp_uart3, blsp_spi3, _, _, _, _, _, qdss_tracedata_a, bimc_dte1),
942 PINGROUP(2, blsp_uart3, blsp_i2c3, blsp_spi3, _, _, _, _, _, qdss_traceclk_a),
943 PINGROUP(3, blsp_uart3, blsp_i2c3, blsp_spi3, _, _, _, _, _, _),
944 PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, _, _, _, _, qdss_tracedata_a, _),
945 PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, _, _, _, _, qdss_tracedata_a, _),
946 PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, _, _, _, _, _, _),
947 PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, _, _, _, _, _, _),
948 PINGROUP(8, blsp_spi5, blsp_uart5, ebi2_lcd, m_voc, _, _, _, _, _),
949 PINGROUP(9, blsp_spi5, blsp_uart5, _, _, _, _, _, _, _),
950 PINGROUP(10, blsp_spi5, blsp_i2c5, blsp_uart5, ebi2_a, _, _, qdss_tracedata_b, _, _),
951 PINGROUP(11, blsp_spi5, blsp_i2c5, blsp_uart5, blsp2_spi, ebi2_lcd, _, _, _, _),
952 PINGROUP(12, blsp_spi1, blsp_uart1, blsp_uim1, blsp3_spi, gcc_gp2_clk_b, _, _, _, _),
953 PINGROUP(13, blsp_spi1, blsp_uart1, blsp_uim1, blsp2_spi, gcc_gp3_clk_b, _, _, _, _),
954 PINGROUP(14, blsp_spi1, blsp_uart1, blsp_i2c1, gcc_gp1_clk_b, _, _, _, _, _),
955 PINGROUP(15, blsp_spi1, blsp_uart1, blsp_i2c1, _, _, _, _, _, _),
956 PINGROUP(16, blsp_spi4, blsp_uart4, _, _, _, _, _, _, _),
957 PINGROUP(17, blsp_spi4, blsp_uart4, _, _, _, _, _, _, _),
958 PINGROUP(18, blsp_spi4, blsp_uart4, blsp_i2c4, _, _, _, _, _, _),
959 PINGROUP(19, blsp_spi4, blsp_uart4, blsp_i2c4, _, _, _, _, _, _),
960 PINGROUP(20, blsp_spi6, blsp_uart6, pri_mi2s_ws_a, ebi2_lcd_te_b, blsp1_spi, _, _, _,
961 qdss_tracedata_a),
962 PINGROUP(21, blsp_spi6, blsp_uart6, pri_mi2s_data0_a, blsp1_spi, _, _, _, _, _),
963 PINGROUP(22, blsp_spi6, blsp_uart6, pri_mi2s_data1_a, blsp_i2c6, ebi2_a_d_8_b, _, _, _, _),
964 PINGROUP(23, blsp_spi6, blsp_uart6, pri_mi2s_sck_a, blsp_i2c6, ebi2_lcd_cs_n_b, _, _, _, _),
965 PINGROUP(24, pri_mi2s_mclk_a, _, pwr_nav_enabled_a, _, _, _, _, qdss_tracedata_a,
966 bimc_dte1),
967 PINGROUP(25, sd_write, _, pwr_crypto_enabled_a, _, _, _, _, qdss_tracedata_a, _),
968 PINGROUP(26, blsp3_spi, adsp_ext, _, qdss_tracedata_a, _, atest_combodac_to_gpio_native, _,
969 _, _),
970 PINGROUP(27, uim2_data, gmac_mdio, gcc_gp1_clk_a, _, _, atest_combodac_to_gpio_native, _, _,
971 _),
972 PINGROUP(28, uim2_clk, gmac_mdio, gcc_gp2_clk_a, _, _, atest_combodac_to_gpio_native, _, _,
973 _),
974 PINGROUP(29, uim2_reset, gcc_gp3_clk_a, _, _, atest_combodac_to_gpio_native, _, _, _, _),
975 PINGROUP(30, uim2_present, prng_rosc, _, _, atest_combodac_to_gpio_native, _, _, _, _),
976 PINGROUP(31, uim1_data, _, _, atest_combodac_to_gpio_native, _, _, _, _, _),
977 PINGROUP(32, uim1_clk, _, _, atest_combodac_to_gpio_native, _, _, _, _, _),
978 PINGROUP(33, uim1_reset, _, _, atest_combodac_to_gpio_native, _, _, _, _, _),
979 PINGROUP(34, uim1_present, gcc_plltest, _, _, atest_combodac_to_gpio_native, _, _, _, _),
980 PINGROUP(35, uim_batt, gcc_plltest, _, atest_combodac_to_gpio_native, _, _, _, _, _),
981 PINGROUP(36, coex_uart, _, _, _, _, _, _, _, _),
982 PINGROUP(37, coex_uart, _, _, _, _, _, _, _, _),
983 PINGROUP(38, _, _, _, qdss_cti_trig_in_a0, _, _, _, _, _),
984 PINGROUP(39, _, _, _, qdss_tracedata_b, _, atest_bbrx1, _, _, _),
985 PINGROUP(40, _, cri_trng0, _, _, _, _, qdss_tracedata_b, _, atest_bbrx0),
986 PINGROUP(41, _, _, _, _, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _),
987 PINGROUP(42, _, cri_trng, _, _, qdss_tracedata_b, _, _, _, _),
988 PINGROUP(43, _, _, _, _, qdss_tracedata_b, _, _, _, _),
989 PINGROUP(44, _, _, qdss_cti_trig_in_b0, _, atest_gpsadc_dtest0_native, _, _, _, _),
990 PINGROUP(45, _, _, qdss_cti_trig_out_b0, _, atest_combodac_to_gpio_native, _, _, _, _),
991 PINGROUP(46, _, _, qdss_tracedata_b, _, _, _, _, _, _),
992 PINGROUP(47, _, _, qdss_tracedata_b, _, _, _, _, _, _),
993 PINGROUP(48, _, _, qdss_tracedata_b, _, _, _, _, _, _),
994 PINGROUP(49, _, _, qdss_tracectl_b, _, atest_combodac_to_gpio_native, _, _, _, _),
995 PINGROUP(50, _, _, qdss_traceclk_b, _, atest_combodac_to_gpio_native, _, _, _, _),
996 PINGROUP(51, _, pa_indicator, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _,
997 _),
998 PINGROUP(52, _, _, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, _),
999 PINGROUP(53, _, modem_tsync, nav_tsync_out_a, nav_ptp_pps_in_a, ptp_pps_out_a,
1000 qdss_tracedata_b, _, _, _),
1001 PINGROUP(54, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, _, _, _),
1002 PINGROUP(55, gsm0_tx, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, _, _),
1003 PINGROUP(56, _, _, qdss_cti_trig_in_b1, _, _, _, _, _, _),
1004 PINGROUP(57, _, cri_trng1, _, qdss_cti_trig_out_b1, _, atest_combodac_to_gpio_native, _, _,
1005 _),
1006 PINGROUP(58, _, ssbi1, _, qdss_tracedata_b, _, atest_gpsadc_dtest1_native, _, _, _),
1007 PINGROUP(59, _, ssbi2, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, _),
1008 PINGROUP(60, atest_char3, _, _, _, _, _, _, _, _),
1009 PINGROUP(61, atest_char2, _, _, _, _, _, _, _, _),
1010 PINGROUP(62, atest_char1, _, _, _, _, _, _, _, _),
1011 PINGROUP(63, atest_char0, _, _, _, _, _, _, _, _),
1012 PINGROUP(64, atest_char, _, _, _, _, _, _, _, _),
1013 PINGROUP(65, _, _, _, _, _, _, _, _, _),
1014 PINGROUP(66, _, _, _, _, _, _, _, _, _),
1015 PINGROUP(67, _, _, _, _, _, _, _, _, _),
1016 PINGROUP(68, _, _, _, _, _, _, _, _, _),
1017 PINGROUP(69, _, _, _, _, _, _, _, _, _),
1018 PINGROUP(70, _, _, ebi0_wrcdc, _, _, _, _, _, _),
1019 PINGROUP(71, _, _, _, _, _, _, _, _, _),
1020 PINGROUP(72, ldo_update, _, gcc_tlmm, _, _, _, _, _, _),
1021 PINGROUP(73, ldo_en, dbg_out, _, _, _, atest_tsens, _, _, _),
1022 PINGROUP(74, ebi2_lcd, _, _, _, _, _, _, _, _),
1023 PINGROUP(75, nav_tsync_out_b, nav_ptp_pps_in_b, ptp_pps_out_b, _, qdss_tracedata_a, _, _, _,
1024 _),
1025 PINGROUP(76, pbs0, sec_mi2s, blsp3_spi, pwr_modem_enabled_a, _, qdss_tracedata_a, _, _, _),
1026 PINGROUP(77, pbs1, sec_mi2s, blsp2_spi, pwr_modem_enabled_b, _, qdss_tracedata_a, _, _, _),
1027 PINGROUP(78, pbs2, sec_mi2s, blsp1_spi, ebi2_lcd, m_voc, pwr_nav_enabled_b, _,
1028 qdss_tracedata_a, _),
1029 PINGROUP(79, sec_mi2s, _, pwr_crypto_enabled_b, _, qdss_tracedata_a, _, _, _, _),
1030 SDC_PINGROUP(sdc1_clk, 0x10a000, 13, 6),
1031 SDC_PINGROUP(sdc1_cmd, 0x10a000, 11, 3),
1032 SDC_PINGROUP(sdc1_data, 0x10a000, 9, 0),
1033 SDC_PINGROUP(sdc2_clk, 0x109000, 14, 6),
1034 SDC_PINGROUP(sdc2_cmd, 0x109000, 11, 3),
1035 SDC_PINGROUP(sdc2_data, 0x109000, 9, 0),
1036 SDC_PINGROUP(qdsd_clk, 0x19c000, 3, 0),
1037 SDC_PINGROUP(qdsd_cmd, 0x19c000, 8, 5),
1038 SDC_PINGROUP(qdsd_data0, 0x19c000, 13, 10),
1039 SDC_PINGROUP(qdsd_data1, 0x19c000, 18, 15),
1040 SDC_PINGROUP(qdsd_data2, 0x19c000, 23, 20),
1041 SDC_PINGROUP(qdsd_data3, 0x19c000, 28, 25),
1042};
1043
1044static const struct msm_pinctrl_soc_data mdm9607_pinctrl = {
1045 .pins = mdm9607_pins,
1046 .npins = ARRAY_SIZE(mdm9607_pins),
1047 .functions = mdm9607_functions,
1048 .nfunctions = ARRAY_SIZE(mdm9607_functions),
1049 .groups = mdm9607_groups,
1050 .ngroups = ARRAY_SIZE(mdm9607_groups),
1051 .ngpios = 80,
1052};
1053
1054static int mdm9607_pinctrl_probe(struct platform_device *pdev)
1055{
1056 return msm_pinctrl_probe(pdev, &mdm9607_pinctrl);
1057}
1058
1059static const struct of_device_id mdm9607_pinctrl_of_match[] = {
1060 { .compatible = "qcom,mdm9607-tlmm", },
1061 { }
1062};
1063
1064static struct platform_driver mdm9607_pinctrl_driver = {
1065 .driver = {
1066 .name = "mdm9607-pinctrl",
1067 .of_match_table = mdm9607_pinctrl_of_match,
1068 },
1069 .probe = mdm9607_pinctrl_probe,
1070 .remove = msm_pinctrl_remove,
1071};
1072
1073static int __init mdm9607_pinctrl_init(void)
1074{
1075 return platform_driver_register(&mdm9607_pinctrl_driver);
1076}
1077arch_initcall(mdm9607_pinctrl_init);
1078
1079static void __exit mdm9607_pinctrl_exit(void)
1080{
1081 platform_driver_unregister(&mdm9607_pinctrl_driver);
1082}
1083module_exit(mdm9607_pinctrl_exit);
1084
1085MODULE_DESCRIPTION("Qualcomm mdm9607 pinctrl driver");
1086MODULE_LICENSE("GPL v2");
1087MODULE_DEVICE_TABLE(of, mdm9607_pinctrl_of_match);
1088
