1
2
3
4
5
6
7#include <linux/init.h>
8#include <linux/kernel.h>
9
10#include "sh_pfc.h"
11
12#define CPU_ALL_PORT(fn, pfx, sfx) \
13 PORT_10(0, fn, pfx, sfx), PORT_90(0, fn, pfx, sfx), \
14 PORT_10(100, fn, pfx##10, sfx), PORT_10(110, fn, pfx##11, sfx), \
15 PORT_10(120, fn, pfx##12, sfx), PORT_10(130, fn, pfx##13, sfx), \
16 PORT_10(140, fn, pfx##14, sfx), PORT_1(150, fn, pfx##150, sfx), \
17 PORT_1(151, fn, pfx##151, sfx), PORT_1(152, fn, pfx##152, sfx), \
18 PORT_1(153, fn, pfx##153, sfx), PORT_1(154, fn, pfx##154, sfx), \
19 PORT_1(155, fn, pfx##155, sfx), PORT_1(156, fn, pfx##156, sfx), \
20 PORT_1(157, fn, pfx##157, sfx), PORT_1(158, fn, pfx##158, sfx)
21
22#define CPU_ALL_NOGP(fn) \
23 PIN_NOGP(LCD3_B2, "B15", fn), \
24 PIN_NOGP(LCD3_B3, "C15", fn), \
25 PIN_NOGP(LCD3_B4, "D15", fn), \
26 PIN_NOGP(LCD3_B5, "B14", fn), \
27 PIN_NOGP(LCD3_B6, "C14", fn), \
28 PIN_NOGP(LCD3_B7, "D14", fn), \
29 PIN_NOGP(LCD3_G2, "B17", fn), \
30 PIN_NOGP(LCD3_G3, "C17", fn), \
31 PIN_NOGP(LCD3_G4, "D17", fn), \
32 PIN_NOGP(LCD3_G5, "B16", fn), \
33 PIN_NOGP(LCD3_G6, "C16", fn), \
34 PIN_NOGP(LCD3_G7, "D16", fn)
35
36enum {
37 PINMUX_RESERVED = 0,
38
39 PINMUX_DATA_BEGIN,
40 PORT_ALL(DATA),
41 PINMUX_DATA_END,
42
43 PINMUX_FUNCTION_BEGIN,
44 PORT_ALL(FN),
45
46
47 FN_LCD3_1_0_PORT18, FN_LCD3_1_0_PORT20, FN_LCD3_1_0_PORT21,
48 FN_LCD3_1_0_PORT22, FN_LCD3_1_0_PORT23,
49 FN_JT_SEL, FN_ERR_RST_REQB, FN_REF_CLKO, FN_EXT_CLKI, FN_LCD3_PXCLKB,
50
51
52 FN_LCD3_9_8_PORT38, FN_LCD3_9_8_PORT39, FN_LCD3_11_10_PORT40,
53 FN_LCD3_11_10_PORT41, FN_LCD3_11_10_PORT42, FN_LCD3_11_10_PORT43,
54 FN_IIC_1_0_PORT46, FN_IIC_1_0_PORT47,
55 FN_LCD3_R0, FN_LCD3_R1, FN_LCD3_R2, FN_LCD3_R3, FN_LCD3_R4, FN_LCD3_R5,
56 FN_IIC0_SCL, FN_IIC0_SDA, FN_SD_CKI, FN_SDI0_CKO, FN_SDI0_CKI,
57 FN_SDI0_CMD, FN_SDI0_DATA0, FN_SDI0_DATA1, FN_SDI0_DATA2,
58 FN_SDI0_DATA3, FN_SDI0_DATA4, FN_SDI0_DATA5, FN_SDI0_DATA6,
59 FN_SDI0_DATA7, FN_SDI1_CKO, FN_SDI1_CKI, FN_SDI1_CMD,
60
61
62 FN_AB_1_0_PORT71, FN_AB_1_0_PORT72, FN_AB_1_0_PORT73,
63 FN_AB_1_0_PORT74, FN_AB_1_0_PORT75, FN_AB_1_0_PORT76,
64 FN_AB_1_0_PORT77, FN_AB_1_0_PORT78, FN_AB_1_0_PORT79,
65 FN_AB_1_0_PORT80, FN_AB_1_0_PORT81, FN_AB_1_0_PORT82,
66 FN_AB_1_0_PORT83, FN_AB_1_0_PORT84, FN_AB_3_2_PORT85,
67 FN_AB_3_2_PORT86, FN_AB_3_2_PORT87, FN_AB_3_2_PORT88,
68 FN_AB_5_4_PORT89, FN_AB_5_4_PORT90, FN_AB_7_6_PORT91,
69 FN_AB_7_6_PORT92, FN_AB_1_0_PORT93, FN_AB_1_0_PORT94,
70 FN_AB_1_0_PORT95,
71 FN_SDI1_DATA0, FN_SDI1_DATA1, FN_SDI1_DATA2, FN_SDI1_DATA3,
72 FN_AB_CLK, FN_AB_CSB0, FN_AB_CSB1,
73
74
75 FN_AB_13_12_PORT104, FN_AB_13_12_PORT103, FN_AB_11_10_PORT102,
76 FN_AB_11_10_PORT101, FN_AB_11_10_PORT100, FN_AB_9_8_PORT99,
77 FN_AB_9_8_PORT98, FN_AB_9_8_PORT97,
78 FN_USI_1_0_PORT109, FN_USI_1_0_PORT110, FN_USI_1_0_PORT111,
79 FN_USI_1_0_PORT112, FN_USI_3_2_PORT113, FN_USI_3_2_PORT114,
80 FN_USI_5_4_PORT115, FN_USI_5_4_PORT116, FN_USI_5_4_PORT117,
81 FN_USI_5_4_PORT118, FN_USI_7_6_PORT119, FN_USI_9_8_PORT120,
82 FN_USI_9_8_PORT121,
83 FN_AB_A20, FN_USI0_CS1, FN_USI0_CS2, FN_USI1_DI,
84 FN_USI1_DO,
85 FN_NTSC_CLK, FN_NTSC_DATA0, FN_NTSC_DATA1, FN_NTSC_DATA2,
86 FN_NTSC_DATA3, FN_NTSC_DATA4,
87
88
89 FN_HSI_1_0_PORT143, FN_HSI_1_0_PORT144, FN_HSI_1_0_PORT145,
90 FN_HSI_1_0_PORT146, FN_HSI_1_0_PORT147, FN_HSI_1_0_PORT148,
91 FN_HSI_1_0_PORT149, FN_HSI_1_0_PORT150,
92 FN_UART_1_0_PORT157, FN_UART_1_0_PORT158,
93 FN_NTSC_DATA5, FN_NTSC_DATA6, FN_NTSC_DATA7, FN_CAM_CLKO,
94 FN_CAM_CLKI, FN_CAM_VS, FN_CAM_HS, FN_CAM_YUV0,
95 FN_CAM_YUV1, FN_CAM_YUV2, FN_CAM_YUV3, FN_CAM_YUV4,
96 FN_CAM_YUV5, FN_CAM_YUV6, FN_CAM_YUV7,
97 FN_JT_TDO, FN_JT_TDOEN, FN_LOWPWR, FN_USB_VBUS, FN_UART1_RX,
98 FN_UART1_TX,
99
100
101 FN_SEL_LCD3_1_0_00, FN_SEL_LCD3_1_0_01,
102 FN_SEL_LCD3_9_8_00, FN_SEL_LCD3_9_8_10,
103 FN_SEL_LCD3_11_10_00, FN_SEL_LCD3_11_10_01, FN_SEL_LCD3_11_10_10,
104
105
106 FN_SEL_IIC_1_0_00, FN_SEL_IIC_1_0_01,
107
108
109 FN_SEL_AB_1_0_00, FN_SEL_AB_1_0_10, FN_SEL_AB_3_2_00,
110 FN_SEL_AB_3_2_01, FN_SEL_AB_3_2_10, FN_SEL_AB_3_2_11,
111 FN_SEL_AB_5_4_00, FN_SEL_AB_5_4_01, FN_SEL_AB_5_4_10,
112 FN_SEL_AB_5_4_11, FN_SEL_AB_7_6_00, FN_SEL_AB_7_6_01,
113 FN_SEL_AB_7_6_10,
114 FN_SEL_AB_9_8_00, FN_SEL_AB_9_8_01, FN_SEL_AB_9_8_10,
115 FN_SEL_AB_11_10_00, FN_SEL_AB_11_10_10,
116 FN_SEL_AB_13_12_00, FN_SEL_AB_13_12_10,
117
118
119 FN_SEL_USI_1_0_00, FN_SEL_USI_1_0_01,
120 FN_SEL_USI_3_2_00, FN_SEL_USI_3_2_01,
121 FN_SEL_USI_5_4_00, FN_SEL_USI_5_4_01,
122 FN_SEL_USI_7_6_00, FN_SEL_USI_7_6_01,
123 FN_SEL_USI_9_8_00, FN_SEL_USI_9_8_01,
124
125
126 FN_SEL_HSI_1_0_00, FN_SEL_HSI_1_0_01,
127
128
129 FN_SEL_UART_1_0_00, FN_SEL_UART_1_0_01,
130
131 PINMUX_FUNCTION_END,
132
133 PINMUX_MARK_BEGIN,
134
135
136 JT_SEL_MARK, ERR_RST_REQB_MARK, REF_CLKO_MARK, EXT_CLKI_MARK,
137 LCD3_PXCLKB_MARK, SD_CKI_MARK,
138
139
140 LCD3_R0_MARK, LCD3_R1_MARK, LCD3_R2_MARK, LCD3_R3_MARK, LCD3_R4_MARK,
141 LCD3_R5_MARK, IIC0_SCL_MARK, IIC0_SDA_MARK, SDI0_CKO_MARK,
142 SDI0_CKI_MARK, SDI0_CMD_MARK, SDI0_DATA0_MARK, SDI0_DATA1_MARK,
143 SDI0_DATA2_MARK, SDI0_DATA3_MARK, SDI0_DATA4_MARK, SDI0_DATA5_MARK,
144 SDI0_DATA6_MARK, SDI0_DATA7_MARK, SDI1_CKO_MARK, SDI1_CKI_MARK,
145 SDI1_CMD_MARK,
146
147
148 SDI1_DATA0_MARK, SDI1_DATA1_MARK, SDI1_DATA2_MARK, SDI1_DATA3_MARK,
149 AB_CLK_MARK, AB_CSB0_MARK, AB_CSB1_MARK,
150
151
152 AB_A20_MARK, USI0_CS1_MARK, USI0_CS2_MARK, USI1_DI_MARK,
153 USI1_DO_MARK,
154 NTSC_CLK_MARK, NTSC_DATA0_MARK, NTSC_DATA1_MARK, NTSC_DATA2_MARK,
155 NTSC_DATA3_MARK, NTSC_DATA4_MARK,
156
157
158 NTSC_DATA5_MARK, NTSC_DATA6_MARK, NTSC_DATA7_MARK, CAM_CLKO_MARK,
159 CAM_CLKI_MARK, CAM_VS_MARK, CAM_HS_MARK, CAM_YUV0_MARK,
160 CAM_YUV1_MARK, CAM_YUV2_MARK, CAM_YUV3_MARK, CAM_YUV4_MARK,
161 CAM_YUV5_MARK, CAM_YUV6_MARK, CAM_YUV7_MARK,
162 JT_TDO_MARK, JT_TDOEN_MARK, USB_VBUS_MARK, LOWPWR_MARK,
163 UART1_RX_MARK, UART1_TX_MARK,
164
165
166 LCD3_PXCLK_MARK, LCD3_CLK_I_MARK, LCD3_HS_MARK, LCD3_VS_MARK,
167 LCD3_DE_MARK, LCD3_R6_MARK, LCD3_R7_MARK, LCD3_G0_MARK, LCD3_G1_MARK,
168 LCD3_G2_MARK, LCD3_G3_MARK, LCD3_G4_MARK, LCD3_G5_MARK, LCD3_G6_MARK,
169 LCD3_G7_MARK, LCD3_B0_MARK, LCD3_B1_MARK, LCD3_B2_MARK, LCD3_B3_MARK,
170 LCD3_B4_MARK, LCD3_B5_MARK, LCD3_B6_MARK, LCD3_B7_MARK,
171 YUV3_CLK_O_MARK, YUV3_CLK_I_MARK, YUV3_HS_MARK, YUV3_VS_MARK,
172 YUV3_DE_MARK, YUV3_D0_MARK, YUV3_D1_MARK, YUV3_D2_MARK, YUV3_D3_MARK,
173 YUV3_D4_MARK, YUV3_D5_MARK, YUV3_D6_MARK, YUV3_D7_MARK, YUV3_D8_MARK,
174 YUV3_D9_MARK, YUV3_D10_MARK, YUV3_D11_MARK, YUV3_D12_MARK,
175 YUV3_D13_MARK, YUV3_D14_MARK, YUV3_D15_MARK,
176 TP33_CLK_MARK, TP33_CTRL_MARK, TP33_DATA0_MARK, TP33_DATA1_MARK,
177 TP33_DATA2_MARK, TP33_DATA3_MARK, TP33_DATA4_MARK, TP33_DATA5_MARK,
178 TP33_DATA6_MARK, TP33_DATA7_MARK, TP33_DATA8_MARK, TP33_DATA9_MARK,
179 TP33_DATA10_MARK, TP33_DATA11_MARK, TP33_DATA12_MARK, TP33_DATA13_MARK,
180 TP33_DATA14_MARK, TP33_DATA15_MARK,
181
182
183 IIC1_SCL_MARK, IIC1_SDA_MARK, UART3_RX_MARK, UART3_TX_MARK,
184
185
186 AB_CSB2_MARK, AB_CSB3_MARK, AB_RDB_MARK, AB_WRB_MARK,
187 AB_WAIT_MARK, AB_ADV_MARK, AB_AD0_MARK, AB_AD1_MARK,
188 AB_AD2_MARK, AB_AD3_MARK, AB_AD4_MARK, AB_AD5_MARK,
189 AB_AD6_MARK, AB_AD7_MARK, AB_AD8_MARK, AB_AD9_MARK,
190 AB_AD10_MARK, AB_AD11_MARK, AB_AD12_MARK, AB_AD13_MARK,
191 AB_AD14_MARK, AB_AD15_MARK, AB_A17_MARK, AB_A18_MARK,
192 AB_A19_MARK, AB_A21_MARK, AB_A22_MARK, AB_A23_MARK,
193 AB_A24_MARK, AB_A25_MARK, AB_A26_MARK, AB_A27_MARK,
194 AB_A28_MARK, AB_BEN0_MARK, AB_BEN1_MARK,
195 DTV_BCLK_A_MARK, DTV_PSYNC_A_MARK, DTV_VALID_A_MARK,
196 DTV_DATA_A_MARK,
197 SDI2_CKO_MARK, SDI2_CKI_MARK, SDI2_CMD_MARK,
198 SDI2_DATA0_MARK, SDI2_DATA1_MARK, SDI2_DATA2_MARK,
199 SDI2_DATA3_MARK,
200 CF_CSB0_MARK, CF_CSB1_MARK, CF_IORDB_MARK,
201 CF_IOWRB_MARK, CF_IORDY_MARK, CF_RESET_MARK,
202 CF_D00_MARK, CF_D01_MARK, CF_D02_MARK, CF_D03_MARK,
203 CF_D04_MARK, CF_D05_MARK, CF_D06_MARK, CF_D07_MARK,
204 CF_D08_MARK, CF_D09_MARK, CF_D10_MARK, CF_D11_MARK,
205 CF_D12_MARK, CF_D13_MARK, CF_D14_MARK, CF_D15_MARK,
206 CF_A00_MARK, CF_A01_MARK, CF_A02_MARK,
207 CF_INTRQ_MARK, CF_INPACKB_MARK, CF_CDB1_MARK, CF_CDB2_MARK,
208 USI5_CLK_A_MARK, USI5_DI_A_MARK, USI5_DO_A_MARK,
209 USI5_CS0_A_MARK, USI5_CS1_A_MARK, USI5_CS2_A_MARK,
210
211
212 USI0_CS3_MARK, USI0_CS4_MARK, USI0_CS5_MARK,
213 USI0_CS6_MARK,
214 USI2_CLK_MARK, USI2_DI_MARK, USI2_DO_MARK,
215 USI2_CS0_MARK, USI2_CS1_MARK, USI2_CS2_MARK,
216 USI3_CLK_MARK, USI3_DI_MARK, USI3_DO_MARK,
217 USI3_CS0_MARK,
218 USI4_CLK_MARK, USI4_DI_MARK, USI4_DO_MARK,
219 USI4_CS0_MARK, USI4_CS1_MARK,
220 PWM0_MARK, PWM1_MARK,
221 DTV_BCLK_B_MARK, DTV_PSYNC_B_MARK, DTV_VALID_B_MARK,
222 DTV_DATA_B_MARK,
223
224
225 USI5_CLK_B_MARK, USI5_DO_B_MARK, USI5_CS0_B_MARK, USI5_CS1_B_MARK,
226 USI5_CS2_B_MARK, USI5_CS3_B_MARK, USI5_CS4_B_MARK, USI5_DI_B_MARK,
227
228
229 UART1_CTSB_MARK, UART1_RTSB_MARK,
230 UART2_RX_MARK, UART2_TX_MARK,
231
232 PINMUX_MARK_END,
233};
234
235
236
237
238enum {
239 PORT_ASSIGN_LAST(),
240 NOGP_ALL(),
241};
242
243
244
245#define __PIN_CFG(pn, pfx, sfx) SH_PFC_PIN_CFG(pfx, 0)
246#define PINMUX_EMEV_GPIO_ALL() CPU_ALL_PORT(__PIN_CFG, , unused)
247
248static const struct sh_pfc_pin pinmux_pins[] = {
249 PINMUX_EMEV_GPIO_ALL(),
250 PINMUX_NOGP_ALL(),
251};
252
253
254#define __PORT_DATA(pn, pfx, sfx) PINMUX_DATA(PORT##pfx##_DATA, PORT##pfx##_FN)
255#define PINMUX_EMEV_DATA_ALL() CPU_ALL_PORT(__PORT_DATA, , unused)
256
257static const u16 pinmux_data[] = {
258 PINMUX_EMEV_DATA_ALL(),
259
260
261
262 PINMUX_SINGLE(JT_SEL),
263
264 PINMUX_SINGLE(ERR_RST_REQB),
265
266 PINMUX_SINGLE(REF_CLKO),
267
268 PINMUX_SINGLE(EXT_CLKI),
269
270 PINMUX_IPSR_NOFN(LCD3_1_0_PORT18, LCD3_PXCLK, SEL_LCD3_1_0_00),
271 PINMUX_IPSR_NOFN(LCD3_1_0_PORT18, YUV3_CLK_O, SEL_LCD3_1_0_01),
272
273 PINMUX_SINGLE(LCD3_PXCLKB),
274
275 PINMUX_IPSR_NOFN(LCD3_1_0_PORT20, LCD3_CLK_I, SEL_LCD3_1_0_00),
276 PINMUX_IPSR_NOFN(LCD3_1_0_PORT20, YUV3_CLK_I, SEL_LCD3_1_0_01),
277
278 PINMUX_IPSR_NOFN(LCD3_1_0_PORT21, LCD3_HS, SEL_LCD3_1_0_00),
279 PINMUX_IPSR_NOFN(LCD3_1_0_PORT21, YUV3_HS, SEL_LCD3_1_0_01),
280
281 PINMUX_IPSR_NOFN(LCD3_1_0_PORT22, LCD3_VS, SEL_LCD3_1_0_00),
282 PINMUX_IPSR_NOFN(LCD3_1_0_PORT22, YUV3_VS, SEL_LCD3_1_0_01),
283
284 PINMUX_IPSR_NOFN(LCD3_1_0_PORT23, LCD3_DE, SEL_LCD3_1_0_00),
285 PINMUX_IPSR_NOFN(LCD3_1_0_PORT23, YUV3_DE, SEL_LCD3_1_0_01),
286
287
288
289 PINMUX_SINGLE(LCD3_R0),
290
291 PINMUX_SINGLE(LCD3_R1),
292
293 PINMUX_SINGLE(LCD3_R2),
294
295 PINMUX_SINGLE(LCD3_R3),
296
297 PINMUX_SINGLE(LCD3_R4),
298
299 PINMUX_SINGLE(LCD3_R5),
300
301 PINMUX_IPSR_NOFN(LCD3_9_8_PORT38, LCD3_R6, SEL_LCD3_9_8_00),
302 PINMUX_IPSR_NOFN(LCD3_9_8_PORT38, TP33_CLK, SEL_LCD3_9_8_10),
303
304 PINMUX_IPSR_NOFN(LCD3_9_8_PORT39, LCD3_R7, SEL_LCD3_9_8_00),
305 PINMUX_IPSR_NOFN(LCD3_9_8_PORT39, TP33_CTRL, SEL_LCD3_9_8_10),
306
307 PINMUX_IPSR_NOFN(LCD3_11_10_PORT40, LCD3_G0, SEL_LCD3_11_10_00),
308 PINMUX_IPSR_NOFN(LCD3_11_10_PORT40, YUV3_D0, SEL_LCD3_11_10_01),
309 PINMUX_IPSR_NOFN(LCD3_11_10_PORT40, TP33_DATA0, SEL_LCD3_11_10_10),
310
311 PINMUX_IPSR_NOFN(LCD3_11_10_PORT41, LCD3_G1, SEL_LCD3_11_10_00),
312 PINMUX_IPSR_NOFN(LCD3_11_10_PORT41, YUV3_D1, SEL_LCD3_11_10_01),
313 PINMUX_IPSR_NOFN(LCD3_11_10_PORT41, TP33_DATA1, SEL_LCD3_11_10_10),
314
315 PINMUX_DATA(LCD3_G2_MARK, FN_SEL_LCD3_11_10_00),
316 PINMUX_DATA(YUV3_D2_MARK, FN_SEL_LCD3_11_10_01),
317 PINMUX_DATA(TP33_DATA2_MARK, FN_SEL_LCD3_11_10_10),
318
319 PINMUX_DATA(LCD3_G3_MARK, FN_SEL_LCD3_11_10_00),
320 PINMUX_DATA(YUV3_D3_MARK, FN_SEL_LCD3_11_10_01),
321 PINMUX_DATA(TP33_DATA3_MARK, FN_SEL_LCD3_11_10_10),
322
323 PINMUX_DATA(LCD3_G4_MARK, FN_SEL_LCD3_11_10_00),
324 PINMUX_DATA(YUV3_D4_MARK, FN_SEL_LCD3_11_10_01),
325 PINMUX_DATA(TP33_DATA4_MARK, FN_SEL_LCD3_11_10_10),
326
327 PINMUX_DATA(LCD3_G5_MARK, FN_SEL_LCD3_11_10_00),
328 PINMUX_DATA(YUV3_D5_MARK, FN_SEL_LCD3_11_10_01),
329 PINMUX_DATA(TP33_DATA5_MARK, FN_SEL_LCD3_11_10_10),
330
331 PINMUX_DATA(LCD3_G6_MARK, FN_SEL_LCD3_11_10_00),
332 PINMUX_DATA(YUV3_D6_MARK, FN_SEL_LCD3_11_10_01),
333 PINMUX_DATA(TP33_DATA6_MARK, FN_SEL_LCD3_11_10_10),
334
335 PINMUX_DATA(LCD3_G7_MARK, FN_SEL_LCD3_11_10_00),
336 PINMUX_DATA(YUV3_D7_MARK, FN_SEL_LCD3_11_10_01),
337 PINMUX_DATA(TP33_DATA7_MARK, FN_SEL_LCD3_11_10_10),
338
339 PINMUX_IPSR_NOFN(LCD3_11_10_PORT42, LCD3_B0, SEL_LCD3_11_10_00),
340 PINMUX_IPSR_NOFN(LCD3_11_10_PORT42, YUV3_D8, SEL_LCD3_11_10_01),
341 PINMUX_IPSR_NOFN(LCD3_11_10_PORT42, TP33_DATA8, SEL_LCD3_11_10_10),
342
343 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, LCD3_B1, SEL_LCD3_11_10_00),
344 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, YUV3_D9, SEL_LCD3_11_10_01),
345 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, TP33_DATA9, SEL_LCD3_11_10_10),
346
347 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, LCD3_B2, SEL_LCD3_11_10_00),
348 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, YUV3_D10, SEL_LCD3_11_10_01),
349 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, TP33_DATA10, SEL_LCD3_11_10_10),
350
351 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, LCD3_B3, SEL_LCD3_11_10_00),
352 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, YUV3_D11, SEL_LCD3_11_10_01),
353 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, TP33_DATA11, SEL_LCD3_11_10_10),
354
355 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, LCD3_B4, SEL_LCD3_11_10_00),
356 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, YUV3_D12, SEL_LCD3_11_10_01),
357 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, TP33_DATA12, SEL_LCD3_11_10_10),
358
359 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, LCD3_B5, SEL_LCD3_11_10_00),
360 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, YUV3_D13, SEL_LCD3_11_10_01),
361 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, TP33_DATA13, SEL_LCD3_11_10_10),
362
363 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, LCD3_B6, SEL_LCD3_11_10_00),
364 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, YUV3_D14, SEL_LCD3_11_10_01),
365 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, TP33_DATA14, SEL_LCD3_11_10_10),
366
367 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, LCD3_B7, SEL_LCD3_11_10_00),
368 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, YUV3_D15, SEL_LCD3_11_10_01),
369 PINMUX_IPSR_NOFN(LCD3_11_10_PORT43, TP33_DATA15, SEL_LCD3_11_10_10),
370
371 PINMUX_SINGLE(IIC0_SCL),
372
373 PINMUX_SINGLE(IIC0_SDA),
374
375 PINMUX_IPSR_NOFN(IIC_1_0_PORT46, IIC1_SCL, SEL_IIC_1_0_00),
376 PINMUX_IPSR_NOFN(IIC_1_0_PORT46, UART3_RX, SEL_IIC_1_0_01),
377
378 PINMUX_IPSR_NOFN(IIC_1_0_PORT47, IIC1_SDA, SEL_IIC_1_0_00),
379 PINMUX_IPSR_NOFN(IIC_1_0_PORT47, UART3_TX, SEL_IIC_1_0_01),
380
381 PINMUX_SINGLE(SD_CKI),
382
383 PINMUX_SINGLE(SDI0_CKO),
384
385 PINMUX_SINGLE(SDI0_CKI),
386
387 PINMUX_SINGLE(SDI0_CMD),
388
389 PINMUX_SINGLE(SDI0_DATA0),
390
391 PINMUX_SINGLE(SDI0_DATA1),
392
393 PINMUX_SINGLE(SDI0_DATA2),
394
395 PINMUX_SINGLE(SDI0_DATA3),
396
397 PINMUX_SINGLE(SDI0_DATA4),
398
399 PINMUX_SINGLE(SDI0_DATA5),
400
401 PINMUX_SINGLE(SDI0_DATA6),
402
403 PINMUX_SINGLE(SDI0_DATA7),
404
405 PINMUX_SINGLE(SDI1_CKO),
406
407 PINMUX_SINGLE(SDI1_CKI),
408
409 PINMUX_SINGLE(SDI1_CMD),
410
411
412
413 PINMUX_SINGLE(SDI1_DATA0),
414
415 PINMUX_SINGLE(SDI1_DATA1),
416
417 PINMUX_SINGLE(SDI1_DATA2),
418
419 PINMUX_SINGLE(SDI1_DATA3),
420
421 PINMUX_SINGLE(AB_CLK),
422
423 PINMUX_SINGLE(AB_CSB0),
424
425 PINMUX_SINGLE(AB_CSB1),
426
427 PINMUX_IPSR_NOFN(AB_1_0_PORT71, AB_CSB2, SEL_AB_1_0_00),
428 PINMUX_IPSR_NOFN(AB_1_0_PORT71, CF_CSB0, SEL_AB_1_0_10),
429
430 PINMUX_IPSR_NOFN(AB_1_0_PORT72, AB_CSB3, SEL_AB_1_0_00),
431 PINMUX_IPSR_NOFN(AB_1_0_PORT72, CF_CSB1, SEL_AB_1_0_10),
432
433 PINMUX_IPSR_NOFN(AB_1_0_PORT73, AB_RDB, SEL_AB_1_0_00),
434 PINMUX_IPSR_NOFN(AB_1_0_PORT73, CF_IORDB, SEL_AB_1_0_10),
435
436 PINMUX_IPSR_NOFN(AB_1_0_PORT74, AB_WRB, SEL_AB_1_0_00),
437 PINMUX_IPSR_NOFN(AB_1_0_PORT74, CF_IOWRB, SEL_AB_1_0_10),
438
439 PINMUX_IPSR_NOFN(AB_1_0_PORT75, AB_WAIT, SEL_AB_1_0_00),
440 PINMUX_IPSR_NOFN(AB_1_0_PORT75, CF_IORDY, SEL_AB_1_0_10),
441
442 PINMUX_IPSR_NOFN(AB_1_0_PORT76, AB_ADV, SEL_AB_1_0_00),
443 PINMUX_IPSR_NOFN(AB_1_0_PORT76, CF_RESET, SEL_AB_1_0_10),
444
445 PINMUX_IPSR_NOFN(AB_1_0_PORT77, AB_AD0, SEL_AB_1_0_00),
446 PINMUX_IPSR_NOFN(AB_1_0_PORT77, CF_D00, SEL_AB_1_0_10),
447
448 PINMUX_IPSR_NOFN(AB_1_0_PORT78, AB_AD1, SEL_AB_1_0_00),
449 PINMUX_IPSR_NOFN(AB_1_0_PORT78, CF_D01, SEL_AB_1_0_10),
450
451 PINMUX_IPSR_NOFN(AB_1_0_PORT79, AB_AD2, SEL_AB_1_0_00),
452 PINMUX_IPSR_NOFN(AB_1_0_PORT79, CF_D02, SEL_AB_1_0_10),
453
454 PINMUX_IPSR_NOFN(AB_1_0_PORT80, AB_AD3, SEL_AB_1_0_00),
455 PINMUX_IPSR_NOFN(AB_1_0_PORT80, CF_D03, SEL_AB_1_0_10),
456
457 PINMUX_IPSR_NOFN(AB_1_0_PORT81, AB_AD4, SEL_AB_1_0_00),
458 PINMUX_IPSR_NOFN(AB_1_0_PORT81, CF_D04, SEL_AB_1_0_10),
459
460 PINMUX_IPSR_NOFN(AB_1_0_PORT82, AB_AD5, SEL_AB_1_0_00),
461 PINMUX_IPSR_NOFN(AB_1_0_PORT82, CF_D05, SEL_AB_1_0_10),
462
463 PINMUX_IPSR_NOFN(AB_1_0_PORT83, AB_AD6, SEL_AB_1_0_00),
464 PINMUX_IPSR_NOFN(AB_1_0_PORT83, CF_D06, SEL_AB_1_0_10),
465
466 PINMUX_IPSR_NOFN(AB_1_0_PORT84, AB_AD7, SEL_AB_1_0_00),
467 PINMUX_IPSR_NOFN(AB_1_0_PORT84, CF_D07, SEL_AB_1_0_10),
468
469 PINMUX_IPSR_NOFN(AB_3_2_PORT85, AB_AD8, SEL_AB_3_2_00),
470 PINMUX_IPSR_NOFN(AB_3_2_PORT85, DTV_BCLK_A, SEL_AB_3_2_01),
471 PINMUX_IPSR_NOFN(AB_3_2_PORT85, CF_D08, SEL_AB_3_2_10),
472 PINMUX_IPSR_NOFN(AB_3_2_PORT85, USI5_CLK_A, SEL_AB_3_2_11),
473
474 PINMUX_IPSR_NOFN(AB_3_2_PORT86, AB_AD9, SEL_AB_3_2_00),
475 PINMUX_IPSR_NOFN(AB_3_2_PORT86, DTV_PSYNC_A, SEL_AB_3_2_01),
476 PINMUX_IPSR_NOFN(AB_3_2_PORT86, CF_D09, SEL_AB_3_2_10),
477 PINMUX_IPSR_NOFN(AB_3_2_PORT86, USI5_DI_A, SEL_AB_3_2_11),
478
479 PINMUX_IPSR_NOFN(AB_3_2_PORT87, AB_AD10, SEL_AB_3_2_00),
480 PINMUX_IPSR_NOFN(AB_3_2_PORT87, DTV_VALID_A, SEL_AB_3_2_01),
481 PINMUX_IPSR_NOFN(AB_3_2_PORT87, CF_D10, SEL_AB_3_2_10),
482 PINMUX_IPSR_NOFN(AB_3_2_PORT87, USI5_DO_A, SEL_AB_3_2_11),
483
484 PINMUX_IPSR_NOFN(AB_3_2_PORT88, AB_AD11, SEL_AB_3_2_00),
485 PINMUX_IPSR_NOFN(AB_3_2_PORT88, DTV_DATA_A, SEL_AB_3_2_01),
486 PINMUX_IPSR_NOFN(AB_3_2_PORT88, CF_D11, SEL_AB_3_2_10),
487 PINMUX_IPSR_NOFN(AB_3_2_PORT88, USI5_CS0_A, SEL_AB_3_2_11),
488
489 PINMUX_IPSR_NOFN(AB_5_4_PORT89, AB_AD12, SEL_AB_5_4_00),
490 PINMUX_IPSR_NOFN(AB_5_4_PORT89, SDI2_DATA0, SEL_AB_5_4_01),
491 PINMUX_IPSR_NOFN(AB_5_4_PORT89, CF_D12, SEL_AB_5_4_10),
492 PINMUX_IPSR_NOFN(AB_5_4_PORT89, USI5_CS1_A, SEL_AB_5_4_11),
493
494 PINMUX_IPSR_NOFN(AB_5_4_PORT90, AB_AD13, SEL_AB_5_4_00),
495 PINMUX_IPSR_NOFN(AB_5_4_PORT90, SDI2_DATA1, SEL_AB_5_4_01),
496 PINMUX_IPSR_NOFN(AB_5_4_PORT90, CF_D13, SEL_AB_5_4_10),
497 PINMUX_IPSR_NOFN(AB_5_4_PORT90, USI5_CS2_A, SEL_AB_5_4_11),
498
499 PINMUX_IPSR_NOFN(AB_7_6_PORT91, AB_AD14, SEL_AB_7_6_00),
500 PINMUX_IPSR_NOFN(AB_7_6_PORT91, SDI2_DATA2, SEL_AB_7_6_01),
501 PINMUX_IPSR_NOFN(AB_7_6_PORT91, CF_D14, SEL_AB_7_6_10),
502
503 PINMUX_IPSR_NOFN(AB_7_6_PORT92, AB_AD15, SEL_AB_7_6_00),
504 PINMUX_IPSR_NOFN(AB_7_6_PORT92, SDI2_DATA3, SEL_AB_7_6_01),
505 PINMUX_IPSR_NOFN(AB_7_6_PORT92, CF_D15, SEL_AB_7_6_10),
506
507 PINMUX_IPSR_NOFN(AB_1_0_PORT93, AB_A17, SEL_AB_1_0_00),
508 PINMUX_IPSR_NOFN(AB_1_0_PORT93, CF_A00, SEL_AB_1_0_10),
509
510 PINMUX_IPSR_NOFN(AB_1_0_PORT94, AB_A18, SEL_AB_1_0_00),
511 PINMUX_IPSR_NOFN(AB_1_0_PORT94, CF_A01, SEL_AB_1_0_10),
512
513 PINMUX_IPSR_NOFN(AB_1_0_PORT95, AB_A19, SEL_AB_1_0_00),
514 PINMUX_IPSR_NOFN(AB_1_0_PORT95, CF_A02, SEL_AB_1_0_10),
515
516
517
518 PINMUX_SINGLE(AB_A20),
519
520 PINMUX_IPSR_NOFN(AB_9_8_PORT97, AB_A21, SEL_AB_9_8_00),
521 PINMUX_IPSR_NOFN(AB_9_8_PORT97, SDI2_CKO, SEL_AB_9_8_01),
522 PINMUX_IPSR_NOFN(AB_9_8_PORT97, CF_INTRQ, SEL_AB_9_8_10),
523
524 PINMUX_IPSR_NOFN(AB_9_8_PORT98, AB_A22, SEL_AB_9_8_00),
525 PINMUX_IPSR_NOFN(AB_9_8_PORT98, SDI2_CKI, SEL_AB_9_8_01),
526
527 PINMUX_IPSR_NOFN(AB_9_8_PORT99, AB_A23, SEL_AB_9_8_00),
528 PINMUX_IPSR_NOFN(AB_9_8_PORT99, SDI2_CMD, SEL_AB_9_8_01),
529
530 PINMUX_IPSR_NOFN(AB_11_10_PORT100, AB_A24, SEL_AB_11_10_00),
531 PINMUX_IPSR_NOFN(AB_11_10_PORT100, CF_INPACKB, SEL_AB_11_10_10),
532
533 PINMUX_IPSR_NOFN(AB_11_10_PORT101, AB_A25, SEL_AB_11_10_00),
534 PINMUX_IPSR_NOFN(AB_11_10_PORT101, CF_CDB1, SEL_AB_11_10_10),
535
536 PINMUX_IPSR_NOFN(AB_11_10_PORT102, AB_A26, SEL_AB_11_10_00),
537 PINMUX_IPSR_NOFN(AB_11_10_PORT102, CF_CDB2, SEL_AB_11_10_10),
538
539 PINMUX_IPSR_NOFN(AB_13_12_PORT103, AB_A27, SEL_AB_13_12_00),
540 PINMUX_IPSR_NOFN(AB_13_12_PORT103, AB_BEN0, SEL_AB_13_12_10),
541
542 PINMUX_IPSR_NOFN(AB_13_12_PORT104, AB_A28, SEL_AB_13_12_00),
543 PINMUX_IPSR_NOFN(AB_13_12_PORT104, AB_BEN1, SEL_AB_13_12_10),
544
545 PINMUX_SINGLE(USI0_CS1),
546
547 PINMUX_SINGLE(USI0_CS2),
548
549 PINMUX_SINGLE(USI1_DI),
550
551 PINMUX_SINGLE(USI1_DO),
552
553 PINMUX_IPSR_NOFN(USI_1_0_PORT109, USI2_CLK, SEL_USI_1_0_00),
554 PINMUX_IPSR_NOFN(USI_1_0_PORT109, DTV_BCLK_B, SEL_USI_1_0_01),
555
556 PINMUX_IPSR_NOFN(USI_1_0_PORT110, USI2_DI, SEL_USI_1_0_00),
557 PINMUX_IPSR_NOFN(USI_1_0_PORT110, DTV_PSYNC_B, SEL_USI_1_0_01),
558
559 PINMUX_IPSR_NOFN(USI_1_0_PORT111, USI2_DO, SEL_USI_1_0_00),
560 PINMUX_IPSR_NOFN(USI_1_0_PORT111, DTV_VALID_B, SEL_USI_1_0_01),
561
562 PINMUX_IPSR_NOFN(USI_1_0_PORT112, USI2_CS0, SEL_USI_1_0_00),
563 PINMUX_IPSR_NOFN(USI_1_0_PORT112, DTV_DATA_B, SEL_USI_1_0_01),
564
565 PINMUX_IPSR_NOFN(USI_3_2_PORT113, USI2_CS1, SEL_USI_3_2_00),
566 PINMUX_IPSR_NOFN(USI_3_2_PORT113, USI4_CS0, SEL_USI_3_2_01),
567
568 PINMUX_IPSR_NOFN(USI_3_2_PORT114, USI2_CS2, SEL_USI_3_2_00),
569 PINMUX_IPSR_NOFN(USI_3_2_PORT114, USI4_CS1, SEL_USI_3_2_01),
570
571 PINMUX_IPSR_NOFN(USI_5_4_PORT115, USI3_CLK, SEL_USI_5_4_00),
572 PINMUX_IPSR_NOFN(USI_5_4_PORT115, USI0_CS3, SEL_USI_5_4_01),
573
574 PINMUX_IPSR_NOFN(USI_5_4_PORT116, USI3_DI, SEL_USI_5_4_00),
575 PINMUX_IPSR_NOFN(USI_5_4_PORT116, USI0_CS4, SEL_USI_5_4_01),
576
577 PINMUX_IPSR_NOFN(USI_5_4_PORT117, USI3_DO, SEL_USI_5_4_00),
578 PINMUX_IPSR_NOFN(USI_5_4_PORT117, USI0_CS5, SEL_USI_5_4_01),
579
580 PINMUX_IPSR_NOFN(USI_5_4_PORT118, USI3_CS0, SEL_USI_5_4_00),
581 PINMUX_IPSR_NOFN(USI_5_4_PORT118, USI0_CS6, SEL_USI_5_4_01),
582
583 PINMUX_IPSR_NOFN(USI_7_6_PORT119, USI4_CLK, SEL_USI_7_6_01),
584
585 PINMUX_IPSR_NOFN(USI_9_8_PORT120, PWM0, SEL_USI_9_8_00),
586 PINMUX_IPSR_NOFN(USI_9_8_PORT120, USI4_DI, SEL_USI_9_8_01),
587
588 PINMUX_IPSR_NOFN(USI_9_8_PORT121, PWM1, SEL_USI_9_8_00),
589 PINMUX_IPSR_NOFN(USI_9_8_PORT121, USI4_DO, SEL_USI_9_8_01),
590
591 PINMUX_SINGLE(NTSC_CLK),
592
593 PINMUX_SINGLE(NTSC_DATA0),
594
595 PINMUX_SINGLE(NTSC_DATA1),
596
597 PINMUX_SINGLE(NTSC_DATA2),
598
599 PINMUX_SINGLE(NTSC_DATA3),
600
601 PINMUX_SINGLE(NTSC_DATA4),
602
603
604
605 PINMUX_SINGLE(NTSC_DATA5),
606
607 PINMUX_SINGLE(NTSC_DATA6),
608
609 PINMUX_SINGLE(NTSC_DATA7),
610
611 PINMUX_SINGLE(CAM_CLKO),
612
613 PINMUX_SINGLE(CAM_CLKI),
614
615 PINMUX_SINGLE(CAM_VS),
616
617 PINMUX_SINGLE(CAM_HS),
618
619 PINMUX_SINGLE(CAM_YUV0),
620
621 PINMUX_SINGLE(CAM_YUV1),
622
623 PINMUX_SINGLE(CAM_YUV2),
624
625 PINMUX_SINGLE(CAM_YUV3),
626
627 PINMUX_SINGLE(CAM_YUV4),
628
629 PINMUX_SINGLE(CAM_YUV5),
630
631 PINMUX_SINGLE(CAM_YUV6),
632
633 PINMUX_SINGLE(CAM_YUV7),
634
635 PINMUX_IPSR_NOFN(HSI_1_0_PORT143, USI5_CLK_B, SEL_HSI_1_0_01),
636
637 PINMUX_IPSR_NOFN(HSI_1_0_PORT144, USI5_DO_B, SEL_HSI_1_0_01),
638
639 PINMUX_IPSR_NOFN(HSI_1_0_PORT145, USI5_CS0_B, SEL_HSI_1_0_01),
640
641 PINMUX_IPSR_NOFN(HSI_1_0_PORT146, USI5_CS1_B, SEL_HSI_1_0_01),
642
643 PINMUX_IPSR_NOFN(HSI_1_0_PORT147, USI5_CS2_B, SEL_HSI_1_0_01),
644
645 PINMUX_IPSR_NOFN(HSI_1_0_PORT148, USI5_CS3_B, SEL_HSI_1_0_01),
646
647 PINMUX_IPSR_NOFN(HSI_1_0_PORT149, USI5_CS4_B, SEL_HSI_1_0_01),
648
649 PINMUX_IPSR_NOFN(HSI_1_0_PORT150, USI5_DI_B, SEL_HSI_1_0_01),
650
651 PINMUX_SINGLE(JT_TDO),
652
653 PINMUX_SINGLE(JT_TDOEN),
654
655 PINMUX_SINGLE(USB_VBUS),
656
657 PINMUX_SINGLE(LOWPWR),
658
659 PINMUX_SINGLE(UART1_RX),
660
661 PINMUX_SINGLE(UART1_TX),
662
663 PINMUX_IPSR_NOFN(UART_1_0_PORT157, UART1_CTSB, SEL_UART_1_0_00),
664 PINMUX_IPSR_NOFN(UART_1_0_PORT157, UART2_RX, SEL_UART_1_0_01),
665
666 PINMUX_IPSR_NOFN(UART_1_0_PORT158, UART1_RTSB, SEL_UART_1_0_00),
667 PINMUX_IPSR_NOFN(UART_1_0_PORT158, UART2_TX, SEL_UART_1_0_01),
668};
669
670
671#define EMEV_MUX_PIN(name, pin, mark) \
672 static const unsigned int name##_pins[] = { pin }; \
673 static const unsigned int name##_mux[] = { mark##_MARK }
674
675
676EMEV_MUX_PIN(err_rst_reqb, 3, ERR_RST_REQB);
677EMEV_MUX_PIN(ref_clko, 4, REF_CLKO);
678EMEV_MUX_PIN(ext_clki, 5, EXT_CLKI);
679EMEV_MUX_PIN(lowpwr, 154, LOWPWR);
680
681
682static const unsigned int ab_main_pins[] = {
683
684 73, 74,
685
686 77, 78, 79, 80,
687 81, 82, 83, 84,
688 85, 86, 87, 88,
689 89, 90, 91, 92,
690};
691static const unsigned int ab_main_mux[] = {
692 AB_RDB_MARK, AB_WRB_MARK,
693 AB_AD0_MARK, AB_AD1_MARK, AB_AD2_MARK, AB_AD3_MARK,
694 AB_AD4_MARK, AB_AD5_MARK, AB_AD6_MARK, AB_AD7_MARK,
695 AB_AD8_MARK, AB_AD9_MARK, AB_AD10_MARK, AB_AD11_MARK,
696 AB_AD12_MARK, AB_AD13_MARK, AB_AD14_MARK, AB_AD15_MARK,
697};
698
699EMEV_MUX_PIN(ab_clk, 68, AB_CLK);
700EMEV_MUX_PIN(ab_csb0, 69, AB_CSB0);
701EMEV_MUX_PIN(ab_csb1, 70, AB_CSB1);
702EMEV_MUX_PIN(ab_csb2, 71, AB_CSB2);
703EMEV_MUX_PIN(ab_csb3, 72, AB_CSB3);
704EMEV_MUX_PIN(ab_wait, 75, AB_WAIT);
705EMEV_MUX_PIN(ab_adv, 76, AB_ADV);
706EMEV_MUX_PIN(ab_a17, 93, AB_A17);
707EMEV_MUX_PIN(ab_a18, 94, AB_A18);
708EMEV_MUX_PIN(ab_a19, 95, AB_A19);
709EMEV_MUX_PIN(ab_a20, 96, AB_A20);
710EMEV_MUX_PIN(ab_a21, 97, AB_A21);
711EMEV_MUX_PIN(ab_a22, 98, AB_A22);
712EMEV_MUX_PIN(ab_a23, 99, AB_A23);
713EMEV_MUX_PIN(ab_a24, 100, AB_A24);
714EMEV_MUX_PIN(ab_a25, 101, AB_A25);
715EMEV_MUX_PIN(ab_a26, 102, AB_A26);
716EMEV_MUX_PIN(ab_a27, 103, AB_A27);
717EMEV_MUX_PIN(ab_a28, 104, AB_A28);
718EMEV_MUX_PIN(ab_ben0, 103, AB_BEN0);
719EMEV_MUX_PIN(ab_ben1, 104, AB_BEN1);
720
721
722EMEV_MUX_PIN(cam_clko, 131, CAM_CLKO);
723static const unsigned int cam_pins[] = {
724
725 132, 133, 134,
726
727 135, 136, 137, 138,
728 139, 140, 141, 142,
729};
730static const unsigned int cam_mux[] = {
731 CAM_CLKI_MARK, CAM_VS_MARK, CAM_HS_MARK,
732 CAM_YUV0_MARK, CAM_YUV1_MARK, CAM_YUV2_MARK, CAM_YUV3_MARK,
733 CAM_YUV4_MARK, CAM_YUV5_MARK, CAM_YUV6_MARK, CAM_YUV7_MARK,
734};
735
736
737static const unsigned int cf_ctrl_pins[] = {
738
739
740 71, 72, 73, 74,
741 75, 76, 93, 94,
742 95, 97, 100, 101,
743 102,
744};
745static const unsigned int cf_ctrl_mux[] = {
746 CF_CSB0_MARK, CF_CSB1_MARK, CF_IORDB_MARK, CF_IOWRB_MARK,
747 CF_IORDY_MARK, CF_RESET_MARK, CF_A00_MARK, CF_A01_MARK,
748 CF_A02_MARK, CF_INTRQ_MARK, CF_INPACKB_MARK, CF_CDB1_MARK,
749 CF_CDB2_MARK,
750};
751
752static const unsigned int cf_data8_pins[] = {
753
754 77, 78, 79, 80,
755 81, 82, 83, 84,
756};
757static const unsigned int cf_data8_mux[] = {
758 CF_D00_MARK, CF_D01_MARK, CF_D02_MARK, CF_D03_MARK,
759 CF_D04_MARK, CF_D05_MARK, CF_D06_MARK, CF_D07_MARK,
760};
761static const unsigned int cf_data16_pins[] = {
762
763 77, 78, 79, 80,
764 81, 82, 83, 84,
765 85, 86, 87, 88,
766 89, 90, 91, 92,
767};
768static const unsigned int cf_data16_mux[] = {
769 CF_D00_MARK, CF_D01_MARK, CF_D02_MARK, CF_D03_MARK,
770 CF_D04_MARK, CF_D05_MARK, CF_D06_MARK, CF_D07_MARK,
771 CF_D08_MARK, CF_D09_MARK, CF_D10_MARK, CF_D11_MARK,
772 CF_D12_MARK, CF_D13_MARK, CF_D14_MARK, CF_D15_MARK,
773};
774
775
776static const unsigned int dtv_a_pins[] = {
777
778 85, 86, 87, 88,
779};
780static const unsigned int dtv_a_mux[] = {
781 DTV_BCLK_A_MARK, DTV_PSYNC_A_MARK, DTV_VALID_A_MARK, DTV_DATA_A_MARK,
782};
783
784static const unsigned int dtv_b_pins[] = {
785
786 109, 110, 111, 112,
787};
788static const unsigned int dtv_b_mux[] = {
789 DTV_BCLK_B_MARK, DTV_PSYNC_B_MARK, DTV_VALID_B_MARK, DTV_DATA_B_MARK,
790};
791
792
793static const unsigned int iic0_pins[] = {
794
795 44, 45,
796};
797static const unsigned int iic0_mux[] = {
798 IIC0_SCL_MARK, IIC0_SDA_MARK,
799};
800
801
802static const unsigned int iic1_pins[] = {
803
804 46, 47,
805};
806static const unsigned int iic1_mux[] = {
807 IIC1_SCL_MARK, IIC1_SDA_MARK,
808};
809
810
811static const unsigned int jtag_pins[] = {
812
813 2, 151, 152,
814};
815static const unsigned int jtag_mux[] = {
816 JT_SEL_MARK, JT_TDO_MARK, JT_TDOEN_MARK,
817};
818
819
820EMEV_MUX_PIN(lcd3_pxclk, 18, LCD3_PXCLK);
821EMEV_MUX_PIN(lcd3_pxclkb, 19, LCD3_PXCLKB);
822EMEV_MUX_PIN(lcd3_clk_i, 20, LCD3_CLK_I);
823
824static const unsigned int lcd3_sync_pins[] = {
825
826 21, 22, 23,
827};
828static const unsigned int lcd3_sync_mux[] = {
829 LCD3_HS_MARK, LCD3_VS_MARK, LCD3_DE_MARK,
830};
831
832static const unsigned int lcd3_rgb888_pins[] = {
833
834 32, 33, 34, 35,
835 36, 37, 38, 39,
836 40, 41, PIN_LCD3_G2, PIN_LCD3_G3,
837 PIN_LCD3_G4, PIN_LCD3_G5, PIN_LCD3_G6, PIN_LCD3_G7,
838 42, 43, PIN_LCD3_B2, PIN_LCD3_B3,
839 PIN_LCD3_B4, PIN_LCD3_B5, PIN_LCD3_B6, PIN_LCD3_B7
840};
841static const unsigned int lcd3_rgb888_mux[] = {
842 LCD3_R0_MARK, LCD3_R1_MARK, LCD3_R2_MARK, LCD3_R3_MARK,
843 LCD3_R4_MARK, LCD3_R5_MARK, LCD3_R6_MARK, LCD3_R7_MARK,
844 LCD3_G0_MARK, LCD3_G1_MARK, LCD3_G2_MARK, LCD3_G3_MARK,
845 LCD3_G4_MARK, LCD3_G5_MARK, LCD3_G6_MARK, LCD3_G7_MARK,
846 LCD3_B0_MARK, LCD3_B1_MARK, LCD3_B2_MARK, LCD3_B3_MARK,
847 LCD3_B4_MARK, LCD3_B5_MARK, LCD3_B6_MARK, LCD3_B7_MARK,
848};
849
850EMEV_MUX_PIN(yuv3_clk_i, 20, YUV3_CLK_I);
851static const unsigned int yuv3_pins[] = {
852
853 18, 21, 22, 23,
854
855 40, 41, PIN_LCD3_G2, PIN_LCD3_G3,
856 PIN_LCD3_G4, PIN_LCD3_G5, PIN_LCD3_G6, PIN_LCD3_G7,
857 42, 43, PIN_LCD3_B2, PIN_LCD3_B3,
858 PIN_LCD3_B4, PIN_LCD3_B5, PIN_LCD3_B6, PIN_LCD3_B7,
859};
860static const unsigned int yuv3_mux[] = {
861 YUV3_CLK_O_MARK, YUV3_HS_MARK, YUV3_VS_MARK, YUV3_DE_MARK,
862 YUV3_D0_MARK, YUV3_D1_MARK, YUV3_D2_MARK, YUV3_D3_MARK,
863 YUV3_D4_MARK, YUV3_D5_MARK, YUV3_D6_MARK, YUV3_D7_MARK,
864 YUV3_D8_MARK, YUV3_D9_MARK, YUV3_D10_MARK, YUV3_D11_MARK,
865 YUV3_D12_MARK, YUV3_D13_MARK, YUV3_D14_MARK, YUV3_D15_MARK,
866};
867
868
869EMEV_MUX_PIN(ntsc_clk, 122, NTSC_CLK);
870static const unsigned int ntsc_data_pins[] = {
871
872 123, 124, 125, 126,
873 127, 128, 129, 130,
874};
875static const unsigned int ntsc_data_mux[] = {
876 NTSC_DATA0_MARK, NTSC_DATA1_MARK, NTSC_DATA2_MARK, NTSC_DATA3_MARK,
877 NTSC_DATA4_MARK, NTSC_DATA5_MARK, NTSC_DATA6_MARK, NTSC_DATA7_MARK,
878};
879
880
881EMEV_MUX_PIN(pwm0, 120, PWM0);
882
883
884EMEV_MUX_PIN(pwm1, 121, PWM1);
885
886
887EMEV_MUX_PIN(sd_cki, 48, SD_CKI);
888
889
890static const unsigned int sdi0_ctrl_pins[] = {
891
892 50, 51, 52,
893};
894static const unsigned int sdi0_ctrl_mux[] = {
895 SDI0_CKO_MARK, SDI0_CKI_MARK, SDI0_CMD_MARK,
896};
897
898static const unsigned int sdi0_data1_pins[] = {
899
900 53,
901};
902static const unsigned int sdi0_data1_mux[] = {
903 SDI0_DATA0_MARK,
904};
905static const unsigned int sdi0_data4_pins[] = {
906
907 53, 54, 55, 56,
908};
909static const unsigned int sdi0_data4_mux[] = {
910 SDI0_DATA0_MARK, SDI0_DATA1_MARK, SDI0_DATA2_MARK, SDI0_DATA3_MARK,
911};
912static const unsigned int sdi0_data8_pins[] = {
913
914 53, 54, 55, 56,
915 57, 58, 59, 60
916};
917static const unsigned int sdi0_data8_mux[] = {
918 SDI0_DATA0_MARK, SDI0_DATA1_MARK, SDI0_DATA2_MARK, SDI0_DATA3_MARK,
919 SDI0_DATA4_MARK, SDI0_DATA5_MARK, SDI0_DATA6_MARK, SDI0_DATA7_MARK,
920};
921
922
923static const unsigned int sdi1_ctrl_pins[] = {
924
925 61, 62, 63,
926};
927static const unsigned int sdi1_ctrl_mux[] = {
928 SDI1_CKO_MARK, SDI1_CKI_MARK, SDI1_CMD_MARK,
929};
930
931static const unsigned int sdi1_data1_pins[] = {
932
933 64,
934};
935static const unsigned int sdi1_data1_mux[] = {
936 SDI1_DATA0_MARK,
937};
938static const unsigned int sdi1_data4_pins[] = {
939
940 64, 65, 66, 67,
941};
942static const unsigned int sdi1_data4_mux[] = {
943 SDI1_DATA0_MARK, SDI1_DATA1_MARK, SDI1_DATA2_MARK, SDI1_DATA3_MARK,
944};
945
946
947static const unsigned int sdi2_ctrl_pins[] = {
948
949 97, 98, 99,
950};
951static const unsigned int sdi2_ctrl_mux[] = {
952 SDI2_CKO_MARK, SDI2_CKI_MARK, SDI2_CMD_MARK,
953};
954
955static const unsigned int sdi2_data1_pins[] = {
956
957 89,
958};
959static const unsigned int sdi2_data1_mux[] = {
960 SDI2_DATA0_MARK,
961};
962static const unsigned int sdi2_data4_pins[] = {
963
964 89, 90, 91, 92,
965};
966static const unsigned int sdi2_data4_mux[] = {
967 SDI2_DATA0_MARK, SDI2_DATA1_MARK, SDI2_DATA2_MARK, SDI2_DATA3_MARK,
968};
969
970
971static const unsigned int tp33_pins[] = {
972
973 38, 39,
974
975 40, 41, PIN_LCD3_G2, PIN_LCD3_G3,
976 PIN_LCD3_G4, PIN_LCD3_G5, PIN_LCD3_G6, PIN_LCD3_G7,
977 42, 43, PIN_LCD3_B2, PIN_LCD3_B3,
978 PIN_LCD3_B4, PIN_LCD3_B5, PIN_LCD3_B6, PIN_LCD3_B7,
979};
980static const unsigned int tp33_mux[] = {
981 TP33_CLK_MARK, TP33_CTRL_MARK,
982 TP33_DATA0_MARK, TP33_DATA1_MARK, TP33_DATA2_MARK, TP33_DATA3_MARK,
983 TP33_DATA4_MARK, TP33_DATA5_MARK, TP33_DATA6_MARK, TP33_DATA7_MARK,
984 TP33_DATA8_MARK, TP33_DATA9_MARK, TP33_DATA10_MARK, TP33_DATA11_MARK,
985 TP33_DATA12_MARK, TP33_DATA13_MARK, TP33_DATA14_MARK, TP33_DATA15_MARK,
986};
987
988
989static const unsigned int uart1_data_pins[] = {
990
991 155, 156,
992};
993static const unsigned int uart1_data_mux[] = {
994 UART1_RX_MARK, UART1_TX_MARK,
995};
996
997static const unsigned int uart1_ctrl_pins[] = {
998
999 157, 158,
1000};
1001static const unsigned int uart1_ctrl_mux[] = {
1002 UART1_CTSB_MARK, UART1_RTSB_MARK,
1003};
1004
1005
1006static const unsigned int uart2_data_pins[] = {
1007
1008 157, 158,
1009};
1010static const unsigned int uart2_data_mux[] = {
1011 UART2_RX_MARK, UART2_TX_MARK,
1012};
1013
1014
1015static const unsigned int uart3_data_pins[] = {
1016
1017 46, 47,
1018};
1019static const unsigned int uart3_data_mux[] = {
1020 UART3_RX_MARK, UART3_TX_MARK,
1021};
1022
1023
1024EMEV_MUX_PIN(usb_vbus, 153, USB_VBUS);
1025
1026
1027EMEV_MUX_PIN(usi0_cs1, 105, USI0_CS1);
1028EMEV_MUX_PIN(usi0_cs2, 106, USI0_CS2);
1029EMEV_MUX_PIN(usi0_cs3, 115, USI0_CS3);
1030EMEV_MUX_PIN(usi0_cs4, 116, USI0_CS4);
1031EMEV_MUX_PIN(usi0_cs5, 117, USI0_CS5);
1032EMEV_MUX_PIN(usi0_cs6, 118, USI0_CS6);
1033
1034
1035static const unsigned int usi1_pins[] = {
1036
1037 107, 108,
1038};
1039static const unsigned int usi1_mux[] = {
1040 USI1_DI_MARK, USI1_DO_MARK,
1041};
1042
1043
1044static const unsigned int usi2_pins[] = {
1045
1046 109, 110, 111,
1047};
1048static const unsigned int usi2_mux[] = {
1049 USI2_CLK_MARK, USI2_DI_MARK, USI2_DO_MARK,
1050};
1051EMEV_MUX_PIN(usi2_cs0, 112, USI2_CS0);
1052EMEV_MUX_PIN(usi2_cs1, 113, USI2_CS1);
1053EMEV_MUX_PIN(usi2_cs2, 114, USI2_CS2);
1054
1055
1056static const unsigned int usi3_pins[] = {
1057
1058 115, 116, 117,
1059};
1060static const unsigned int usi3_mux[] = {
1061 USI3_CLK_MARK, USI3_DI_MARK, USI3_DO_MARK,
1062};
1063EMEV_MUX_PIN(usi3_cs0, 118, USI3_CS0);
1064
1065
1066static const unsigned int usi4_pins[] = {
1067
1068 119, 120, 121,
1069};
1070static const unsigned int usi4_mux[] = {
1071 USI4_CLK_MARK, USI4_DI_MARK, USI4_DO_MARK,
1072};
1073EMEV_MUX_PIN(usi4_cs0, 113, USI4_CS0);
1074EMEV_MUX_PIN(usi4_cs1, 114, USI4_CS1);
1075
1076
1077static const unsigned int usi5_a_pins[] = {
1078
1079 85, 86, 87,
1080};
1081static const unsigned int usi5_a_mux[] = {
1082 USI5_CLK_A_MARK, USI5_DI_A_MARK, USI5_DO_A_MARK,
1083};
1084EMEV_MUX_PIN(usi5_cs0_a, 88, USI5_CS0_A);
1085EMEV_MUX_PIN(usi5_cs1_a, 89, USI5_CS1_A);
1086EMEV_MUX_PIN(usi5_cs2_a, 90, USI5_CS2_A);
1087
1088static const unsigned int usi5_b_pins[] = {
1089
1090 143, 144, 150,
1091};
1092static const unsigned int usi5_b_mux[] = {
1093 USI5_CLK_B_MARK, USI5_DI_B_MARK, USI5_DO_B_MARK,
1094};
1095EMEV_MUX_PIN(usi5_cs0_b, 145, USI5_CS0_B);
1096EMEV_MUX_PIN(usi5_cs1_b, 146, USI5_CS1_B);
1097EMEV_MUX_PIN(usi5_cs2_b, 147, USI5_CS2_B);
1098EMEV_MUX_PIN(usi5_cs3_b, 148, USI5_CS3_B);
1099EMEV_MUX_PIN(usi5_cs4_b, 149, USI5_CS4_B);
1100
1101static const struct sh_pfc_pin_group pinmux_groups[] = {
1102 SH_PFC_PIN_GROUP(err_rst_reqb),
1103 SH_PFC_PIN_GROUP(ref_clko),
1104 SH_PFC_PIN_GROUP(ext_clki),
1105 SH_PFC_PIN_GROUP(lowpwr),
1106
1107 SH_PFC_PIN_GROUP(ab_main),
1108 SH_PFC_PIN_GROUP(ab_clk),
1109 SH_PFC_PIN_GROUP(ab_csb0),
1110 SH_PFC_PIN_GROUP(ab_csb1),
1111 SH_PFC_PIN_GROUP(ab_csb2),
1112 SH_PFC_PIN_GROUP(ab_csb3),
1113 SH_PFC_PIN_GROUP(ab_wait),
1114 SH_PFC_PIN_GROUP(ab_adv),
1115 SH_PFC_PIN_GROUP(ab_a17),
1116 SH_PFC_PIN_GROUP(ab_a18),
1117 SH_PFC_PIN_GROUP(ab_a19),
1118 SH_PFC_PIN_GROUP(ab_a20),
1119 SH_PFC_PIN_GROUP(ab_a21),
1120 SH_PFC_PIN_GROUP(ab_a22),
1121 SH_PFC_PIN_GROUP(ab_a23),
1122 SH_PFC_PIN_GROUP(ab_a24),
1123 SH_PFC_PIN_GROUP(ab_a25),
1124 SH_PFC_PIN_GROUP(ab_a26),
1125 SH_PFC_PIN_GROUP(ab_a27),
1126 SH_PFC_PIN_GROUP(ab_a28),
1127 SH_PFC_PIN_GROUP(ab_ben0),
1128 SH_PFC_PIN_GROUP(ab_ben1),
1129
1130 SH_PFC_PIN_GROUP(cam_clko),
1131 SH_PFC_PIN_GROUP(cam),
1132
1133 SH_PFC_PIN_GROUP(cf_ctrl),
1134 SH_PFC_PIN_GROUP(cf_data8),
1135 SH_PFC_PIN_GROUP(cf_data16),
1136
1137 SH_PFC_PIN_GROUP(dtv_a),
1138 SH_PFC_PIN_GROUP(dtv_b),
1139
1140 SH_PFC_PIN_GROUP(iic0),
1141
1142 SH_PFC_PIN_GROUP(iic1),
1143
1144 SH_PFC_PIN_GROUP(jtag),
1145
1146 SH_PFC_PIN_GROUP(lcd3_pxclk),
1147 SH_PFC_PIN_GROUP(lcd3_pxclkb),
1148 SH_PFC_PIN_GROUP(lcd3_clk_i),
1149 SH_PFC_PIN_GROUP(lcd3_sync),
1150 SH_PFC_PIN_GROUP(lcd3_rgb888),
1151 SH_PFC_PIN_GROUP(yuv3_clk_i),
1152 SH_PFC_PIN_GROUP(yuv3),
1153
1154 SH_PFC_PIN_GROUP(ntsc_clk),
1155 SH_PFC_PIN_GROUP(ntsc_data),
1156
1157 SH_PFC_PIN_GROUP(pwm0),
1158
1159 SH_PFC_PIN_GROUP(pwm1),
1160
1161 SH_PFC_PIN_GROUP(sd_cki),
1162
1163 SH_PFC_PIN_GROUP(sdi0_ctrl),
1164 SH_PFC_PIN_GROUP(sdi0_data1),
1165 SH_PFC_PIN_GROUP(sdi0_data4),
1166 SH_PFC_PIN_GROUP(sdi0_data8),
1167
1168 SH_PFC_PIN_GROUP(sdi1_ctrl),
1169 SH_PFC_PIN_GROUP(sdi1_data1),
1170 SH_PFC_PIN_GROUP(sdi1_data4),
1171
1172 SH_PFC_PIN_GROUP(sdi2_ctrl),
1173 SH_PFC_PIN_GROUP(sdi2_data1),
1174 SH_PFC_PIN_GROUP(sdi2_data4),
1175
1176 SH_PFC_PIN_GROUP(tp33),
1177
1178 SH_PFC_PIN_GROUP(uart1_data),
1179 SH_PFC_PIN_GROUP(uart1_ctrl),
1180
1181 SH_PFC_PIN_GROUP(uart2_data),
1182
1183 SH_PFC_PIN_GROUP(uart3_data),
1184
1185 SH_PFC_PIN_GROUP(usb_vbus),
1186
1187 SH_PFC_PIN_GROUP(usi0_cs1),
1188 SH_PFC_PIN_GROUP(usi0_cs2),
1189 SH_PFC_PIN_GROUP(usi0_cs3),
1190 SH_PFC_PIN_GROUP(usi0_cs4),
1191 SH_PFC_PIN_GROUP(usi0_cs5),
1192 SH_PFC_PIN_GROUP(usi0_cs6),
1193
1194 SH_PFC_PIN_GROUP(usi1),
1195
1196 SH_PFC_PIN_GROUP(usi2),
1197 SH_PFC_PIN_GROUP(usi2_cs0),
1198 SH_PFC_PIN_GROUP(usi2_cs1),
1199 SH_PFC_PIN_GROUP(usi2_cs2),
1200
1201 SH_PFC_PIN_GROUP(usi3),
1202 SH_PFC_PIN_GROUP(usi3_cs0),
1203
1204 SH_PFC_PIN_GROUP(usi4),
1205 SH_PFC_PIN_GROUP(usi4_cs0),
1206 SH_PFC_PIN_GROUP(usi4_cs1),
1207
1208 SH_PFC_PIN_GROUP(usi5_a),
1209 SH_PFC_PIN_GROUP(usi5_cs0_a),
1210 SH_PFC_PIN_GROUP(usi5_cs1_a),
1211 SH_PFC_PIN_GROUP(usi5_cs2_a),
1212 SH_PFC_PIN_GROUP(usi5_b),
1213 SH_PFC_PIN_GROUP(usi5_cs0_b),
1214 SH_PFC_PIN_GROUP(usi5_cs1_b),
1215 SH_PFC_PIN_GROUP(usi5_cs2_b),
1216 SH_PFC_PIN_GROUP(usi5_cs3_b),
1217 SH_PFC_PIN_GROUP(usi5_cs4_b),
1218};
1219
1220static const char * const ab_groups[] = {
1221 "ab_main",
1222 "ab_clk",
1223 "ab_csb0",
1224 "ab_csb1",
1225 "ab_csb2",
1226 "ab_csb3",
1227 "ab_wait",
1228 "ab_adv",
1229 "ab_a17",
1230 "ab_a18",
1231 "ab_a19",
1232 "ab_a20",
1233 "ab_a21",
1234 "ab_a22",
1235 "ab_a23",
1236 "ab_a24",
1237 "ab_a25",
1238 "ab_a26",
1239 "ab_a27",
1240 "ab_a28",
1241 "ab_ben0",
1242 "ab_ben1",
1243};
1244
1245static const char * const cam_groups[] = {
1246 "cam_clko",
1247 "cam",
1248};
1249
1250static const char * const cf_groups[] = {
1251 "cf_ctrl",
1252 "cf_data8",
1253 "cf_data16",
1254};
1255
1256static const char * const dtv_groups[] = {
1257 "dtv_a",
1258 "dtv_b",
1259};
1260
1261static const char * const err_rst_reqb_groups[] = {
1262 "err_rst_reqb",
1263};
1264
1265static const char * const ext_clki_groups[] = {
1266 "ext_clki",
1267};
1268
1269static const char * const iic0_groups[] = {
1270 "iic0",
1271};
1272
1273static const char * const iic1_groups[] = {
1274 "iic1",
1275};
1276
1277static const char * const jtag_groups[] = {
1278 "jtag",
1279};
1280
1281static const char * const lcd_groups[] = {
1282 "lcd3_pxclk",
1283 "lcd3_pxclkb",
1284 "lcd3_clk_i",
1285 "lcd3_sync",
1286 "lcd3_rgb888",
1287 "yuv3_clk_i",
1288 "yuv3",
1289};
1290
1291static const char * const lowpwr_groups[] = {
1292 "lowpwr",
1293};
1294
1295static const char * const ntsc_groups[] = {
1296 "ntsc_clk",
1297 "ntsc_data",
1298};
1299
1300static const char * const pwm0_groups[] = {
1301 "pwm0",
1302};
1303
1304static const char * const pwm1_groups[] = {
1305 "pwm1",
1306};
1307
1308static const char * const ref_clko_groups[] = {
1309 "ref_clko",
1310};
1311
1312static const char * const sd_groups[] = {
1313 "sd_cki",
1314};
1315
1316static const char * const sdi0_groups[] = {
1317 "sdi0_ctrl",
1318 "sdi0_data1",
1319 "sdi0_data4",
1320 "sdi0_data8",
1321};
1322
1323static const char * const sdi1_groups[] = {
1324 "sdi1_ctrl",
1325 "sdi1_data1",
1326 "sdi1_data4",
1327};
1328
1329static const char * const sdi2_groups[] = {
1330 "sdi2_ctrl",
1331 "sdi2_data1",
1332 "sdi2_data4",
1333};
1334
1335static const char * const tp33_groups[] = {
1336 "tp33",
1337};
1338
1339static const char * const uart1_groups[] = {
1340 "uart1_data",
1341 "uart1_ctrl",
1342};
1343
1344static const char * const uart2_groups[] = {
1345 "uart2_data",
1346};
1347
1348static const char * const uart3_groups[] = {
1349 "uart3_data",
1350};
1351
1352static const char * const usb_groups[] = {
1353 "usb_vbus",
1354};
1355
1356static const char * const usi0_groups[] = {
1357 "usi0_cs1",
1358 "usi0_cs2",
1359 "usi0_cs3",
1360 "usi0_cs4",
1361 "usi0_cs5",
1362 "usi0_cs6",
1363};
1364
1365static const char * const usi1_groups[] = {
1366 "usi1",
1367};
1368
1369static const char * const usi2_groups[] = {
1370 "usi2",
1371 "usi2_cs0",
1372 "usi2_cs1",
1373 "usi2_cs2",
1374};
1375
1376static const char * const usi3_groups[] = {
1377 "usi3",
1378 "usi3_cs0",
1379};
1380
1381static const char * const usi4_groups[] = {
1382 "usi4",
1383 "usi4_cs0",
1384 "usi4_cs1",
1385};
1386
1387static const char * const usi5_groups[] = {
1388 "usi5_a",
1389 "usi5_cs0_a",
1390 "usi5_cs1_a",
1391 "usi5_cs2_a",
1392 "usi5_b",
1393 "usi5_cs0_b",
1394 "usi5_cs1_b",
1395 "usi5_cs2_b",
1396 "usi5_cs3_b",
1397 "usi5_cs4_b",
1398};
1399
1400static const struct sh_pfc_function pinmux_functions[] = {
1401 SH_PFC_FUNCTION(ab),
1402 SH_PFC_FUNCTION(cam),
1403 SH_PFC_FUNCTION(cf),
1404 SH_PFC_FUNCTION(dtv),
1405 SH_PFC_FUNCTION(err_rst_reqb),
1406 SH_PFC_FUNCTION(ext_clki),
1407 SH_PFC_FUNCTION(iic0),
1408 SH_PFC_FUNCTION(iic1),
1409 SH_PFC_FUNCTION(jtag),
1410 SH_PFC_FUNCTION(lcd),
1411 SH_PFC_FUNCTION(lowpwr),
1412 SH_PFC_FUNCTION(ntsc),
1413 SH_PFC_FUNCTION(pwm0),
1414 SH_PFC_FUNCTION(pwm1),
1415 SH_PFC_FUNCTION(ref_clko),
1416 SH_PFC_FUNCTION(sd),
1417 SH_PFC_FUNCTION(sdi0),
1418 SH_PFC_FUNCTION(sdi1),
1419 SH_PFC_FUNCTION(sdi2),
1420 SH_PFC_FUNCTION(tp33),
1421 SH_PFC_FUNCTION(uart1),
1422 SH_PFC_FUNCTION(uart2),
1423 SH_PFC_FUNCTION(uart3),
1424 SH_PFC_FUNCTION(usb),
1425 SH_PFC_FUNCTION(usi0),
1426 SH_PFC_FUNCTION(usi1),
1427 SH_PFC_FUNCTION(usi2),
1428 SH_PFC_FUNCTION(usi3),
1429 SH_PFC_FUNCTION(usi4),
1430 SH_PFC_FUNCTION(usi5),
1431};
1432
1433static const struct pinmux_cfg_reg pinmux_config_regs[] = {
1434 { PINMUX_CFG_REG("GPSR0", 0xe0140200, 32, 1, GROUP(
1435 0, PORT31_FN,
1436 0, PORT30_FN,
1437 0, PORT29_FN,
1438 0, PORT28_FN,
1439 0, PORT27_FN,
1440 0, PORT26_FN,
1441 0, PORT25_FN,
1442 0, PORT24_FN,
1443 FN_LCD3_1_0_PORT23, PORT23_FN,
1444 FN_LCD3_1_0_PORT22, PORT22_FN,
1445 FN_LCD3_1_0_PORT21, PORT21_FN,
1446 FN_LCD3_1_0_PORT20, PORT20_FN,
1447 FN_LCD3_PXCLKB, PORT19_FN,
1448 FN_LCD3_1_0_PORT18, PORT18_FN,
1449 0, PORT17_FN,
1450 0, PORT16_FN,
1451 0, PORT15_FN,
1452 0, PORT14_FN,
1453 0, PORT13_FN,
1454 0, PORT12_FN,
1455 0, PORT11_FN,
1456 0, PORT10_FN,
1457 0, PORT9_FN,
1458 0, PORT8_FN,
1459 0, PORT7_FN,
1460 0, PORT6_FN,
1461 FN_EXT_CLKI, PORT5_FN,
1462 FN_REF_CLKO, PORT4_FN,
1463 FN_ERR_RST_REQB, PORT3_FN,
1464 FN_JT_SEL, PORT2_FN,
1465 0, PORT1_FN,
1466 0, PORT0_FN,
1467 ))
1468 },
1469 { PINMUX_CFG_REG("GPSR1", 0xe0140204, 32, 1, GROUP(
1470 FN_SDI1_CMD, PORT63_FN,
1471 FN_SDI1_CKI, PORT62_FN,
1472 FN_SDI1_CKO, PORT61_FN,
1473 FN_SDI0_DATA7, PORT60_FN,
1474 FN_SDI0_DATA6, PORT59_FN,
1475 FN_SDI0_DATA5, PORT58_FN,
1476 FN_SDI0_DATA4, PORT57_FN,
1477 FN_SDI0_DATA3, PORT56_FN,
1478 FN_SDI0_DATA2, PORT55_FN,
1479 FN_SDI0_DATA1, PORT54_FN,
1480 FN_SDI0_DATA0, PORT53_FN,
1481 FN_SDI0_CMD, PORT52_FN,
1482 FN_SDI0_CKI, PORT51_FN,
1483 FN_SDI0_CKO, PORT50_FN,
1484 0, PORT49_FN,
1485 FN_SD_CKI, PORT48_FN,
1486 FN_IIC_1_0_PORT47, PORT47_FN,
1487 FN_IIC_1_0_PORT46, PORT46_FN,
1488 FN_IIC0_SDA, PORT45_FN,
1489 FN_IIC0_SCL, PORT44_FN,
1490 FN_LCD3_11_10_PORT43, PORT43_FN,
1491 FN_LCD3_11_10_PORT42, PORT42_FN,
1492 FN_LCD3_11_10_PORT41, PORT41_FN,
1493 FN_LCD3_11_10_PORT40, PORT40_FN,
1494 FN_LCD3_9_8_PORT39, PORT39_FN,
1495 FN_LCD3_9_8_PORT38, PORT38_FN,
1496 FN_LCD3_R5, PORT37_FN,
1497 FN_LCD3_R4, PORT36_FN,
1498 FN_LCD3_R3, PORT35_FN,
1499 FN_LCD3_R2, PORT34_FN,
1500 FN_LCD3_R1, PORT33_FN,
1501 FN_LCD3_R0, PORT32_FN,
1502 ))
1503 },
1504 { PINMUX_CFG_REG("GPSR2", 0xe0140208, 32, 1, GROUP(
1505 FN_AB_1_0_PORT95, PORT95_FN,
1506 FN_AB_1_0_PORT94, PORT94_FN,
1507 FN_AB_1_0_PORT93, PORT93_FN,
1508 FN_AB_7_6_PORT92, PORT92_FN,
1509 FN_AB_7_6_PORT91, PORT91_FN,
1510 FN_AB_5_4_PORT90, PORT90_FN,
1511 FN_AB_5_4_PORT89, PORT89_FN,
1512 FN_AB_3_2_PORT88, PORT88_FN,
1513 FN_AB_3_2_PORT87, PORT87_FN,
1514 FN_AB_3_2_PORT86, PORT86_FN,
1515 FN_AB_3_2_PORT85, PORT85_FN,
1516 FN_AB_1_0_PORT84, PORT84_FN,
1517 FN_AB_1_0_PORT83, PORT83_FN,
1518 FN_AB_1_0_PORT82, PORT82_FN,
1519 FN_AB_1_0_PORT81, PORT81_FN,
1520 FN_AB_1_0_PORT80, PORT80_FN,
1521 FN_AB_1_0_PORT79, PORT79_FN,
1522 FN_AB_1_0_PORT78, PORT78_FN,
1523 FN_AB_1_0_PORT77, PORT77_FN,
1524 FN_AB_1_0_PORT76, PORT76_FN,
1525 FN_AB_1_0_PORT75, PORT75_FN,
1526 FN_AB_1_0_PORT74, PORT74_FN,
1527 FN_AB_1_0_PORT73, PORT73_FN,
1528 FN_AB_1_0_PORT72, PORT72_FN,
1529 FN_AB_1_0_PORT71, PORT71_FN,
1530 FN_AB_CSB1, PORT70_FN,
1531 FN_AB_CSB0, PORT69_FN,
1532 FN_AB_CLK, PORT68_FN,
1533 FN_SDI1_DATA3, PORT67_FN,
1534 FN_SDI1_DATA2, PORT66_FN,
1535 FN_SDI1_DATA1, PORT65_FN,
1536 FN_SDI1_DATA0, PORT64_FN,
1537 ))
1538 },
1539 { PINMUX_CFG_REG("GPSR3", 0xe014020c, 32, 1, GROUP(
1540 FN_NTSC_DATA4, PORT127_FN,
1541 FN_NTSC_DATA3, PORT126_FN,
1542 FN_NTSC_DATA2, PORT125_FN,
1543 FN_NTSC_DATA1, PORT124_FN,
1544 FN_NTSC_DATA0, PORT123_FN,
1545 FN_NTSC_CLK, PORT122_FN,
1546 FN_USI_9_8_PORT121, PORT121_FN,
1547 FN_USI_9_8_PORT120, PORT120_FN,
1548 FN_USI_7_6_PORT119, PORT119_FN,
1549 FN_USI_5_4_PORT118, PORT118_FN,
1550 FN_USI_5_4_PORT117, PORT117_FN,
1551 FN_USI_5_4_PORT116, PORT116_FN,
1552 FN_USI_5_4_PORT115, PORT115_FN,
1553 FN_USI_3_2_PORT114, PORT114_FN,
1554 FN_USI_3_2_PORT113, PORT113_FN,
1555 FN_USI_1_0_PORT112, PORT112_FN,
1556 FN_USI_1_0_PORT111, PORT111_FN,
1557 FN_USI_1_0_PORT110, PORT110_FN,
1558 FN_USI_1_0_PORT109, PORT109_FN,
1559 FN_USI1_DO, PORT108_FN,
1560 FN_USI1_DI, PORT107_FN,
1561 FN_USI0_CS2, PORT106_FN,
1562 FN_USI0_CS1, PORT105_FN,
1563 FN_AB_13_12_PORT104, PORT104_FN,
1564 FN_AB_13_12_PORT103, PORT103_FN,
1565 FN_AB_11_10_PORT102, PORT102_FN,
1566 FN_AB_11_10_PORT101, PORT101_FN,
1567 FN_AB_11_10_PORT100, PORT100_FN,
1568 FN_AB_9_8_PORT99, PORT99_FN,
1569 FN_AB_9_8_PORT98, PORT98_FN,
1570 FN_AB_9_8_PORT97, PORT97_FN,
1571 FN_AB_A20, PORT96_FN,
1572 ))
1573 },
1574 { PINMUX_CFG_REG("GPSR4", 0xe0140210, 32, 1, GROUP(
1575 0, 0,
1576 FN_UART_1_0_PORT158, PORT158_FN,
1577 FN_UART_1_0_PORT157, PORT157_FN,
1578 FN_UART1_TX, PORT156_FN,
1579 FN_UART1_RX, PORT155_FN,
1580 FN_LOWPWR, PORT154_FN,
1581 FN_USB_VBUS, PORT153_FN,
1582 FN_JT_TDOEN, PORT152_FN,
1583 FN_JT_TDO, PORT151_FN,
1584 FN_HSI_1_0_PORT150, PORT150_FN,
1585 FN_HSI_1_0_PORT149, PORT149_FN,
1586 FN_HSI_1_0_PORT148, PORT148_FN,
1587 FN_HSI_1_0_PORT147, PORT147_FN,
1588 FN_HSI_1_0_PORT146, PORT146_FN,
1589 FN_HSI_1_0_PORT145, PORT145_FN,
1590 FN_HSI_1_0_PORT144, PORT144_FN,
1591 FN_HSI_1_0_PORT143, PORT143_FN,
1592 FN_CAM_YUV7, PORT142_FN,
1593 FN_CAM_YUV6, PORT141_FN,
1594 FN_CAM_YUV5, PORT140_FN,
1595 FN_CAM_YUV4, PORT139_FN,
1596 FN_CAM_YUV3, PORT138_FN,
1597 FN_CAM_YUV2, PORT137_FN,
1598 FN_CAM_YUV1, PORT136_FN,
1599 FN_CAM_YUV0, PORT135_FN,
1600 FN_CAM_HS, PORT134_FN,
1601 FN_CAM_VS, PORT133_FN,
1602 FN_CAM_CLKI, PORT132_FN,
1603 FN_CAM_CLKO, PORT131_FN,
1604 FN_NTSC_DATA7, PORT130_FN,
1605 FN_NTSC_DATA6, PORT129_FN,
1606 FN_NTSC_DATA5, PORT128_FN,
1607 ))
1608 },
1609 { PINMUX_CFG_REG_VAR("CHG_PINSEL_LCD3", 0xe0140284, 32,
1610 GROUP(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1611 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2,
1612 2, 2),
1613 GROUP(
1614
1615 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1616 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1617 0, 0, 0, 0, 0, 0, 0, 0,
1618
1619 FN_SEL_LCD3_11_10_00, FN_SEL_LCD3_11_10_01,
1620 FN_SEL_LCD3_11_10_10, 0,
1621
1622 FN_SEL_LCD3_9_8_00, 0, FN_SEL_LCD3_9_8_10, 0,
1623
1624 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1625
1626 FN_SEL_LCD3_1_0_00, FN_SEL_LCD3_1_0_01, 0, 0,
1627 ))
1628 },
1629 { PINMUX_CFG_REG_VAR("CHG_PINSEL_UART", 0xe0140288, 32,
1630 GROUP(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1631 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1632 1, 1, 1, 1, 1, 1, 2),
1633 GROUP(
1634
1635 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1636 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1637 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1638 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1639
1640 FN_SEL_UART_1_0_00, FN_SEL_UART_1_0_01, 0, 0,
1641 ))
1642 },
1643 { PINMUX_CFG_REG_VAR("CHG_PINSEL_IIC", 0xe014028c, 32,
1644 GROUP(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1645 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1646 1, 1, 1, 1, 1, 1, 2),
1647 GROUP(
1648
1649 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1650 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1651 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1652 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1653
1654 FN_SEL_IIC_1_0_00, FN_SEL_IIC_1_0_01, 0, 0,
1655 ))
1656 },
1657 { PINMUX_CFG_REG_VAR("CHG_PINSEL_AB", 0xe0140294, 32,
1658 GROUP(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1659 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2),
1660 GROUP(
1661
1662 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1663 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1664 0, 0, 0, 0,
1665
1666 FN_SEL_AB_13_12_00, 0, FN_SEL_AB_13_12_10, 0,
1667
1668 FN_SEL_AB_11_10_00, 0, FN_SEL_AB_11_10_10, 0,
1669
1670 FN_SEL_AB_9_8_00, FN_SEL_AB_9_8_01, FN_SEL_AB_9_8_10, 0,
1671
1672 FN_SEL_AB_7_6_00, FN_SEL_AB_7_6_01, FN_SEL_AB_7_6_10, 0,
1673
1674 FN_SEL_AB_5_4_00, FN_SEL_AB_5_4_01,
1675 FN_SEL_AB_5_4_10, FN_SEL_AB_5_4_11,
1676
1677 FN_SEL_AB_3_2_00, FN_SEL_AB_3_2_01,
1678 FN_SEL_AB_3_2_10, FN_SEL_AB_3_2_11,
1679
1680 FN_SEL_AB_1_0_00, 0, FN_SEL_AB_1_0_10, 0,
1681 ))
1682 },
1683 { PINMUX_CFG_REG_VAR("CHG_PINSEL_USI", 0xe0140298, 32,
1684 GROUP(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1685 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2,
1686 2, 2, 2),
1687 GROUP(
1688
1689 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1690 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1691 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1692
1693 FN_SEL_USI_9_8_00, FN_SEL_USI_9_8_01, 0, 0,
1694
1695 FN_SEL_USI_7_6_00, FN_SEL_USI_7_6_01, 0, 0,
1696
1697 FN_SEL_USI_5_4_00, FN_SEL_USI_5_4_01, 0, 0,
1698
1699 FN_SEL_USI_3_2_00, FN_SEL_USI_3_2_01, 0, 0,
1700
1701 FN_SEL_USI_1_0_00, FN_SEL_USI_1_0_01, 0, 0,
1702 ))
1703 },
1704 { PINMUX_CFG_REG_VAR("CHG_PINSEL_HSI", 0xe01402a8, 32,
1705 GROUP(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1706 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1707 1, 1, 1, 1, 1, 1, 2),
1708 GROUP(
1709
1710 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1711 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1712 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1713 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1714
1715 FN_SEL_HSI_1_0_00, FN_SEL_HSI_1_0_01, 0, 0,
1716 ))
1717 },
1718 { },
1719};
1720
1721const struct sh_pfc_soc_info emev2_pinmux_info = {
1722 .name = "emev2_pfc",
1723
1724 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1725
1726 .pins = pinmux_pins,
1727 .nr_pins = ARRAY_SIZE(pinmux_pins),
1728 .groups = pinmux_groups,
1729 .nr_groups = ARRAY_SIZE(pinmux_groups),
1730 .functions = pinmux_functions,
1731 .nr_functions = ARRAY_SIZE(pinmux_functions),
1732
1733 .cfg_regs = pinmux_config_regs,
1734
1735 .pinmux_data = pinmux_data,
1736 .pinmux_data_size = ARRAY_SIZE(pinmux_data),
1737};
1738
