linux/drivers/pinctrl/renesas/pfc-sh7785.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * SH7785 Pinmux
   4 *
   5 *  Copyright (C) 2008  Magnus Damm
   6 */
   7
   8#include <linux/init.h>
   9#include <linux/kernel.h>
  10#include <cpu/sh7785.h>
  11
  12#include "sh_pfc.h"
  13
  14enum {
  15        PINMUX_RESERVED = 0,
  16
  17        PINMUX_DATA_BEGIN,
  18        PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
  19        PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
  20        PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
  21        PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
  22        PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
  23        PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
  24        PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
  25        PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
  26        PE5_DATA, PE4_DATA, PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
  27        PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
  28        PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
  29        PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
  30        PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
  31        PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
  32        PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
  33        PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
  34        PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA,
  35        PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,
  36        PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA,
  37        PL7_DATA, PL6_DATA, PL5_DATA, PL4_DATA,
  38        PL3_DATA, PL2_DATA, PL1_DATA, PL0_DATA,
  39        PM1_DATA, PM0_DATA,
  40        PN7_DATA, PN6_DATA, PN5_DATA, PN4_DATA,
  41        PN3_DATA, PN2_DATA, PN1_DATA, PN0_DATA,
  42        PP5_DATA, PP4_DATA, PP3_DATA, PP2_DATA, PP1_DATA, PP0_DATA,
  43        PQ4_DATA, PQ3_DATA, PQ2_DATA, PQ1_DATA, PQ0_DATA,
  44        PR3_DATA, PR2_DATA, PR1_DATA, PR0_DATA,
  45        PINMUX_DATA_END,
  46
  47        PINMUX_INPUT_BEGIN,
  48        PA7_IN, PA6_IN, PA5_IN, PA4_IN,
  49        PA3_IN, PA2_IN, PA1_IN, PA0_IN,
  50        PB7_IN, PB6_IN, PB5_IN, PB4_IN,
  51        PB3_IN, PB2_IN, PB1_IN, PB0_IN,
  52        PC7_IN, PC6_IN, PC5_IN, PC4_IN,
  53        PC3_IN, PC2_IN, PC1_IN, PC0_IN,
  54        PD7_IN, PD6_IN, PD5_IN, PD4_IN,
  55        PD3_IN, PD2_IN, PD1_IN, PD0_IN,
  56        PE5_IN, PE4_IN, PE3_IN, PE2_IN, PE1_IN, PE0_IN,
  57        PF7_IN, PF6_IN, PF5_IN, PF4_IN,
  58        PF3_IN, PF2_IN, PF1_IN, PF0_IN,
  59        PG7_IN, PG6_IN, PG5_IN, PG4_IN,
  60        PG3_IN, PG2_IN, PG1_IN, PG0_IN,
  61        PH7_IN, PH6_IN, PH5_IN, PH4_IN,
  62        PH3_IN, PH2_IN, PH1_IN, PH0_IN,
  63        PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN,
  64        PJ3_IN, PJ2_IN, PJ1_IN, PJ0_IN,
  65        PK7_IN, PK6_IN, PK5_IN, PK4_IN,
  66        PK3_IN, PK2_IN, PK1_IN, PK0_IN,
  67        PL7_IN, PL6_IN, PL5_IN, PL4_IN,
  68        PL3_IN, PL2_IN, PL1_IN, PL0_IN,
  69        PM1_IN, PM0_IN,
  70        PN7_IN, PN6_IN, PN5_IN, PN4_IN,
  71        PN3_IN, PN2_IN, PN1_IN, PN0_IN,
  72        PP5_IN, PP4_IN, PP3_IN, PP2_IN, PP1_IN, PP0_IN,
  73        PQ4_IN, PQ3_IN, PQ2_IN, PQ1_IN, PQ0_IN,
  74        PR3_IN, PR2_IN, PR1_IN, PR0_IN,
  75        PINMUX_INPUT_END,
  76
  77        PINMUX_OUTPUT_BEGIN,
  78        PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
  79        PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
  80        PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
  81        PB3_OUT, PB2_OUT, PB1_OUT, PB0_OUT,
  82        PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
  83        PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
  84        PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
  85        PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
  86        PE5_OUT, PE4_OUT, PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
  87        PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
  88        PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
  89        PG7_OUT, PG6_OUT, PG5_OUT, PG4_OUT,
  90        PG3_OUT, PG2_OUT, PG1_OUT, PG0_OUT,
  91        PH7_OUT, PH6_OUT, PH5_OUT, PH4_OUT,
  92        PH3_OUT, PH2_OUT, PH1_OUT, PH0_OUT,
  93        PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT,
  94        PJ3_OUT, PJ2_OUT, PJ1_OUT, PJ0_OUT,
  95        PK7_OUT, PK6_OUT, PK5_OUT, PK4_OUT,
  96        PK3_OUT, PK2_OUT, PK1_OUT, PK0_OUT,
  97        PL7_OUT, PL6_OUT, PL5_OUT, PL4_OUT,
  98        PL3_OUT, PL2_OUT, PL1_OUT, PL0_OUT,
  99        PM1_OUT, PM0_OUT,
 100        PN7_OUT, PN6_OUT, PN5_OUT, PN4_OUT,
 101        PN3_OUT, PN2_OUT, PN1_OUT, PN0_OUT,
 102        PP5_OUT, PP4_OUT, PP3_OUT, PP2_OUT, PP1_OUT, PP0_OUT,
 103        PQ4_OUT, PQ3_OUT, PQ2_OUT, PQ1_OUT, PQ0_OUT,
 104        PR3_OUT, PR2_OUT, PR1_OUT, PR0_OUT,
 105        PINMUX_OUTPUT_END,
 106
 107        PINMUX_FUNCTION_BEGIN,
 108        PA7_FN, PA6_FN, PA5_FN, PA4_FN,
 109        PA3_FN, PA2_FN, PA1_FN, PA0_FN,
 110        PB7_FN, PB6_FN, PB5_FN, PB4_FN,
 111        PB3_FN, PB2_FN, PB1_FN, PB0_FN,
 112        PC7_FN, PC6_FN, PC5_FN, PC4_FN,
 113        PC3_FN, PC2_FN, PC1_FN, PC0_FN,
 114        PD7_FN, PD6_FN, PD5_FN, PD4_FN,
 115        PD3_FN, PD2_FN, PD1_FN, PD0_FN,
 116        PE5_FN, PE4_FN, PE3_FN, PE2_FN, PE1_FN, PE0_FN,
 117        PF7_FN, PF6_FN, PF5_FN, PF4_FN,
 118        PF3_FN, PF2_FN, PF1_FN, PF0_FN,
 119        PG7_FN, PG6_FN, PG5_FN, PG4_FN,
 120        PG3_FN, PG2_FN, PG1_FN, PG0_FN,
 121        PH7_FN, PH6_FN, PH5_FN, PH4_FN,
 122        PH3_FN, PH2_FN, PH1_FN, PH0_FN,
 123        PJ7_FN, PJ6_FN, PJ5_FN, PJ4_FN,
 124        PJ3_FN, PJ2_FN, PJ1_FN, PJ0_FN,
 125        PK7_FN, PK6_FN, PK5_FN, PK4_FN,
 126        PK3_FN, PK2_FN, PK1_FN, PK0_FN,
 127        PL7_FN, PL6_FN, PL5_FN, PL4_FN,
 128        PL3_FN, PL2_FN, PL1_FN, PL0_FN,
 129        PM1_FN, PM0_FN,
 130        PN7_FN, PN6_FN, PN5_FN, PN4_FN,
 131        PN3_FN, PN2_FN, PN1_FN, PN0_FN,
 132        PP5_FN, PP4_FN, PP3_FN, PP2_FN, PP1_FN, PP0_FN,
 133        PQ4_FN, PQ3_FN, PQ2_FN, PQ1_FN, PQ0_FN,
 134        PR3_FN, PR2_FN, PR1_FN, PR0_FN,
 135        P1MSEL15_0, P1MSEL15_1,
 136        P1MSEL14_0, P1MSEL14_1,
 137        P1MSEL13_0, P1MSEL13_1,
 138        P1MSEL12_0, P1MSEL12_1,
 139        P1MSEL11_0, P1MSEL11_1,
 140        P1MSEL10_0, P1MSEL10_1,
 141        P1MSEL9_0, P1MSEL9_1,
 142        P1MSEL8_0, P1MSEL8_1,
 143        P1MSEL7_0, P1MSEL7_1,
 144        P1MSEL6_0, P1MSEL6_1,
 145        P1MSEL5_0,
 146        P1MSEL4_0, P1MSEL4_1,
 147        P1MSEL3_0, P1MSEL3_1,
 148        P1MSEL2_0, P1MSEL2_1,
 149        P1MSEL1_0, P1MSEL1_1,
 150        P1MSEL0_0, P1MSEL0_1,
 151        P2MSEL2_0, P2MSEL2_1,
 152        P2MSEL1_0, P2MSEL1_1,
 153        P2MSEL0_0, P2MSEL0_1,
 154        PINMUX_FUNCTION_END,
 155
 156        PINMUX_MARK_BEGIN,
 157        D63_AD31_MARK,
 158        D62_AD30_MARK,
 159        D61_AD29_MARK,
 160        D60_AD28_MARK,
 161        D59_AD27_MARK,
 162        D58_AD26_MARK,
 163        D57_AD25_MARK,
 164        D56_AD24_MARK,
 165        D55_AD23_MARK,
 166        D54_AD22_MARK,
 167        D53_AD21_MARK,
 168        D52_AD20_MARK,
 169        D51_AD19_MARK,
 170        D50_AD18_MARK,
 171        D49_AD17_DB5_MARK,
 172        D48_AD16_DB4_MARK,
 173        D47_AD15_DB3_MARK,
 174        D46_AD14_DB2_MARK,
 175        D45_AD13_DB1_MARK,
 176        D44_AD12_DB0_MARK,
 177        D43_AD11_DG5_MARK,
 178        D42_AD10_DG4_MARK,
 179        D41_AD9_DG3_MARK,
 180        D40_AD8_DG2_MARK,
 181        D39_AD7_DG1_MARK,
 182        D38_AD6_DG0_MARK,
 183        D37_AD5_DR5_MARK,
 184        D36_AD4_DR4_MARK,
 185        D35_AD3_DR3_MARK,
 186        D34_AD2_DR2_MARK,
 187        D33_AD1_DR1_MARK,
 188        D32_AD0_DR0_MARK,
 189        REQ1_MARK,
 190        REQ2_MARK,
 191        REQ3_MARK,
 192        GNT1_MARK,
 193        GNT2_MARK,
 194        GNT3_MARK,
 195        MMCCLK_MARK,
 196        D31_MARK,
 197        D30_MARK,
 198        D29_MARK,
 199        D28_MARK,
 200        D27_MARK,
 201        D26_MARK,
 202        D25_MARK,
 203        D24_MARK,
 204        D23_MARK,
 205        D22_MARK,
 206        D21_MARK,
 207        D20_MARK,
 208        D19_MARK,
 209        D18_MARK,
 210        D17_MARK,
 211        D16_MARK,
 212        SCIF1_SCK_MARK,
 213        SCIF1_RXD_MARK,
 214        SCIF1_TXD_MARK,
 215        SCIF0_CTS_MARK,
 216        INTD_MARK,
 217        FCE_MARK,
 218        SCIF0_RTS_MARK,
 219        HSPI_CS_MARK,
 220        FSE_MARK,
 221        SCIF0_SCK_MARK,
 222        HSPI_CLK_MARK,
 223        FRE_MARK,
 224        SCIF0_RXD_MARK,
 225        HSPI_RX_MARK,
 226        FRB_MARK,
 227        SCIF0_TXD_MARK,
 228        HSPI_TX_MARK,
 229        FWE_MARK,
 230        SCIF5_TXD_MARK,
 231        HAC1_SYNC_MARK,
 232        SSI1_WS_MARK,
 233        SIOF_TXD_PJ_MARK,
 234        HAC0_SDOUT_MARK,
 235        SSI0_SDATA_MARK,
 236        SIOF_RXD_PJ_MARK,
 237        HAC0_SDIN_MARK,
 238        SSI0_SCK_MARK,
 239        SIOF_SYNC_PJ_MARK,
 240        HAC0_SYNC_MARK,
 241        SSI0_WS_MARK,
 242        SIOF_MCLK_PJ_MARK,
 243        HAC_RES_MARK,
 244        SIOF_SCK_PJ_MARK,
 245        HAC0_BITCLK_MARK,
 246        SSI0_CLK_MARK,
 247        HAC1_BITCLK_MARK,
 248        SSI1_CLK_MARK,
 249        TCLK_MARK,
 250        IOIS16_MARK,
 251        STATUS0_MARK,
 252        DRAK0_PK3_MARK,
 253        STATUS1_MARK,
 254        DRAK1_PK2_MARK,
 255        DACK2_MARK,
 256        SCIF2_TXD_MARK,
 257        MMCCMD_MARK,
 258        SIOF_TXD_PK_MARK,
 259        DACK3_MARK,
 260        SCIF2_SCK_MARK,
 261        MMCDAT_MARK,
 262        SIOF_SCK_PK_MARK,
 263        DREQ0_MARK,
 264        DREQ1_MARK,
 265        DRAK0_PK1_MARK,
 266        DRAK1_PK0_MARK,
 267        DREQ2_MARK,
 268        INTB_MARK,
 269        DREQ3_MARK,
 270        INTC_MARK,
 271        DRAK2_MARK,
 272        CE2A_MARK,
 273        IRL4_MARK,
 274        FD4_MARK,
 275        IRL5_MARK,
 276        FD5_MARK,
 277        IRL6_MARK,
 278        FD6_MARK,
 279        IRL7_MARK,
 280        FD7_MARK,
 281        DRAK3_MARK,
 282        CE2B_MARK,
 283        BREQ_BSACK_MARK,
 284        BACK_BSREQ_MARK,
 285        SCIF5_RXD_MARK,
 286        HAC1_SDIN_MARK,
 287        SSI1_SCK_MARK,
 288        SCIF5_SCK_MARK,
 289        HAC1_SDOUT_MARK,
 290        SSI1_SDATA_MARK,
 291        SCIF3_TXD_MARK,
 292        FCLE_MARK,
 293        SCIF3_RXD_MARK,
 294        FALE_MARK,
 295        SCIF3_SCK_MARK,
 296        FD0_MARK,
 297        SCIF4_TXD_MARK,
 298        FD1_MARK,
 299        SCIF4_RXD_MARK,
 300        FD2_MARK,
 301        SCIF4_SCK_MARK,
 302        FD3_MARK,
 303        DEVSEL_DCLKOUT_MARK,
 304        STOP_CDE_MARK,
 305        LOCK_ODDF_MARK,
 306        TRDY_DISPL_MARK,
 307        IRDY_HSYNC_MARK,
 308        PCIFRAME_VSYNC_MARK,
 309        INTA_MARK,
 310        GNT0_GNTIN_MARK,
 311        REQ0_REQOUT_MARK,
 312        PERR_MARK,
 313        SERR_MARK,
 314        WE7_CBE3_MARK,
 315        WE6_CBE2_MARK,
 316        WE5_CBE1_MARK,
 317        WE4_CBE0_MARK,
 318        SCIF2_RXD_MARK,
 319        SIOF_RXD_MARK,
 320        MRESETOUT_MARK,
 321        IRQOUT_MARK,
 322        PINMUX_MARK_END,
 323};
 324
 325static const u16 pinmux_data[] = {
 326        /* PA GPIO */
 327        PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT),
 328        PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT),
 329        PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT),
 330        PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT),
 331        PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT),
 332        PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT),
 333        PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT),
 334        PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT),
 335
 336        /* PB GPIO */
 337        PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT),
 338        PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT),
 339        PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT),
 340        PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT),
 341        PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT),
 342        PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT),
 343        PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT),
 344        PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT),
 345
 346        /* PC GPIO */
 347        PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT),
 348        PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT),
 349        PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT),
 350        PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT),
 351        PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT),
 352        PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT),
 353        PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT),
 354        PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT),
 355
 356        /* PD GPIO */
 357        PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT),
 358        PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT),
 359        PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT),
 360        PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT),
 361        PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT),
 362        PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT),
 363        PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT),
 364        PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT),
 365
 366        /* PE GPIO */
 367        PINMUX_DATA(PE5_DATA, PE5_IN, PE5_OUT),
 368        PINMUX_DATA(PE4_DATA, PE4_IN, PE4_OUT),
 369        PINMUX_DATA(PE3_DATA, PE3_IN, PE3_OUT),
 370        PINMUX_DATA(PE2_DATA, PE2_IN, PE2_OUT),
 371        PINMUX_DATA(PE1_DATA, PE1_IN, PE1_OUT),
 372        PINMUX_DATA(PE0_DATA, PE0_IN, PE0_OUT),
 373
 374        /* PF GPIO */
 375        PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT),
 376        PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT),
 377        PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT),
 378        PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT),
 379        PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT),
 380        PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT),
 381        PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT),
 382        PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT),
 383
 384        /* PG GPIO */
 385        PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT),
 386        PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT),
 387        PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT),
 388        PINMUX_DATA(PG4_DATA, PG4_IN, PG4_OUT),
 389        PINMUX_DATA(PG3_DATA, PG3_IN, PG3_OUT),
 390        PINMUX_DATA(PG2_DATA, PG2_IN, PG2_OUT),
 391        PINMUX_DATA(PG1_DATA, PG1_IN, PG1_OUT),
 392        PINMUX_DATA(PG0_DATA, PG0_IN, PG0_OUT),
 393
 394        /* PH GPIO */
 395        PINMUX_DATA(PH7_DATA, PH7_IN, PH7_OUT),
 396        PINMUX_DATA(PH6_DATA, PH6_IN, PH6_OUT),
 397        PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT),
 398        PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT),
 399        PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT),
 400        PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT),
 401        PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT),
 402        PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT),
 403
 404        /* PJ GPIO */
 405        PINMUX_DATA(PJ7_DATA, PJ7_IN, PJ7_OUT),
 406        PINMUX_DATA(PJ6_DATA, PJ6_IN, PJ6_OUT),
 407        PINMUX_DATA(PJ5_DATA, PJ5_IN, PJ5_OUT),
 408        PINMUX_DATA(PJ4_DATA, PJ4_IN, PJ4_OUT),
 409        PINMUX_DATA(PJ3_DATA, PJ3_IN, PJ3_OUT),
 410        PINMUX_DATA(PJ2_DATA, PJ2_IN, PJ2_OUT),
 411        PINMUX_DATA(PJ1_DATA, PJ1_IN, PJ1_OUT),
 412        PINMUX_DATA(PJ0_DATA, PJ0_IN, PJ0_OUT),
 413
 414        /* PK GPIO */
 415        PINMUX_DATA(PK7_DATA, PK7_IN, PK7_OUT),
 416        PINMUX_DATA(PK6_DATA, PK6_IN, PK6_OUT),
 417        PINMUX_DATA(PK5_DATA, PK5_IN, PK5_OUT),
 418        PINMUX_DATA(PK4_DATA, PK4_IN, PK4_OUT),
 419        PINMUX_DATA(PK3_DATA, PK3_IN, PK3_OUT),
 420        PINMUX_DATA(PK2_DATA, PK2_IN, PK2_OUT),
 421        PINMUX_DATA(PK1_DATA, PK1_IN, PK1_OUT),
 422        PINMUX_DATA(PK0_DATA, PK0_IN, PK0_OUT),
 423
 424        /* PL GPIO */
 425        PINMUX_DATA(PL7_DATA, PL7_IN, PL7_OUT),
 426        PINMUX_DATA(PL6_DATA, PL6_IN, PL6_OUT),
 427        PINMUX_DATA(PL5_DATA, PL5_IN, PL5_OUT),
 428        PINMUX_DATA(PL4_DATA, PL4_IN, PL4_OUT),
 429        PINMUX_DATA(PL3_DATA, PL3_IN, PL3_OUT),
 430        PINMUX_DATA(PL2_DATA, PL2_IN, PL2_OUT),
 431        PINMUX_DATA(PL1_DATA, PL1_IN, PL1_OUT),
 432        PINMUX_DATA(PL0_DATA, PL0_IN, PL0_OUT),
 433
 434        /* PM GPIO */
 435        PINMUX_DATA(PM1_DATA, PM1_IN, PM1_OUT),
 436        PINMUX_DATA(PM0_DATA, PM0_IN, PM0_OUT),
 437
 438        /* PN GPIO */
 439        PINMUX_DATA(PN7_DATA, PN7_IN, PN7_OUT),
 440        PINMUX_DATA(PN6_DATA, PN6_IN, PN6_OUT),
 441        PINMUX_DATA(PN5_DATA, PN5_IN, PN5_OUT),
 442        PINMUX_DATA(PN4_DATA, PN4_IN, PN4_OUT),
 443        PINMUX_DATA(PN3_DATA, PN3_IN, PN3_OUT),
 444        PINMUX_DATA(PN2_DATA, PN2_IN, PN2_OUT),
 445        PINMUX_DATA(PN1_DATA, PN1_IN, PN1_OUT),
 446        PINMUX_DATA(PN0_DATA, PN0_IN, PN0_OUT),
 447
 448        /* PP GPIO */
 449        PINMUX_DATA(PP5_DATA, PP5_IN, PP5_OUT),
 450        PINMUX_DATA(PP4_DATA, PP4_IN, PP4_OUT),
 451        PINMUX_DATA(PP3_DATA, PP3_IN, PP3_OUT),
 452        PINMUX_DATA(PP2_DATA, PP2_IN, PP2_OUT),
 453        PINMUX_DATA(PP1_DATA, PP1_IN, PP1_OUT),
 454        PINMUX_DATA(PP0_DATA, PP0_IN, PP0_OUT),
 455
 456        /* PQ GPIO */
 457        PINMUX_DATA(PQ4_DATA, PQ4_IN, PQ4_OUT),
 458        PINMUX_DATA(PQ3_DATA, PQ3_IN, PQ3_OUT),
 459        PINMUX_DATA(PQ2_DATA, PQ2_IN, PQ2_OUT),
 460        PINMUX_DATA(PQ1_DATA, PQ1_IN, PQ1_OUT),
 461        PINMUX_DATA(PQ0_DATA, PQ0_IN, PQ0_OUT),
 462
 463        /* PR GPIO */
 464        PINMUX_DATA(PR3_DATA, PR3_IN, PR3_OUT),
 465        PINMUX_DATA(PR2_DATA, PR2_IN, PR2_OUT),
 466        PINMUX_DATA(PR1_DATA, PR1_IN, PR1_OUT),
 467        PINMUX_DATA(PR0_DATA, PR0_IN, PR0_OUT),
 468
 469        /* PA FN */
 470        PINMUX_DATA(D63_AD31_MARK, PA7_FN),
 471        PINMUX_DATA(D62_AD30_MARK, PA6_FN),
 472        PINMUX_DATA(D61_AD29_MARK, PA5_FN),
 473        PINMUX_DATA(D60_AD28_MARK, PA4_FN),
 474        PINMUX_DATA(D59_AD27_MARK, PA3_FN),
 475        PINMUX_DATA(D58_AD26_MARK, PA2_FN),
 476        PINMUX_DATA(D57_AD25_MARK, PA1_FN),
 477        PINMUX_DATA(D56_AD24_MARK, PA0_FN),
 478
 479        /* PB FN */
 480        PINMUX_DATA(D55_AD23_MARK, PB7_FN),
 481        PINMUX_DATA(D54_AD22_MARK, PB6_FN),
 482        PINMUX_DATA(D53_AD21_MARK, PB5_FN),
 483        PINMUX_DATA(D52_AD20_MARK, PB4_FN),
 484        PINMUX_DATA(D51_AD19_MARK, PB3_FN),
 485        PINMUX_DATA(D50_AD18_MARK, PB2_FN),
 486        PINMUX_DATA(D49_AD17_DB5_MARK, PB1_FN),
 487        PINMUX_DATA(D48_AD16_DB4_MARK, PB0_FN),
 488
 489        /* PC FN */
 490        PINMUX_DATA(D47_AD15_DB3_MARK, PC7_FN),
 491        PINMUX_DATA(D46_AD14_DB2_MARK, PC6_FN),
 492        PINMUX_DATA(D45_AD13_DB1_MARK, PC5_FN),
 493        PINMUX_DATA(D44_AD12_DB0_MARK, PC4_FN),
 494        PINMUX_DATA(D43_AD11_DG5_MARK, PC3_FN),
 495        PINMUX_DATA(D42_AD10_DG4_MARK, PC2_FN),
 496        PINMUX_DATA(D41_AD9_DG3_MARK, PC1_FN),
 497        PINMUX_DATA(D40_AD8_DG2_MARK, PC0_FN),
 498
 499        /* PD FN */
 500        PINMUX_DATA(D39_AD7_DG1_MARK, PD7_FN),
 501        PINMUX_DATA(D38_AD6_DG0_MARK, PD6_FN),
 502        PINMUX_DATA(D37_AD5_DR5_MARK, PD5_FN),
 503        PINMUX_DATA(D36_AD4_DR4_MARK, PD4_FN),
 504        PINMUX_DATA(D35_AD3_DR3_MARK, PD3_FN),
 505        PINMUX_DATA(D34_AD2_DR2_MARK, PD2_FN),
 506        PINMUX_DATA(D33_AD1_DR1_MARK, PD1_FN),
 507        PINMUX_DATA(D32_AD0_DR0_MARK, PD0_FN),
 508
 509        /* PE FN */
 510        PINMUX_DATA(REQ1_MARK, PE5_FN),
 511        PINMUX_DATA(REQ2_MARK, PE4_FN),
 512        PINMUX_DATA(REQ3_MARK, P2MSEL0_0, PE3_FN),
 513        PINMUX_DATA(GNT1_MARK, PE2_FN),
 514        PINMUX_DATA(GNT2_MARK, PE1_FN),
 515        PINMUX_DATA(GNT3_MARK, P2MSEL0_0, PE0_FN),
 516        PINMUX_DATA(MMCCLK_MARK, P2MSEL0_1, PE0_FN),
 517
 518        /* PF FN */
 519        PINMUX_DATA(D31_MARK, PF7_FN),
 520        PINMUX_DATA(D30_MARK, PF6_FN),
 521        PINMUX_DATA(D29_MARK, PF5_FN),
 522        PINMUX_DATA(D28_MARK, PF4_FN),
 523        PINMUX_DATA(D27_MARK, PF3_FN),
 524        PINMUX_DATA(D26_MARK, PF2_FN),
 525        PINMUX_DATA(D25_MARK, PF1_FN),
 526        PINMUX_DATA(D24_MARK, PF0_FN),
 527
 528        /* PF FN */
 529        PINMUX_DATA(D23_MARK, PG7_FN),
 530        PINMUX_DATA(D22_MARK, PG6_FN),
 531        PINMUX_DATA(D21_MARK, PG5_FN),
 532        PINMUX_DATA(D20_MARK, PG4_FN),
 533        PINMUX_DATA(D19_MARK, PG3_FN),
 534        PINMUX_DATA(D18_MARK, PG2_FN),
 535        PINMUX_DATA(D17_MARK, PG1_FN),
 536        PINMUX_DATA(D16_MARK, PG0_FN),
 537
 538        /* PH FN */
 539        PINMUX_DATA(SCIF1_SCK_MARK, PH7_FN),
 540        PINMUX_DATA(SCIF1_RXD_MARK, PH6_FN),
 541        PINMUX_DATA(SCIF1_TXD_MARK, PH5_FN),
 542        PINMUX_DATA(SCIF0_CTS_MARK, PH4_FN),
 543        PINMUX_DATA(INTD_MARK, P1MSEL7_1, PH4_FN),
 544        PINMUX_DATA(FCE_MARK, P1MSEL8_1, P1MSEL7_0, PH4_FN),
 545        PINMUX_DATA(SCIF0_RTS_MARK, P1MSEL8_0, P1MSEL7_0, PH3_FN),
 546        PINMUX_DATA(HSPI_CS_MARK, P1MSEL8_0, P1MSEL7_1, PH3_FN),
 547        PINMUX_DATA(FSE_MARK, P1MSEL8_1, P1MSEL7_0, PH3_FN),
 548        PINMUX_DATA(SCIF0_SCK_MARK, P1MSEL8_0, P1MSEL7_0, PH2_FN),
 549        PINMUX_DATA(HSPI_CLK_MARK, P1MSEL8_0, P1MSEL7_1, PH2_FN),
 550        PINMUX_DATA(FRE_MARK, P1MSEL8_1, P1MSEL7_0, PH2_FN),
 551        PINMUX_DATA(SCIF0_RXD_MARK, P1MSEL8_0, P1MSEL7_0, PH1_FN),
 552        PINMUX_DATA(HSPI_RX_MARK, P1MSEL8_0, P1MSEL7_1, PH1_FN),
 553        PINMUX_DATA(FRB_MARK, P1MSEL8_1, P1MSEL7_0, PH1_FN),
 554        PINMUX_DATA(SCIF0_TXD_MARK, P1MSEL8_0, P1MSEL7_0, PH0_FN),
 555        PINMUX_DATA(HSPI_TX_MARK, P1MSEL8_0, P1MSEL7_1, PH0_FN),
 556        PINMUX_DATA(FWE_MARK, P1MSEL8_1, P1MSEL7_0, PH0_FN),
 557
 558        /* PJ FN */
 559        PINMUX_DATA(SCIF5_TXD_MARK, P1MSEL2_0, P1MSEL1_0, PJ7_FN),
 560        PINMUX_DATA(HAC1_SYNC_MARK, P1MSEL2_0, P1MSEL1_1, PJ7_FN),
 561        PINMUX_DATA(SSI1_WS_MARK, P1MSEL2_1, P1MSEL1_0, PJ7_FN),
 562        PINMUX_DATA(SIOF_TXD_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ6_FN),
 563        PINMUX_DATA(HAC0_SDOUT_MARK, P1MSEL4_0, P1MSEL3_1, PJ6_FN),
 564        PINMUX_DATA(SSI0_SDATA_MARK, P1MSEL4_1, P1MSEL3_0, PJ6_FN),
 565        PINMUX_DATA(SIOF_RXD_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ5_FN),
 566        PINMUX_DATA(HAC0_SDIN_MARK, P1MSEL4_0, P1MSEL3_1, PJ5_FN),
 567        PINMUX_DATA(SSI0_SCK_MARK, P1MSEL4_1, P1MSEL3_0, PJ5_FN),
 568        PINMUX_DATA(SIOF_SYNC_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ4_FN),
 569        PINMUX_DATA(HAC0_SYNC_MARK, P1MSEL4_0, P1MSEL3_1, PJ4_FN),
 570        PINMUX_DATA(SSI0_WS_MARK, P1MSEL4_1, P1MSEL3_0, PJ4_FN),
 571        PINMUX_DATA(SIOF_MCLK_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ3_FN),
 572        PINMUX_DATA(HAC_RES_MARK, P1MSEL4_0, P1MSEL3_1, PJ3_FN),
 573        PINMUX_DATA(SIOF_SCK_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ2_FN),
 574        PINMUX_DATA(HAC0_BITCLK_MARK, P1MSEL4_0, P1MSEL3_1, PJ2_FN),
 575        PINMUX_DATA(SSI0_CLK_MARK, P1MSEL4_1, P1MSEL3_0, PJ2_FN),
 576        PINMUX_DATA(HAC1_BITCLK_MARK, P1MSEL2_0, PJ1_FN),
 577        PINMUX_DATA(SSI1_CLK_MARK, P1MSEL2_1, P1MSEL1_0, PJ1_FN),
 578        PINMUX_DATA(TCLK_MARK, P1MSEL9_0, PJ0_FN),
 579        PINMUX_DATA(IOIS16_MARK, P1MSEL9_1, PJ0_FN),
 580
 581        /* PK FN */
 582        PINMUX_DATA(STATUS0_MARK, P1MSEL15_0, PK7_FN),
 583        PINMUX_DATA(DRAK0_PK3_MARK, P1MSEL15_1, PK7_FN),
 584        PINMUX_DATA(STATUS1_MARK, P1MSEL15_0, PK6_FN),
 585        PINMUX_DATA(DRAK1_PK2_MARK, P1MSEL15_1, PK6_FN),
 586        PINMUX_DATA(DACK2_MARK, P1MSEL12_0, P1MSEL11_0, PK5_FN),
 587        PINMUX_DATA(SCIF2_TXD_MARK, P1MSEL12_1, P1MSEL11_0, PK5_FN),
 588        PINMUX_DATA(MMCCMD_MARK, P1MSEL12_1, P1MSEL11_1, PK5_FN),
 589        PINMUX_DATA(SIOF_TXD_PK_MARK, P2MSEL1_1,
 590                    P1MSEL12_0, P1MSEL11_1, PK5_FN),
 591        PINMUX_DATA(DACK3_MARK, P1MSEL12_0, P1MSEL11_0, PK4_FN),
 592        PINMUX_DATA(SCIF2_SCK_MARK, P1MSEL12_1, P1MSEL11_0, PK4_FN),
 593        PINMUX_DATA(MMCDAT_MARK, P1MSEL12_1, P1MSEL11_1, PK4_FN),
 594        PINMUX_DATA(SIOF_SCK_PK_MARK, P2MSEL1_1,
 595                    P1MSEL12_0, P1MSEL11_1, PK4_FN),
 596        PINMUX_DATA(DREQ0_MARK, PK3_FN),
 597        PINMUX_DATA(DREQ1_MARK, PK2_FN),
 598        PINMUX_DATA(DRAK0_PK1_MARK, PK1_FN),
 599        PINMUX_DATA(DRAK1_PK0_MARK, PK0_FN),
 600
 601        /* PL FN */
 602        PINMUX_DATA(DREQ2_MARK, P1MSEL13_0, PL7_FN),
 603        PINMUX_DATA(INTB_MARK, P1MSEL13_1, PL7_FN),
 604        PINMUX_DATA(DREQ3_MARK, P1MSEL13_0, PL6_FN),
 605        PINMUX_DATA(INTC_MARK, P1MSEL13_1, PL6_FN),
 606        PINMUX_DATA(DRAK2_MARK, P1MSEL10_0, PL5_FN),
 607        PINMUX_DATA(CE2A_MARK, P1MSEL10_1, PL5_FN),
 608        PINMUX_DATA(IRL4_MARK, P1MSEL14_0, PL4_FN),
 609        PINMUX_DATA(FD4_MARK, P1MSEL14_1, PL4_FN),
 610        PINMUX_DATA(IRL5_MARK, P1MSEL14_0, PL3_FN),
 611        PINMUX_DATA(FD5_MARK, P1MSEL14_1, PL3_FN),
 612        PINMUX_DATA(IRL6_MARK, P1MSEL14_0, PL2_FN),
 613        PINMUX_DATA(FD6_MARK, P1MSEL14_1, PL2_FN),
 614        PINMUX_DATA(IRL7_MARK, P1MSEL14_0, PL1_FN),
 615        PINMUX_DATA(FD7_MARK, P1MSEL14_1, PL1_FN),
 616        PINMUX_DATA(DRAK3_MARK, P1MSEL10_0, PL0_FN),
 617        PINMUX_DATA(CE2B_MARK, P1MSEL10_1, PL0_FN),
 618
 619        /* PM FN */
 620        PINMUX_DATA(BREQ_BSACK_MARK, PM1_FN),
 621        PINMUX_DATA(BACK_BSREQ_MARK, PM0_FN),
 622
 623        /* PN FN */
 624        PINMUX_DATA(SCIF5_RXD_MARK, P1MSEL2_0, P1MSEL1_0, PN7_FN),
 625        PINMUX_DATA(HAC1_SDIN_MARK, P1MSEL2_0, P1MSEL1_1, PN7_FN),
 626        PINMUX_DATA(SSI1_SCK_MARK, P1MSEL2_1, P1MSEL1_0, PN7_FN),
 627        PINMUX_DATA(SCIF5_SCK_MARK, P1MSEL2_0, P1MSEL1_0, PN6_FN),
 628        PINMUX_DATA(HAC1_SDOUT_MARK, P1MSEL2_0, P1MSEL1_1, PN6_FN),
 629        PINMUX_DATA(SSI1_SDATA_MARK, P1MSEL2_1, P1MSEL1_0, PN6_FN),
 630        PINMUX_DATA(SCIF3_TXD_MARK, P1MSEL0_0, PN5_FN),
 631        PINMUX_DATA(FCLE_MARK, P1MSEL0_1, PN5_FN),
 632        PINMUX_DATA(SCIF3_RXD_MARK, P1MSEL0_0, PN4_FN),
 633        PINMUX_DATA(FALE_MARK, P1MSEL0_1, PN4_FN),
 634        PINMUX_DATA(SCIF3_SCK_MARK, P1MSEL0_0, PN3_FN),
 635        PINMUX_DATA(FD0_MARK, P1MSEL0_1, PN3_FN),
 636        PINMUX_DATA(SCIF4_TXD_MARK, P1MSEL0_0, PN2_FN),
 637        PINMUX_DATA(FD1_MARK, P1MSEL0_1, PN2_FN),
 638        PINMUX_DATA(SCIF4_RXD_MARK, P1MSEL0_0, PN1_FN),
 639        PINMUX_DATA(FD2_MARK, P1MSEL0_1, PN1_FN),
 640        PINMUX_DATA(SCIF4_SCK_MARK, P1MSEL0_0, PN0_FN),
 641        PINMUX_DATA(FD3_MARK, P1MSEL0_1, PN0_FN),
 642
 643        /* PP FN */
 644        PINMUX_DATA(DEVSEL_DCLKOUT_MARK, PP5_FN),
 645        PINMUX_DATA(STOP_CDE_MARK, PP4_FN),
 646        PINMUX_DATA(LOCK_ODDF_MARK, PP3_FN),
 647        PINMUX_DATA(TRDY_DISPL_MARK, PP2_FN),
 648        PINMUX_DATA(IRDY_HSYNC_MARK, PP1_FN),
 649        PINMUX_DATA(PCIFRAME_VSYNC_MARK, PP0_FN),
 650
 651        /* PQ FN */
 652        PINMUX_DATA(INTA_MARK, PQ4_FN),
 653        PINMUX_DATA(GNT0_GNTIN_MARK, PQ3_FN),
 654        PINMUX_DATA(REQ0_REQOUT_MARK, PQ2_FN),
 655        PINMUX_DATA(PERR_MARK, PQ1_FN),
 656        PINMUX_DATA(SERR_MARK, PQ0_FN),
 657
 658        /* PR FN */
 659        PINMUX_DATA(WE7_CBE3_MARK, PR3_FN),
 660        PINMUX_DATA(WE6_CBE2_MARK, PR2_FN),
 661        PINMUX_DATA(WE5_CBE1_MARK, PR1_FN),
 662        PINMUX_DATA(WE4_CBE0_MARK, PR0_FN),
 663
 664        /* MISC FN */
 665        PINMUX_DATA(SCIF2_RXD_MARK, P1MSEL6_0, P1MSEL5_0),
 666        PINMUX_DATA(SIOF_RXD_MARK, P2MSEL1_1, P1MSEL6_1, P1MSEL5_0),
 667        PINMUX_DATA(MRESETOUT_MARK, P2MSEL2_0),
 668        PINMUX_DATA(IRQOUT_MARK, P2MSEL2_1),
 669};
 670
 671static const struct sh_pfc_pin pinmux_pins[] = {
 672        /* PA */
 673        PINMUX_GPIO(PA7),
 674        PINMUX_GPIO(PA6),
 675        PINMUX_GPIO(PA5),
 676        PINMUX_GPIO(PA4),
 677        PINMUX_GPIO(PA3),
 678        PINMUX_GPIO(PA2),
 679        PINMUX_GPIO(PA1),
 680        PINMUX_GPIO(PA0),
 681
 682        /* PB */
 683        PINMUX_GPIO(PB7),
 684        PINMUX_GPIO(PB6),
 685        PINMUX_GPIO(PB5),
 686        PINMUX_GPIO(PB4),
 687        PINMUX_GPIO(PB3),
 688        PINMUX_GPIO(PB2),
 689        PINMUX_GPIO(PB1),
 690        PINMUX_GPIO(PB0),
 691
 692        /* PC */
 693        PINMUX_GPIO(PC7),
 694        PINMUX_GPIO(PC6),
 695        PINMUX_GPIO(PC5),
 696        PINMUX_GPIO(PC4),
 697        PINMUX_GPIO(PC3),
 698        PINMUX_GPIO(PC2),
 699        PINMUX_GPIO(PC1),
 700        PINMUX_GPIO(PC0),
 701
 702        /* PD */
 703        PINMUX_GPIO(PD7),
 704        PINMUX_GPIO(PD6),
 705        PINMUX_GPIO(PD5),
 706        PINMUX_GPIO(PD4),
 707        PINMUX_GPIO(PD3),
 708        PINMUX_GPIO(PD2),
 709        PINMUX_GPIO(PD1),
 710        PINMUX_GPIO(PD0),
 711
 712        /* PE */
 713        PINMUX_GPIO(PE5),
 714        PINMUX_GPIO(PE4),
 715        PINMUX_GPIO(PE3),
 716        PINMUX_GPIO(PE2),
 717        PINMUX_GPIO(PE1),
 718        PINMUX_GPIO(PE0),
 719
 720        /* PF */
 721        PINMUX_GPIO(PF7),
 722        PINMUX_GPIO(PF6),
 723        PINMUX_GPIO(PF5),
 724        PINMUX_GPIO(PF4),
 725        PINMUX_GPIO(PF3),
 726        PINMUX_GPIO(PF2),
 727        PINMUX_GPIO(PF1),
 728        PINMUX_GPIO(PF0),
 729
 730        /* PG */
 731        PINMUX_GPIO(PG7),
 732        PINMUX_GPIO(PG6),
 733        PINMUX_GPIO(PG5),
 734        PINMUX_GPIO(PG4),
 735        PINMUX_GPIO(PG3),
 736        PINMUX_GPIO(PG2),
 737        PINMUX_GPIO(PG1),
 738        PINMUX_GPIO(PG0),
 739
 740        /* PH */
 741        PINMUX_GPIO(PH7),
 742        PINMUX_GPIO(PH6),
 743        PINMUX_GPIO(PH5),
 744        PINMUX_GPIO(PH4),
 745        PINMUX_GPIO(PH3),
 746        PINMUX_GPIO(PH2),
 747        PINMUX_GPIO(PH1),
 748        PINMUX_GPIO(PH0),
 749
 750        /* PJ */
 751        PINMUX_GPIO(PJ7),
 752        PINMUX_GPIO(PJ6),
 753        PINMUX_GPIO(PJ5),
 754        PINMUX_GPIO(PJ4),
 755        PINMUX_GPIO(PJ3),
 756        PINMUX_GPIO(PJ2),
 757        PINMUX_GPIO(PJ1),
 758        PINMUX_GPIO(PJ0),
 759
 760        /* PK */
 761        PINMUX_GPIO(PK7),
 762        PINMUX_GPIO(PK6),
 763        PINMUX_GPIO(PK5),
 764        PINMUX_GPIO(PK4),
 765        PINMUX_GPIO(PK3),
 766        PINMUX_GPIO(PK2),
 767        PINMUX_GPIO(PK1),
 768        PINMUX_GPIO(PK0),
 769
 770        /* PL */
 771        PINMUX_GPIO(PL7),
 772        PINMUX_GPIO(PL6),
 773        PINMUX_GPIO(PL5),
 774        PINMUX_GPIO(PL4),
 775        PINMUX_GPIO(PL3),
 776        PINMUX_GPIO(PL2),
 777        PINMUX_GPIO(PL1),
 778        PINMUX_GPIO(PL0),
 779
 780        /* PM */
 781        PINMUX_GPIO(PM1),
 782        PINMUX_GPIO(PM0),
 783
 784        /* PN */
 785        PINMUX_GPIO(PN7),
 786        PINMUX_GPIO(PN6),
 787        PINMUX_GPIO(PN5),
 788        PINMUX_GPIO(PN4),
 789        PINMUX_GPIO(PN3),
 790        PINMUX_GPIO(PN2),
 791        PINMUX_GPIO(PN1),
 792        PINMUX_GPIO(PN0),
 793
 794        /* PP */
 795        PINMUX_GPIO(PP5),
 796        PINMUX_GPIO(PP4),
 797        PINMUX_GPIO(PP3),
 798        PINMUX_GPIO(PP2),
 799        PINMUX_GPIO(PP1),
 800        PINMUX_GPIO(PP0),
 801
 802        /* PQ */
 803        PINMUX_GPIO(PQ4),
 804        PINMUX_GPIO(PQ3),
 805        PINMUX_GPIO(PQ2),
 806        PINMUX_GPIO(PQ1),
 807        PINMUX_GPIO(PQ0),
 808
 809        /* PR */
 810        PINMUX_GPIO(PR3),
 811        PINMUX_GPIO(PR2),
 812        PINMUX_GPIO(PR1),
 813        PINMUX_GPIO(PR0),
 814};
 815
 816#define PINMUX_FN_BASE  ARRAY_SIZE(pinmux_pins)
 817
 818static const struct pinmux_func pinmux_func_gpios[] = {
 819        /* FN */
 820        GPIO_FN(D63_AD31),
 821        GPIO_FN(D62_AD30),
 822        GPIO_FN(D61_AD29),
 823        GPIO_FN(D60_AD28),
 824        GPIO_FN(D59_AD27),
 825        GPIO_FN(D58_AD26),
 826        GPIO_FN(D57_AD25),
 827        GPIO_FN(D56_AD24),
 828        GPIO_FN(D55_AD23),
 829        GPIO_FN(D54_AD22),
 830        GPIO_FN(D53_AD21),
 831        GPIO_FN(D52_AD20),
 832        GPIO_FN(D51_AD19),
 833        GPIO_FN(D50_AD18),
 834        GPIO_FN(D49_AD17_DB5),
 835        GPIO_FN(D48_AD16_DB4),
 836        GPIO_FN(D47_AD15_DB3),
 837        GPIO_FN(D46_AD14_DB2),
 838        GPIO_FN(D45_AD13_DB1),
 839        GPIO_FN(D44_AD12_DB0),
 840        GPIO_FN(D43_AD11_DG5),
 841        GPIO_FN(D42_AD10_DG4),
 842        GPIO_FN(D41_AD9_DG3),
 843        GPIO_FN(D40_AD8_DG2),
 844        GPIO_FN(D39_AD7_DG1),
 845        GPIO_FN(D38_AD6_DG0),
 846        GPIO_FN(D37_AD5_DR5),
 847        GPIO_FN(D36_AD4_DR4),
 848        GPIO_FN(D35_AD3_DR3),
 849        GPIO_FN(D34_AD2_DR2),
 850        GPIO_FN(D33_AD1_DR1),
 851        GPIO_FN(D32_AD0_DR0),
 852        GPIO_FN(REQ1),
 853        GPIO_FN(REQ2),
 854        GPIO_FN(REQ3),
 855        GPIO_FN(GNT1),
 856        GPIO_FN(GNT2),
 857        GPIO_FN(GNT3),
 858        GPIO_FN(MMCCLK),
 859        GPIO_FN(D31),
 860        GPIO_FN(D30),
 861        GPIO_FN(D29),
 862        GPIO_FN(D28),
 863        GPIO_FN(D27),
 864        GPIO_FN(D26),
 865        GPIO_FN(D25),
 866        GPIO_FN(D24),
 867        GPIO_FN(D23),
 868        GPIO_FN(D22),
 869        GPIO_FN(D21),
 870        GPIO_FN(D20),
 871        GPIO_FN(D19),
 872        GPIO_FN(D18),
 873        GPIO_FN(D17),
 874        GPIO_FN(D16),
 875        GPIO_FN(SCIF1_SCK),
 876        GPIO_FN(SCIF1_RXD),
 877        GPIO_FN(SCIF1_TXD),
 878        GPIO_FN(SCIF0_CTS),
 879        GPIO_FN(INTD),
 880        GPIO_FN(FCE),
 881        GPIO_FN(SCIF0_RTS),
 882        GPIO_FN(HSPI_CS),
 883        GPIO_FN(FSE),
 884        GPIO_FN(SCIF0_SCK),
 885        GPIO_FN(HSPI_CLK),
 886        GPIO_FN(FRE),
 887        GPIO_FN(SCIF0_RXD),
 888        GPIO_FN(HSPI_RX),
 889        GPIO_FN(FRB),
 890        GPIO_FN(SCIF0_TXD),
 891        GPIO_FN(HSPI_TX),
 892        GPIO_FN(FWE),
 893        GPIO_FN(SCIF5_TXD),
 894        GPIO_FN(HAC1_SYNC),
 895        GPIO_FN(SSI1_WS),
 896        GPIO_FN(SIOF_TXD_PJ),
 897        GPIO_FN(HAC0_SDOUT),
 898        GPIO_FN(SSI0_SDATA),
 899        GPIO_FN(SIOF_RXD_PJ),
 900        GPIO_FN(HAC0_SDIN),
 901        GPIO_FN(SSI0_SCK),
 902        GPIO_FN(SIOF_SYNC_PJ),
 903        GPIO_FN(HAC0_SYNC),
 904        GPIO_FN(SSI0_WS),
 905        GPIO_FN(SIOF_MCLK_PJ),
 906        GPIO_FN(HAC_RES),
 907        GPIO_FN(SIOF_SCK_PJ),
 908        GPIO_FN(HAC0_BITCLK),
 909        GPIO_FN(SSI0_CLK),
 910        GPIO_FN(HAC1_BITCLK),
 911        GPIO_FN(SSI1_CLK),
 912        GPIO_FN(TCLK),
 913        GPIO_FN(IOIS16),
 914        GPIO_FN(STATUS0),
 915        GPIO_FN(DRAK0_PK3),
 916        GPIO_FN(STATUS1),
 917        GPIO_FN(DRAK1_PK2),
 918        GPIO_FN(DACK2),
 919        GPIO_FN(SCIF2_TXD),
 920        GPIO_FN(MMCCMD),
 921        GPIO_FN(SIOF_TXD_PK),
 922        GPIO_FN(DACK3),
 923        GPIO_FN(SCIF2_SCK),
 924        GPIO_FN(MMCDAT),
 925        GPIO_FN(SIOF_SCK_PK),
 926        GPIO_FN(DREQ0),
 927        GPIO_FN(DREQ1),
 928        GPIO_FN(DRAK0_PK1),
 929        GPIO_FN(DRAK1_PK0),
 930        GPIO_FN(DREQ2),
 931        GPIO_FN(INTB),
 932        GPIO_FN(DREQ3),
 933        GPIO_FN(INTC),
 934        GPIO_FN(DRAK2),
 935        GPIO_FN(CE2A),
 936        GPIO_FN(IRL4),
 937        GPIO_FN(FD4),
 938        GPIO_FN(IRL5),
 939        GPIO_FN(FD5),
 940        GPIO_FN(IRL6),
 941        GPIO_FN(FD6),
 942        GPIO_FN(IRL7),
 943        GPIO_FN(FD7),
 944        GPIO_FN(DRAK3),
 945        GPIO_FN(CE2B),
 946        GPIO_FN(BREQ_BSACK),
 947        GPIO_FN(BACK_BSREQ),
 948        GPIO_FN(SCIF5_RXD),
 949        GPIO_FN(HAC1_SDIN),
 950        GPIO_FN(SSI1_SCK),
 951        GPIO_FN(SCIF5_SCK),
 952        GPIO_FN(HAC1_SDOUT),
 953        GPIO_FN(SSI1_SDATA),
 954        GPIO_FN(SCIF3_TXD),
 955        GPIO_FN(FCLE),
 956        GPIO_FN(SCIF3_RXD),
 957        GPIO_FN(FALE),
 958        GPIO_FN(SCIF3_SCK),
 959        GPIO_FN(FD0),
 960        GPIO_FN(SCIF4_TXD),
 961        GPIO_FN(FD1),
 962        GPIO_FN(SCIF4_RXD),
 963        GPIO_FN(FD2),
 964        GPIO_FN(SCIF4_SCK),
 965        GPIO_FN(FD3),
 966        GPIO_FN(DEVSEL_DCLKOUT),
 967        GPIO_FN(STOP_CDE),
 968        GPIO_FN(LOCK_ODDF),
 969        GPIO_FN(TRDY_DISPL),
 970        GPIO_FN(IRDY_HSYNC),
 971        GPIO_FN(PCIFRAME_VSYNC),
 972        GPIO_FN(INTA),
 973        GPIO_FN(GNT0_GNTIN),
 974        GPIO_FN(REQ0_REQOUT),
 975        GPIO_FN(PERR),
 976        GPIO_FN(SERR),
 977        GPIO_FN(WE7_CBE3),
 978        GPIO_FN(WE6_CBE2),
 979        GPIO_FN(WE5_CBE1),
 980        GPIO_FN(WE4_CBE0),
 981        GPIO_FN(SCIF2_RXD),
 982        GPIO_FN(SIOF_RXD),
 983        GPIO_FN(MRESETOUT),
 984        GPIO_FN(IRQOUT),
 985};
 986
 987static const struct pinmux_cfg_reg pinmux_config_regs[] = {
 988        { PINMUX_CFG_REG("PACR", 0xffe70000, 16, 2, GROUP(
 989                PA7_FN, PA7_OUT, PA7_IN, 0,
 990                PA6_FN, PA6_OUT, PA6_IN, 0,
 991                PA5_FN, PA5_OUT, PA5_IN, 0,
 992                PA4_FN, PA4_OUT, PA4_IN, 0,
 993                PA3_FN, PA3_OUT, PA3_IN, 0,
 994                PA2_FN, PA2_OUT, PA2_IN, 0,
 995                PA1_FN, PA1_OUT, PA1_IN, 0,
 996                PA0_FN, PA0_OUT, PA0_IN, 0 ))
 997        },
 998        { PINMUX_CFG_REG("PBCR", 0xffe70002, 16, 2, GROUP(
 999                PB7_FN, PB7_OUT, PB7_IN, 0,
1000                PB6_FN, PB6_OUT, PB6_IN, 0,
1001                PB5_FN, PB5_OUT, PB5_IN, 0,
1002                PB4_FN, PB4_OUT, PB4_IN, 0,
1003                PB3_FN, PB3_OUT, PB3_IN, 0,
1004                PB2_FN, PB2_OUT, PB2_IN, 0,
1005                PB1_FN, PB1_OUT, PB1_IN, 0,
1006                PB0_FN, PB0_OUT, PB0_IN, 0 ))
1007        },
1008        { PINMUX_CFG_REG("PCCR", 0xffe70004, 16, 2, GROUP(
1009                PC7_FN, PC7_OUT, PC7_IN, 0,
1010                PC6_FN, PC6_OUT, PC6_IN, 0,
1011                PC5_FN, PC5_OUT, PC5_IN, 0,
1012                PC4_FN, PC4_OUT, PC4_IN, 0,
1013                PC3_FN, PC3_OUT, PC3_IN, 0,
1014                PC2_FN, PC2_OUT, PC2_IN, 0,
1015                PC1_FN, PC1_OUT, PC1_IN, 0,
1016                PC0_FN, PC0_OUT, PC0_IN, 0 ))
1017        },
1018        { PINMUX_CFG_REG("PDCR", 0xffe70006, 16, 2, GROUP(
1019                PD7_FN, PD7_OUT, PD7_IN, 0,
1020                PD6_FN, PD6_OUT, PD6_IN, 0,
1021                PD5_FN, PD5_OUT, PD5_IN, 0,
1022                PD4_FN, PD4_OUT, PD4_IN, 0,
1023                PD3_FN, PD3_OUT, PD3_IN, 0,
1024                PD2_FN, PD2_OUT, PD2_IN, 0,
1025                PD1_FN, PD1_OUT, PD1_IN, 0,
1026                PD0_FN, PD0_OUT, PD0_IN, 0 ))
1027        },
1028        { PINMUX_CFG_REG("PECR", 0xffe70008, 16, 2, GROUP(
1029                0, 0, 0, 0,
1030                0, 0, 0, 0,
1031                PE5_FN, PE5_OUT, PE5_IN, 0,
1032                PE4_FN, PE4_OUT, PE4_IN, 0,
1033                PE3_FN, PE3_OUT, PE3_IN, 0,
1034                PE2_FN, PE2_OUT, PE2_IN, 0,
1035                PE1_FN, PE1_OUT, PE1_IN, 0,
1036                PE0_FN, PE0_OUT, PE0_IN, 0 ))
1037        },
1038        { PINMUX_CFG_REG("PFCR", 0xffe7000a, 16, 2, GROUP(
1039                PF7_FN, PF7_OUT, PF7_IN, 0,
1040                PF6_FN, PF6_OUT, PF6_IN, 0,
1041                PF5_FN, PF5_OUT, PF5_IN, 0,
1042                PF4_FN, PF4_OUT, PF4_IN, 0,
1043                PF3_FN, PF3_OUT, PF3_IN, 0,
1044                PF2_FN, PF2_OUT, PF2_IN, 0,
1045                PF1_FN, PF1_OUT, PF1_IN, 0,
1046                PF0_FN, PF0_OUT, PF0_IN, 0 ))
1047        },
1048        { PINMUX_CFG_REG("PGCR", 0xffe7000c, 16, 2, GROUP(
1049                PG7_FN, PG7_OUT, PG7_IN, 0,
1050                PG6_FN, PG6_OUT, PG6_IN, 0,
1051                PG5_FN, PG5_OUT, PG5_IN, 0,
1052                PG4_FN, PG4_OUT, PG4_IN, 0,
1053                PG3_FN, PG3_OUT, PG3_IN, 0,
1054                PG2_FN, PG2_OUT, PG2_IN, 0,
1055                PG1_FN, PG1_OUT, PG1_IN, 0,
1056                PG0_FN, PG0_OUT, PG0_IN, 0 ))
1057        },
1058        { PINMUX_CFG_REG("PHCR", 0xffe7000e, 16, 2, GROUP(
1059                PH7_FN, PH7_OUT, PH7_IN, 0,
1060                PH6_FN, PH6_OUT, PH6_IN, 0,
1061                PH5_FN, PH5_OUT, PH5_IN, 0,
1062                PH4_FN, PH4_OUT, PH4_IN, 0,
1063                PH3_FN, PH3_OUT, PH3_IN, 0,
1064                PH2_FN, PH2_OUT, PH2_IN, 0,
1065                PH1_FN, PH1_OUT, PH1_IN, 0,
1066                PH0_FN, PH0_OUT, PH0_IN, 0 ))
1067        },
1068        { PINMUX_CFG_REG("PJCR", 0xffe70010, 16, 2, GROUP(
1069                PJ7_FN, PJ7_OUT, PJ7_IN, 0,
1070                PJ6_FN, PJ6_OUT, PJ6_IN, 0,
1071                PJ5_FN, PJ5_OUT, PJ5_IN, 0,
1072                PJ4_FN, PJ4_OUT, PJ4_IN, 0,
1073                PJ3_FN, PJ3_OUT, PJ3_IN, 0,
1074                PJ2_FN, PJ2_OUT, PJ2_IN, 0,
1075                PJ1_FN, PJ1_OUT, PJ1_IN, 0,
1076                PJ0_FN, PJ0_OUT, PJ0_IN, 0 ))
1077        },
1078        { PINMUX_CFG_REG("PKCR", 0xffe70012, 16, 2, GROUP(
1079                PK7_FN, PK7_OUT, PK7_IN, 0,
1080                PK6_FN, PK6_OUT, PK6_IN, 0,
1081                PK5_FN, PK5_OUT, PK5_IN, 0,
1082                PK4_FN, PK4_OUT, PK4_IN, 0,
1083                PK3_FN, PK3_OUT, PK3_IN, 0,
1084                PK2_FN, PK2_OUT, PK2_IN, 0,
1085                PK1_FN, PK1_OUT, PK1_IN, 0,
1086                PK0_FN, PK0_OUT, PK0_IN, 0 ))
1087        },
1088        { PINMUX_CFG_REG("PLCR", 0xffe70014, 16, 2, GROUP(
1089                PL7_FN, PL7_OUT, PL7_IN, 0,
1090                PL6_FN, PL6_OUT, PL6_IN, 0,
1091                PL5_FN, PL5_OUT, PL5_IN, 0,
1092                PL4_FN, PL4_OUT, PL4_IN, 0,
1093                PL3_FN, PL3_OUT, PL3_IN, 0,
1094                PL2_FN, PL2_OUT, PL2_IN, 0,
1095                PL1_FN, PL1_OUT, PL1_IN, 0,
1096                PL0_FN, PL0_OUT, PL0_IN, 0 ))
1097        },
1098        { PINMUX_CFG_REG("PMCR", 0xffe70016, 16, 2, GROUP(
1099                0, 0, 0, 0,
1100                0, 0, 0, 0,
1101                0, 0, 0, 0,
1102                0, 0, 0, 0,
1103                0, 0, 0, 0,
1104                0, 0, 0, 0,
1105                PM1_FN, PM1_OUT, PM1_IN, 0,
1106                PM0_FN, PM0_OUT, PM0_IN, 0 ))
1107        },
1108        { PINMUX_CFG_REG("PNCR", 0xffe70018, 16, 2, GROUP(
1109                PN7_FN, PN7_OUT, PN7_IN, 0,
1110                PN6_FN, PN6_OUT, PN6_IN, 0,
1111                PN5_FN, PN5_OUT, PN5_IN, 0,
1112                PN4_FN, PN4_OUT, PN4_IN, 0,
1113                PN3_FN, PN3_OUT, PN3_IN, 0,
1114                PN2_FN, PN2_OUT, PN2_IN, 0,
1115                PN1_FN, PN1_OUT, PN1_IN, 0,
1116                PN0_FN, PN0_OUT, PN0_IN, 0 ))
1117        },
1118        { PINMUX_CFG_REG("PPCR", 0xffe7001a, 16, 2, GROUP(
1119                0, 0, 0, 0,
1120                0, 0, 0, 0,
1121                PP5_FN, PP5_OUT, PP5_IN, 0,
1122                PP4_FN, PP4_OUT, PP4_IN, 0,
1123                PP3_FN, PP3_OUT, PP3_IN, 0,
1124                PP2_FN, PP2_OUT, PP2_IN, 0,
1125                PP1_FN, PP1_OUT, PP1_IN, 0,
1126                PP0_FN, PP0_OUT, PP0_IN, 0 ))
1127        },
1128        { PINMUX_CFG_REG("PQCR", 0xffe7001c, 16, 2, GROUP(
1129                0, 0, 0, 0,
1130                0, 0, 0, 0,
1131                0, 0, 0, 0,
1132                PQ4_FN, PQ4_OUT, PQ4_IN, 0,
1133                PQ3_FN, PQ3_OUT, PQ3_IN, 0,
1134                PQ2_FN, PQ2_OUT, PQ2_IN, 0,
1135                PQ1_FN, PQ1_OUT, PQ1_IN, 0,
1136                PQ0_FN, PQ0_OUT, PQ0_IN, 0 ))
1137        },
1138        { PINMUX_CFG_REG("PRCR", 0xffe7001e, 16, 2, GROUP(
1139                0, 0, 0, 0,
1140                0, 0, 0, 0,
1141                0, 0, 0, 0,
1142                0, 0, 0, 0,
1143                PR3_FN, PR3_OUT, PR3_IN, 0,
1144                PR2_FN, PR2_OUT, PR2_IN, 0,
1145                PR1_FN, PR1_OUT, PR1_IN, 0,
1146                PR0_FN, PR0_OUT, PR0_IN, 0 ))
1147        },
1148        { PINMUX_CFG_REG("P1MSELR", 0xffe70080, 16, 1, GROUP(
1149                P1MSEL15_0, P1MSEL15_1,
1150                P1MSEL14_0, P1MSEL14_1,
1151                P1MSEL13_0, P1MSEL13_1,
1152                P1MSEL12_0, P1MSEL12_1,
1153                P1MSEL11_0, P1MSEL11_1,
1154                P1MSEL10_0, P1MSEL10_1,
1155                P1MSEL9_0, P1MSEL9_1,
1156                P1MSEL8_0, P1MSEL8_1,
1157                P1MSEL7_0, P1MSEL7_1,
1158                P1MSEL6_0, P1MSEL6_1,
1159                P1MSEL5_0, 0,
1160                P1MSEL4_0, P1MSEL4_1,
1161                P1MSEL3_0, P1MSEL3_1,
1162                P1MSEL2_0, P1MSEL2_1,
1163                P1MSEL1_0, P1MSEL1_1,
1164                P1MSEL0_0, P1MSEL0_1 ))
1165        },
1166        { PINMUX_CFG_REG("P2MSELR", 0xffe70082, 16, 1, GROUP(
1167                0, 0,
1168                0, 0,
1169                0, 0,
1170                0, 0,
1171                0, 0,
1172                0, 0,
1173                0, 0,
1174                0, 0,
1175                0, 0,
1176                0, 0,
1177                0, 0,
1178                0, 0,
1179                0, 0,
1180                P2MSEL2_0, P2MSEL2_1,
1181                P2MSEL1_0, P2MSEL1_1,
1182                P2MSEL0_0, P2MSEL0_1 ))
1183        },
1184        {}
1185};
1186
1187static const struct pinmux_data_reg pinmux_data_regs[] = {
1188        { PINMUX_DATA_REG("PADR", 0xffe70020, 8, GROUP(
1189                PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
1190                PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA ))
1191        },
1192        { PINMUX_DATA_REG("PBDR", 0xffe70022, 8, GROUP(
1193                PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
1194                PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA ))
1195        },
1196        { PINMUX_DATA_REG("PCDR", 0xffe70024, 8, GROUP(
1197                PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
1198                PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA ))
1199        },
1200        { PINMUX_DATA_REG("PDDR", 0xffe70026, 8, GROUP(
1201                PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
1202                PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA ))
1203        },
1204        { PINMUX_DATA_REG("PEDR", 0xffe70028, 8, GROUP(
1205                0, 0, PE5_DATA, PE4_DATA,
1206                PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA ))
1207        },
1208        { PINMUX_DATA_REG("PFDR", 0xffe7002a, 8, GROUP(
1209                PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
1210                PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA ))
1211        },
1212        { PINMUX_DATA_REG("PGDR", 0xffe7002c, 8, GROUP(
1213                PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
1214                PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA ))
1215        },
1216        { PINMUX_DATA_REG("PHDR", 0xffe7002e, 8, GROUP(
1217                PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
1218                PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA ))
1219        },
1220        { PINMUX_DATA_REG("PJDR", 0xffe70030, 8, GROUP(
1221                PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
1222                PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA ))
1223        },
1224        { PINMUX_DATA_REG("PKDR", 0xffe70032, 8, GROUP(
1225                PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,
1226                PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA ))
1227        },
1228        { PINMUX_DATA_REG("PLDR", 0xffe70034, 8, GROUP(
1229                PL7_DATA, PL6_DATA, PL5_DATA, PL4_DATA,
1230                PL3_DATA, PL2_DATA, PL1_DATA, PL0_DATA ))
1231        },
1232        { PINMUX_DATA_REG("PMDR", 0xffe70036, 8, GROUP(
1233                0, 0, 0, 0,
1234                0, 0, PM1_DATA, PM0_DATA ))
1235        },
1236        { PINMUX_DATA_REG("PNDR", 0xffe70038, 8, GROUP(
1237                PN7_DATA, PN6_DATA, PN5_DATA, PN4_DATA,
1238                PN3_DATA, PN2_DATA, PN1_DATA, PN0_DATA ))
1239        },
1240        { PINMUX_DATA_REG("PPDR", 0xffe7003a, 8, GROUP(
1241                0, 0, PP5_DATA, PP4_DATA,
1242                PP3_DATA, PP2_DATA, PP1_DATA, PP0_DATA ))
1243        },
1244        { PINMUX_DATA_REG("PQDR", 0xffe7003c, 8, GROUP(
1245                0, 0, 0, PQ4_DATA,
1246                PQ3_DATA, PQ2_DATA, PQ1_DATA, PQ0_DATA ))
1247        },
1248        { PINMUX_DATA_REG("PRDR", 0xffe7003e, 8, GROUP(
1249                0, 0, 0, 0,
1250                PR3_DATA, PR2_DATA, PR1_DATA, PR0_DATA ))
1251        },
1252        { },
1253};
1254
1255const struct sh_pfc_soc_info sh7785_pinmux_info = {
1256        .name = "sh7785_pfc",
1257        .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1258        .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1259        .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1260
1261        .pins = pinmux_pins,
1262        .nr_pins = ARRAY_SIZE(pinmux_pins),
1263        .func_gpios = pinmux_func_gpios,
1264        .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
1265
1266        .cfg_regs = pinmux_config_regs,
1267        .data_regs = pinmux_data_regs,
1268
1269        .pinmux_data = pinmux_data,
1270        .pinmux_data_size = ARRAY_SIZE(pinmux_data),
1271};
1272