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11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/err.h>
15#include <linux/of.h>
16#include <linux/platform_device.h>
17#include <linux/regulator/driver.h>
18#include <linux/regulator/machine.h>
19#include <linux/slab.h>
20#include <linux/gpio.h>
21#include <linux/mfd/tps65910.h>
22#include <linux/regulator/of_regulator.h>
23
24#define TPS65910_SUPPLY_STATE_ENABLED 0x1
25#define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
26 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
27 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
28 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
29
30
31static const unsigned int VIO_VSEL_table[] = {
32 1500000, 1800000, 2500000, 3300000,
33};
34
35
36
37
38static const unsigned int VRTC_VSEL_table[] = {
39 1800000,
40};
41
42
43static const unsigned int VDD3_VSEL_table[] = {
44 5000000,
45};
46
47
48static const unsigned int VDIG1_VSEL_table[] = {
49 1200000, 1500000, 1800000, 2700000,
50};
51
52
53static const unsigned int VDIG2_VSEL_table[] = {
54 1000000, 1100000, 1200000, 1800000,
55};
56
57
58static const unsigned int VPLL_VSEL_table[] = {
59 1000000, 1100000, 1800000, 2500000,
60};
61
62
63static const unsigned int VDAC_VSEL_table[] = {
64 1800000, 2600000, 2800000, 2850000,
65};
66
67
68static const unsigned int VAUX1_VSEL_table[] = {
69 1800000, 2500000, 2800000, 2850000,
70};
71
72
73static const unsigned int VAUX2_VSEL_table[] = {
74 1800000, 2800000, 2900000, 3300000,
75};
76
77
78static const unsigned int VAUX33_VSEL_table[] = {
79 1800000, 2000000, 2800000, 3300000,
80};
81
82
83static const unsigned int VMMC_VSEL_table[] = {
84 1800000, 2800000, 3000000, 3300000,
85};
86
87
88static const unsigned int VBB_VSEL_table[] = {
89 3000000, 2520000, 3150000, 5000000,
90};
91
92struct tps_info {
93 const char *name;
94 const char *vin_name;
95 u8 n_voltages;
96 const unsigned int *voltage_table;
97 int enable_time_us;
98};
99
100static struct tps_info tps65910_regs[] = {
101 {
102 .name = "vrtc",
103 .vin_name = "vcc7",
104 .n_voltages = ARRAY_SIZE(VRTC_VSEL_table),
105 .voltage_table = VRTC_VSEL_table,
106 .enable_time_us = 2200,
107 },
108 {
109 .name = "vio",
110 .vin_name = "vccio",
111 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
112 .voltage_table = VIO_VSEL_table,
113 .enable_time_us = 350,
114 },
115 {
116 .name = "vdd1",
117 .vin_name = "vcc1",
118 .enable_time_us = 350,
119 },
120 {
121 .name = "vdd2",
122 .vin_name = "vcc2",
123 .enable_time_us = 350,
124 },
125 {
126 .name = "vdd3",
127 .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
128 .voltage_table = VDD3_VSEL_table,
129 .enable_time_us = 200,
130 },
131 {
132 .name = "vdig1",
133 .vin_name = "vcc6",
134 .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
135 .voltage_table = VDIG1_VSEL_table,
136 .enable_time_us = 100,
137 },
138 {
139 .name = "vdig2",
140 .vin_name = "vcc6",
141 .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
142 .voltage_table = VDIG2_VSEL_table,
143 .enable_time_us = 100,
144 },
145 {
146 .name = "vpll",
147 .vin_name = "vcc5",
148 .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
149 .voltage_table = VPLL_VSEL_table,
150 .enable_time_us = 100,
151 },
152 {
153 .name = "vdac",
154 .vin_name = "vcc5",
155 .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
156 .voltage_table = VDAC_VSEL_table,
157 .enable_time_us = 100,
158 },
159 {
160 .name = "vaux1",
161 .vin_name = "vcc4",
162 .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
163 .voltage_table = VAUX1_VSEL_table,
164 .enable_time_us = 100,
165 },
166 {
167 .name = "vaux2",
168 .vin_name = "vcc4",
169 .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
170 .voltage_table = VAUX2_VSEL_table,
171 .enable_time_us = 100,
172 },
173 {
174 .name = "vaux33",
175 .vin_name = "vcc3",
176 .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
177 .voltage_table = VAUX33_VSEL_table,
178 .enable_time_us = 100,
179 },
180 {
181 .name = "vmmc",
182 .vin_name = "vcc3",
183 .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
184 .voltage_table = VMMC_VSEL_table,
185 .enable_time_us = 100,
186 },
187 {
188 .name = "vbb",
189 .vin_name = "vcc7",
190 .n_voltages = ARRAY_SIZE(VBB_VSEL_table),
191 .voltage_table = VBB_VSEL_table,
192 },
193};
194
195static struct tps_info tps65911_regs[] = {
196 {
197 .name = "vrtc",
198 .vin_name = "vcc7",
199 .enable_time_us = 2200,
200 },
201 {
202 .name = "vio",
203 .vin_name = "vccio",
204 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
205 .voltage_table = VIO_VSEL_table,
206 .enable_time_us = 350,
207 },
208 {
209 .name = "vdd1",
210 .vin_name = "vcc1",
211 .n_voltages = 0x4C,
212 .enable_time_us = 350,
213 },
214 {
215 .name = "vdd2",
216 .vin_name = "vcc2",
217 .n_voltages = 0x4C,
218 .enable_time_us = 350,
219 },
220 {
221 .name = "vddctrl",
222 .n_voltages = 0x44,
223 .enable_time_us = 900,
224 },
225 {
226 .name = "ldo1",
227 .vin_name = "vcc6",
228 .n_voltages = 0x33,
229 .enable_time_us = 420,
230 },
231 {
232 .name = "ldo2",
233 .vin_name = "vcc6",
234 .n_voltages = 0x33,
235 .enable_time_us = 420,
236 },
237 {
238 .name = "ldo3",
239 .vin_name = "vcc5",
240 .n_voltages = 0x1A,
241 .enable_time_us = 230,
242 },
243 {
244 .name = "ldo4",
245 .vin_name = "vcc5",
246 .n_voltages = 0x33,
247 .enable_time_us = 230,
248 },
249 {
250 .name = "ldo5",
251 .vin_name = "vcc4",
252 .n_voltages = 0x1A,
253 .enable_time_us = 230,
254 },
255 {
256 .name = "ldo6",
257 .vin_name = "vcc3",
258 .n_voltages = 0x1A,
259 .enable_time_us = 230,
260 },
261 {
262 .name = "ldo7",
263 .vin_name = "vcc3",
264 .n_voltages = 0x1A,
265 .enable_time_us = 230,
266 },
267 {
268 .name = "ldo8",
269 .vin_name = "vcc3",
270 .n_voltages = 0x1A,
271 .enable_time_us = 230,
272 },
273};
274
275#define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
276static unsigned int tps65910_ext_sleep_control[] = {
277 0,
278 EXT_CONTROL_REG_BITS(VIO, 1, 0),
279 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
280 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
281 EXT_CONTROL_REG_BITS(VDD3, 1, 3),
282 EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
283 EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
284 EXT_CONTROL_REG_BITS(VPLL, 0, 6),
285 EXT_CONTROL_REG_BITS(VDAC, 0, 7),
286 EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
287 EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
288 EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
289 EXT_CONTROL_REG_BITS(VMMC, 0, 0),
290};
291
292static unsigned int tps65911_ext_sleep_control[] = {
293 0,
294 EXT_CONTROL_REG_BITS(VIO, 1, 0),
295 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
296 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
297 EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
298 EXT_CONTROL_REG_BITS(LDO1, 0, 1),
299 EXT_CONTROL_REG_BITS(LDO2, 0, 2),
300 EXT_CONTROL_REG_BITS(LDO3, 0, 7),
301 EXT_CONTROL_REG_BITS(LDO4, 0, 6),
302 EXT_CONTROL_REG_BITS(LDO5, 0, 3),
303 EXT_CONTROL_REG_BITS(LDO6, 0, 0),
304 EXT_CONTROL_REG_BITS(LDO7, 0, 5),
305 EXT_CONTROL_REG_BITS(LDO8, 0, 4),
306};
307
308struct tps65910_reg {
309 struct regulator_desc *desc;
310 struct tps65910 *mfd;
311 struct regulator_dev **rdev;
312 struct tps_info **info;
313 int num_regulators;
314 int mode;
315 int (*get_ctrl_reg)(int);
316 unsigned int *ext_sleep_control;
317 unsigned int board_ext_control[TPS65910_NUM_REGS];
318};
319
320static int tps65910_get_ctrl_register(int id)
321{
322 switch (id) {
323 case TPS65910_REG_VRTC:
324 return TPS65910_VRTC;
325 case TPS65910_REG_VIO:
326 return TPS65910_VIO;
327 case TPS65910_REG_VDD1:
328 return TPS65910_VDD1;
329 case TPS65910_REG_VDD2:
330 return TPS65910_VDD2;
331 case TPS65910_REG_VDD3:
332 return TPS65910_VDD3;
333 case TPS65910_REG_VDIG1:
334 return TPS65910_VDIG1;
335 case TPS65910_REG_VDIG2:
336 return TPS65910_VDIG2;
337 case TPS65910_REG_VPLL:
338 return TPS65910_VPLL;
339 case TPS65910_REG_VDAC:
340 return TPS65910_VDAC;
341 case TPS65910_REG_VAUX1:
342 return TPS65910_VAUX1;
343 case TPS65910_REG_VAUX2:
344 return TPS65910_VAUX2;
345 case TPS65910_REG_VAUX33:
346 return TPS65910_VAUX33;
347 case TPS65910_REG_VMMC:
348 return TPS65910_VMMC;
349 case TPS65910_REG_VBB:
350 return TPS65910_BBCH;
351 default:
352 return -EINVAL;
353 }
354}
355
356static int tps65911_get_ctrl_register(int id)
357{
358 switch (id) {
359 case TPS65910_REG_VRTC:
360 return TPS65910_VRTC;
361 case TPS65910_REG_VIO:
362 return TPS65910_VIO;
363 case TPS65910_REG_VDD1:
364 return TPS65910_VDD1;
365 case TPS65910_REG_VDD2:
366 return TPS65910_VDD2;
367 case TPS65911_REG_VDDCTRL:
368 return TPS65911_VDDCTRL;
369 case TPS65911_REG_LDO1:
370 return TPS65911_LDO1;
371 case TPS65911_REG_LDO2:
372 return TPS65911_LDO2;
373 case TPS65911_REG_LDO3:
374 return TPS65911_LDO3;
375 case TPS65911_REG_LDO4:
376 return TPS65911_LDO4;
377 case TPS65911_REG_LDO5:
378 return TPS65911_LDO5;
379 case TPS65911_REG_LDO6:
380 return TPS65911_LDO6;
381 case TPS65911_REG_LDO7:
382 return TPS65911_LDO7;
383 case TPS65911_REG_LDO8:
384 return TPS65911_LDO8;
385 default:
386 return -EINVAL;
387 }
388}
389
390static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
391{
392 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
393 struct regmap *regmap = rdev_get_regmap(dev);
394 int reg, id = rdev_get_id(dev);
395
396 reg = pmic->get_ctrl_reg(id);
397 if (reg < 0)
398 return reg;
399
400 switch (mode) {
401 case REGULATOR_MODE_NORMAL:
402 return regmap_update_bits(regmap, reg,
403 LDO_ST_MODE_BIT | LDO_ST_ON_BIT,
404 LDO_ST_ON_BIT);
405 case REGULATOR_MODE_IDLE:
406 return regmap_set_bits(regmap, reg,
407 LDO_ST_ON_BIT | LDO_ST_MODE_BIT);
408 case REGULATOR_MODE_STANDBY:
409 return regmap_clear_bits(regmap, reg, LDO_ST_ON_BIT);
410 }
411
412 return -EINVAL;
413}
414
415static unsigned int tps65910_get_mode(struct regulator_dev *dev)
416{
417 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
418 struct regmap *regmap = rdev_get_regmap(dev);
419 int ret, reg, value, id = rdev_get_id(dev);
420
421 reg = pmic->get_ctrl_reg(id);
422 if (reg < 0)
423 return reg;
424
425 ret = regmap_read(regmap, reg, &value);
426 if (ret < 0)
427 return ret;
428
429 if (!(value & LDO_ST_ON_BIT))
430 return REGULATOR_MODE_STANDBY;
431 else if (value & LDO_ST_MODE_BIT)
432 return REGULATOR_MODE_IDLE;
433 else
434 return REGULATOR_MODE_NORMAL;
435}
436
437static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
438{
439 struct regmap *regmap = rdev_get_regmap(dev);
440 int ret, id = rdev_get_id(dev);
441 int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
442
443 switch (id) {
444 case TPS65910_REG_VDD1:
445 ret = regmap_read(regmap, TPS65910_VDD1_OP, &opvsel);
446 if (ret < 0)
447 return ret;
448 ret = regmap_read(regmap, TPS65910_VDD1, &mult);
449 if (ret < 0)
450 return ret;
451 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
452 ret = regmap_read(regmap, TPS65910_VDD1_SR, &srvsel);
453 if (ret < 0)
454 return ret;
455 sr = opvsel & VDD1_OP_CMD_MASK;
456 opvsel &= VDD1_OP_SEL_MASK;
457 srvsel &= VDD1_SR_SEL_MASK;
458 vselmax = 75;
459 break;
460 case TPS65910_REG_VDD2:
461 ret = regmap_read(regmap, TPS65910_VDD2_OP, &opvsel);
462 if (ret < 0)
463 return ret;
464 ret = regmap_read(regmap, TPS65910_VDD2, &mult);
465 if (ret < 0)
466 return ret;
467 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
468 ret = regmap_read(regmap, TPS65910_VDD2_SR, &srvsel);
469 if (ret < 0)
470 return ret;
471 sr = opvsel & VDD2_OP_CMD_MASK;
472 opvsel &= VDD2_OP_SEL_MASK;
473 srvsel &= VDD2_SR_SEL_MASK;
474 vselmax = 75;
475 break;
476 case TPS65911_REG_VDDCTRL:
477 ret = regmap_read(regmap, TPS65911_VDDCTRL_OP, &opvsel);
478 if (ret < 0)
479 return ret;
480 ret = regmap_read(regmap, TPS65911_VDDCTRL_SR, &srvsel);
481 if (ret < 0)
482 return ret;
483 sr = opvsel & VDDCTRL_OP_CMD_MASK;
484 opvsel &= VDDCTRL_OP_SEL_MASK;
485 srvsel &= VDDCTRL_SR_SEL_MASK;
486 vselmax = 64;
487 break;
488 }
489
490
491 if (!mult)
492 mult = 1;
493
494 if (sr) {
495
496 if (srvsel < 3)
497 srvsel = 3;
498 if (srvsel > vselmax)
499 srvsel = vselmax;
500 return srvsel - 3;
501 } else {
502
503
504 if (opvsel < 3)
505 opvsel = 3;
506 if (opvsel > vselmax)
507 opvsel = vselmax;
508 return opvsel - 3;
509 }
510 return -EINVAL;
511}
512
513static int tps65910_get_voltage_sel(struct regulator_dev *dev)
514{
515 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
516 struct regmap *regmap = rdev_get_regmap(dev);
517 int ret, reg, value, id = rdev_get_id(dev);
518
519 reg = pmic->get_ctrl_reg(id);
520 if (reg < 0)
521 return reg;
522
523 ret = regmap_read(regmap, reg, &value);
524 if (ret < 0)
525 return ret;
526
527 switch (id) {
528 case TPS65910_REG_VIO:
529 case TPS65910_REG_VDIG1:
530 case TPS65910_REG_VDIG2:
531 case TPS65910_REG_VPLL:
532 case TPS65910_REG_VDAC:
533 case TPS65910_REG_VAUX1:
534 case TPS65910_REG_VAUX2:
535 case TPS65910_REG_VAUX33:
536 case TPS65910_REG_VMMC:
537 value &= LDO_SEL_MASK;
538 value >>= LDO_SEL_SHIFT;
539 break;
540 case TPS65910_REG_VBB:
541 value &= BBCH_BBSEL_MASK;
542 value >>= BBCH_BBSEL_SHIFT;
543 break;
544 default:
545 return -EINVAL;
546 }
547
548 return value;
549}
550
551static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
552{
553 return dev->desc->volt_table[0];
554}
555
556static int tps65911_get_voltage_sel(struct regulator_dev *dev)
557{
558 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
559 struct regmap *regmap = rdev_get_regmap(dev);
560 int ret, id = rdev_get_id(dev);
561 unsigned int value, reg;
562
563 reg = pmic->get_ctrl_reg(id);
564
565 ret = regmap_read(regmap, reg, &value);
566 if (ret < 0)
567 return ret;
568
569 switch (id) {
570 case TPS65911_REG_LDO1:
571 case TPS65911_REG_LDO2:
572 case TPS65911_REG_LDO4:
573 value &= LDO1_SEL_MASK;
574 value >>= LDO_SEL_SHIFT;
575 break;
576 case TPS65911_REG_LDO3:
577 case TPS65911_REG_LDO5:
578 case TPS65911_REG_LDO6:
579 case TPS65911_REG_LDO7:
580 case TPS65911_REG_LDO8:
581 value &= LDO3_SEL_MASK;
582 value >>= LDO_SEL_SHIFT;
583 break;
584 case TPS65910_REG_VIO:
585 value &= LDO_SEL_MASK;
586 value >>= LDO_SEL_SHIFT;
587 break;
588 default:
589 return -EINVAL;
590 }
591
592 return value;
593}
594
595static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
596 unsigned selector)
597{
598 struct regmap *regmap = rdev_get_regmap(dev);
599 int id = rdev_get_id(dev), vsel;
600 int dcdc_mult = 0;
601
602 switch (id) {
603 case TPS65910_REG_VDD1:
604 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
605 if (dcdc_mult == 1)
606 dcdc_mult--;
607 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
608
609 regmap_update_bits(regmap, TPS65910_VDD1, VDD1_VGAIN_SEL_MASK,
610 dcdc_mult << VDD1_VGAIN_SEL_SHIFT);
611 regmap_write(regmap, TPS65910_VDD1_OP, vsel);
612 break;
613 case TPS65910_REG_VDD2:
614 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
615 if (dcdc_mult == 1)
616 dcdc_mult--;
617 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
618
619 regmap_update_bits(regmap, TPS65910_VDD2, VDD1_VGAIN_SEL_MASK,
620 dcdc_mult << VDD2_VGAIN_SEL_SHIFT);
621 regmap_write(regmap, TPS65910_VDD2_OP, vsel);
622 break;
623 case TPS65911_REG_VDDCTRL:
624 vsel = selector + 3;
625 regmap_write(regmap, TPS65911_VDDCTRL_OP, vsel);
626 break;
627 }
628
629 return 0;
630}
631
632static int tps65910_set_voltage_sel(struct regulator_dev *dev,
633 unsigned selector)
634{
635 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
636 struct regmap *regmap = rdev_get_regmap(dev);
637 int reg, id = rdev_get_id(dev);
638
639 reg = pmic->get_ctrl_reg(id);
640 if (reg < 0)
641 return reg;
642
643 switch (id) {
644 case TPS65910_REG_VIO:
645 case TPS65910_REG_VDIG1:
646 case TPS65910_REG_VDIG2:
647 case TPS65910_REG_VPLL:
648 case TPS65910_REG_VDAC:
649 case TPS65910_REG_VAUX1:
650 case TPS65910_REG_VAUX2:
651 case TPS65910_REG_VAUX33:
652 case TPS65910_REG_VMMC:
653 return regmap_update_bits(regmap, reg, LDO_SEL_MASK,
654 selector << LDO_SEL_SHIFT);
655 case TPS65910_REG_VBB:
656 return regmap_update_bits(regmap, reg, BBCH_BBSEL_MASK,
657 selector << BBCH_BBSEL_SHIFT);
658 }
659
660 return -EINVAL;
661}
662
663static int tps65911_set_voltage_sel(struct regulator_dev *dev,
664 unsigned selector)
665{
666 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
667 struct regmap *regmap = rdev_get_regmap(dev);
668 int reg, id = rdev_get_id(dev);
669
670 reg = pmic->get_ctrl_reg(id);
671 if (reg < 0)
672 return reg;
673
674 switch (id) {
675 case TPS65911_REG_LDO1:
676 case TPS65911_REG_LDO2:
677 case TPS65911_REG_LDO4:
678 return regmap_update_bits(regmap, reg, LDO1_SEL_MASK,
679 selector << LDO_SEL_SHIFT);
680 case TPS65911_REG_LDO3:
681 case TPS65911_REG_LDO5:
682 case TPS65911_REG_LDO6:
683 case TPS65911_REG_LDO7:
684 case TPS65911_REG_LDO8:
685 return regmap_update_bits(regmap, reg, LDO3_SEL_MASK,
686 selector << LDO_SEL_SHIFT);
687 case TPS65910_REG_VIO:
688 return regmap_update_bits(regmap, reg, LDO_SEL_MASK,
689 selector << LDO_SEL_SHIFT);
690 case TPS65910_REG_VBB:
691 return regmap_update_bits(regmap, reg, BBCH_BBSEL_MASK,
692 selector << BBCH_BBSEL_SHIFT);
693 }
694
695 return -EINVAL;
696}
697
698
699static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
700 unsigned selector)
701{
702 int volt, mult = 1, id = rdev_get_id(dev);
703
704 switch (id) {
705 case TPS65910_REG_VDD1:
706 case TPS65910_REG_VDD2:
707 mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
708 volt = VDD1_2_MIN_VOLT +
709 (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
710 break;
711 case TPS65911_REG_VDDCTRL:
712 volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
713 break;
714 default:
715 BUG();
716 return -EINVAL;
717 }
718
719 return volt * 100 * mult;
720}
721
722static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
723{
724 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
725 int step_mv = 0, id = rdev_get_id(dev);
726
727 switch (id) {
728 case TPS65911_REG_LDO1:
729 case TPS65911_REG_LDO2:
730 case TPS65911_REG_LDO4:
731
732 if (selector < 5)
733 selector = 0;
734 else
735 selector -= 4;
736
737 step_mv = 50;
738 break;
739 case TPS65911_REG_LDO3:
740 case TPS65911_REG_LDO5:
741 case TPS65911_REG_LDO6:
742 case TPS65911_REG_LDO7:
743 case TPS65911_REG_LDO8:
744
745 if (selector < 3)
746 selector = 0;
747 else
748 selector -= 2;
749
750 step_mv = 100;
751 break;
752 case TPS65910_REG_VIO:
753 return pmic->info[id]->voltage_table[selector];
754 default:
755 return -EINVAL;
756 }
757
758 return (LDO_MIN_VOLT + selector * step_mv) * 1000;
759}
760
761
762static const struct regulator_ops tps65910_ops_dcdc = {
763 .is_enabled = regulator_is_enabled_regmap,
764 .enable = regulator_enable_regmap,
765 .disable = regulator_disable_regmap,
766 .set_mode = tps65910_set_mode,
767 .get_mode = tps65910_get_mode,
768 .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
769 .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
770 .set_voltage_time_sel = regulator_set_voltage_time_sel,
771 .list_voltage = tps65910_list_voltage_dcdc,
772 .map_voltage = regulator_map_voltage_ascend,
773};
774
775static const struct regulator_ops tps65910_ops_vdd3 = {
776 .is_enabled = regulator_is_enabled_regmap,
777 .enable = regulator_enable_regmap,
778 .disable = regulator_disable_regmap,
779 .set_mode = tps65910_set_mode,
780 .get_mode = tps65910_get_mode,
781 .get_voltage = tps65910_get_voltage_vdd3,
782 .list_voltage = regulator_list_voltage_table,
783 .map_voltage = regulator_map_voltage_ascend,
784};
785
786static const struct regulator_ops tps65910_ops_vbb = {
787 .is_enabled = regulator_is_enabled_regmap,
788 .enable = regulator_enable_regmap,
789 .disable = regulator_disable_regmap,
790 .set_mode = tps65910_set_mode,
791 .get_mode = tps65910_get_mode,
792 .get_voltage_sel = tps65910_get_voltage_sel,
793 .set_voltage_sel = tps65910_set_voltage_sel,
794 .list_voltage = regulator_list_voltage_table,
795 .map_voltage = regulator_map_voltage_iterate,
796};
797
798static const struct regulator_ops tps65910_ops = {
799 .is_enabled = regulator_is_enabled_regmap,
800 .enable = regulator_enable_regmap,
801 .disable = regulator_disable_regmap,
802 .set_mode = tps65910_set_mode,
803 .get_mode = tps65910_get_mode,
804 .get_voltage_sel = tps65910_get_voltage_sel,
805 .set_voltage_sel = tps65910_set_voltage_sel,
806 .list_voltage = regulator_list_voltage_table,
807 .map_voltage = regulator_map_voltage_ascend,
808};
809
810static const struct regulator_ops tps65911_ops = {
811 .is_enabled = regulator_is_enabled_regmap,
812 .enable = regulator_enable_regmap,
813 .disable = regulator_disable_regmap,
814 .set_mode = tps65910_set_mode,
815 .get_mode = tps65910_get_mode,
816 .get_voltage_sel = tps65911_get_voltage_sel,
817 .set_voltage_sel = tps65911_set_voltage_sel,
818 .list_voltage = tps65911_list_voltage,
819 .map_voltage = regulator_map_voltage_ascend,
820};
821
822static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
823 int id, int ext_sleep_config)
824{
825 struct tps65910 *mfd = pmic->mfd;
826 u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
827 u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
828 int ret;
829
830
831
832
833
834 if (ext_sleep_config & EXT_SLEEP_CONTROL) {
835 int en_count;
836 en_count = ((ext_sleep_config &
837 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
838 en_count += ((ext_sleep_config &
839 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
840 en_count += ((ext_sleep_config &
841 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
842 en_count += ((ext_sleep_config &
843 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
844 if (en_count > 1) {
845 dev_err(mfd->dev,
846 "External sleep control flag is not proper\n");
847 return -EINVAL;
848 }
849 }
850
851 pmic->board_ext_control[id] = ext_sleep_config;
852
853
854 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
855 ret = regmap_set_bits(mfd->regmap,
856 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
857 else
858 ret = regmap_clear_bits(mfd->regmap,
859 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
860 if (ret < 0) {
861 dev_err(mfd->dev,
862 "Error in configuring external control EN1\n");
863 return ret;
864 }
865
866
867 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
868 ret = regmap_set_bits(mfd->regmap,
869 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
870 else
871 ret = regmap_clear_bits(mfd->regmap,
872 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
873 if (ret < 0) {
874 dev_err(mfd->dev,
875 "Error in configuring external control EN2\n");
876 return ret;
877 }
878
879
880 if ((tps65910_chip_id(mfd) == TPS65910) &&
881 (id >= TPS65910_REG_VDIG1)) {
882 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
883 ret = regmap_set_bits(mfd->regmap,
884 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
885 else
886 ret = regmap_clear_bits(mfd->regmap,
887 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
888 if (ret < 0) {
889 dev_err(mfd->dev,
890 "Error in configuring external control EN3\n");
891 return ret;
892 }
893 }
894
895
896 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
897
898 ret = regmap_clear_bits(mfd->regmap,
899 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
900 if (!ret)
901 ret = regmap_clear_bits(mfd->regmap,
902 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
903 if (ret < 0)
904 dev_err(mfd->dev,
905 "Error in configuring SLEEP register\n");
906 return ret;
907 }
908
909
910
911
912
913
914 if ((id == TPS65910_REG_VDD1) ||
915 (id == TPS65910_REG_VDD2) ||
916 ((id == TPS65911_REG_VDDCTRL) &&
917 (tps65910_chip_id(mfd) == TPS65911))) {
918 int op_reg_add = pmic->get_ctrl_reg(id) + 1;
919 int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
920 int opvsel, srvsel;
921
922 ret = regmap_read(mfd->regmap, op_reg_add, &opvsel);
923 if (ret < 0)
924 return ret;
925 ret = regmap_read(mfd->regmap, sr_reg_add, &srvsel);
926 if (ret < 0)
927 return ret;
928
929 if (opvsel & VDD1_OP_CMD_MASK) {
930 u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
931
932 ret = regmap_write(mfd->regmap, op_reg_add, reg_val);
933 if (ret < 0) {
934 dev_err(mfd->dev,
935 "Error in configuring op register\n");
936 return ret;
937 }
938 }
939 ret = regmap_write(mfd->regmap, sr_reg_add, 0);
940 if (ret < 0) {
941 dev_err(mfd->dev, "Error in setting sr register\n");
942 return ret;
943 }
944 }
945
946 ret = regmap_clear_bits(mfd->regmap,
947 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
948 if (!ret) {
949 if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
950 ret = regmap_set_bits(mfd->regmap,
951 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
952 else
953 ret = regmap_clear_bits(mfd->regmap,
954 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
955 }
956 if (ret < 0)
957 dev_err(mfd->dev,
958 "Error in configuring SLEEP register\n");
959
960 return ret;
961}
962
963#ifdef CONFIG_OF
964
965static struct of_regulator_match tps65910_matches[] = {
966 { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
967 { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
968 { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
969 { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
970 { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
971 { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
972 { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
973 { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
974 { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
975 { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
976 { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
977 { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
978 { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
979 { .name = "vbb", .driver_data = (void *) &tps65910_regs[13] },
980};
981
982static struct of_regulator_match tps65911_matches[] = {
983 { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
984 { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
985 { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
986 { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
987 { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
988 { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
989 { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
990 { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
991 { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
992 { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
993 { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
994 { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
995 { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
996};
997
998static struct tps65910_board *tps65910_parse_dt_reg_data(
999 struct platform_device *pdev,
1000 struct of_regulator_match **tps65910_reg_matches)
1001{
1002 struct tps65910_board *pmic_plat_data;
1003 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
1004 struct device_node *np, *regulators;
1005 struct of_regulator_match *matches;
1006 unsigned int prop;
1007 int idx = 0, ret, count;
1008
1009 pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
1010 GFP_KERNEL);
1011 if (!pmic_plat_data)
1012 return NULL;
1013
1014 np = pdev->dev.parent->of_node;
1015 regulators = of_get_child_by_name(np, "regulators");
1016 if (!regulators) {
1017 dev_err(&pdev->dev, "regulator node not found\n");
1018 return NULL;
1019 }
1020
1021 switch (tps65910_chip_id(tps65910)) {
1022 case TPS65910:
1023 count = ARRAY_SIZE(tps65910_matches);
1024 matches = tps65910_matches;
1025 break;
1026 case TPS65911:
1027 count = ARRAY_SIZE(tps65911_matches);
1028 matches = tps65911_matches;
1029 break;
1030 default:
1031 of_node_put(regulators);
1032 dev_err(&pdev->dev, "Invalid tps chip version\n");
1033 return NULL;
1034 }
1035
1036 ret = of_regulator_match(&pdev->dev, regulators, matches, count);
1037 of_node_put(regulators);
1038 if (ret < 0) {
1039 dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
1040 ret);
1041 return NULL;
1042 }
1043
1044 *tps65910_reg_matches = matches;
1045
1046 for (idx = 0; idx < count; idx++) {
1047 if (!matches[idx].of_node)
1048 continue;
1049
1050 pmic_plat_data->tps65910_pmic_init_data[idx] =
1051 matches[idx].init_data;
1052
1053 ret = of_property_read_u32(matches[idx].of_node,
1054 "ti,regulator-ext-sleep-control", &prop);
1055 if (!ret)
1056 pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
1057
1058 }
1059
1060 return pmic_plat_data;
1061}
1062#else
1063static inline struct tps65910_board *tps65910_parse_dt_reg_data(
1064 struct platform_device *pdev,
1065 struct of_regulator_match **tps65910_reg_matches)
1066{
1067 *tps65910_reg_matches = NULL;
1068 return NULL;
1069}
1070#endif
1071
1072static int tps65910_probe(struct platform_device *pdev)
1073{
1074 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
1075 struct regulator_config config = { };
1076 struct tps_info *info;
1077 struct regulator_dev *rdev;
1078 struct tps65910_reg *pmic;
1079 struct tps65910_board *pmic_plat_data;
1080 struct of_regulator_match *tps65910_reg_matches = NULL;
1081 int i, err;
1082
1083 pmic_plat_data = dev_get_platdata(tps65910->dev);
1084 if (!pmic_plat_data && tps65910->dev->of_node)
1085 pmic_plat_data = tps65910_parse_dt_reg_data(pdev,
1086 &tps65910_reg_matches);
1087
1088 if (!pmic_plat_data) {
1089 dev_err(&pdev->dev, "Platform data not found\n");
1090 return -EINVAL;
1091 }
1092
1093 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
1094 if (!pmic)
1095 return -ENOMEM;
1096
1097 pmic->mfd = tps65910;
1098 platform_set_drvdata(pdev, pmic);
1099
1100
1101 err = regmap_set_bits(pmic->mfd->regmap, TPS65910_DEVCTRL,
1102 DEVCTRL_SR_CTL_I2C_SEL_MASK);
1103 if (err < 0)
1104 return err;
1105
1106 switch (tps65910_chip_id(tps65910)) {
1107 case TPS65910:
1108 BUILD_BUG_ON(TPS65910_NUM_REGS < ARRAY_SIZE(tps65910_regs));
1109 pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
1110 pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
1111 pmic->ext_sleep_control = tps65910_ext_sleep_control;
1112 info = tps65910_regs;
1113
1114
1115
1116
1117 regmap_clear_bits(pmic->mfd->regmap, TPS65910_DCDCCTRL,
1118 DCDCCTRL_DCDCCKSYNC_MASK);
1119 break;
1120 case TPS65911:
1121 BUILD_BUG_ON(TPS65910_NUM_REGS < ARRAY_SIZE(tps65911_regs));
1122 pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
1123 pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
1124 pmic->ext_sleep_control = tps65911_ext_sleep_control;
1125 info = tps65911_regs;
1126 break;
1127 default:
1128 dev_err(&pdev->dev, "Invalid tps chip version\n");
1129 return -ENODEV;
1130 }
1131
1132 pmic->desc = devm_kcalloc(&pdev->dev,
1133 pmic->num_regulators,
1134 sizeof(struct regulator_desc),
1135 GFP_KERNEL);
1136 if (!pmic->desc)
1137 return -ENOMEM;
1138
1139 pmic->info = devm_kcalloc(&pdev->dev,
1140 pmic->num_regulators,
1141 sizeof(struct tps_info *),
1142 GFP_KERNEL);
1143 if (!pmic->info)
1144 return -ENOMEM;
1145
1146 pmic->rdev = devm_kcalloc(&pdev->dev,
1147 pmic->num_regulators,
1148 sizeof(struct regulator_dev *),
1149 GFP_KERNEL);
1150 if (!pmic->rdev)
1151 return -ENOMEM;
1152
1153 for (i = 0; i < pmic->num_regulators; i++, info++) {
1154
1155 pmic->info[i] = info;
1156
1157 pmic->desc[i].name = info->name;
1158 pmic->desc[i].supply_name = info->vin_name;
1159 pmic->desc[i].id = i;
1160 pmic->desc[i].n_voltages = info->n_voltages;
1161 pmic->desc[i].enable_time = info->enable_time_us;
1162
1163 if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
1164 pmic->desc[i].ops = &tps65910_ops_dcdc;
1165 pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
1166 VDD1_2_NUM_VOLT_COARSE;
1167 pmic->desc[i].ramp_delay = 12500;
1168 } else if (i == TPS65910_REG_VDD3) {
1169 if (tps65910_chip_id(tps65910) == TPS65910) {
1170 pmic->desc[i].ops = &tps65910_ops_vdd3;
1171 pmic->desc[i].volt_table = info->voltage_table;
1172 } else {
1173 pmic->desc[i].ops = &tps65910_ops_dcdc;
1174 pmic->desc[i].ramp_delay = 5000;
1175 }
1176 } else if (i == TPS65910_REG_VBB &&
1177 tps65910_chip_id(tps65910) == TPS65910) {
1178 pmic->desc[i].ops = &tps65910_ops_vbb;
1179 pmic->desc[i].volt_table = info->voltage_table;
1180 } else {
1181 if (tps65910_chip_id(tps65910) == TPS65910) {
1182 pmic->desc[i].ops = &tps65910_ops;
1183 pmic->desc[i].volt_table = info->voltage_table;
1184 } else {
1185 pmic->desc[i].ops = &tps65911_ops;
1186 }
1187 }
1188
1189 err = tps65910_set_ext_sleep_config(pmic, i,
1190 pmic_plat_data->regulator_ext_sleep_control[i]);
1191
1192
1193
1194
1195 if (err < 0)
1196 dev_warn(tps65910->dev,
1197 "Failed to initialise ext control config\n");
1198
1199 pmic->desc[i].type = REGULATOR_VOLTAGE;
1200 pmic->desc[i].owner = THIS_MODULE;
1201 pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
1202 pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
1203
1204 config.dev = tps65910->dev;
1205 config.init_data = pmic_plat_data->tps65910_pmic_init_data[i];
1206 config.driver_data = pmic;
1207 config.regmap = tps65910->regmap;
1208
1209 if (tps65910_reg_matches)
1210 config.of_node = tps65910_reg_matches[i].of_node;
1211
1212 rdev = devm_regulator_register(&pdev->dev, &pmic->desc[i],
1213 &config);
1214 if (IS_ERR(rdev))
1215 return dev_err_probe(tps65910->dev, PTR_ERR(rdev),
1216 "failed to register %s regulator\n",
1217 pdev->name);
1218
1219
1220 pmic->rdev[i] = rdev;
1221 }
1222 return 0;
1223}
1224
1225static void tps65910_shutdown(struct platform_device *pdev)
1226{
1227 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
1228 int i;
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243 for (i = 0; i < pmic->num_regulators; i++) {
1244 int err;
1245 if (!pmic->rdev[i])
1246 continue;
1247
1248 err = tps65910_set_ext_sleep_config(pmic, i, 0);
1249 if (err < 0)
1250 dev_err(&pdev->dev,
1251 "Error in clearing external control\n");
1252 }
1253}
1254
1255static struct platform_driver tps65910_driver = {
1256 .driver = {
1257 .name = "tps65910-pmic",
1258 },
1259 .probe = tps65910_probe,
1260 .shutdown = tps65910_shutdown,
1261};
1262
1263static int __init tps65910_init(void)
1264{
1265 return platform_driver_register(&tps65910_driver);
1266}
1267subsys_initcall(tps65910_init);
1268
1269static void __exit tps65910_cleanup(void)
1270{
1271 platform_driver_unregister(&tps65910_driver);
1272}
1273module_exit(tps65910_cleanup);
1274
1275MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1276MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
1277MODULE_LICENSE("GPL v2");
1278MODULE_ALIAS("platform:tps65910-pmic");
1279
