LXR linux/drivers/rtc/rtc-mxc.c

   1// SPDX-License-Identifier: GPL-2.0+
   2//
   3// Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved.
   4
   5#include <linux/io.h>
   6#include <linux/rtc.h>
   7#include <linux/module.h>
   8#include <linux/slab.h>
   9#include <linux/interrupt.h>
  10#include <linux/platform_device.h>
  11#include <linux/pm_wakeirq.h>
  12#include <linux/clk.h>
  13#include <linux/of.h>
  14#include <linux/of_device.h>
  15
  16#define RTC_INPUT_CLK_32768HZ   (0x00 << 5)
  17#define RTC_INPUT_CLK_32000HZ   (0x01 << 5)
  18#define RTC_INPUT_CLK_38400HZ   (0x02 << 5)
  19
  20#define RTC_SW_BIT      (1 << 0)
  21#define RTC_ALM_BIT     (1 << 2)
  22#define RTC_1HZ_BIT     (1 << 4)
  23#define RTC_2HZ_BIT     (1 << 7)
  24#define RTC_SAM0_BIT    (1 << 8)
  25#define RTC_SAM1_BIT    (1 << 9)
  26#define RTC_SAM2_BIT    (1 << 10)
  27#define RTC_SAM3_BIT    (1 << 11)
  28#define RTC_SAM4_BIT    (1 << 12)
  29#define RTC_SAM5_BIT    (1 << 13)
  30#define RTC_SAM6_BIT    (1 << 14)
  31#define RTC_SAM7_BIT    (1 << 15)
  32#define PIT_ALL_ON      (RTC_2HZ_BIT | RTC_SAM0_BIT | RTC_SAM1_BIT | \
  33                         RTC_SAM2_BIT | RTC_SAM3_BIT | RTC_SAM4_BIT | \
  34                         RTC_SAM5_BIT | RTC_SAM6_BIT | RTC_SAM7_BIT)
  35
  36#define RTC_ENABLE_BIT  (1 << 7)
  37
  38#define MAX_PIE_NUM     9
  39#define MAX_PIE_FREQ    512
  40
  41#define MXC_RTC_TIME    0
  42#define MXC_RTC_ALARM   1
  43
  44#define RTC_HOURMIN     0x00    /*  32bit rtc hour/min counter reg */
  45#define RTC_SECOND      0x04    /*  32bit rtc seconds counter reg */
  46#define RTC_ALRM_HM     0x08    /*  32bit rtc alarm hour/min reg */
  47#define RTC_ALRM_SEC    0x0C    /*  32bit rtc alarm seconds reg */
  48#define RTC_RTCCTL      0x10    /*  32bit rtc control reg */
  49#define RTC_RTCISR      0x14    /*  32bit rtc interrupt status reg */
  50#define RTC_RTCIENR     0x18    /*  32bit rtc interrupt enable reg */
  51#define RTC_STPWCH      0x1C    /*  32bit rtc stopwatch min reg */
  52#define RTC_DAYR        0x20    /*  32bit rtc days counter reg */
  53#define RTC_DAYALARM    0x24    /*  32bit rtc day alarm reg */
  54#define RTC_TEST1       0x28    /*  32bit rtc test reg 1 */
  55#define RTC_TEST2       0x2C    /*  32bit rtc test reg 2 */
  56#define RTC_TEST3       0x30    /*  32bit rtc test reg 3 */
  57
  58enum imx_rtc_type {
  59        IMX1_RTC,
  60        IMX21_RTC,
  61};
  62
  63struct rtc_plat_data {
  64        struct rtc_device *rtc;
  65        void __iomem *ioaddr;
  66        int irq;
  67        struct clk *clk_ref;
  68        struct clk *clk_ipg;
  69        struct rtc_time g_rtc_alarm;
  70        enum imx_rtc_type devtype;
  71};
  72
  73static const struct of_device_id imx_rtc_dt_ids[] = {
  74        { .compatible = "fsl,imx1-rtc", .data = (const void *)IMX1_RTC },
  75        { .compatible = "fsl,imx21-rtc", .data = (const void *)IMX21_RTC },
  76        {}
  77};
  78MODULE_DEVICE_TABLE(of, imx_rtc_dt_ids);
  79
  80static inline int is_imx1_rtc(struct rtc_plat_data *data)
  81{
  82        return data->devtype == IMX1_RTC;
  83}
  84
  85/*
  86 * This function is used to obtain the RTC time or the alarm value in
  87 * second.
  88 */
  89static time64_t get_alarm_or_time(struct device *dev, int time_alarm)
  90{
  91        struct rtc_plat_data *pdata = dev_get_drvdata(dev);
  92        void __iomem *ioaddr = pdata->ioaddr;
  93        u32 day = 0, hr = 0, min = 0, sec = 0, hr_min = 0;
  94
  95        switch (time_alarm) {
  96        case MXC_RTC_TIME:
  97                day = readw(ioaddr + RTC_DAYR);
  98                hr_min = readw(ioaddr + RTC_HOURMIN);
  99                sec = readw(ioaddr + RTC_SECOND);
 100                break;
 101        case MXC_RTC_ALARM:
 102                day = readw(ioaddr + RTC_DAYALARM);
 103                hr_min = readw(ioaddr + RTC_ALRM_HM) & 0xffff;
 104                sec = readw(ioaddr + RTC_ALRM_SEC);
 105                break;
 106        }
 107
 108        hr = hr_min >> 8;
 109        min = hr_min & 0xff;
 110
 111        return ((((time64_t)day * 24 + hr) * 60) + min) * 60 + sec;
 112}
 113
 114/*
 115 * This function sets the RTC alarm value or the time value.
 116 */
 117static void set_alarm_or_time(struct device *dev, int time_alarm, time64_t time)
 118{
 119        u32 tod, day, hr, min, sec, temp;
 120        struct rtc_plat_data *pdata = dev_get_drvdata(dev);
 121        void __iomem *ioaddr = pdata->ioaddr;
 122
 123        day = div_s64_rem(time, 86400, &tod);
 124
 125        /* time is within a day now */
 126        hr = tod / 3600;
 127        tod -= hr * 3600;
 128
 129        /* time is within an hour now */
 130        min = tod / 60;
 131        sec = tod - min * 60;
 132
 133        temp = (hr << 8) + min;
 134
 135        switch (time_alarm) {
 136        case MXC_RTC_TIME:
 137                writew(day, ioaddr + RTC_DAYR);
 138                writew(sec, ioaddr + RTC_SECOND);
 139                writew(temp, ioaddr + RTC_HOURMIN);
 140                break;
 141        case MXC_RTC_ALARM:
 142                writew(day, ioaddr + RTC_DAYALARM);
 143                writew(sec, ioaddr + RTC_ALRM_SEC);
 144                writew(temp, ioaddr + RTC_ALRM_HM);
 145                break;
 146        }
 147}
 148
 149/*
 150 * This function updates the RTC alarm registers and then clears all the
 151 * interrupt status bits.
 152 */
 153static void rtc_update_alarm(struct device *dev, struct rtc_time *alrm)
 154{
 155        time64_t time;
 156        struct rtc_plat_data *pdata = dev_get_drvdata(dev);
 157        void __iomem *ioaddr = pdata->ioaddr;
 158
 159        time = rtc_tm_to_time64(alrm);
 160
 161        /* clear all the interrupt status bits */
 162        writew(readw(ioaddr + RTC_RTCISR), ioaddr + RTC_RTCISR);
 163        set_alarm_or_time(dev, MXC_RTC_ALARM, time);
 164}
 165
 166static void mxc_rtc_irq_enable(struct device *dev, unsigned int bit,
 167                                unsigned int enabled)
 168{
 169        struct rtc_plat_data *pdata = dev_get_drvdata(dev);
 170        void __iomem *ioaddr = pdata->ioaddr;
 171        u32 reg;
 172        unsigned long flags;
 173
 174        spin_lock_irqsave(&pdata->rtc->irq_lock, flags);
 175        reg = readw(ioaddr + RTC_RTCIENR);
 176
 177        if (enabled)
 178                reg |= bit;
 179        else
 180                reg &= ~bit;
 181
 182        writew(reg, ioaddr + RTC_RTCIENR);
 183        spin_unlock_irqrestore(&pdata->rtc->irq_lock, flags);
 184}
 185
 186/* This function is the RTC interrupt service routine. */
 187static irqreturn_t mxc_rtc_interrupt(int irq, void *dev_id)
 188{
 189        struct platform_device *pdev = dev_id;
 190        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 191        void __iomem *ioaddr = pdata->ioaddr;
 192        u32 status;
 193        u32 events = 0;
 194
 195        spin_lock(&pdata->rtc->irq_lock);
 196        status = readw(ioaddr + RTC_RTCISR) & readw(ioaddr + RTC_RTCIENR);
 197        /* clear interrupt sources */
 198        writew(status, ioaddr + RTC_RTCISR);
 199
 200        /* update irq data & counter */
 201        if (status & RTC_ALM_BIT) {
 202                events |= (RTC_AF | RTC_IRQF);
 203                /* RTC alarm should be one-shot */
 204                mxc_rtc_irq_enable(&pdev->dev, RTC_ALM_BIT, 0);
 205        }
 206
 207        if (status & PIT_ALL_ON)
 208                events |= (RTC_PF | RTC_IRQF);
 209
 210        rtc_update_irq(pdata->rtc, 1, events);
 211        spin_unlock(&pdata->rtc->irq_lock);
 212
 213        return IRQ_HANDLED;
 214}
 215
 216static int mxc_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 217{
 218        mxc_rtc_irq_enable(dev, RTC_ALM_BIT, enabled);
 219        return 0;
 220}
 221
 222/*
 223 * This function reads the current RTC time into tm in Gregorian date.
 224 */
 225static int mxc_rtc_read_time(struct device *dev, struct rtc_time *tm)
 226{
 227        time64_t val;
 228
 229        /* Avoid roll-over from reading the different registers */
 230        do {
 231                val = get_alarm_or_time(dev, MXC_RTC_TIME);
 232        } while (val != get_alarm_or_time(dev, MXC_RTC_TIME));
 233
 234        rtc_time64_to_tm(val, tm);
 235
 236        return 0;
 237}
 238
 239/*
 240 * This function sets the internal RTC time based on tm in Gregorian date.
 241 */
 242static int mxc_rtc_set_time(struct device *dev, struct rtc_time *tm)
 243{
 244        time64_t time = rtc_tm_to_time64(tm);
 245
 246        /* Avoid roll-over from reading the different registers */
 247        do {
 248                set_alarm_or_time(dev, MXC_RTC_TIME, time);
 249        } while (time != get_alarm_or_time(dev, MXC_RTC_TIME));
 250
 251        return 0;
 252}
 253
 254/*
 255 * This function reads the current alarm value into the passed in 'alrm'
 256 * argument. It updates the alrm's pending field value based on the whether
 257 * an alarm interrupt occurs or not.
 258 */
 259static int mxc_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 260{
 261        struct rtc_plat_data *pdata = dev_get_drvdata(dev);
 262        void __iomem *ioaddr = pdata->ioaddr;
 263
 264        rtc_time64_to_tm(get_alarm_or_time(dev, MXC_RTC_ALARM), &alrm->time);
 265        alrm->pending = ((readw(ioaddr + RTC_RTCISR) & RTC_ALM_BIT)) ? 1 : 0;
 266
 267        return 0;
 268}
 269
 270/*
 271 * This function sets the RTC alarm based on passed in alrm.
 272 */
 273static int mxc_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 274{
 275        struct rtc_plat_data *pdata = dev_get_drvdata(dev);
 276
 277        rtc_update_alarm(dev, &alrm->time);
 278
 279        memcpy(&pdata->g_rtc_alarm, &alrm->time, sizeof(struct rtc_time));
 280        mxc_rtc_irq_enable(dev, RTC_ALM_BIT, alrm->enabled);
 281
 282        return 0;
 283}
 284
 285/* RTC layer */
 286static const struct rtc_class_ops mxc_rtc_ops = {
 287        .read_time              = mxc_rtc_read_time,
 288        .set_time               = mxc_rtc_set_time,
 289        .read_alarm             = mxc_rtc_read_alarm,
 290        .set_alarm              = mxc_rtc_set_alarm,
 291        .alarm_irq_enable       = mxc_rtc_alarm_irq_enable,
 292};
 293
 294static void mxc_rtc_action(void *p)
 295{
 296        struct rtc_plat_data *pdata = p;
 297
 298        clk_disable_unprepare(pdata->clk_ref);
 299        clk_disable_unprepare(pdata->clk_ipg);
 300}
 301
 302static int mxc_rtc_probe(struct platform_device *pdev)
 303{
 304        struct rtc_device *rtc;
 305        struct rtc_plat_data *pdata = NULL;
 306        u32 reg;
 307        unsigned long rate;
 308        int ret;
 309
 310        pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
 311        if (!pdata)
 312                return -ENOMEM;
 313
 314        pdata->devtype = (enum imx_rtc_type)of_device_get_match_data(&pdev->dev);
 315
 316        pdata->ioaddr = devm_platform_ioremap_resource(pdev, 0);
 317        if (IS_ERR(pdata->ioaddr))
 318                return PTR_ERR(pdata->ioaddr);
 319
 320        rtc = devm_rtc_allocate_device(&pdev->dev);
 321        if (IS_ERR(rtc))
 322                return PTR_ERR(rtc);
 323
 324        pdata->rtc = rtc;
 325        rtc->ops = &mxc_rtc_ops;
 326        if (is_imx1_rtc(pdata)) {
 327                struct rtc_time tm;
 328
 329                /* 9bit days + hours minutes seconds */
 330                rtc->range_max = (1 << 9) * 86400 - 1;
 331
 332                /*
 333                 * Set the start date as beginning of the current year. This can
 334                 * be overridden using device tree.
 335                 */
 336                rtc_time64_to_tm(ktime_get_real_seconds(), &tm);
 337                rtc->start_secs =  mktime64(tm.tm_year, 1, 1, 0, 0, 0);
 338                rtc->set_start_time = true;
 339        } else {
 340                /* 16bit days + hours minutes seconds */
 341                rtc->range_max = (1 << 16) * 86400ULL - 1;
 342        }
 343
 344        pdata->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
 345        if (IS_ERR(pdata->clk_ipg)) {
 346                dev_err(&pdev->dev, "unable to get ipg clock!\n");
 347                return PTR_ERR(pdata->clk_ipg);
 348        }
 349
 350        ret = clk_prepare_enable(pdata->clk_ipg);
 351        if (ret)
 352                return ret;
 353
 354        pdata->clk_ref = devm_clk_get(&pdev->dev, "ref");
 355        if (IS_ERR(pdata->clk_ref)) {
 356                clk_disable_unprepare(pdata->clk_ipg);
 357                dev_err(&pdev->dev, "unable to get ref clock!\n");
 358                return PTR_ERR(pdata->clk_ref);
 359        }
 360
 361        ret = clk_prepare_enable(pdata->clk_ref);
 362        if (ret) {
 363                clk_disable_unprepare(pdata->clk_ipg);
 364                return ret;
 365        }
 366
 367        ret = devm_add_action_or_reset(&pdev->dev, mxc_rtc_action, pdata);
 368        if (ret)
 369                return ret;
 370
 371        rate = clk_get_rate(pdata->clk_ref);
 372
 373        if (rate == 32768)
 374                reg = RTC_INPUT_CLK_32768HZ;
 375        else if (rate == 32000)
 376                reg = RTC_INPUT_CLK_32000HZ;
 377        else if (rate == 38400)
 378                reg = RTC_INPUT_CLK_38400HZ;
 379        else {
 380                dev_err(&pdev->dev, "rtc clock is not valid (%lu)\n", rate);
 381                return -EINVAL;
 382        }
 383
 384        reg |= RTC_ENABLE_BIT;
 385        writew(reg, (pdata->ioaddr + RTC_RTCCTL));
 386        if (((readw(pdata->ioaddr + RTC_RTCCTL)) & RTC_ENABLE_BIT) == 0) {
 387                dev_err(&pdev->dev, "hardware module can't be enabled!\n");
 388                return -EIO;
 389        }
 390
 391        platform_set_drvdata(pdev, pdata);
 392
 393        /* Configure and enable the RTC */
 394        pdata->irq = platform_get_irq(pdev, 0);
 395
 396        if (pdata->irq >= 0 &&
 397            devm_request_irq(&pdev->dev, pdata->irq, mxc_rtc_interrupt,
 398                             IRQF_SHARED, pdev->name, pdev) < 0) {
 399                dev_warn(&pdev->dev, "interrupt not available.\n");
 400                pdata->irq = -1;
 401        }
 402
 403        if (pdata->irq >= 0) {
 404                device_init_wakeup(&pdev->dev, 1);
 405                ret = dev_pm_set_wake_irq(&pdev->dev, pdata->irq);
 406                if (ret)
 407                        dev_err(&pdev->dev, "failed to enable irq wake\n");
 408        }
 409
 410        ret = devm_rtc_register_device(rtc);
 411
 412        return ret;
 413}
 414
 415static struct platform_driver mxc_rtc_driver = {
 416        .driver = {
 417                   .name        = "mxc_rtc",
 418                   .of_match_table = imx_rtc_dt_ids,
 419        },
 420        .probe = mxc_rtc_probe,
 421};
 422
 423module_platform_driver(mxc_rtc_driver)
 424
 425MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>");
 426MODULE_DESCRIPTION("RTC driver for Freescale MXC");
 427MODULE_LICENSE("GPL");
 428
 429