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9#ifndef __QETH_CORE_MPC_H__
10#define __QETH_CORE_MPC_H__
11
12#include <asm/qeth.h>
13#include <uapi/linux/if_ether.h>
14#include <uapi/linux/in6.h>
15
16extern const unsigned char IPA_PDU_HEADER[];
17#define IPA_PDU_HEADER_SIZE 0x40
18#define QETH_IPA_PDU_LEN_TOTAL(buffer) (buffer + 0x0e)
19#define QETH_IPA_PDU_LEN_PDU1(buffer) (buffer + 0x26)
20#define QETH_IPA_PDU_LEN_PDU2(buffer) (buffer + 0x29)
21#define QETH_IPA_PDU_LEN_PDU3(buffer) (buffer + 0x3a)
22
23#define QETH_IPA_CMD_DEST_ADDR(buffer) (buffer + 0x2c)
24
25#define QETH_SEQ_NO_LENGTH 4
26#define QETH_MPC_TOKEN_LENGTH 4
27#define QETH_MCL_LENGTH 4
28
29#define QETH_TIMEOUT (10 * HZ)
30#define QETH_IPA_TIMEOUT (45 * HZ)
31
32
33
34
35#define IPA_CMD_INITIATOR_HOST 0x00
36#define IPA_CMD_INITIATOR_OSA 0x01
37#define IPA_CMD_PRIM_VERSION_NO 0x01
38
39struct qeth_ipa_caps {
40 u32 supported;
41 u32 enabled;
42};
43
44static inline bool qeth_ipa_caps_supported(struct qeth_ipa_caps *caps, u32 mask)
45{
46 return (caps->supported & mask) == mask;
47}
48
49static inline bool qeth_ipa_caps_enabled(struct qeth_ipa_caps *caps, u32 mask)
50{
51 return (caps->enabled & mask) == mask;
52}
53
54#define qeth_adp_supported(c, f) \
55 qeth_ipa_caps_supported(&c->options.adp, f)
56#define qeth_is_supported(c, f) \
57 qeth_ipa_caps_supported(&c->options.ipa4, f)
58#define qeth_is_supported6(c, f) \
59 qeth_ipa_caps_supported(&c->options.ipa6, f)
60#define qeth_is_ipafunc_supported(c, prot, f) \
61 ((prot == QETH_PROT_IPV6) ? qeth_is_supported6(c, f) : \
62 qeth_is_supported(c, f))
63
64enum qeth_card_types {
65 QETH_CARD_TYPE_OSD = 1,
66 QETH_CARD_TYPE_IQD = 5,
67 QETH_CARD_TYPE_OSM = 3,
68 QETH_CARD_TYPE_OSX = 2,
69};
70
71#define IS_IQD(card) ((card)->info.type == QETH_CARD_TYPE_IQD)
72#define IS_OSD(card) ((card)->info.type == QETH_CARD_TYPE_OSD)
73#define IS_OSM(card) ((card)->info.type == QETH_CARD_TYPE_OSM)
74
75#ifdef CONFIG_QETH_OSX
76#define IS_OSX(card) ((card)->info.type == QETH_CARD_TYPE_OSX)
77#else
78#define IS_OSX(card) false
79#endif
80
81#define IS_VM_NIC(card) ((card)->info.is_vm_nic)
82
83#define QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE 0x18
84
85enum qeth_link_types {
86 QETH_LINK_TYPE_FAST_ETH = 0x01,
87 QETH_LINK_TYPE_HSTR = 0x02,
88 QETH_LINK_TYPE_GBIT_ETH = 0x03,
89 QETH_LINK_TYPE_10GBIT_ETH = 0x10,
90 QETH_LINK_TYPE_25GBIT_ETH = 0x12,
91 QETH_LINK_TYPE_LANE_ETH100 = 0x81,
92 QETH_LINK_TYPE_LANE_TR = 0x82,
93 QETH_LINK_TYPE_LANE_ETH1000 = 0x83,
94 QETH_LINK_TYPE_LANE = 0x88,
95};
96
97enum qeth_routing_types {
98
99 NO_ROUTER = 0,
100 PRIMARY_ROUTER = 1,
101 SECONDARY_ROUTER = 2,
102 MULTICAST_ROUTER = 3,
103 PRIMARY_CONNECTOR = 4,
104 SECONDARY_CONNECTOR = 5,
105};
106
107
108enum qeth_ipa_cmds {
109 IPA_CMD_STARTLAN = 0x01,
110 IPA_CMD_STOPLAN = 0x02,
111 IPA_CMD_SETVMAC = 0x21,
112 IPA_CMD_DELVMAC = 0x22,
113 IPA_CMD_SETGMAC = 0x23,
114 IPA_CMD_DELGMAC = 0x24,
115 IPA_CMD_SETVLAN = 0x25,
116 IPA_CMD_DELVLAN = 0x26,
117 IPA_CMD_VNICC = 0x2a,
118 IPA_CMD_SETBRIDGEPORT_OSA = 0x2b,
119 IPA_CMD_SETIP = 0xb1,
120 IPA_CMD_QIPASSIST = 0xb2,
121 IPA_CMD_SETASSPARMS = 0xb3,
122 IPA_CMD_SETIPM = 0xb4,
123 IPA_CMD_DELIPM = 0xb5,
124 IPA_CMD_SETRTG = 0xb6,
125 IPA_CMD_DELIP = 0xb7,
126 IPA_CMD_SETADAPTERPARMS = 0xb8,
127 IPA_CMD_SET_DIAG_ASS = 0xb9,
128 IPA_CMD_SETBRIDGEPORT_IQD = 0xbe,
129 IPA_CMD_CREATE_ADDR = 0xc3,
130 IPA_CMD_DESTROY_ADDR = 0xc4,
131 IPA_CMD_REGISTER_LOCAL_ADDR = 0xd1,
132 IPA_CMD_UNREGISTER_LOCAL_ADDR = 0xd2,
133 IPA_CMD_ADDRESS_CHANGE_NOTIF = 0xd3,
134 IPA_CMD_UNKNOWN = 0x00
135};
136
137enum qeth_ip_ass_cmds {
138 IPA_CMD_ASS_START = 0x0001,
139 IPA_CMD_ASS_STOP = 0x0002,
140 IPA_CMD_ASS_CONFIGURE = 0x0003,
141 IPA_CMD_ASS_ENABLE = 0x0004,
142};
143
144enum qeth_arp_process_subcmds {
145 IPA_CMD_ASS_ARP_SET_NO_ENTRIES = 0x0003,
146 IPA_CMD_ASS_ARP_QUERY_CACHE = 0x0004,
147 IPA_CMD_ASS_ARP_ADD_ENTRY = 0x0005,
148 IPA_CMD_ASS_ARP_REMOVE_ENTRY = 0x0006,
149 IPA_CMD_ASS_ARP_FLUSH_CACHE = 0x0007,
150 IPA_CMD_ASS_ARP_QUERY_INFO = 0x0104,
151 IPA_CMD_ASS_ARP_QUERY_STATS = 0x0204,
152};
153
154
155
156
157
158enum qeth_ipa_return_codes {
159 IPA_RC_SUCCESS = 0x0000,
160 IPA_RC_NOTSUPP = 0x0001,
161 IPA_RC_IP_TABLE_FULL = 0x0002,
162 IPA_RC_UNKNOWN_ERROR = 0x0003,
163 IPA_RC_UNSUPPORTED_COMMAND = 0x0004,
164 IPA_RC_TRACE_ALREADY_ACTIVE = 0x0005,
165 IPA_RC_INVALID_FORMAT = 0x0006,
166 IPA_RC_DUP_IPV6_REMOTE = 0x0008,
167 IPA_RC_SBP_IQD_NOT_CONFIGURED = 0x000C,
168 IPA_RC_DUP_IPV6_HOME = 0x0010,
169 IPA_RC_UNREGISTERED_ADDR = 0x0011,
170 IPA_RC_NO_ID_AVAILABLE = 0x0012,
171 IPA_RC_ID_NOT_FOUND = 0x0013,
172 IPA_RC_SBP_IQD_ANO_DEV_PRIMARY = 0x0014,
173 IPA_RC_SBP_IQD_CURRENT_SECOND = 0x0018,
174 IPA_RC_SBP_IQD_LIMIT_SECOND = 0x001C,
175 IPA_RC_INVALID_IP_VERSION = 0x0020,
176 IPA_RC_SBP_IQD_CURRENT_PRIMARY = 0x0024,
177 IPA_RC_LAN_FRAME_MISMATCH = 0x0040,
178 IPA_RC_SBP_IQD_NO_QDIO_QUEUES = 0x00EB,
179 IPA_RC_L2_UNSUPPORTED_CMD = 0x2003,
180 IPA_RC_L2_DUP_MAC = 0x2005,
181 IPA_RC_L2_ADDR_TABLE_FULL = 0x2006,
182 IPA_RC_L2_DUP_LAYER3_MAC = 0x200a,
183 IPA_RC_L2_GMAC_NOT_FOUND = 0x200b,
184 IPA_RC_L2_MAC_NOT_AUTH_BY_HYP = 0x200c,
185 IPA_RC_L2_MAC_NOT_AUTH_BY_ADP = 0x200d,
186 IPA_RC_L2_MAC_NOT_FOUND = 0x2010,
187 IPA_RC_L2_INVALID_VLAN_ID = 0x2015,
188 IPA_RC_L2_DUP_VLAN_ID = 0x2016,
189 IPA_RC_L2_VLAN_ID_NOT_FOUND = 0x2017,
190 IPA_RC_L2_VLAN_ID_NOT_ALLOWED = 0x2050,
191 IPA_RC_VNICC_VNICBP = 0x20B0,
192 IPA_RC_SBP_OSA_NOT_CONFIGURED = 0x2B0C,
193 IPA_RC_SBP_OSA_OS_MISMATCH = 0x2B10,
194 IPA_RC_SBP_OSA_ANO_DEV_PRIMARY = 0x2B14,
195 IPA_RC_SBP_OSA_CURRENT_SECOND = 0x2B18,
196 IPA_RC_SBP_OSA_LIMIT_SECOND = 0x2B1C,
197 IPA_RC_SBP_OSA_NOT_AUTHD_BY_ZMAN = 0x2B20,
198 IPA_RC_SBP_OSA_CURRENT_PRIMARY = 0x2B24,
199 IPA_RC_SBP_OSA_NO_QDIO_QUEUES = 0x2BEB,
200 IPA_RC_DATA_MISMATCH = 0xe001,
201 IPA_RC_INVALID_MTU_SIZE = 0xe002,
202 IPA_RC_INVALID_LANTYPE = 0xe003,
203 IPA_RC_INVALID_LANNUM = 0xe004,
204 IPA_RC_DUPLICATE_IP_ADDRESS = 0xe005,
205 IPA_RC_IP_ADDR_TABLE_FULL = 0xe006,
206 IPA_RC_LAN_PORT_STATE_ERROR = 0xe007,
207 IPA_RC_SETIP_NO_STARTLAN = 0xe008,
208 IPA_RC_SETIP_ALREADY_RECEIVED = 0xe009,
209 IPA_RC_IP_ADDR_ALREADY_USED = 0xe00a,
210 IPA_RC_MC_ADDR_NOT_FOUND = 0xe00b,
211 IPA_RC_SETIP_INVALID_VERSION = 0xe00d,
212 IPA_RC_UNSUPPORTED_SUBCMD = 0xe00e,
213 IPA_RC_ARP_ASSIST_NO_ENABLE = 0xe00f,
214 IPA_RC_PRIMARY_ALREADY_DEFINED = 0xe010,
215 IPA_RC_SECOND_ALREADY_DEFINED = 0xe011,
216 IPA_RC_INVALID_SETRTG_INDICATOR = 0xe012,
217 IPA_RC_MC_ADDR_ALREADY_DEFINED = 0xe013,
218 IPA_RC_LAN_OFFLINE = 0xe080,
219 IPA_RC_VEPA_TO_VEB_TRANSITION = 0xe090,
220 IPA_RC_INVALID_IP_VERSION2 = 0xf001,
221 IPA_RC_FFFF = 0xffff
222};
223
224#define IPA_RC_VNICC_OOSEQ 0x0005
225
226
227#define IPA_RC_INVALID_SUBCMD IPA_RC_IP_TABLE_FULL
228#define IPA_RC_HARDWARE_AUTH_ERROR IPA_RC_UNKNOWN_ERROR
229
230
231#define IPA_RC_SBP_IQD_OS_MISMATCH IPA_RC_DUP_IPV6_HOME
232#define IPA_RC_SBP_IQD_NOT_AUTHD_BY_ZMAN IPA_RC_INVALID_IP_VERSION
233
234
235enum qeth_ipa_funcs {
236 IPA_ARP_PROCESSING = 0x00000001L,
237 IPA_INBOUND_CHECKSUM = 0x00000002L,
238 IPA_OUTBOUND_CHECKSUM = 0x00000004L,
239
240 IPA_FILTERING = 0x00000010L,
241 IPA_IPV6 = 0x00000020L,
242 IPA_MULTICASTING = 0x00000040L,
243 IPA_IP_REASSEMBLY = 0x00000080L,
244 IPA_QUERY_ARP_COUNTERS = 0x00000100L,
245 IPA_QUERY_ARP_ADDR_INFO = 0x00000200L,
246 IPA_SETADAPTERPARMS = 0x00000400L,
247 IPA_VLAN_PRIO = 0x00000800L,
248 IPA_PASSTHRU = 0x00001000L,
249 IPA_FLUSH_ARP_SUPPORT = 0x00002000L,
250 IPA_FULL_VLAN = 0x00004000L,
251 IPA_INBOUND_PASSTHRU = 0x00008000L,
252 IPA_SOURCE_MAC = 0x00010000L,
253 IPA_OSA_MC_ROUTER = 0x00020000L,
254 IPA_QUERY_ARP_ASSIST = 0x00040000L,
255 IPA_INBOUND_TSO = 0x00080000L,
256 IPA_OUTBOUND_TSO = 0x00100000L,
257 IPA_INBOUND_CHECKSUM_V6 = 0x00400000L,
258 IPA_OUTBOUND_CHECKSUM_V6 = 0x00800000L,
259};
260
261
262enum qeth_ipa_setdelip_flags {
263 QETH_IPA_SETDELIP_DEFAULT = 0x00L,
264 QETH_IPA_SETIP_VIPA_FLAG = 0x01L,
265 QETH_IPA_SETIP_TAKEOVER_FLAG = 0x02L,
266 QETH_IPA_DELIP_ADDR_2_B_TAKEN_OVER = 0x20L,
267 QETH_IPA_DELIP_VIPA_FLAG = 0x40L,
268 QETH_IPA_DELIP_ADDR_NEEDS_SETIP = 0x80L,
269};
270
271
272enum qeth_ipa_setadp_cmd {
273 IPA_SETADP_QUERY_COMMANDS_SUPPORTED = 0x00000001L,
274 IPA_SETADP_ALTER_MAC_ADDRESS = 0x00000002L,
275 IPA_SETADP_ADD_DELETE_GROUP_ADDRESS = 0x00000004L,
276 IPA_SETADP_ADD_DELETE_FUNCTIONAL_ADDR = 0x00000008L,
277 IPA_SETADP_SET_ADDRESSING_MODE = 0x00000010L,
278 IPA_SETADP_SET_CONFIG_PARMS = 0x00000020L,
279 IPA_SETADP_SET_CONFIG_PARMS_EXTENDED = 0x00000040L,
280 IPA_SETADP_SET_BROADCAST_MODE = 0x00000080L,
281 IPA_SETADP_SEND_OSA_MESSAGE = 0x00000100L,
282 IPA_SETADP_SET_SNMP_CONTROL = 0x00000200L,
283 IPA_SETADP_QUERY_CARD_INFO = 0x00000400L,
284 IPA_SETADP_SET_PROMISC_MODE = 0x00000800L,
285 IPA_SETADP_SET_DIAG_ASSIST = 0x00002000L,
286 IPA_SETADP_SET_ACCESS_CONTROL = 0x00010000L,
287 IPA_SETADP_QUERY_OAT = 0x00080000L,
288 IPA_SETADP_QUERY_SWITCH_ATTRIBUTES = 0x00100000L,
289};
290enum qeth_ipa_mac_ops {
291 CHANGE_ADDR_READ_MAC = 0,
292 CHANGE_ADDR_REPLACE_MAC = 1,
293 CHANGE_ADDR_ADD_MAC = 2,
294 CHANGE_ADDR_DEL_MAC = 4,
295 CHANGE_ADDR_RESET_MAC = 8,
296};
297enum qeth_ipa_addr_ops {
298 CHANGE_ADDR_READ_ADDR = 0,
299 CHANGE_ADDR_ADD_ADDR = 1,
300 CHANGE_ADDR_DEL_ADDR = 2,
301 CHANGE_ADDR_FLUSH_ADDR_TABLE = 4,
302};
303enum qeth_ipa_promisc_modes {
304 SET_PROMISC_MODE_OFF = 0,
305 SET_PROMISC_MODE_ON = 1,
306};
307enum qeth_ipa_isolation_modes {
308 ISOLATION_MODE_NONE = 0x00000000L,
309 ISOLATION_MODE_FWD = 0x00000001L,
310 ISOLATION_MODE_DROP = 0x00000002L,
311};
312enum qeth_ipa_set_access_mode_rc {
313 SET_ACCESS_CTRL_RC_SUCCESS = 0x0000,
314 SET_ACCESS_CTRL_RC_NOT_SUPPORTED = 0x0004,
315 SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED = 0x0008,
316 SET_ACCESS_CTRL_RC_ALREADY_ISOLATED = 0x0010,
317 SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER = 0x0014,
318 SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF = 0x0018,
319 SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED = 0x0022,
320 SET_ACCESS_CTRL_RC_REFLREL_FAILED = 0x0024,
321 SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED = 0x0028,
322};
323enum qeth_card_info_card_type {
324 CARD_INFO_TYPE_1G_COPPER_A = 0x61,
325 CARD_INFO_TYPE_1G_FIBRE_A = 0x71,
326 CARD_INFO_TYPE_10G_FIBRE_A = 0x91,
327 CARD_INFO_TYPE_1G_COPPER_B = 0xb1,
328 CARD_INFO_TYPE_1G_FIBRE_B = 0xa1,
329 CARD_INFO_TYPE_10G_FIBRE_B = 0xc1,
330};
331enum qeth_card_info_port_mode {
332 CARD_INFO_PORTM_HALFDUPLEX = 0x0002,
333 CARD_INFO_PORTM_FULLDUPLEX = 0x0003,
334};
335enum qeth_card_info_port_speed {
336 CARD_INFO_PORTS_10M = 0x00000005,
337 CARD_INFO_PORTS_100M = 0x00000006,
338 CARD_INFO_PORTS_1G = 0x00000007,
339 CARD_INFO_PORTS_10G = 0x00000008,
340 CARD_INFO_PORTS_25G = 0x0000000A,
341};
342
343
344struct qeth_ipacmd_setdelip4 {
345 __be32 addr;
346 __be32 mask;
347 __u32 flags;
348} __attribute__ ((packed));
349
350struct qeth_ipacmd_setdelip6 {
351 struct in6_addr addr;
352 struct in6_addr prefix;
353 __u32 flags;
354} __attribute__ ((packed));
355
356struct qeth_ipacmd_setdelipm {
357 __u8 mac[6];
358 __u8 padding[2];
359 struct in6_addr ip;
360} __attribute__ ((packed));
361
362struct qeth_ipacmd_layer2setdelmac {
363 __u32 mac_length;
364 __u8 mac[6];
365} __attribute__ ((packed));
366
367struct qeth_ipacmd_layer2setdelvlan {
368 __u16 vlan_id;
369} __attribute__ ((packed));
370
371struct qeth_ipacmd_setassparms_hdr {
372 __u16 length;
373 __u16 command_code;
374 __u16 return_code;
375 __u8 number_of_replies;
376 __u8 seq_no;
377} __attribute__((packed));
378
379struct qeth_arp_query_data {
380 __u16 request_bits;
381 __u16 reply_bits;
382 __u32 no_entries;
383 char data;
384} __attribute__((packed));
385
386
387struct qeth_arp_query_info {
388 __u32 udata_len;
389 __u16 mask_bits;
390 __u32 udata_offset;
391 __u32 no_entries;
392 char *udata;
393};
394
395
396
397
398enum qeth_ipa_checksum_bits {
399 QETH_IPA_CHECKSUM_IP_HDR = 0x0002,
400 QETH_IPA_CHECKSUM_UDP = 0x0008,
401 QETH_IPA_CHECKSUM_TCP = 0x0010,
402 QETH_IPA_CHECKSUM_LP2LP = 0x0020
403};
404
405enum qeth_ipa_large_send_caps {
406 QETH_IPA_LARGE_SEND_TCP = 0x00000001,
407};
408
409struct qeth_tso_start_data {
410 u32 mss;
411 u32 supported;
412};
413
414
415struct qeth_ipacmd_setassparms {
416 u32 assist_no;
417 struct qeth_ipacmd_setassparms_hdr hdr;
418 union {
419 __u32 flags_32bit;
420 struct qeth_ipa_caps caps;
421 struct qeth_arp_cache_entry arp_entry;
422 struct qeth_arp_query_data query_arp;
423 struct qeth_tso_start_data tso;
424 } data;
425} __attribute__ ((packed));
426
427#define SETASS_DATA_SIZEOF(field) sizeof_field(struct qeth_ipacmd_setassparms,\
428 data.field)
429
430
431struct qeth_set_routing {
432 __u8 type;
433};
434
435
436struct qeth_query_cmds_supp {
437 __u32 no_lantypes_supp;
438 __u8 lan_type;
439 __u8 reserved1[3];
440 __u32 supported_cmds;
441 __u8 reserved2[8];
442} __attribute__ ((packed));
443
444struct qeth_change_addr {
445 u32 cmd;
446 u32 addr_size;
447 u32 no_macs;
448 u8 addr[ETH_ALEN];
449};
450
451struct qeth_snmp_cmd {
452 __u8 token[16];
453 __u32 request;
454 __u32 interface;
455 __u32 returncode;
456 __u32 firmwarelevel;
457 __u32 seqno;
458 __u8 data;
459} __attribute__ ((packed));
460
461struct qeth_snmp_ureq_hdr {
462 __u32 data_len;
463 __u32 req_len;
464 __u32 reserved1;
465 __u32 reserved2;
466} __attribute__ ((packed));
467
468struct qeth_snmp_ureq {
469 struct qeth_snmp_ureq_hdr hdr;
470 struct qeth_snmp_cmd cmd;
471} __attribute__((packed));
472
473
474struct qeth_set_access_ctrl {
475 __u32 subcmd_code;
476 __u8 reserved[8];
477} __attribute__((packed));
478
479#define QETH_QOAT_PHYS_SPEED_UNKNOWN 0x00
480#define QETH_QOAT_PHYS_SPEED_10M_HALF 0x01
481#define QETH_QOAT_PHYS_SPEED_10M_FULL 0x02
482#define QETH_QOAT_PHYS_SPEED_100M_HALF 0x03
483#define QETH_QOAT_PHYS_SPEED_100M_FULL 0x04
484#define QETH_QOAT_PHYS_SPEED_1000M_HALF 0x05
485#define QETH_QOAT_PHYS_SPEED_1000M_FULL 0x06
486
487#define QETH_QOAT_PHYS_SPEED_10G_FULL 0x08
488
489#define QETH_QOAT_PHYS_SPEED_25G_FULL 0x0A
490
491#define QETH_QOAT_PHYS_MEDIA_COPPER 0x01
492#define QETH_QOAT_PHYS_MEDIA_FIBRE_SHORT 0x02
493#define QETH_QOAT_PHYS_MEDIA_FIBRE_LONG 0x04
494
495struct qeth_query_oat_physical_if {
496 u8 res_head[33];
497 u8 speed_duplex;
498 u8 media_type;
499 u8 res_tail[29];
500};
501
502#define QETH_QOAT_REPLY_TYPE_PHYS_IF 0x0004
503
504struct qeth_query_oat_reply {
505 u16 type;
506 u16 length;
507 u16 version;
508 u8 res[10];
509 struct qeth_query_oat_physical_if phys_if;
510};
511
512#define QETH_QOAT_SCOPE_INTERFACE 0x00000001
513
514struct qeth_query_oat {
515 u32 subcmd_code;
516 u8 reserved[12];
517 struct qeth_query_oat_reply reply[];
518} __packed;
519
520struct qeth_qoat_priv {
521 __u32 buffer_len;
522 __u32 response_len;
523 char *buffer;
524};
525
526struct qeth_query_card_info {
527 __u8 card_type;
528 __u8 reserved1;
529 __u16 port_mode;
530 __u32 port_speed;
531 __u32 reserved2;
532};
533
534#define QETH_SWITCH_FORW_802_1 0x00000001
535#define QETH_SWITCH_FORW_REFL_RELAY 0x00000002
536#define QETH_SWITCH_CAP_RTE 0x00000004
537#define QETH_SWITCH_CAP_ECP 0x00000008
538#define QETH_SWITCH_CAP_VDP 0x00000010
539
540struct qeth_query_switch_attributes {
541 __u8 version;
542 __u8 reserved1;
543 __u16 reserved2;
544 __u32 capabilities;
545 __u32 settings;
546 __u8 reserved3[8];
547};
548
549#define QETH_SETADP_FLAGS_VIRTUAL_MAC 0x80
550
551struct qeth_ipacmd_setadpparms_hdr {
552 u16 cmdlength;
553 u16 reserved2;
554 u32 command_code;
555 u16 return_code;
556 u8 used_total;
557 u8 seq_no;
558 u8 flags;
559 u8 reserved3[3];
560};
561
562struct qeth_ipacmd_setadpparms {
563 struct qeth_ipa_caps hw_cmds;
564 struct qeth_ipacmd_setadpparms_hdr hdr;
565 union {
566 struct qeth_query_cmds_supp query_cmds_supp;
567 struct qeth_change_addr change_addr;
568 struct qeth_snmp_cmd snmp;
569 struct qeth_set_access_ctrl set_access_ctrl;
570 struct qeth_query_oat query_oat;
571 struct qeth_query_card_info card_info;
572 struct qeth_query_switch_attributes query_switch_attributes;
573 __u32 mode;
574 } data;
575} __attribute__ ((packed));
576
577#define SETADP_DATA_SIZEOF(field) sizeof_field(struct qeth_ipacmd_setadpparms,\
578 data.field)
579
580
581struct qeth_create_destroy_address {
582 u8 mac_addr[ETH_ALEN];
583 u16 uid;
584};
585
586
587
588enum qeth_diags_cmds {
589 QETH_DIAGS_CMD_QUERY = 0x0001,
590 QETH_DIAGS_CMD_TRAP = 0x0002,
591 QETH_DIAGS_CMD_TRACE = 0x0004,
592 QETH_DIAGS_CMD_NOLOG = 0x0008,
593 QETH_DIAGS_CMD_DUMP = 0x0010,
594};
595
596enum qeth_diags_trace_types {
597 QETH_DIAGS_TYPE_HIPERSOCKET = 0x02,
598};
599
600enum qeth_diags_trace_cmds {
601 QETH_DIAGS_CMD_TRACE_ENABLE = 0x0001,
602 QETH_DIAGS_CMD_TRACE_DISABLE = 0x0002,
603 QETH_DIAGS_CMD_TRACE_MODIFY = 0x0004,
604 QETH_DIAGS_CMD_TRACE_REPLACE = 0x0008,
605 QETH_DIAGS_CMD_TRACE_QUERY = 0x0010,
606};
607
608enum qeth_diags_trap_action {
609 QETH_DIAGS_TRAP_ARM = 0x01,
610 QETH_DIAGS_TRAP_DISARM = 0x02,
611 QETH_DIAGS_TRAP_CAPTURE = 0x04,
612};
613
614struct qeth_ipacmd_diagass {
615 __u32 host_tod2;
616 __u32:32;
617 __u16 subcmd_len;
618 __u16:16;
619 __u32 subcmd;
620 __u8 type;
621 __u8 action;
622 __u16 options;
623 __u32 ext;
624 __u8 cdata[64];
625} __attribute__ ((packed));
626
627#define DIAG_HDR_LEN offsetofend(struct qeth_ipacmd_diagass, ext)
628#define DIAG_SUB_HDR_LEN (offsetofend(struct qeth_ipacmd_diagass, ext) -\
629 offsetof(struct qeth_ipacmd_diagass, \
630 subcmd_len))
631
632
633
634#define IPA_VNICC_QUERY_CHARS 0x00000000L
635#define IPA_VNICC_QUERY_CMDS 0x00000001L
636#define IPA_VNICC_ENABLE 0x00000002L
637#define IPA_VNICC_DISABLE 0x00000004L
638#define IPA_VNICC_SET_TIMEOUT 0x00000008L
639#define IPA_VNICC_GET_TIMEOUT 0x00000010L
640
641
642#define QETH_VNICC_FLOODING 0x80000000
643#define QETH_VNICC_MCAST_FLOODING 0x40000000
644#define QETH_VNICC_LEARNING 0x20000000
645#define QETH_VNICC_TAKEOVER_SETVMAC 0x10000000
646#define QETH_VNICC_TAKEOVER_LEARNING 0x08000000
647#define QETH_VNICC_BRIDGE_INVISIBLE 0x04000000
648#define QETH_VNICC_RX_BCAST 0x02000000
649
650
651#define QETH_VNICC_ALL 0xff000000
652#define QETH_VNICC_DEFAULT QETH_VNICC_RX_BCAST
653
654#define QETH_VNICC_DEFAULT_TIMEOUT 600
655
656
657struct qeth_ipacmd_vnicc_hdr {
658 u16 data_length;
659 u16 reserved;
660 u32 sub_command;
661};
662
663
664struct qeth_vnicc_query_cmds {
665 u32 vnic_char;
666 u32 sup_cmds;
667};
668
669
670struct qeth_vnicc_set_char {
671 u32 vnic_char;
672};
673
674
675struct qeth_vnicc_getset_timeout {
676 u32 vnic_char;
677 u32 timeout;
678};
679
680
681struct qeth_ipacmd_vnicc {
682 struct qeth_ipa_caps vnicc_cmds;
683 struct qeth_ipacmd_vnicc_hdr hdr;
684 union {
685 struct qeth_vnicc_query_cmds query_cmds;
686 struct qeth_vnicc_set_char set_char;
687 struct qeth_vnicc_getset_timeout getset_timeout;
688 } data;
689};
690
691#define VNICC_DATA_SIZEOF(field) sizeof_field(struct qeth_ipacmd_vnicc,\
692 data.field)
693
694
695enum qeth_ipa_sbp_cmd {
696 IPA_SBP_QUERY_COMMANDS_SUPPORTED = 0x00000000L,
697 IPA_SBP_RESET_BRIDGE_PORT_ROLE = 0x00000001L,
698 IPA_SBP_SET_PRIMARY_BRIDGE_PORT = 0x00000002L,
699 IPA_SBP_SET_SECONDARY_BRIDGE_PORT = 0x00000004L,
700 IPA_SBP_QUERY_BRIDGE_PORTS = 0x00000008L,
701 IPA_SBP_BRIDGE_PORT_STATE_CHANGE = 0x00000010L,
702};
703
704struct net_if_token {
705 __u16 devnum;
706 __u8 cssid;
707 __u8 iid;
708 __u8 ssid;
709 __u8 chpid;
710 __u16 chid;
711} __packed;
712
713struct mac_addr_lnid {
714 __u8 mac[6];
715 __u16 lnid;
716} __packed;
717
718struct qeth_ipacmd_sbp_hdr {
719 __u16 cmdlength;
720 __u16 reserved1;
721 __u32 command_code;
722 __u16 return_code;
723 __u8 used_total;
724 __u8 seq_no;
725 __u32 reserved2;
726} __packed;
727
728struct qeth_sbp_query_cmds_supp {
729 __u32 supported_cmds;
730 __u32 reserved;
731} __packed;
732
733struct qeth_sbp_set_primary {
734 struct net_if_token token;
735} __packed;
736
737struct qeth_sbp_port_entry {
738 __u8 role;
739 __u8 state;
740 __u8 reserved1;
741 __u8 reserved2;
742 struct net_if_token token;
743} __packed;
744
745
746struct qeth_sbp_port_data {
747 __u8 primary_bp_supported;
748 __u8 secondary_bp_supported;
749 __u8 num_entries;
750 __u8 entry_length;
751 struct qeth_sbp_port_entry entry[];
752} __packed;
753
754struct qeth_ipacmd_setbridgeport {
755 struct qeth_ipa_caps sbp_cmds;
756 struct qeth_ipacmd_sbp_hdr hdr;
757 union {
758 struct qeth_sbp_query_cmds_supp query_cmds_supp;
759 struct qeth_sbp_set_primary set_primary;
760 struct qeth_sbp_port_data port_data;
761 } data;
762} __packed;
763
764#define SBP_DATA_SIZEOF(field) sizeof_field(struct qeth_ipacmd_setbridgeport,\
765 data.field)
766
767
768
769enum qeth_ipa_addr_change_code {
770 IPA_ADDR_CHANGE_CODE_VLANID = 0x01,
771 IPA_ADDR_CHANGE_CODE_MACADDR = 0x02,
772 IPA_ADDR_CHANGE_CODE_REMOVAL = 0x80,
773};
774
775struct qeth_ipacmd_addr_change_entry {
776 struct net_if_token token;
777 struct mac_addr_lnid addr_lnid;
778 __u8 change_code;
779 __u8 reserved1;
780 __u16 reserved2;
781} __packed;
782
783struct qeth_ipacmd_addr_change {
784 __u8 lost_event_mask;
785 __u8 reserved;
786 __u16 num_entries;
787 struct qeth_ipacmd_addr_change_entry entry[];
788} __packed;
789
790
791struct qeth_ipacmd_local_addr4 {
792 __be32 addr;
793 u32 flags;
794};
795
796struct qeth_ipacmd_local_addrs4 {
797 u32 count;
798 u32 addr_length;
799 struct qeth_ipacmd_local_addr4 addrs[];
800};
801
802struct qeth_ipacmd_local_addr6 {
803 struct in6_addr addr;
804 u32 flags;
805};
806
807struct qeth_ipacmd_local_addrs6 {
808 u32 count;
809 u32 addr_length;
810 struct qeth_ipacmd_local_addr6 addrs[];
811};
812
813
814struct qeth_ipacmd_hdr {
815 __u8 command;
816 __u8 initiator;
817 __u16 seqno;
818 __u16 return_code;
819 __u8 adapter_type;
820 __u8 rel_adapter_no;
821 __u8 prim_version_no;
822 __u8 param_count;
823 __u16 prot_version;
824 struct qeth_ipa_caps assists;
825} __attribute__ ((packed));
826
827
828struct qeth_ipa_cmd {
829 struct qeth_ipacmd_hdr hdr;
830 union {
831 struct qeth_ipacmd_setdelip4 setdelip4;
832 struct qeth_ipacmd_setdelip6 setdelip6;
833 struct qeth_ipacmd_setdelipm setdelipm;
834 struct qeth_ipacmd_setassparms setassparms;
835 struct qeth_ipacmd_layer2setdelmac setdelmac;
836 struct qeth_ipacmd_layer2setdelvlan setdelvlan;
837 struct qeth_create_destroy_address create_destroy_addr;
838 struct qeth_ipacmd_setadpparms setadapterparms;
839 struct qeth_set_routing setrtg;
840 struct qeth_ipacmd_diagass diagass;
841 struct qeth_ipacmd_setbridgeport sbp;
842 struct qeth_ipacmd_addr_change addrchange;
843 struct qeth_ipacmd_vnicc vnicc;
844 struct qeth_ipacmd_local_addrs4 local_addrs4;
845 struct qeth_ipacmd_local_addrs6 local_addrs6;
846 } data;
847} __attribute__ ((packed));
848
849#define IPA_DATA_SIZEOF(field) sizeof_field(struct qeth_ipa_cmd, data.field)
850
851
852
853
854
855
856enum qeth_ipa_arp_return_codes {
857 QETH_IPA_ARP_RC_SUCCESS = 0x0000,
858 QETH_IPA_ARP_RC_FAILED = 0x0001,
859 QETH_IPA_ARP_RC_NOTSUPP = 0x0002,
860 QETH_IPA_ARP_RC_OUT_OF_RANGE = 0x0003,
861 QETH_IPA_ARP_RC_Q_NOTSUPP = 0x0004,
862 QETH_IPA_ARP_RC_Q_NO_DATA = 0x0008,
863};
864
865extern const char *qeth_get_ipa_msg(enum qeth_ipa_return_codes rc);
866extern const char *qeth_get_ipa_cmd_name(enum qeth_ipa_cmds cmd);
867
868
869#define IS_IPA_REPLY(cmd) ((cmd)->hdr.initiator == IPA_CMD_INITIATOR_HOST)
870
871
872
873
874
875extern const unsigned char CM_ENABLE[];
876#define CM_ENABLE_SIZE 0x63
877#define QETH_CM_ENABLE_ISSUER_RM_TOKEN(buffer) (buffer + 0x2c)
878#define QETH_CM_ENABLE_FILTER_TOKEN(buffer) (buffer + 0x53)
879#define QETH_CM_ENABLE_USER_DATA(buffer) (buffer + 0x5b)
880
881#define QETH_CM_ENABLE_RESP_FILTER_TOKEN(buffer) \
882 (PDU_ENCAPSULATION(buffer) + 0x13)
883
884
885extern const unsigned char CM_SETUP[];
886#define CM_SETUP_SIZE 0x64
887#define QETH_CM_SETUP_DEST_ADDR(buffer) (buffer + 0x2c)
888#define QETH_CM_SETUP_CONNECTION_TOKEN(buffer) (buffer + 0x51)
889#define QETH_CM_SETUP_FILTER_TOKEN(buffer) (buffer + 0x5a)
890
891#define QETH_CM_SETUP_RESP_DEST_ADDR(buffer) \
892 (PDU_ENCAPSULATION(buffer) + 0x1a)
893
894extern const unsigned char ULP_ENABLE[];
895#define ULP_ENABLE_SIZE 0x6b
896#define QETH_ULP_ENABLE_LINKNUM(buffer) (buffer + 0x61)
897#define QETH_ULP_ENABLE_DEST_ADDR(buffer) (buffer + 0x2c)
898#define QETH_ULP_ENABLE_FILTER_TOKEN(buffer) (buffer + 0x53)
899#define QETH_ULP_ENABLE_PORTNAME_AND_LL(buffer) (buffer + 0x62)
900#define QETH_ULP_ENABLE_RESP_FILTER_TOKEN(buffer) \
901 (PDU_ENCAPSULATION(buffer) + 0x13)
902#define QETH_ULP_ENABLE_RESP_MAX_MTU(buffer) \
903 (PDU_ENCAPSULATION(buffer) + 0x1f)
904#define QETH_ULP_ENABLE_RESP_DIFINFO_LEN(buffer) \
905 (PDU_ENCAPSULATION(buffer) + 0x17)
906#define QETH_ULP_ENABLE_RESP_LINK_TYPE(buffer) \
907 (PDU_ENCAPSULATION(buffer) + 0x2b)
908
909#define QETH_MPC_PROT_L2 0x08
910#define QETH_MPC_PROT_L3 0x03
911#define QETH_ULP_ENABLE_PROT_TYPE(buffer) (buffer + 0x50)
912#define QETH_IPA_CMD_PROT_TYPE(buffer) (buffer + 0x19)
913
914extern const unsigned char ULP_SETUP[];
915#define ULP_SETUP_SIZE 0x6c
916#define QETH_ULP_SETUP_DEST_ADDR(buffer) (buffer + 0x2c)
917#define QETH_ULP_SETUP_CONNECTION_TOKEN(buffer) (buffer + 0x51)
918#define QETH_ULP_SETUP_FILTER_TOKEN(buffer) (buffer + 0x5a)
919#define QETH_ULP_SETUP_CUA(buffer) (buffer + 0x68)
920#define QETH_ULP_SETUP_REAL_DEVADDR(buffer) (buffer + 0x6a)
921
922#define QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(buffer) \
923 (PDU_ENCAPSULATION(buffer) + 0x1a)
924
925
926extern const unsigned char DM_ACT[];
927#define DM_ACT_SIZE 0x55
928#define QETH_DM_ACT_DEST_ADDR(buffer) (buffer + 0x2c)
929#define QETH_DM_ACT_CONNECTION_TOKEN(buffer) (buffer + 0x51)
930
931
932
933#define QETH_TRANSPORT_HEADER_SEQ_NO(buffer) (buffer + 4)
934#define QETH_PDU_HEADER_SEQ_NO(buffer) (buffer + 0x1c)
935#define QETH_PDU_HEADER_ACK_SEQ_NO(buffer) (buffer + 0x20)
936
937extern const unsigned char IDX_ACTIVATE_READ[];
938extern const unsigned char IDX_ACTIVATE_WRITE[];
939#define IDX_ACTIVATE_SIZE 0x22
940#define QETH_IDX_ACT_PNO(buffer) (buffer+0x0b)
941#define QETH_IDX_ACT_ISSUER_RM_TOKEN(buffer) (buffer + 0x0c)
942#define QETH_IDX_ACT_INVAL_FRAME 0x40
943#define QETH_IDX_NO_PORTNAME_REQUIRED(buffer) ((buffer)[0x0b] & 0x80)
944#define QETH_IDX_ACT_FUNC_LEVEL(buffer) (buffer + 0x10)
945#define QETH_IDX_ACT_DATASET_NAME(buffer) (buffer + 0x16)
946#define QETH_IDX_ACT_QDIO_DEV_CUA(buffer) (buffer + 0x1e)
947#define QETH_IDX_ACT_QDIO_DEV_REALADDR(buffer) (buffer + 0x20)
948#define QETH_IS_IDX_ACT_POS_REPLY(buffer) (((buffer)[0x08] & 3) == 2)
949#define QETH_IDX_REPLY_LEVEL(buffer) (buffer + 0x12)
950#define QETH_IDX_ACT_CAUSE_CODE(buffer) (buffer)[0x09]
951#define QETH_IDX_ACT_ERR_EXCL 0x19
952#define QETH_IDX_ACT_ERR_AUTH 0x1E
953#define QETH_IDX_ACT_ERR_AUTH_USER 0x20
954
955#define QETH_IDX_TERMINATE 0xc0
956#define QETH_IDX_TERMINATE_MASK 0xc0
957#define QETH_IDX_TERM_BAD_TRANSPORT 0x41
958#define QETH_IDX_TERM_BAD_TRANSPORT_VM 0xf6
959
960#define PDU_ENCAPSULATION(buffer) \
961 (buffer + *(buffer + (*(buffer + 0x0b)) + \
962 *(buffer + *(buffer + 0x0b) + 0x11) + 0x07))
963
964#define IS_IPA(buffer) \
965 ((buffer) && \
966 (*(buffer + ((*(buffer + 0x0b)) + 4)) == 0xc1))
967
968#endif
969
