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120#ifndef NCR5380_io_delay
121#define NCR5380_io_delay(x)
122#endif
123
124#ifndef NCR5380_acquire_dma_irq
125#define NCR5380_acquire_dma_irq(x) (1)
126#endif
127
128#ifndef NCR5380_release_dma_irq
129#define NCR5380_release_dma_irq(x)
130#endif
131
132static unsigned int disconnect_mask = ~0;
133module_param(disconnect_mask, int, 0444);
134
135static int do_abort(struct Scsi_Host *, unsigned int);
136static void do_reset(struct Scsi_Host *);
137static void bus_reset_cleanup(struct Scsi_Host *);
138
139
140
141
142
143
144
145
146static inline void initialize_SCp(struct scsi_cmnd *cmd)
147{
148
149
150
151
152
153 if (scsi_bufflen(cmd)) {
154 cmd->SCp.buffer = scsi_sglist(cmd);
155 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
156 cmd->SCp.this_residual = cmd->SCp.buffer->length;
157 } else {
158 cmd->SCp.buffer = NULL;
159 cmd->SCp.ptr = NULL;
160 cmd->SCp.this_residual = 0;
161 }
162
163 cmd->SCp.Status = 0;
164 cmd->SCp.Message = 0;
165}
166
167static inline void advance_sg_buffer(struct scsi_cmnd *cmd)
168{
169 struct scatterlist *s = cmd->SCp.buffer;
170
171 if (!cmd->SCp.this_residual && s && !sg_is_last(s)) {
172 cmd->SCp.buffer = sg_next(s);
173 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
174 cmd->SCp.this_residual = cmd->SCp.buffer->length;
175 }
176}
177
178static inline void set_resid_from_SCp(struct scsi_cmnd *cmd)
179{
180 int resid = cmd->SCp.this_residual;
181 struct scatterlist *s = cmd->SCp.buffer;
182
183 if (s)
184 while (!sg_is_last(s)) {
185 s = sg_next(s);
186 resid += s->length;
187 }
188 scsi_set_resid(cmd, resid);
189}
190
191
192
193
194
195
196
197
198
199
200
201
202
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204
205
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207
208
209
210static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata,
211 unsigned int reg1, u8 bit1, u8 val1,
212 unsigned int reg2, u8 bit2, u8 val2,
213 unsigned long wait)
214{
215 unsigned long n = hostdata->poll_loops;
216 unsigned long deadline = jiffies + wait;
217
218 do {
219 if ((NCR5380_read(reg1) & bit1) == val1)
220 return 0;
221 if ((NCR5380_read(reg2) & bit2) == val2)
222 return 0;
223 cpu_relax();
224 } while (n--);
225
226 if (!wait)
227 return -ETIMEDOUT;
228
229
230 while (time_is_after_jiffies(deadline)) {
231 schedule_timeout_uninterruptible(1);
232 if ((NCR5380_read(reg1) & bit1) == val1)
233 return 0;
234 if ((NCR5380_read(reg2) & bit2) == val2)
235 return 0;
236 }
237
238 return -ETIMEDOUT;
239}
240
241#if NDEBUG
242static struct {
243 unsigned char mask;
244 const char *name;
245} signals[] = {
246 {SR_DBP, "PARITY"},
247 {SR_RST, "RST"},
248 {SR_BSY, "BSY"},
249 {SR_REQ, "REQ"},
250 {SR_MSG, "MSG"},
251 {SR_CD, "CD"},
252 {SR_IO, "IO"},
253 {SR_SEL, "SEL"},
254 {0, NULL}
255},
256basrs[] = {
257 {BASR_END_DMA_TRANSFER, "END OF DMA"},
258 {BASR_DRQ, "DRQ"},
259 {BASR_PARITY_ERROR, "PARITY ERROR"},
260 {BASR_IRQ, "IRQ"},
261 {BASR_PHASE_MATCH, "PHASE MATCH"},
262 {BASR_BUSY_ERROR, "BUSY ERROR"},
263 {BASR_ATN, "ATN"},
264 {BASR_ACK, "ACK"},
265 {0, NULL}
266},
267icrs[] = {
268 {ICR_ASSERT_RST, "ASSERT RST"},
269 {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"},
270 {ICR_ARBITRATION_LOST, "LOST ARB."},
271 {ICR_ASSERT_ACK, "ASSERT ACK"},
272 {ICR_ASSERT_BSY, "ASSERT BSY"},
273 {ICR_ASSERT_SEL, "ASSERT SEL"},
274 {ICR_ASSERT_ATN, "ASSERT ATN"},
275 {ICR_ASSERT_DATA, "ASSERT DATA"},
276 {0, NULL}
277},
278mrs[] = {
279 {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"},
280 {MR_TARGET, "TARGET"},
281 {MR_ENABLE_PAR_CHECK, "PARITY CHECK"},
282 {MR_ENABLE_PAR_INTR, "PARITY INTR"},
283 {MR_ENABLE_EOP_INTR, "EOP INTR"},
284 {MR_MONITOR_BSY, "MONITOR BSY"},
285 {MR_DMA_MODE, "DMA MODE"},
286 {MR_ARBITRATE, "ARBITRATE"},
287 {0, NULL}
288};
289
290
291
292
293
294
295
296
297static void NCR5380_print(struct Scsi_Host *instance)
298{
299 struct NCR5380_hostdata *hostdata = shost_priv(instance);
300 unsigned char status, basr, mr, icr, i;
301
302 status = NCR5380_read(STATUS_REG);
303 mr = NCR5380_read(MODE_REG);
304 icr = NCR5380_read(INITIATOR_COMMAND_REG);
305 basr = NCR5380_read(BUS_AND_STATUS_REG);
306
307 printk(KERN_DEBUG "SR = 0x%02x : ", status);
308 for (i = 0; signals[i].mask; ++i)
309 if (status & signals[i].mask)
310 printk(KERN_CONT "%s, ", signals[i].name);
311 printk(KERN_CONT "\nBASR = 0x%02x : ", basr);
312 for (i = 0; basrs[i].mask; ++i)
313 if (basr & basrs[i].mask)
314 printk(KERN_CONT "%s, ", basrs[i].name);
315 printk(KERN_CONT "\nICR = 0x%02x : ", icr);
316 for (i = 0; icrs[i].mask; ++i)
317 if (icr & icrs[i].mask)
318 printk(KERN_CONT "%s, ", icrs[i].name);
319 printk(KERN_CONT "\nMR = 0x%02x : ", mr);
320 for (i = 0; mrs[i].mask; ++i)
321 if (mr & mrs[i].mask)
322 printk(KERN_CONT "%s, ", mrs[i].name);
323 printk(KERN_CONT "\n");
324}
325
326static struct {
327 unsigned char value;
328 const char *name;
329} phases[] = {
330 {PHASE_DATAOUT, "DATAOUT"},
331 {PHASE_DATAIN, "DATAIN"},
332 {PHASE_CMDOUT, "CMDOUT"},
333 {PHASE_STATIN, "STATIN"},
334 {PHASE_MSGOUT, "MSGOUT"},
335 {PHASE_MSGIN, "MSGIN"},
336 {PHASE_UNKNOWN, "UNKNOWN"}
337};
338
339
340
341
342
343
344
345
346static void NCR5380_print_phase(struct Scsi_Host *instance)
347{
348 struct NCR5380_hostdata *hostdata = shost_priv(instance);
349 unsigned char status;
350 int i;
351
352 status = NCR5380_read(STATUS_REG);
353 if (!(status & SR_REQ))
354 shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n");
355 else {
356 for (i = 0; (phases[i].value != PHASE_UNKNOWN) &&
357 (phases[i].value != (status & PHASE_MASK)); ++i)
358 ;
359 shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name);
360 }
361}
362#endif
363
364
365
366
367
368
369
370
371static const char *NCR5380_info(struct Scsi_Host *instance)
372{
373 struct NCR5380_hostdata *hostdata = shost_priv(instance);
374
375 return hostdata->info;
376}
377
378
379
380
381
382
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388
389
390
391
392static int NCR5380_init(struct Scsi_Host *instance, int flags)
393{
394 struct NCR5380_hostdata *hostdata = shost_priv(instance);
395 int i;
396 unsigned long deadline;
397 unsigned long accesses_per_ms;
398
399 instance->max_lun = 7;
400
401 hostdata->host = instance;
402 hostdata->id_mask = 1 << instance->this_id;
403 hostdata->id_higher_mask = 0;
404 for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
405 if (i > hostdata->id_mask)
406 hostdata->id_higher_mask |= i;
407 for (i = 0; i < 8; ++i)
408 hostdata->busy[i] = 0;
409 hostdata->dma_len = 0;
410
411 spin_lock_init(&hostdata->lock);
412 hostdata->connected = NULL;
413 hostdata->sensing = NULL;
414 INIT_LIST_HEAD(&hostdata->autosense);
415 INIT_LIST_HEAD(&hostdata->unissued);
416 INIT_LIST_HEAD(&hostdata->disconnected);
417
418 hostdata->flags = flags;
419
420 INIT_WORK(&hostdata->main_task, NCR5380_main);
421 hostdata->work_q = alloc_workqueue("ncr5380_%d",
422 WQ_UNBOUND | WQ_MEM_RECLAIM,
423 1, instance->host_no);
424 if (!hostdata->work_q)
425 return -ENOMEM;
426
427 snprintf(hostdata->info, sizeof(hostdata->info),
428 "%s, irq %d, io_port 0x%lx, base 0x%lx, can_queue %d, cmd_per_lun %d, sg_tablesize %d, this_id %d, flags { %s%s%s}",
429 instance->hostt->name, instance->irq, hostdata->io_port,
430 hostdata->base, instance->can_queue, instance->cmd_per_lun,
431 instance->sg_tablesize, instance->this_id,
432 hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "",
433 hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
434 hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "");
435
436 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
437 NCR5380_write(MODE_REG, MR_BASE);
438 NCR5380_write(TARGET_COMMAND_REG, 0);
439 NCR5380_write(SELECT_ENABLE_REG, 0);
440
441
442 i = 0;
443 deadline = jiffies + 1;
444 do {
445 cpu_relax();
446 } while (time_is_after_jiffies(deadline));
447 deadline += msecs_to_jiffies(256);
448 do {
449 NCR5380_read(STATUS_REG);
450 ++i;
451 cpu_relax();
452 } while (time_is_after_jiffies(deadline));
453 accesses_per_ms = i / 256;
454 hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2;
455
456 return 0;
457}
458
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471
472
473static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
474{
475 struct NCR5380_hostdata *hostdata = shost_priv(instance);
476 int pass;
477
478 for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
479 switch (pass) {
480 case 1:
481 case 3:
482 case 5:
483 shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
484 NCR5380_poll_politely(hostdata,
485 STATUS_REG, SR_BSY, 0, 5 * HZ);
486 break;
487 case 2:
488 shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
489 do_abort(instance, 1);
490 break;
491 case 4:
492 shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
493 do_reset(instance);
494
495
496
497
498 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
499 msleep(2500);
500 else
501 msleep(500);
502 break;
503 case 6:
504 shost_printk(KERN_ERR, instance, "bus locked solid\n");
505 return -ENXIO;
506 }
507 }
508 return 0;
509}
510
511
512
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514
515
516
517
518static void NCR5380_exit(struct Scsi_Host *instance)
519{
520 struct NCR5380_hostdata *hostdata = shost_priv(instance);
521
522 cancel_work_sync(&hostdata->main_task);
523 destroy_workqueue(hostdata->work_q);
524}
525
526
527
528
529
530
531
532static void complete_cmd(struct Scsi_Host *instance,
533 struct scsi_cmnd *cmd)
534{
535 struct NCR5380_hostdata *hostdata = shost_priv(instance);
536
537 dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
538
539 if (hostdata->sensing == cmd) {
540
541 if (get_status_byte(cmd) != SAM_STAT_GOOD) {
542 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
543 } else {
544 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
545 set_status_byte(cmd, SAM_STAT_CHECK_CONDITION);
546 }
547 hostdata->sensing = NULL;
548 }
549
550 cmd->scsi_done(cmd);
551}
552
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562
563static int NCR5380_queue_command(struct Scsi_Host *instance,
564 struct scsi_cmnd *cmd)
565{
566 struct NCR5380_hostdata *hostdata = shost_priv(instance);
567 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
568 unsigned long flags;
569
570#if (NDEBUG & NDEBUG_NO_WRITE)
571 switch (cmd->cmnd[0]) {
572 case WRITE_6:
573 case WRITE_10:
574 shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
575 cmd->result = (DID_ERROR << 16);
576 cmd->scsi_done(cmd);
577 return 0;
578 }
579#endif
580
581 cmd->result = 0;
582
583 spin_lock_irqsave(&hostdata->lock, flags);
584
585 if (!NCR5380_acquire_dma_irq(instance)) {
586 spin_unlock_irqrestore(&hostdata->lock, flags);
587
588 return SCSI_MLQUEUE_HOST_BUSY;
589 }
590
591
592
593
594
595
596
597
598 if (cmd->cmnd[0] == REQUEST_SENSE)
599 list_add(&ncmd->list, &hostdata->unissued);
600 else
601 list_add_tail(&ncmd->list, &hostdata->unissued);
602
603 spin_unlock_irqrestore(&hostdata->lock, flags);
604
605 dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
606 cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
607
608
609 queue_work(hostdata->work_q, &hostdata->main_task);
610 return 0;
611}
612
613static inline void maybe_release_dma_irq(struct Scsi_Host *instance)
614{
615 struct NCR5380_hostdata *hostdata = shost_priv(instance);
616
617
618 if (list_empty(&hostdata->disconnected) &&
619 list_empty(&hostdata->unissued) &&
620 list_empty(&hostdata->autosense) &&
621 !hostdata->connected &&
622 !hostdata->selecting) {
623 NCR5380_release_dma_irq(instance);
624 }
625}
626
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636
637
638static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
639{
640 struct NCR5380_hostdata *hostdata = shost_priv(instance);
641 struct NCR5380_cmd *ncmd;
642 struct scsi_cmnd *cmd;
643
644 if (hostdata->sensing || list_empty(&hostdata->autosense)) {
645 list_for_each_entry(ncmd, &hostdata->unissued, list) {
646 cmd = NCR5380_to_scmd(ncmd);
647 dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
648 cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
649
650 if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
651 list_del(&ncmd->list);
652 dsprintk(NDEBUG_QUEUES, instance,
653 "dequeue: removed %p from issue queue\n", cmd);
654 return cmd;
655 }
656 }
657 } else {
658
659 ncmd = list_first_entry(&hostdata->autosense,
660 struct NCR5380_cmd, list);
661 list_del(&ncmd->list);
662 cmd = NCR5380_to_scmd(ncmd);
663 dsprintk(NDEBUG_QUEUES, instance,
664 "dequeue: removed %p from autosense queue\n", cmd);
665 scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
666 hostdata->sensing = cmd;
667 return cmd;
668 }
669 return NULL;
670}
671
672static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
673{
674 struct NCR5380_hostdata *hostdata = shost_priv(instance);
675 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
676
677 if (hostdata->sensing == cmd) {
678 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
679 list_add(&ncmd->list, &hostdata->autosense);
680 hostdata->sensing = NULL;
681 } else
682 list_add(&ncmd->list, &hostdata->unissued);
683}
684
685
686
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689
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691
692
693
694static void NCR5380_main(struct work_struct *work)
695{
696 struct NCR5380_hostdata *hostdata =
697 container_of(work, struct NCR5380_hostdata, main_task);
698 struct Scsi_Host *instance = hostdata->host;
699 int done;
700
701 do {
702 done = 1;
703
704 spin_lock_irq(&hostdata->lock);
705 while (!hostdata->connected && !hostdata->selecting) {
706 struct scsi_cmnd *cmd = dequeue_next_cmd(instance);
707
708 if (!cmd)
709 break;
710
711 dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
712
713
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719
720
721
722
723
724
725
726 if (!NCR5380_select(instance, cmd)) {
727 dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
728 } else {
729 dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
730 "main: select failed, returning %p to queue\n", cmd);
731 requeue_cmd(instance, cmd);
732 }
733 }
734 if (hostdata->connected && !hostdata->dma_len) {
735 dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n");
736 NCR5380_information_transfer(instance);
737 done = 0;
738 }
739 if (!hostdata->connected) {
740 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
741 maybe_release_dma_irq(instance);
742 }
743 spin_unlock_irq(&hostdata->lock);
744 if (!done)
745 cond_resched();
746 } while (!done);
747}
748
749
750
751
752
753
754
755
756
757static void NCR5380_dma_complete(struct Scsi_Host *instance)
758{
759 struct NCR5380_hostdata *hostdata = shost_priv(instance);
760 int transferred;
761 unsigned char **data;
762 int *count;
763 int saved_data = 0, overrun = 0;
764 unsigned char p;
765
766 if (hostdata->read_overruns) {
767 p = hostdata->connected->SCp.phase;
768 if (p & SR_IO) {
769 udelay(10);
770 if ((NCR5380_read(BUS_AND_STATUS_REG) &
771 (BASR_PHASE_MATCH | BASR_ACK)) ==
772 (BASR_PHASE_MATCH | BASR_ACK)) {
773 saved_data = NCR5380_read(INPUT_DATA_REG);
774 overrun = 1;
775 dsprintk(NDEBUG_DMA, instance, "read overrun handled\n");
776 }
777 }
778 }
779
780#ifdef CONFIG_SUN3
781 if (sun3scsi_dma_finish(hostdata->connected->sc_data_direction)) {
782 pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n",
783 instance->host_no);
784 BUG();
785 }
786
787 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
788 (BASR_PHASE_MATCH | BASR_ACK)) {
789 pr_err("scsi%d: BASR %02x\n", instance->host_no,
790 NCR5380_read(BUS_AND_STATUS_REG));
791 pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n",
792 instance->host_no);
793 BUG();
794 }
795#endif
796
797 NCR5380_write(MODE_REG, MR_BASE);
798 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
799 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
800
801 transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata);
802 hostdata->dma_len = 0;
803
804 data = (unsigned char **)&hostdata->connected->SCp.ptr;
805 count = &hostdata->connected->SCp.this_residual;
806 *data += transferred;
807 *count -= transferred;
808
809 if (hostdata->read_overruns) {
810 int cnt, toPIO;
811
812 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) {
813 cnt = toPIO = hostdata->read_overruns;
814 if (overrun) {
815 dsprintk(NDEBUG_DMA, instance,
816 "Got an input overrun, using saved byte\n");
817 *(*data)++ = saved_data;
818 (*count)--;
819 cnt--;
820 toPIO--;
821 }
822 if (toPIO > 0) {
823 dsprintk(NDEBUG_DMA, instance,
824 "Doing %d byte PIO to 0x%p\n", cnt, *data);
825 NCR5380_transfer_pio(instance, &p, &cnt, data, 0);
826 *count -= toPIO - cnt;
827 }
828 }
829 }
830}
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865
866static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id)
867{
868 struct Scsi_Host *instance = dev_id;
869 struct NCR5380_hostdata *hostdata = shost_priv(instance);
870 int handled = 0;
871 unsigned char basr;
872 unsigned long flags;
873
874 spin_lock_irqsave(&hostdata->lock, flags);
875
876 basr = NCR5380_read(BUS_AND_STATUS_REG);
877 if (basr & BASR_IRQ) {
878 unsigned char mr = NCR5380_read(MODE_REG);
879 unsigned char sr = NCR5380_read(STATUS_REG);
880
881 dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
882 irq, basr, sr, mr);
883
884 if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
885
886
887
888
889
890 dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
891
892 if (hostdata->connected) {
893 NCR5380_dma_complete(instance);
894 queue_work(hostdata->work_q, &hostdata->main_task);
895 } else {
896 NCR5380_write(MODE_REG, MR_BASE);
897 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
898 }
899 } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
900 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
901
902 NCR5380_write(SELECT_ENABLE_REG, 0);
903 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
904
905 dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n");
906
907 if (!hostdata->connected) {
908 NCR5380_reselect(instance);
909 queue_work(hostdata->work_q, &hostdata->main_task);
910 }
911 if (!hostdata->connected)
912 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
913 } else {
914
915 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
916
917 if (sr & SR_RST) {
918
919 shost_printk(KERN_WARNING, instance,
920 "bus reset interrupt\n");
921 bus_reset_cleanup(instance);
922 } else {
923 dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n");
924 }
925#ifdef SUN3_SCSI_VME
926 dregs->csr |= CSR_DMA_ENABLE;
927#endif
928 }
929 handled = 1;
930 } else {
931 dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n");
932#ifdef SUN3_SCSI_VME
933 dregs->csr |= CSR_DMA_ENABLE;
934#endif
935 }
936
937 spin_unlock_irqrestore(&hostdata->lock, flags);
938
939 return IRQ_RETVAL(handled);
940}
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967static bool NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
968 __releases(&hostdata->lock) __acquires(&hostdata->lock)
969{
970 struct NCR5380_hostdata *hostdata = shost_priv(instance);
971 unsigned char tmp[3], phase;
972 unsigned char *data;
973 int len;
974 int err;
975 bool ret = true;
976 bool can_disconnect = instance->irq != NO_IRQ &&
977 cmd->cmnd[0] != REQUEST_SENSE &&
978 (disconnect_mask & BIT(scmd_id(cmd)));
979
980 NCR5380_dprint(NDEBUG_ARBITRATION, instance);
981 dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n",
982 instance->this_id);
983
984
985
986
987
988
989
990
991 hostdata->selecting = cmd;
992
993
994
995
996
997
998 NCR5380_write(TARGET_COMMAND_REG, 0);
999
1000
1001
1002
1003
1004 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
1005 NCR5380_write(MODE_REG, MR_ARBITRATE);
1006
1007
1008
1009
1010
1011 spin_unlock_irq(&hostdata->lock);
1012 err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0,
1013 INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
1014 ICR_ARBITRATION_PROGRESS, HZ);
1015 spin_lock_irq(&hostdata->lock);
1016 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
1017
1018 goto out;
1019 }
1020 if (!hostdata->selecting) {
1021
1022 NCR5380_write(MODE_REG, MR_BASE);
1023 return false;
1024 }
1025 if (err < 0) {
1026 NCR5380_write(MODE_REG, MR_BASE);
1027 shost_printk(KERN_ERR, instance,
1028 "select: arbitration timeout\n");
1029 goto out;
1030 }
1031 spin_unlock_irq(&hostdata->lock);
1032
1033
1034 udelay(3);
1035
1036
1037 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
1038 (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
1039 (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
1040 NCR5380_write(MODE_REG, MR_BASE);
1041 dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n");
1042 spin_lock_irq(&hostdata->lock);
1043 goto out;
1044 }
1045
1046
1047
1048
1049
1050 NCR5380_write(INITIATOR_COMMAND_REG,
1051 ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
1052
1053
1054
1055
1056
1057
1058 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
1059 udelay(15);
1060 else
1061 udelay(2);
1062
1063 spin_lock_irq(&hostdata->lock);
1064
1065
1066 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
1067 goto out;
1068
1069 if (!hostdata->selecting) {
1070 NCR5380_write(MODE_REG, MR_BASE);
1071 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1072 return false;
1073 }
1074
1075 dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n");
1076
1077
1078
1079
1080
1081
1082 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd)));
1083
1084
1085
1086
1087
1088
1089
1090 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY |
1091 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1092 NCR5380_write(MODE_REG, MR_BASE);
1093
1094
1095
1096
1097
1098 NCR5380_write(SELECT_ENABLE_REG, 0);
1099
1100 spin_unlock_irq(&hostdata->lock);
1101
1102
1103
1104
1105
1106 udelay(1);
1107
1108
1109 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |
1110 ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129 udelay(1);
1130
1131 dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd));
1132
1133
1134
1135
1136
1137
1138 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY,
1139 msecs_to_jiffies(250));
1140
1141 if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
1142 spin_lock_irq(&hostdata->lock);
1143 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1144 NCR5380_reselect(instance);
1145 shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n");
1146 goto out;
1147 }
1148
1149 if (err < 0) {
1150 spin_lock_irq(&hostdata->lock);
1151 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1152
1153
1154 if (!hostdata->selecting)
1155 return false;
1156
1157 cmd->result = DID_BAD_TARGET << 16;
1158 complete_cmd(instance, cmd);
1159 dsprintk(NDEBUG_SELECTION, instance,
1160 "target did not respond within 250ms\n");
1161 ret = false;
1162 goto out;
1163 }
1164
1165
1166
1167
1168
1169
1170
1171 udelay(1);
1172
1173 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
1185 spin_lock_irq(&hostdata->lock);
1186 if (err < 0) {
1187 shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
1188 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1189 goto out;
1190 }
1191 if (!hostdata->selecting) {
1192 do_abort(instance, 0);
1193 return false;
1194 }
1195
1196 dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n",
1197 scmd_id(cmd));
1198 tmp[0] = IDENTIFY(can_disconnect, cmd->device->lun);
1199
1200 len = 1;
1201 data = tmp;
1202 phase = PHASE_MSGOUT;
1203 NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
1204 if (len) {
1205 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1206 cmd->result = DID_ERROR << 16;
1207 complete_cmd(instance, cmd);
1208 dsprintk(NDEBUG_SELECTION, instance, "IDENTIFY message transfer failed\n");
1209 ret = false;
1210 goto out;
1211 }
1212
1213 dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n");
1214
1215 hostdata->connected = cmd;
1216 hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun;
1217
1218#ifdef SUN3_SCSI_VME
1219 dregs->csr |= CSR_INTR;
1220#endif
1221
1222 initialize_SCp(cmd);
1223
1224 ret = false;
1225
1226out:
1227 if (!hostdata->selecting)
1228 return false;
1229 hostdata->selecting = NULL;
1230 return ret;
1231}
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259static int NCR5380_transfer_pio(struct Scsi_Host *instance,
1260 unsigned char *phase, int *count,
1261 unsigned char **data, unsigned int can_sleep)
1262{
1263 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1264 unsigned char p = *phase, tmp;
1265 int c = *count;
1266 unsigned char *d = *data;
1267
1268
1269
1270
1271
1272
1273
1274 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1275
1276 do {
1277
1278
1279
1280
1281
1282 if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ,
1283 HZ * can_sleep) < 0)
1284 break;
1285
1286 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
1287
1288
1289 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
1290 dsprintk(NDEBUG_PIO, instance, "phase mismatch\n");
1291 NCR5380_dprint_phase(NDEBUG_PIO, instance);
1292 break;
1293 }
1294
1295
1296 if (!(p & SR_IO))
1297 NCR5380_write(OUTPUT_DATA_REG, *d);
1298 else
1299 *d = NCR5380_read(CURRENT_SCSI_DATA_REG);
1300
1301 ++d;
1302
1303
1304
1305
1306
1307
1308
1309
1310 if (!(p & SR_IO)) {
1311 if (!((p & SR_MSG) && c > 1)) {
1312 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1313 NCR5380_dprint(NDEBUG_PIO, instance);
1314 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1315 ICR_ASSERT_DATA | ICR_ASSERT_ACK);
1316 } else {
1317 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1318 ICR_ASSERT_DATA | ICR_ASSERT_ATN);
1319 NCR5380_dprint(NDEBUG_PIO, instance);
1320 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1321 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1322 }
1323 } else {
1324 NCR5380_dprint(NDEBUG_PIO, instance);
1325 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
1326 }
1327
1328 if (NCR5380_poll_politely(hostdata,
1329 STATUS_REG, SR_REQ, 0, 5 * HZ * can_sleep) < 0)
1330 break;
1331
1332 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345 if (!(p == PHASE_MSGIN && c == 1)) {
1346 if (p == PHASE_MSGOUT && c > 1)
1347 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1348 else
1349 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1350 }
1351 } while (--c);
1352
1353 dsprintk(NDEBUG_PIO, instance, "residual %d\n", c);
1354
1355 *count = c;
1356 *data = d;
1357 tmp = NCR5380_read(STATUS_REG);
1358
1359
1360
1361
1362 if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
1363 *phase = tmp & PHASE_MASK;
1364 else
1365 *phase = PHASE_UNKNOWN;
1366
1367 if (!c || (*phase == p))
1368 return 0;
1369 else
1370 return -1;
1371}
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385static void do_reset(struct Scsi_Host *instance)
1386{
1387 struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance);
1388 unsigned long flags;
1389
1390 local_irq_save(flags);
1391 NCR5380_write(TARGET_COMMAND_REG,
1392 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1393 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
1394 udelay(50);
1395 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1396 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1397 local_irq_restore(flags);
1398}
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409static int do_abort(struct Scsi_Host *instance, unsigned int can_sleep)
1410{
1411 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1412 unsigned char *msgptr, phase, tmp;
1413 int len;
1414 int rc;
1415
1416
1417 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ,
1430 10 * HZ * can_sleep);
1431 if (rc < 0)
1432 goto out;
1433
1434 tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
1435
1436 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1437
1438 if (tmp != PHASE_MSGOUT) {
1439 NCR5380_write(INITIATOR_COMMAND_REG,
1440 ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1441 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0,
1442 3 * HZ * can_sleep);
1443 if (rc < 0)
1444 goto out;
1445 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1446 }
1447
1448 tmp = ABORT;
1449 msgptr = &tmp;
1450 len = 1;
1451 phase = PHASE_MSGOUT;
1452 NCR5380_transfer_pio(instance, &phase, &len, &msgptr, can_sleep);
1453 if (len)
1454 rc = -ENXIO;
1455
1456
1457
1458
1459
1460
1461out:
1462 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1463 return rc;
1464}
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1486 unsigned char *phase, int *count,
1487 unsigned char **data)
1488{
1489 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1490 int c = *count;
1491 unsigned char p = *phase;
1492 unsigned char *d = *data;
1493 unsigned char tmp;
1494 int result = 0;
1495
1496 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1497 *phase = tmp;
1498 return -1;
1499 }
1500
1501 hostdata->connected->SCp.phase = p;
1502
1503 if (p & SR_IO) {
1504 if (hostdata->read_overruns)
1505 c -= hostdata->read_overruns;
1506 else if (hostdata->flags & FLAG_DMA_FIXUP)
1507 --c;
1508 }
1509
1510 dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
1511 (p & SR_IO) ? "receive" : "send", c, d);
1512
1513#ifdef CONFIG_SUN3
1514
1515 sun3scsi_dma_start(c, *data);
1516#endif
1517
1518 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1519 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1520 MR_ENABLE_EOP_INTR);
1521
1522 if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) {
1523
1524
1525
1526 if (p & SR_IO)
1527 result = NCR5380_dma_recv_setup(hostdata, d, c);
1528 else
1529 result = NCR5380_dma_send_setup(hostdata, d, c);
1530 }
1531
1532
1533
1534
1535
1536
1537 if (p & SR_IO) {
1538 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1539 NCR5380_io_delay(1);
1540 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
1541 } else {
1542 NCR5380_io_delay(1);
1543 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1544 NCR5380_io_delay(1);
1545 NCR5380_write(START_DMA_SEND_REG, 0);
1546 NCR5380_io_delay(1);
1547 }
1548
1549#ifdef CONFIG_SUN3
1550#ifdef SUN3_SCSI_VME
1551 dregs->csr |= CSR_DMA_ENABLE;
1552#endif
1553 sun3_dma_active = 1;
1554#endif
1555
1556 if (hostdata->flags & FLAG_LATE_DMA_SETUP) {
1557
1558
1559
1560 if (p & SR_IO)
1561 result = NCR5380_dma_recv_setup(hostdata, d, c);
1562 else
1563 result = NCR5380_dma_send_setup(hostdata, d, c);
1564 }
1565
1566
1567 if (result < 0)
1568 return result;
1569
1570
1571 if (result > 0) {
1572 hostdata->dma_len = result;
1573 return 0;
1574 }
1575
1576
1577 hostdata->dma_len = c;
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613 if (hostdata->flags & FLAG_DMA_FIXUP) {
1614 if (p & SR_IO) {
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630 if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG,
1631 BASR_DRQ, BASR_DRQ, 0) < 0) {
1632 result = -1;
1633 shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
1634 }
1635 if (NCR5380_poll_politely(hostdata, STATUS_REG,
1636 SR_REQ, 0, 0) < 0) {
1637 result = -1;
1638 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
1639 }
1640 d[*count - 1] = NCR5380_read(INPUT_DATA_REG);
1641 } else {
1642
1643
1644
1645
1646 if (NCR5380_poll_politely2(hostdata,
1647 BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
1648 BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, 0) < 0) {
1649 result = -1;
1650 shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
1651 }
1652 }
1653 }
1654
1655 NCR5380_dma_complete(instance);
1656 return result;
1657}
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676static void NCR5380_information_transfer(struct Scsi_Host *instance)
1677 __releases(&hostdata->lock) __acquires(&hostdata->lock)
1678{
1679 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1680 unsigned char msgout = NOP;
1681 int sink = 0;
1682 int len;
1683 int transfersize;
1684 unsigned char *data;
1685 unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
1686 struct scsi_cmnd *cmd;
1687
1688#ifdef SUN3_SCSI_VME
1689 dregs->csr |= CSR_INTR;
1690#endif
1691
1692 while ((cmd = hostdata->connected)) {
1693 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1694
1695 tmp = NCR5380_read(STATUS_REG);
1696
1697 if (tmp & SR_REQ) {
1698 phase = (tmp & PHASE_MASK);
1699 if (phase != old_phase) {
1700 old_phase = phase;
1701 NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
1702 }
1703#ifdef CONFIG_SUN3
1704 if (phase == PHASE_CMDOUT &&
1705 sun3_dma_setup_done != cmd) {
1706 int count;
1707
1708 advance_sg_buffer(cmd);
1709
1710 count = sun3scsi_dma_xfer_len(hostdata, cmd);
1711
1712 if (count > 0) {
1713 if (cmd->sc_data_direction == DMA_TO_DEVICE)
1714 sun3scsi_dma_send_setup(hostdata,
1715 cmd->SCp.ptr, count);
1716 else
1717 sun3scsi_dma_recv_setup(hostdata,
1718 cmd->SCp.ptr, count);
1719 sun3_dma_setup_done = cmd;
1720 }
1721#ifdef SUN3_SCSI_VME
1722 dregs->csr |= CSR_INTR;
1723#endif
1724 }
1725#endif
1726
1727 if (sink && (phase != PHASE_MSGOUT)) {
1728 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1729
1730 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |
1731 ICR_ASSERT_ACK);
1732 while (NCR5380_read(STATUS_REG) & SR_REQ)
1733 ;
1734 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1735 ICR_ASSERT_ATN);
1736 sink = 0;
1737 continue;
1738 }
1739
1740 switch (phase) {
1741 case PHASE_DATAOUT:
1742#if (NDEBUG & NDEBUG_NO_DATAOUT)
1743 shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n");
1744 sink = 1;
1745 do_abort(instance, 0);
1746 cmd->result = DID_ERROR << 16;
1747 complete_cmd(instance, cmd);
1748 hostdata->connected = NULL;
1749 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1750 return;
1751#endif
1752 case PHASE_DATAIN:
1753
1754
1755
1756
1757
1758 advance_sg_buffer(cmd);
1759 dsprintk(NDEBUG_INFORMATION, instance,
1760 "this residual %d, sg ents %d\n",
1761 cmd->SCp.this_residual,
1762 sg_nents(cmd->SCp.buffer));
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774 transfersize = 0;
1775 if (!cmd->device->borken)
1776 transfersize = NCR5380_dma_xfer_len(hostdata, cmd);
1777
1778 if (transfersize > 0) {
1779 len = transfersize;
1780 if (NCR5380_transfer_dma(instance, &phase,
1781 &len, (unsigned char **)&cmd->SCp.ptr)) {
1782
1783
1784
1785
1786
1787 scmd_printk(KERN_INFO, cmd,
1788 "switching to slow handshake\n");
1789 cmd->device->borken = 1;
1790 do_reset(instance);
1791 bus_reset_cleanup(instance);
1792 }
1793 } else {
1794
1795
1796
1797 transfersize = min(cmd->SCp.this_residual,
1798 NCR5380_PIO_CHUNK_SIZE);
1799 len = transfersize;
1800 NCR5380_transfer_pio(instance, &phase, &len,
1801 (unsigned char **)&cmd->SCp.ptr,
1802 0);
1803 cmd->SCp.this_residual -= transfersize - len;
1804 }
1805#ifdef CONFIG_SUN3
1806 if (sun3_dma_setup_done == cmd)
1807 sun3_dma_setup_done = NULL;
1808#endif
1809 return;
1810 case PHASE_MSGIN:
1811 len = 1;
1812 data = &tmp;
1813 NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
1814 cmd->SCp.Message = tmp;
1815
1816 switch (tmp) {
1817 case ABORT:
1818 set_host_byte(cmd, DID_ABORT);
1819 fallthrough;
1820 case COMMAND_COMPLETE:
1821
1822 sink = 1;
1823 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1824 dsprintk(NDEBUG_QUEUES, instance,
1825 "COMMAND COMPLETE %p target %d lun %llu\n",
1826 cmd, scmd_id(cmd), cmd->device->lun);
1827
1828 hostdata->connected = NULL;
1829 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1830
1831 set_status_byte(cmd, cmd->SCp.Status);
1832
1833 set_resid_from_SCp(cmd);
1834
1835 if (cmd->cmnd[0] == REQUEST_SENSE)
1836 complete_cmd(instance, cmd);
1837 else {
1838 if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION ||
1839 cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) {
1840 dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
1841 cmd);
1842 list_add_tail(&ncmd->list,
1843 &hostdata->autosense);
1844 } else
1845 complete_cmd(instance, cmd);
1846 }
1847
1848
1849
1850
1851
1852 NCR5380_write(TARGET_COMMAND_REG, 0);
1853
1854 return;
1855 case MESSAGE_REJECT:
1856
1857 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1858 switch (hostdata->last_message) {
1859 case HEAD_OF_QUEUE_TAG:
1860 case ORDERED_QUEUE_TAG:
1861 case SIMPLE_QUEUE_TAG:
1862 cmd->device->simple_tags = 0;
1863 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1864 break;
1865 default:
1866 break;
1867 }
1868 break;
1869 case DISCONNECT:
1870
1871 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1872 hostdata->connected = NULL;
1873 list_add(&ncmd->list, &hostdata->disconnected);
1874 dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
1875 instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
1876 cmd, scmd_id(cmd), cmd->device->lun);
1877
1878
1879
1880
1881
1882 NCR5380_write(TARGET_COMMAND_REG, 0);
1883
1884#ifdef SUN3_SCSI_VME
1885 dregs->csr |= CSR_DMA_ENABLE;
1886#endif
1887 return;
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898 case SAVE_POINTERS:
1899 case RESTORE_POINTERS:
1900
1901 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1902 break;
1903 case EXTENDED_MESSAGE:
1904
1905
1906
1907
1908 extended_msg[0] = EXTENDED_MESSAGE;
1909
1910 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1911
1912 spin_unlock_irq(&hostdata->lock);
1913
1914 dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n");
1915
1916 len = 2;
1917 data = extended_msg + 1;
1918 phase = PHASE_MSGIN;
1919 NCR5380_transfer_pio(instance, &phase, &len, &data, 1);
1920 dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n",
1921 (int)extended_msg[1],
1922 (int)extended_msg[2]);
1923
1924 if (!len && extended_msg[1] > 0 &&
1925 extended_msg[1] <= sizeof(extended_msg) - 2) {
1926
1927 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1928 len = extended_msg[1] - 1;
1929 data = extended_msg + 3;
1930 phase = PHASE_MSGIN;
1931
1932 NCR5380_transfer_pio(instance, &phase, &len, &data, 1);
1933 dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n",
1934 len);
1935
1936 switch (extended_msg[2]) {
1937 case EXTENDED_SDTR:
1938 case EXTENDED_WDTR:
1939 tmp = 0;
1940 }
1941 } else if (len) {
1942 shost_printk(KERN_ERR, instance, "error receiving extended message\n");
1943 tmp = 0;
1944 } else {
1945 shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n",
1946 extended_msg[2], extended_msg[1]);
1947 tmp = 0;
1948 }
1949
1950 spin_lock_irq(&hostdata->lock);
1951 if (!hostdata->connected)
1952 return;
1953
1954
1955 fallthrough;
1956 default:
1957
1958
1959
1960
1961 if (tmp == EXTENDED_MESSAGE)
1962 scmd_printk(KERN_INFO, cmd,
1963 "rejecting unknown extended message code %02x, length %d\n",
1964 extended_msg[2], extended_msg[1]);
1965 else if (tmp)
1966 scmd_printk(KERN_INFO, cmd,
1967 "rejecting unknown message code %02x\n",
1968 tmp);
1969
1970 msgout = MESSAGE_REJECT;
1971 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1972 break;
1973 }
1974 break;
1975 case PHASE_MSGOUT:
1976 len = 1;
1977 data = &msgout;
1978 hostdata->last_message = msgout;
1979 NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
1980 if (msgout == ABORT) {
1981 hostdata->connected = NULL;
1982 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1983 cmd->result = DID_ERROR << 16;
1984 complete_cmd(instance, cmd);
1985 return;
1986 }
1987 msgout = NOP;
1988 break;
1989 case PHASE_CMDOUT:
1990 len = cmd->cmd_len;
1991 data = cmd->cmnd;
1992
1993
1994
1995
1996
1997 NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
1998 break;
1999 case PHASE_STATIN:
2000 len = 1;
2001 data = &tmp;
2002 NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
2003 cmd->SCp.Status = tmp;
2004 break;
2005 default:
2006 shost_printk(KERN_ERR, instance, "unknown phase\n");
2007 NCR5380_dprint(NDEBUG_ANY, instance);
2008 }
2009 } else {
2010 spin_unlock_irq(&hostdata->lock);
2011 NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
2012 spin_lock_irq(&hostdata->lock);
2013 }
2014 }
2015}
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027static void NCR5380_reselect(struct Scsi_Host *instance)
2028{
2029 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2030 unsigned char target_mask;
2031 unsigned char lun;
2032 unsigned char msg[3];
2033 struct NCR5380_cmd *ncmd;
2034 struct scsi_cmnd *tmp;
2035
2036
2037
2038
2039
2040
2041 NCR5380_write(MODE_REG, MR_BASE);
2042
2043 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
2044 if (!target_mask || target_mask & (target_mask - 1)) {
2045 shost_printk(KERN_WARNING, instance,
2046 "reselect: bad target_mask 0x%02x\n", target_mask);
2047 return;
2048 }
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
2060 if (NCR5380_poll_politely(hostdata,
2061 STATUS_REG, SR_SEL, 0, 0) < 0) {
2062 shost_printk(KERN_ERR, instance, "reselect: !SEL timeout\n");
2063 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2064 return;
2065 }
2066 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2067
2068
2069
2070
2071
2072 if (NCR5380_poll_politely(hostdata,
2073 STATUS_REG, SR_REQ, SR_REQ, 0) < 0) {
2074 if ((NCR5380_read(STATUS_REG) & (SR_BSY | SR_SEL)) == 0)
2075
2076 return;
2077 shost_printk(KERN_ERR, instance, "reselect: REQ timeout\n");
2078 do_abort(instance, 0);
2079 return;
2080 }
2081
2082#ifdef CONFIG_SUN3
2083
2084 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN));
2085
2086
2087 msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG);
2088#else
2089 {
2090 int len = 1;
2091 unsigned char *data = msg;
2092 unsigned char phase = PHASE_MSGIN;
2093
2094 NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
2095
2096 if (len) {
2097 do_abort(instance, 0);
2098 return;
2099 }
2100 }
2101#endif
2102
2103 if (!(msg[0] & 0x80)) {
2104 shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
2105 spi_print_msg(msg);
2106 printk("\n");
2107 do_abort(instance, 0);
2108 return;
2109 }
2110 lun = msg[0] & 0x07;
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123 tmp = NULL;
2124 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2125 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2126
2127 if (target_mask == (1 << scmd_id(cmd)) &&
2128 lun == (u8)cmd->device->lun) {
2129 list_del(&ncmd->list);
2130 tmp = cmd;
2131 break;
2132 }
2133 }
2134
2135 if (tmp) {
2136 dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
2137 "reselect: removed %p from disconnected queue\n", tmp);
2138 } else {
2139 int target = ffs(target_mask) - 1;
2140
2141 shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
2142 target_mask, lun);
2143
2144
2145
2146
2147 if (do_abort(instance, 0) == 0)
2148 hostdata->busy[target] &= ~(1 << lun);
2149 return;
2150 }
2151
2152#ifdef CONFIG_SUN3
2153 if (sun3_dma_setup_done != tmp) {
2154 int count;
2155
2156 advance_sg_buffer(tmp);
2157
2158 count = sun3scsi_dma_xfer_len(hostdata, tmp);
2159
2160 if (count > 0) {
2161 if (tmp->sc_data_direction == DMA_TO_DEVICE)
2162 sun3scsi_dma_send_setup(hostdata,
2163 tmp->SCp.ptr, count);
2164 else
2165 sun3scsi_dma_recv_setup(hostdata,
2166 tmp->SCp.ptr, count);
2167 sun3_dma_setup_done = tmp;
2168 }
2169 }
2170
2171 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
2172#endif
2173
2174
2175 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2176
2177 hostdata->connected = tmp;
2178 dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n",
2179 scmd_id(tmp), tmp->device->lun);
2180}
2181
2182
2183
2184
2185
2186
2187
2188static bool list_find_cmd(struct list_head *haystack,
2189 struct scsi_cmnd *needle)
2190{
2191 struct NCR5380_cmd *ncmd;
2192
2193 list_for_each_entry(ncmd, haystack, list)
2194 if (NCR5380_to_scmd(ncmd) == needle)
2195 return true;
2196 return false;
2197}
2198
2199
2200
2201
2202
2203
2204
2205static bool list_del_cmd(struct list_head *haystack,
2206 struct scsi_cmnd *needle)
2207{
2208 if (list_find_cmd(haystack, needle)) {
2209 struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle);
2210
2211 list_del(&ncmd->list);
2212 return true;
2213 }
2214 return false;
2215}
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246static int NCR5380_abort(struct scsi_cmnd *cmd)
2247{
2248 struct Scsi_Host *instance = cmd->device->host;
2249 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2250 unsigned long flags;
2251 int result = SUCCESS;
2252
2253 spin_lock_irqsave(&hostdata->lock, flags);
2254
2255#if (NDEBUG & NDEBUG_ANY)
2256 scmd_printk(KERN_INFO, cmd, __func__);
2257#endif
2258 NCR5380_dprint(NDEBUG_ANY, instance);
2259 NCR5380_dprint_phase(NDEBUG_ANY, instance);
2260
2261 if (list_del_cmd(&hostdata->unissued, cmd)) {
2262 dsprintk(NDEBUG_ABORT, instance,
2263 "abort: removed %p from issue queue\n", cmd);
2264 cmd->result = DID_ABORT << 16;
2265 cmd->scsi_done(cmd);
2266 goto out;
2267 }
2268
2269 if (hostdata->selecting == cmd) {
2270 dsprintk(NDEBUG_ABORT, instance,
2271 "abort: cmd %p == selecting\n", cmd);
2272 hostdata->selecting = NULL;
2273 cmd->result = DID_ABORT << 16;
2274 complete_cmd(instance, cmd);
2275 goto out;
2276 }
2277
2278 if (list_del_cmd(&hostdata->disconnected, cmd)) {
2279 dsprintk(NDEBUG_ABORT, instance,
2280 "abort: removed %p from disconnected list\n", cmd);
2281
2282
2283
2284 set_host_byte(cmd, DID_ERROR);
2285 complete_cmd(instance, cmd);
2286 result = FAILED;
2287 goto out;
2288 }
2289
2290 if (hostdata->connected == cmd) {
2291 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2292 hostdata->connected = NULL;
2293 hostdata->dma_len = 0;
2294 if (do_abort(instance, 0) < 0) {
2295 set_host_byte(cmd, DID_ERROR);
2296 complete_cmd(instance, cmd);
2297 result = FAILED;
2298 goto out;
2299 }
2300 set_host_byte(cmd, DID_ABORT);
2301 complete_cmd(instance, cmd);
2302 goto out;
2303 }
2304
2305 if (list_del_cmd(&hostdata->autosense, cmd)) {
2306 dsprintk(NDEBUG_ABORT, instance,
2307 "abort: removed %p from sense queue\n", cmd);
2308 complete_cmd(instance, cmd);
2309 }
2310
2311out:
2312 if (result == FAILED)
2313 dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
2314 else {
2315 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
2316 dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
2317 }
2318
2319 queue_work(hostdata->work_q, &hostdata->main_task);
2320 spin_unlock_irqrestore(&hostdata->lock, flags);
2321
2322 return result;
2323}
2324
2325
2326static void bus_reset_cleanup(struct Scsi_Host *instance)
2327{
2328 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2329 int i;
2330 struct NCR5380_cmd *ncmd;
2331
2332
2333 NCR5380_write(MODE_REG, MR_BASE);
2334 NCR5380_write(TARGET_COMMAND_REG, 0);
2335 NCR5380_write(SELECT_ENABLE_REG, 0);
2336
2337
2338
2339
2340
2341
2342
2343 if (hostdata->selecting) {
2344 hostdata->selecting->result = DID_RESET << 16;
2345 complete_cmd(instance, hostdata->selecting);
2346 hostdata->selecting = NULL;
2347 }
2348
2349 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2350 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2351
2352 set_host_byte(cmd, DID_RESET);
2353 complete_cmd(instance, cmd);
2354 }
2355 INIT_LIST_HEAD(&hostdata->disconnected);
2356
2357 list_for_each_entry(ncmd, &hostdata->autosense, list) {
2358 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2359
2360 cmd->scsi_done(cmd);
2361 }
2362 INIT_LIST_HEAD(&hostdata->autosense);
2363
2364 if (hostdata->connected) {
2365 set_host_byte(hostdata->connected, DID_RESET);
2366 complete_cmd(instance, hostdata->connected);
2367 hostdata->connected = NULL;
2368 }
2369
2370 for (i = 0; i < 8; ++i)
2371 hostdata->busy[i] = 0;
2372 hostdata->dma_len = 0;
2373
2374 queue_work(hostdata->work_q, &hostdata->main_task);
2375}
2376
2377
2378
2379
2380
2381
2382
2383
2384static int NCR5380_host_reset(struct scsi_cmnd *cmd)
2385{
2386 struct Scsi_Host *instance = cmd->device->host;
2387 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2388 unsigned long flags;
2389 struct NCR5380_cmd *ncmd;
2390
2391 spin_lock_irqsave(&hostdata->lock, flags);
2392
2393#if (NDEBUG & NDEBUG_ANY)
2394 shost_printk(KERN_INFO, instance, __func__);
2395#endif
2396 NCR5380_dprint(NDEBUG_ANY, instance);
2397 NCR5380_dprint_phase(NDEBUG_ANY, instance);
2398
2399 list_for_each_entry(ncmd, &hostdata->unissued, list) {
2400 struct scsi_cmnd *scmd = NCR5380_to_scmd(ncmd);
2401
2402 scmd->result = DID_RESET << 16;
2403 scmd->scsi_done(scmd);
2404 }
2405 INIT_LIST_HEAD(&hostdata->unissued);
2406
2407 do_reset(instance);
2408 bus_reset_cleanup(instance);
2409
2410 spin_unlock_irqrestore(&hostdata->lock, flags);
2411
2412 return SUCCESS;
2413}
2414