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23#ifndef _H_LPFC_DEBUG_FS
24#define _H_LPFC_DEBUG_FS
25
26#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
27
28
29#define LPFC_DEBUG_TRC_ENTRY_SIZE 100
30
31
32#define LPFC_NODELIST_SIZE 8192
33#define LPFC_NODELIST_ENTRY_SIZE 120
34
35
36#define LPFC_DUMPHBASLIM_SIZE 4096
37
38
39#define LPFC_DUMPHOSTSLIM_SIZE 4096
40
41
42#define LPFC_DUMPSLIQINFO_SIZE 4096
43
44
45#define LPFC_HBQINFO_SIZE 8192
46
47
48#define LPFC_NVMESTAT_SIZE 8192
49#define LPFC_IOKTIME_SIZE 8192
50#define LPFC_NVMEIO_TRC_SIZE 8192
51
52
53#define LPFC_SCSISTAT_SIZE 8192
54
55
56#define LPFC_CGN_BUF_SIZE 8192
57
58#define LPFC_DEBUG_OUT_LINE_SZ 80
59
60
61
62
63
64
65#define LPFC_PCI_CFG_BROWSE 0xffff
66#define LPFC_PCI_CFG_RD_CMD_ARG 2
67#define LPFC_PCI_CFG_WR_CMD_ARG 3
68#define LPFC_PCI_CFG_SIZE 4096
69#define LPFC_PCI_CFG_RD_SIZE (LPFC_PCI_CFG_SIZE/4)
70
71#define IDIAG_PCICFG_WHERE_INDX 0
72#define IDIAG_PCICFG_COUNT_INDX 1
73#define IDIAG_PCICFG_VALUE_INDX 2
74
75
76#define LPFC_PCI_BAR_BROWSE 0xffff
77#define LPFC_PCI_BAR_RD_CMD_ARG 3
78#define LPFC_PCI_BAR_WR_CMD_ARG 3
79
80#define LPFC_PCI_IF0_BAR0_SIZE (1024 * 16)
81#define LPFC_PCI_IF0_BAR1_SIZE (1024 * 128)
82#define LPFC_PCI_IF0_BAR2_SIZE (1024 * 128)
83#define LPFC_PCI_IF2_BAR0_SIZE (1024 * 32)
84
85#define LPFC_PCI_BAR_RD_BUF_SIZE 4096
86#define LPFC_PCI_BAR_RD_SIZE (LPFC_PCI_BAR_RD_BUF_SIZE/4)
87
88#define LPFC_PCI_IF0_BAR0_RD_SIZE (LPFC_PCI_IF0_BAR0_SIZE/4)
89#define LPFC_PCI_IF0_BAR1_RD_SIZE (LPFC_PCI_IF0_BAR1_SIZE/4)
90#define LPFC_PCI_IF0_BAR2_RD_SIZE (LPFC_PCI_IF0_BAR2_SIZE/4)
91#define LPFC_PCI_IF2_BAR0_RD_SIZE (LPFC_PCI_IF2_BAR0_SIZE/4)
92
93#define IDIAG_BARACC_BAR_NUM_INDX 0
94#define IDIAG_BARACC_OFF_SET_INDX 1
95#define IDIAG_BARACC_ACC_MOD_INDX 2
96#define IDIAG_BARACC_REG_VAL_INDX 2
97#define IDIAG_BARACC_BAR_SZE_INDX 3
98
99#define IDIAG_BARACC_BAR_0 0
100#define IDIAG_BARACC_BAR_1 1
101#define IDIAG_BARACC_BAR_2 2
102
103#define SINGLE_WORD 1
104
105
106#define LPFC_QUE_INFO_GET_BUF_SIZE 4096
107
108
109#define LPFC_QUE_ACC_BROWSE 0xffff
110#define LPFC_QUE_ACC_RD_CMD_ARG 4
111#define LPFC_QUE_ACC_WR_CMD_ARG 6
112#define LPFC_QUE_ACC_BUF_SIZE 4096
113#define LPFC_QUE_ACC_SIZE (LPFC_QUE_ACC_BUF_SIZE/2)
114
115#define LPFC_IDIAG_EQ 1
116#define LPFC_IDIAG_CQ 2
117#define LPFC_IDIAG_MQ 3
118#define LPFC_IDIAG_WQ 4
119#define LPFC_IDIAG_RQ 5
120
121#define IDIAG_QUEACC_QUETP_INDX 0
122#define IDIAG_QUEACC_QUEID_INDX 1
123#define IDIAG_QUEACC_INDEX_INDX 2
124#define IDIAG_QUEACC_COUNT_INDX 3
125#define IDIAG_QUEACC_OFFST_INDX 4
126#define IDIAG_QUEACC_VALUE_INDX 5
127
128
129#define LPFC_DRB_ACC_ALL 0xffff
130#define LPFC_DRB_ACC_RD_CMD_ARG 1
131#define LPFC_DRB_ACC_WR_CMD_ARG 2
132#define LPFC_DRB_ACC_BUF_SIZE 256
133
134#define LPFC_DRB_EQ 1
135#define LPFC_DRB_CQ 2
136#define LPFC_DRB_MQ 3
137#define LPFC_DRB_WQ 4
138#define LPFC_DRB_RQ 5
139
140#define LPFC_DRB_MAX 5
141
142#define IDIAG_DRBACC_REGID_INDX 0
143#define IDIAG_DRBACC_VALUE_INDX 1
144
145
146#define LPFC_CTL_ACC_ALL 0xffff
147#define LPFC_CTL_ACC_RD_CMD_ARG 1
148#define LPFC_CTL_ACC_WR_CMD_ARG 2
149#define LPFC_CTL_ACC_BUF_SIZE 256
150
151#define LPFC_CTL_PORT_SEM 1
152#define LPFC_CTL_PORT_STA 2
153#define LPFC_CTL_PORT_CTL 3
154#define LPFC_CTL_PORT_ER1 4
155#define LPFC_CTL_PORT_ER2 5
156#define LPFC_CTL_PDEV_CTL 6
157
158#define LPFC_CTL_MAX 6
159
160#define IDIAG_CTLACC_REGID_INDX 0
161#define IDIAG_CTLACC_VALUE_INDX 1
162
163
164#define LPFC_MBX_DMP_ARG 4
165
166#define LPFC_MBX_ACC_BUF_SIZE 512
167#define LPFC_MBX_ACC_LBUF_SZ 128
168
169#define LPFC_MBX_DMP_MBX_WORD 0x00000001
170#define LPFC_MBX_DMP_MBX_BYTE 0x00000002
171#define LPFC_MBX_DMP_MBX_ALL (LPFC_MBX_DMP_MBX_WORD | LPFC_MBX_DMP_MBX_BYTE)
172
173#define LPFC_BSG_DMP_MBX_RD_MBX 0x00000001
174#define LPFC_BSG_DMP_MBX_RD_BUF 0x00000002
175#define LPFC_BSG_DMP_MBX_WR_MBX 0x00000004
176#define LPFC_BSG_DMP_MBX_WR_BUF 0x00000008
177#define LPFC_BSG_DMP_MBX_ALL (LPFC_BSG_DMP_MBX_RD_MBX | \
178 LPFC_BSG_DMP_MBX_RD_BUF | \
179 LPFC_BSG_DMP_MBX_WR_MBX | \
180 LPFC_BSG_DMP_MBX_WR_BUF)
181
182#define LPFC_MBX_DMP_ALL 0xffff
183#define LPFC_MBX_ALL_CMD 0xff
184
185#define IDIAG_MBXACC_MBCMD_INDX 0
186#define IDIAG_MBXACC_DPMAP_INDX 1
187#define IDIAG_MBXACC_DPCNT_INDX 2
188#define IDIAG_MBXACC_WDCNT_INDX 3
189
190
191#define LPFC_EXT_ACC_CMD_ARG 1
192#define LPFC_EXT_ACC_BUF_SIZE 4096
193
194#define LPFC_EXT_ACC_AVAIL 0x1
195#define LPFC_EXT_ACC_ALLOC 0x2
196#define LPFC_EXT_ACC_DRIVR 0x4
197#define LPFC_EXT_ACC_ALL (LPFC_EXT_ACC_DRIVR | \
198 LPFC_EXT_ACC_AVAIL | \
199 LPFC_EXT_ACC_ALLOC)
200
201#define IDIAG_EXTACC_EXMAP_INDX 0
202
203#define SIZE_U8 sizeof(uint8_t)
204#define SIZE_U16 sizeof(uint16_t)
205#define SIZE_U32 sizeof(uint32_t)
206
207#define lpfc_nvmeio_data(phba, fmt, arg...) \
208 { \
209 if (phba->nvmeio_trc_on) \
210 lpfc_debugfs_nvme_trc(phba, fmt, ##arg); \
211 }
212
213struct lpfc_debug {
214 char *i_private;
215 char op;
216#define LPFC_IDIAG_OP_RD 1
217#define LPFC_IDIAG_OP_WR 2
218 char *buffer;
219 int len;
220};
221
222struct lpfc_debugfs_trc {
223 char *fmt;
224 uint32_t data1;
225 uint32_t data2;
226 uint32_t data3;
227 uint32_t seq_cnt;
228 unsigned long jif;
229};
230
231struct lpfc_debugfs_nvmeio_trc {
232 char *fmt;
233 uint16_t data1;
234 uint16_t data2;
235 uint32_t data3;
236};
237
238struct lpfc_idiag_offset {
239 uint32_t last_rd;
240};
241
242#define LPFC_IDIAG_CMD_DATA_SIZE 8
243struct lpfc_idiag_cmd {
244 uint32_t opcode;
245#define LPFC_IDIAG_CMD_PCICFG_RD 0x00000001
246#define LPFC_IDIAG_CMD_PCICFG_WR 0x00000002
247#define LPFC_IDIAG_CMD_PCICFG_ST 0x00000003
248#define LPFC_IDIAG_CMD_PCICFG_CL 0x00000004
249
250#define LPFC_IDIAG_CMD_BARACC_RD 0x00000008
251#define LPFC_IDIAG_CMD_BARACC_WR 0x00000009
252#define LPFC_IDIAG_CMD_BARACC_ST 0x0000000a
253#define LPFC_IDIAG_CMD_BARACC_CL 0x0000000b
254
255#define LPFC_IDIAG_CMD_QUEACC_RD 0x00000011
256#define LPFC_IDIAG_CMD_QUEACC_WR 0x00000012
257#define LPFC_IDIAG_CMD_QUEACC_ST 0x00000013
258#define LPFC_IDIAG_CMD_QUEACC_CL 0x00000014
259
260#define LPFC_IDIAG_CMD_DRBACC_RD 0x00000021
261#define LPFC_IDIAG_CMD_DRBACC_WR 0x00000022
262#define LPFC_IDIAG_CMD_DRBACC_ST 0x00000023
263#define LPFC_IDIAG_CMD_DRBACC_CL 0x00000024
264
265#define LPFC_IDIAG_CMD_CTLACC_RD 0x00000031
266#define LPFC_IDIAG_CMD_CTLACC_WR 0x00000032
267#define LPFC_IDIAG_CMD_CTLACC_ST 0x00000033
268#define LPFC_IDIAG_CMD_CTLACC_CL 0x00000034
269
270#define LPFC_IDIAG_CMD_MBXACC_DP 0x00000041
271#define LPFC_IDIAG_BSG_MBXACC_DP 0x00000042
272
273#define LPFC_IDIAG_CMD_EXTACC_RD 0x00000051
274
275 uint32_t data[LPFC_IDIAG_CMD_DATA_SIZE];
276};
277
278struct lpfc_idiag {
279 uint32_t active;
280 struct lpfc_idiag_cmd cmd;
281 struct lpfc_idiag_offset offset;
282 void *ptr_private;
283};
284
285#define MAX_DEBUGFS_RX_TABLE_SIZE (100 * LPFC_MAX_RXMONITOR_ENTRY)
286struct lpfc_rx_monitor_debug {
287 char *i_private;
288 char *buffer;
289};
290
291#else
292
293#define lpfc_nvmeio_data(phba, fmt, arg...) \
294 no_printk(fmt, ##arg)
295
296#endif
297
298
299#define LPFC_DUMP_MULTIXRIPOOL_SIZE 8192
300
301enum {
302 DUMP_IO,
303 DUMP_MBX,
304 DUMP_ELS,
305 DUMP_NVMELS,
306};
307
308
309#define LPFC_DISC_TRC_ELS_CMD 0x1
310#define LPFC_DISC_TRC_ELS_RSP 0x2
311#define LPFC_DISC_TRC_ELS_UNSOL 0x4
312#define LPFC_DISC_TRC_ELS_ALL 0x7
313#define LPFC_DISC_TRC_MBOX_VPORT 0x8
314#define LPFC_DISC_TRC_MBOX 0x10
315#define LPFC_DISC_TRC_MBOX_ALL 0x18
316#define LPFC_DISC_TRC_CT 0x20
317#define LPFC_DISC_TRC_DSM 0x40
318#define LPFC_DISC_TRC_RPORT 0x80
319#define LPFC_DISC_TRC_NODE 0x100
320
321#define LPFC_DISC_TRC_DISCOVERY 0xef
322
323#endif
324
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337
338
339
340static void
341lpfc_debug_dump_qe(struct lpfc_queue *q, uint32_t idx)
342{
343 char line_buf[LPFC_LBUF_SZ];
344 int i, esize, qe_word_cnt, len;
345 uint32_t *pword;
346
347
348 if (!q)
349 return;
350 if (idx >= q->entry_count)
351 return;
352
353 esize = q->entry_size;
354 qe_word_cnt = esize / sizeof(uint32_t);
355 pword = lpfc_sli4_qe(q, idx);
356
357 len = 0;
358 len += scnprintf(line_buf+len, LPFC_LBUF_SZ-len, "QE[%04d]: ", idx);
359 if (qe_word_cnt > 8)
360 printk(KERN_ERR "%s\n", line_buf);
361
362 for (i = 0; i < qe_word_cnt; i++) {
363 if (!(i % 8)) {
364 if (i != 0)
365 printk(KERN_ERR "%s\n", line_buf);
366 if (qe_word_cnt > 8) {
367 len = 0;
368 memset(line_buf, 0, LPFC_LBUF_SZ);
369 len += scnprintf(line_buf+len, LPFC_LBUF_SZ-len,
370 "%03d: ", i);
371 }
372 }
373 len += scnprintf(line_buf+len, LPFC_LBUF_SZ-len, "%08x ",
374 ((uint32_t)*pword) & 0xffffffff);
375 pword++;
376 }
377 if (qe_word_cnt <= 8 || (i - 1) % 8)
378 printk(KERN_ERR "%s\n", line_buf);
379}
380
381
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384
385
386
387
388static inline void
389lpfc_debug_dump_q(struct lpfc_queue *q)
390{
391 int idx, entry_count;
392
393
394 if (!q)
395 return;
396
397 dev_printk(KERN_ERR, &(((q->phba))->pcidev)->dev,
398 "%d: [qid:%d, type:%d, subtype:%d, "
399 "qe_size:%d, qe_count:%d, "
400 "host_index:%d, port_index:%d]\n",
401 (q->phba)->brd_no,
402 q->queue_id, q->type, q->subtype,
403 q->entry_size, q->entry_count,
404 q->host_index, q->hba_index);
405 entry_count = q->entry_count;
406 for (idx = 0; idx < entry_count; idx++)
407 lpfc_debug_dump_qe(q, idx);
408 printk(KERN_ERR "\n");
409}
410
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415
416
417
418
419static inline void
420lpfc_debug_dump_wq(struct lpfc_hba *phba, int qtype, int wqidx)
421{
422 struct lpfc_queue *wq;
423 char *qtypestr;
424
425 if (qtype == DUMP_IO) {
426 wq = phba->sli4_hba.hdwq[wqidx].io_wq;
427 qtypestr = "IO";
428 } else if (qtype == DUMP_MBX) {
429 wq = phba->sli4_hba.mbx_wq;
430 qtypestr = "MBX";
431 } else if (qtype == DUMP_ELS) {
432 wq = phba->sli4_hba.els_wq;
433 qtypestr = "ELS";
434 } else if (qtype == DUMP_NVMELS) {
435 wq = phba->sli4_hba.nvmels_wq;
436 qtypestr = "NVMELS";
437 } else
438 return;
439
440 if (qtype == DUMP_IO)
441 pr_err("%s WQ: WQ[Idx:%d|Qid:%d]\n",
442 qtypestr, wqidx, wq->queue_id);
443 else
444 pr_err("%s WQ: WQ[Qid:%d]\n",
445 qtypestr, wq->queue_id);
446
447 lpfc_debug_dump_q(wq);
448}
449
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452
453
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455
456
457
458
459static inline void
460lpfc_debug_dump_cq(struct lpfc_hba *phba, int qtype, int wqidx)
461{
462 struct lpfc_queue *wq, *cq, *eq;
463 char *qtypestr;
464 int eqidx;
465
466
467 eq = NULL;
468
469 if (qtype == DUMP_IO) {
470 wq = phba->sli4_hba.hdwq[wqidx].io_wq;
471 cq = phba->sli4_hba.hdwq[wqidx].io_cq;
472 qtypestr = "IO";
473 } else if (qtype == DUMP_MBX) {
474 wq = phba->sli4_hba.mbx_wq;
475 cq = phba->sli4_hba.mbx_cq;
476 qtypestr = "MBX";
477 } else if (qtype == DUMP_ELS) {
478 wq = phba->sli4_hba.els_wq;
479 cq = phba->sli4_hba.els_cq;
480 qtypestr = "ELS";
481 } else if (qtype == DUMP_NVMELS) {
482 wq = phba->sli4_hba.nvmels_wq;
483 cq = phba->sli4_hba.nvmels_cq;
484 qtypestr = "NVMELS";
485 } else
486 return;
487
488 for (eqidx = 0; eqidx < phba->cfg_hdw_queue; eqidx++) {
489 eq = phba->sli4_hba.hdwq[eqidx].hba_eq;
490 if (cq->assoc_qid == eq->queue_id)
491 break;
492 }
493 if (eqidx == phba->cfg_hdw_queue) {
494 pr_err("Couldn't find EQ for CQ. Using EQ[0]\n");
495 eqidx = 0;
496 eq = phba->sli4_hba.hdwq[0].hba_eq;
497 }
498
499 if (qtype == DUMP_IO)
500 pr_err("%s CQ: WQ[Idx:%d|Qid%d]->CQ[Idx%d|Qid%d]"
501 "->EQ[Idx:%d|Qid:%d]:\n",
502 qtypestr, wqidx, wq->queue_id, wqidx, cq->queue_id,
503 eqidx, eq->queue_id);
504 else
505 pr_err("%s CQ: WQ[Qid:%d]->CQ[Qid:%d]"
506 "->EQ[Idx:%d|Qid:%d]:\n",
507 qtypestr, wq->queue_id, cq->queue_id,
508 eqidx, eq->queue_id);
509
510 lpfc_debug_dump_q(cq);
511}
512
513
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515
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517
518
519
520
521static inline void
522lpfc_debug_dump_hba_eq(struct lpfc_hba *phba, int qidx)
523{
524 struct lpfc_queue *qp;
525
526 qp = phba->sli4_hba.hdwq[qidx].hba_eq;
527
528 pr_err("EQ[Idx:%d|Qid:%d]\n", qidx, qp->queue_id);
529
530 lpfc_debug_dump_q(qp);
531}
532
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537
538
539static inline void
540lpfc_debug_dump_dat_rq(struct lpfc_hba *phba)
541{
542 printk(KERN_ERR "DAT RQ: RQ[Qid:%d]\n",
543 phba->sli4_hba.dat_rq->queue_id);
544 lpfc_debug_dump_q(phba->sli4_hba.dat_rq);
545}
546
547
548
549
550
551
552
553static inline void
554lpfc_debug_dump_hdr_rq(struct lpfc_hba *phba)
555{
556 printk(KERN_ERR "HDR RQ: RQ[Qid:%d]\n",
557 phba->sli4_hba.hdr_rq->queue_id);
558 lpfc_debug_dump_q(phba->sli4_hba.hdr_rq);
559}
560
561
562
563
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565
566
567
568
569static inline void
570lpfc_debug_dump_wq_by_id(struct lpfc_hba *phba, int qid)
571{
572 int wq_idx;
573
574 for (wq_idx = 0; wq_idx < phba->cfg_hdw_queue; wq_idx++)
575 if (phba->sli4_hba.hdwq[wq_idx].io_wq->queue_id == qid)
576 break;
577 if (wq_idx < phba->cfg_hdw_queue) {
578 pr_err("IO WQ[Idx:%d|Qid:%d]\n", wq_idx, qid);
579 lpfc_debug_dump_q(phba->sli4_hba.hdwq[wq_idx].io_wq);
580 return;
581 }
582
583 if (phba->sli4_hba.els_wq->queue_id == qid) {
584 pr_err("ELS WQ[Qid:%d]\n", qid);
585 lpfc_debug_dump_q(phba->sli4_hba.els_wq);
586 return;
587 }
588
589 if (phba->sli4_hba.nvmels_wq->queue_id == qid) {
590 pr_err("NVME LS WQ[Qid:%d]\n", qid);
591 lpfc_debug_dump_q(phba->sli4_hba.nvmels_wq);
592 }
593}
594
595
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597
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599
600
601
602
603static inline void
604lpfc_debug_dump_mq_by_id(struct lpfc_hba *phba, int qid)
605{
606 if (phba->sli4_hba.mbx_wq->queue_id == qid) {
607 printk(KERN_ERR "MBX WQ[Qid:%d]\n", qid);
608 lpfc_debug_dump_q(phba->sli4_hba.mbx_wq);
609 }
610}
611
612
613
614
615
616
617
618
619
620static inline void
621lpfc_debug_dump_rq_by_id(struct lpfc_hba *phba, int qid)
622{
623 if (phba->sli4_hba.hdr_rq->queue_id == qid) {
624 printk(KERN_ERR "HDR RQ[Qid:%d]\n", qid);
625 lpfc_debug_dump_q(phba->sli4_hba.hdr_rq);
626 return;
627 }
628 if (phba->sli4_hba.dat_rq->queue_id == qid) {
629 printk(KERN_ERR "DAT RQ[Qid:%d]\n", qid);
630 lpfc_debug_dump_q(phba->sli4_hba.dat_rq);
631 }
632}
633
634
635
636
637
638
639
640
641
642static inline void
643lpfc_debug_dump_cq_by_id(struct lpfc_hba *phba, int qid)
644{
645 int cq_idx;
646
647 for (cq_idx = 0; cq_idx < phba->cfg_hdw_queue; cq_idx++)
648 if (phba->sli4_hba.hdwq[cq_idx].io_cq->queue_id == qid)
649 break;
650
651 if (cq_idx < phba->cfg_hdw_queue) {
652 pr_err("IO CQ[Idx:%d|Qid:%d]\n", cq_idx, qid);
653 lpfc_debug_dump_q(phba->sli4_hba.hdwq[cq_idx].io_cq);
654 return;
655 }
656
657 if (phba->sli4_hba.els_cq->queue_id == qid) {
658 pr_err("ELS CQ[Qid:%d]\n", qid);
659 lpfc_debug_dump_q(phba->sli4_hba.els_cq);
660 return;
661 }
662
663 if (phba->sli4_hba.nvmels_cq->queue_id == qid) {
664 pr_err("NVME LS CQ[Qid:%d]\n", qid);
665 lpfc_debug_dump_q(phba->sli4_hba.nvmels_cq);
666 return;
667 }
668
669 if (phba->sli4_hba.mbx_cq->queue_id == qid) {
670 pr_err("MBX CQ[Qid:%d]\n", qid);
671 lpfc_debug_dump_q(phba->sli4_hba.mbx_cq);
672 }
673}
674
675
676
677
678
679
680
681
682
683static inline void
684lpfc_debug_dump_eq_by_id(struct lpfc_hba *phba, int qid)
685{
686 int eq_idx;
687
688 for (eq_idx = 0; eq_idx < phba->cfg_hdw_queue; eq_idx++)
689 if (phba->sli4_hba.hdwq[eq_idx].hba_eq->queue_id == qid)
690 break;
691
692 if (eq_idx < phba->cfg_hdw_queue) {
693 printk(KERN_ERR "FCP EQ[Idx:%d|Qid:%d]\n", eq_idx, qid);
694 lpfc_debug_dump_q(phba->sli4_hba.hdwq[eq_idx].hba_eq);
695 return;
696 }
697}
698
699void lpfc_debug_dump_all_queues(struct lpfc_hba *);
700