linux/drivers/scsi/nsp32.c
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   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
   4 * Copyright (C) 2001, 2002, 2003
   5 *      YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
   6 *      GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
   7 *
   8 * Revision History:
   9 *   1.0: Initial Release.
  10 *   1.1: Add /proc SDTR status.
  11 *        Remove obsolete error handler nsp32_reset.
  12 *        Some clean up.
  13 *   1.2: PowerPC (big endian) support.
  14 */
  15
  16#include <linux/module.h>
  17#include <linux/init.h>
  18#include <linux/kernel.h>
  19#include <linux/string.h>
  20#include <linux/timer.h>
  21#include <linux/ioport.h>
  22#include <linux/major.h>
  23#include <linux/blkdev.h>
  24#include <linux/interrupt.h>
  25#include <linux/pci.h>
  26#include <linux/delay.h>
  27#include <linux/ctype.h>
  28#include <linux/dma-mapping.h>
  29
  30#include <asm/dma.h>
  31#include <asm/io.h>
  32
  33#include <scsi/scsi.h>
  34#include <scsi/scsi_cmnd.h>
  35#include <scsi/scsi_device.h>
  36#include <scsi/scsi_host.h>
  37#include <scsi/scsi_ioctl.h>
  38
  39#include "nsp32.h"
  40
  41
  42/***********************************************************************
  43 * Module parameters
  44 */
  45static int       trans_mode = 0;        /* default: BIOS */
  46module_param     (trans_mode, int, 0);
  47MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
  48#define ASYNC_MODE    1
  49#define ULTRA20M_MODE 2
  50
  51static bool      auto_param = 0;        /* default: ON */
  52module_param     (auto_param, bool, 0);
  53MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
  54
  55static bool      disc_priv  = 1;        /* default: OFF */
  56module_param     (disc_priv, bool, 0);
  57MODULE_PARM_DESC(disc_priv,  "disconnection privilege mode (0: ON 1: OFF(default))");
  58
  59MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
  60MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
  61MODULE_LICENSE("GPL");
  62
  63static const char *nsp32_release_version = "1.2";
  64
  65
  66/****************************************************************************
  67 * Supported hardware
  68 */
  69static struct pci_device_id nsp32_pci_table[] = {
  70        {
  71                .vendor      = PCI_VENDOR_ID_IODATA,
  72                .device      = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
  73                .subvendor   = PCI_ANY_ID,
  74                .subdevice   = PCI_ANY_ID,
  75                .driver_data = MODEL_IODATA,
  76        },
  77        {
  78                .vendor      = PCI_VENDOR_ID_WORKBIT,
  79                .device      = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
  80                .subvendor   = PCI_ANY_ID,
  81                .subdevice   = PCI_ANY_ID,
  82                .driver_data = MODEL_KME,
  83        },
  84        {
  85                .vendor      = PCI_VENDOR_ID_WORKBIT,
  86                .device      = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
  87                .subvendor   = PCI_ANY_ID,
  88                .subdevice   = PCI_ANY_ID,
  89                .driver_data = MODEL_WORKBIT,
  90        },
  91        {
  92                .vendor      = PCI_VENDOR_ID_WORKBIT,
  93                .device      = PCI_DEVICE_ID_WORKBIT_STANDARD,
  94                .subvendor   = PCI_ANY_ID,
  95                .subdevice   = PCI_ANY_ID,
  96                .driver_data = MODEL_PCI_WORKBIT,
  97        },
  98        {
  99                .vendor      = PCI_VENDOR_ID_WORKBIT,
 100                .device      = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
 101                .subvendor   = PCI_ANY_ID,
 102                .subdevice   = PCI_ANY_ID,
 103                .driver_data = MODEL_LOGITEC,
 104        },
 105        {
 106                .vendor      = PCI_VENDOR_ID_WORKBIT,
 107                .device      = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
 108                .subvendor   = PCI_ANY_ID,
 109                .subdevice   = PCI_ANY_ID,
 110                .driver_data = MODEL_PCI_LOGITEC,
 111        },
 112        {
 113                .vendor      = PCI_VENDOR_ID_WORKBIT,
 114                .device      = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
 115                .subvendor   = PCI_ANY_ID,
 116                .subdevice   = PCI_ANY_ID,
 117                .driver_data = MODEL_PCI_MELCO,
 118        },
 119        {
 120                .vendor      = PCI_VENDOR_ID_WORKBIT,
 121                .device      = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
 122                .subvendor   = PCI_ANY_ID,
 123                .subdevice   = PCI_ANY_ID,
 124                .driver_data = MODEL_PCI_MELCO,
 125        },
 126        {0,0,},
 127};
 128MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
 129
 130static nsp32_hw_data nsp32_data_base;  /* probe <-> detect glue */
 131
 132
 133/*
 134 * Period/AckWidth speed conversion table
 135 *
 136 * Note: This period/ackwidth speed table must be in descending order.
 137 */
 138static nsp32_sync_table nsp32_sync_table_40M[] = {
 139     /* {PNo, AW,   SP,   EP, SREQ smpl}  Speed(MB/s) Period AckWidth */
 140        {0x1,  0, 0x0c, 0x0c, SMPL_40M},  /*  20.0 :  50ns,  25ns */
 141        {0x2,  0, 0x0d, 0x18, SMPL_40M},  /*  13.3 :  75ns,  25ns */
 142        {0x3,  1, 0x19, 0x19, SMPL_40M},  /*  10.0 : 100ns,  50ns */
 143        {0x4,  1, 0x1a, 0x1f, SMPL_20M},  /*   8.0 : 125ns,  50ns */
 144        {0x5,  2, 0x20, 0x25, SMPL_20M},  /*   6.7 : 150ns,  75ns */
 145        {0x6,  2, 0x26, 0x31, SMPL_20M},  /*   5.7 : 175ns,  75ns */
 146        {0x7,  3, 0x32, 0x32, SMPL_20M},  /*   5.0 : 200ns, 100ns */
 147        {0x8,  3, 0x33, 0x38, SMPL_10M},  /*   4.4 : 225ns, 100ns */
 148        {0x9,  3, 0x39, 0x3e, SMPL_10M},  /*   4.0 : 250ns, 100ns */
 149};
 150
 151static nsp32_sync_table nsp32_sync_table_20M[] = {
 152        {0x1,  0, 0x19, 0x19, SMPL_40M},  /* 10.0 : 100ns,  50ns */
 153        {0x2,  0, 0x1a, 0x25, SMPL_20M},  /*  6.7 : 150ns,  50ns */
 154        {0x3,  1, 0x26, 0x32, SMPL_20M},  /*  5.0 : 200ns, 100ns */
 155        {0x4,  1, 0x33, 0x3e, SMPL_10M},  /*  4.0 : 250ns, 100ns */
 156        {0x5,  2, 0x3f, 0x4b, SMPL_10M},  /*  3.3 : 300ns, 150ns */
 157        {0x6,  2, 0x4c, 0x57, SMPL_10M},  /*  2.8 : 350ns, 150ns */
 158        {0x7,  3, 0x58, 0x64, SMPL_10M},  /*  2.5 : 400ns, 200ns */
 159        {0x8,  3, 0x65, 0x70, SMPL_10M},  /*  2.2 : 450ns, 200ns */
 160        {0x9,  3, 0x71, 0x7d, SMPL_10M},  /*  2.0 : 500ns, 200ns */
 161};
 162
 163static nsp32_sync_table nsp32_sync_table_pci[] = {
 164        {0x1,  0, 0x0c, 0x0f, SMPL_40M},  /* 16.6 :  60ns,  30ns */
 165        {0x2,  0, 0x10, 0x16, SMPL_40M},  /* 11.1 :  90ns,  30ns */
 166        {0x3,  1, 0x17, 0x1e, SMPL_20M},  /*  8.3 : 120ns,  60ns */
 167        {0x4,  1, 0x1f, 0x25, SMPL_20M},  /*  6.7 : 150ns,  60ns */
 168        {0x5,  2, 0x26, 0x2d, SMPL_20M},  /*  5.6 : 180ns,  90ns */
 169        {0x6,  2, 0x2e, 0x34, SMPL_10M},  /*  4.8 : 210ns,  90ns */
 170        {0x7,  3, 0x35, 0x3c, SMPL_10M},  /*  4.2 : 240ns, 120ns */
 171        {0x8,  3, 0x3d, 0x43, SMPL_10M},  /*  3.7 : 270ns, 120ns */
 172        {0x9,  3, 0x44, 0x4b, SMPL_10M},  /*  3.3 : 300ns, 120ns */
 173};
 174
 175/*
 176 * function declaration
 177 */
 178/* module entry point */
 179static int nsp32_probe (struct pci_dev *, const struct pci_device_id *);
 180static void nsp32_remove(struct pci_dev *);
 181static int  __init init_nsp32  (void);
 182static void __exit exit_nsp32  (void);
 183
 184/* struct struct scsi_host_template */
 185static int         nsp32_show_info   (struct seq_file *, struct Scsi_Host *);
 186
 187static int         nsp32_detect      (struct pci_dev *pdev);
 188static int         nsp32_queuecommand(struct Scsi_Host *, struct scsi_cmnd *);
 189static const char *nsp32_info        (struct Scsi_Host *);
 190static int         nsp32_release     (struct Scsi_Host *);
 191
 192/* SCSI error handler */
 193static int         nsp32_eh_abort     (struct scsi_cmnd *);
 194static int         nsp32_eh_host_reset(struct scsi_cmnd *);
 195
 196/* generate SCSI message */
 197static void nsp32_build_identify(struct scsi_cmnd *);
 198static void nsp32_build_nop     (struct scsi_cmnd *);
 199static void nsp32_build_reject  (struct scsi_cmnd *);
 200static void nsp32_build_sdtr    (struct scsi_cmnd *, unsigned char,
 201                                 unsigned char);
 202
 203/* SCSI message handler */
 204static int  nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
 205static void nsp32_msgout_occur (struct scsi_cmnd *);
 206static void nsp32_msgin_occur  (struct scsi_cmnd *, unsigned long,
 207                                unsigned short);
 208
 209static int  nsp32_setup_sg_table    (struct scsi_cmnd *);
 210static int  nsp32_selection_autopara(struct scsi_cmnd *);
 211static int  nsp32_selection_autoscsi(struct scsi_cmnd *);
 212static void nsp32_scsi_done         (struct scsi_cmnd *);
 213static int  nsp32_arbitration       (struct scsi_cmnd *, unsigned int);
 214static int  nsp32_reselection       (struct scsi_cmnd *, unsigned char);
 215static void nsp32_adjust_busfree    (struct scsi_cmnd *, unsigned int);
 216static void nsp32_restart_autoscsi  (struct scsi_cmnd *, unsigned short);
 217
 218/* SCSI SDTR */
 219static void nsp32_analyze_sdtr       (struct scsi_cmnd *);
 220static int  nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *,
 221                                      unsigned char);
 222static void nsp32_set_async          (nsp32_hw_data *, nsp32_target *);
 223static void nsp32_set_max_sync       (nsp32_hw_data *, nsp32_target *,
 224                                      unsigned char *, unsigned char *);
 225static void nsp32_set_sync_entry     (nsp32_hw_data *, nsp32_target *,
 226                                      int, unsigned char);
 227
 228/* SCSI bus status handler */
 229static void nsp32_wait_req    (nsp32_hw_data *, int);
 230static void nsp32_wait_sack   (nsp32_hw_data *, int);
 231static void nsp32_sack_assert (nsp32_hw_data *);
 232static void nsp32_sack_negate (nsp32_hw_data *);
 233static void nsp32_do_bus_reset(nsp32_hw_data *);
 234
 235/* hardware interrupt handler */
 236static irqreturn_t do_nsp32_isr(int, void *);
 237
 238/* initialize hardware */
 239static int  nsp32hw_init(nsp32_hw_data *);
 240
 241/* EEPROM handler */
 242static int  nsp32_getprom_param (nsp32_hw_data *);
 243static int  nsp32_getprom_at24  (nsp32_hw_data *);
 244static int  nsp32_getprom_c16   (nsp32_hw_data *);
 245static void nsp32_prom_start    (nsp32_hw_data *);
 246static void nsp32_prom_stop     (nsp32_hw_data *);
 247static int  nsp32_prom_read     (nsp32_hw_data *, int);
 248static int  nsp32_prom_read_bit (nsp32_hw_data *);
 249static void nsp32_prom_write_bit(nsp32_hw_data *, int);
 250static void nsp32_prom_set      (nsp32_hw_data *, int, int);
 251static int  nsp32_prom_get      (nsp32_hw_data *, int);
 252
 253/* debug/warning/info message */
 254static void nsp32_message (const char *, int, char *, char *, ...);
 255#ifdef NSP32_DEBUG
 256static void nsp32_dmessage(const char *, int, int,    char *, ...);
 257#endif
 258
 259/*
 260 * max_sectors is currently limited up to 128.
 261 */
 262static struct scsi_host_template nsp32_template = {
 263        .proc_name                      = "nsp32",
 264        .name                           = "Workbit NinjaSCSI-32Bi/UDE",
 265        .show_info                      = nsp32_show_info,
 266        .info                           = nsp32_info,
 267        .queuecommand                   = nsp32_queuecommand,
 268        .can_queue                      = 1,
 269        .sg_tablesize                   = NSP32_SG_SIZE,
 270        .max_sectors                    = 128,
 271        .this_id                        = NSP32_HOST_SCSIID,
 272        .dma_boundary                   = PAGE_SIZE - 1,
 273        .eh_abort_handler               = nsp32_eh_abort,
 274        .eh_host_reset_handler          = nsp32_eh_host_reset,
 275/*      .highmem_io                     = 1, */
 276};
 277
 278#include "nsp32_io.h"
 279
 280/***********************************************************************
 281 * debug, error print
 282 */
 283#ifndef NSP32_DEBUG
 284# define NSP32_DEBUG_MASK             0x000000
 285# define nsp32_msg(type, args...)     nsp32_message ("", 0, (type), args)
 286# define nsp32_dbg(mask, args...)     /* */
 287#else
 288# define NSP32_DEBUG_MASK             0xffffff
 289# define nsp32_msg(type, args...) \
 290        nsp32_message (__func__, __LINE__, (type), args)
 291# define nsp32_dbg(mask, args...) \
 292        nsp32_dmessage(__func__, __LINE__, (mask), args)
 293#endif
 294
 295#define NSP32_DEBUG_QUEUECOMMAND        BIT(0)
 296#define NSP32_DEBUG_REGISTER            BIT(1)
 297#define NSP32_DEBUG_AUTOSCSI            BIT(2)
 298#define NSP32_DEBUG_INTR                BIT(3)
 299#define NSP32_DEBUG_SGLIST              BIT(4)
 300#define NSP32_DEBUG_BUSFREE             BIT(5)
 301#define NSP32_DEBUG_CDB_CONTENTS        BIT(6)
 302#define NSP32_DEBUG_RESELECTION         BIT(7)
 303#define NSP32_DEBUG_MSGINOCCUR          BIT(8)
 304#define NSP32_DEBUG_EEPROM              BIT(9)
 305#define NSP32_DEBUG_MSGOUTOCCUR         BIT(10)
 306#define NSP32_DEBUG_BUSRESET            BIT(11)
 307#define NSP32_DEBUG_RESTART             BIT(12)
 308#define NSP32_DEBUG_SYNC                BIT(13)
 309#define NSP32_DEBUG_WAIT                BIT(14)
 310#define NSP32_DEBUG_TARGETFLAG          BIT(15)
 311#define NSP32_DEBUG_PROC                BIT(16)
 312#define NSP32_DEBUG_INIT                BIT(17)
 313#define NSP32_SPECIAL_PRINT_REGISTER    BIT(20)
 314
 315#define NSP32_DEBUG_BUF_LEN             100
 316
 317__printf(4, 5)
 318static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
 319{
 320        va_list args;
 321        char buf[NSP32_DEBUG_BUF_LEN];
 322
 323        va_start(args, fmt);
 324        vsnprintf(buf, sizeof(buf), fmt, args);
 325        va_end(args);
 326
 327#ifndef NSP32_DEBUG
 328        printk("%snsp32: %s\n", type, buf);
 329#else
 330        printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
 331#endif
 332}
 333
 334#ifdef NSP32_DEBUG
 335static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
 336{
 337        va_list args;
 338        char buf[NSP32_DEBUG_BUF_LEN];
 339
 340        va_start(args, fmt);
 341        vsnprintf(buf, sizeof(buf), fmt, args);
 342        va_end(args);
 343
 344        if (mask & NSP32_DEBUG_MASK) {
 345                printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
 346        }
 347}
 348#endif
 349
 350#ifdef NSP32_DEBUG
 351# include "nsp32_debug.c"
 352#else
 353# define show_command(arg)   /* */
 354# define show_busphase(arg)  /* */
 355# define show_autophase(arg) /* */
 356#endif
 357
 358/*
 359 * IDENTIFY Message
 360 */
 361static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
 362{
 363        nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
 364        int pos             = data->msgout_len;
 365        int mode            = FALSE;
 366
 367        /* XXX: Auto DiscPriv detection is progressing... */
 368        if (disc_priv == 0) {
 369                /* mode = TRUE; */
 370        }
 371
 372        data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
 373
 374        data->msgout_len = pos;
 375}
 376
 377/*
 378 * SDTR Message Routine
 379 */
 380static void nsp32_build_sdtr(struct scsi_cmnd    *SCpnt,
 381                             unsigned char period,
 382                             unsigned char offset)
 383{
 384        nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
 385        int pos = data->msgout_len;
 386
 387        data->msgoutbuf[pos] = EXTENDED_MESSAGE;  pos++;
 388        data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
 389        data->msgoutbuf[pos] = EXTENDED_SDTR;     pos++;
 390        data->msgoutbuf[pos] = period;            pos++;
 391        data->msgoutbuf[pos] = offset;            pos++;
 392
 393        data->msgout_len = pos;
 394}
 395
 396/*
 397 * No Operation Message
 398 */
 399static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
 400{
 401        nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
 402        int pos  = data->msgout_len;
 403
 404        if (pos != 0) {
 405                nsp32_msg(KERN_WARNING,
 406                          "Some messages are already contained!");
 407                return;
 408        }
 409
 410        data->msgoutbuf[pos] = NOP; pos++;
 411        data->msgout_len = pos;
 412}
 413
 414/*
 415 * Reject Message
 416 */
 417static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
 418{
 419        nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
 420        int pos  = data->msgout_len;
 421
 422        data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
 423        data->msgout_len = pos;
 424}
 425
 426/*
 427 * timer
 428 */
 429#if 0
 430static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
 431{
 432        unsigned int base = SCpnt->host->io_port;
 433
 434        nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
 435
 436        if (time & (~TIMER_CNT_MASK)) {
 437                nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
 438        }
 439
 440        nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
 441}
 442#endif
 443
 444
 445/*
 446 * set SCSI command and other parameter to asic, and start selection phase
 447 */
 448static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
 449{
 450        nsp32_hw_data  *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
 451        unsigned int    base    = SCpnt->device->host->io_port;
 452        unsigned int    host_id = SCpnt->device->host->this_id;
 453        unsigned char   target  = scmd_id(SCpnt);
 454        nsp32_autoparam *param  = data->autoparam;
 455        unsigned char   phase;
 456        int             i, ret;
 457        unsigned int    msgout;
 458        u16_le          s;
 459
 460        nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
 461
 462        /*
 463         * check bus free
 464         */
 465        phase = nsp32_read1(base, SCSI_BUS_MONITOR);
 466        if (phase != BUSMON_BUS_FREE) {
 467                nsp32_msg(KERN_WARNING, "bus busy");
 468                show_busphase(phase & BUSMON_PHASE_MASK);
 469                SCpnt->result = DID_BUS_BUSY << 16;
 470                return FALSE;
 471        }
 472
 473        /*
 474         * message out
 475         *
 476         * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
 477         *       over 3 messages needs another routine.
 478         */
 479        if (data->msgout_len == 0) {
 480                nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
 481                SCpnt->result = DID_ERROR << 16;
 482                return FALSE;
 483        } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
 484                msgout = 0;
 485                for (i = 0; i < data->msgout_len; i++) {
 486                        /*
 487                         * the sending order of the message is:
 488                         *  MCNT 3: MSG#0 -> MSG#1 -> MSG#2
 489                         *  MCNT 2:          MSG#1 -> MSG#2
 490                         *  MCNT 1:                   MSG#2
 491                         */
 492                        msgout >>= 8;
 493                        msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
 494                }
 495                msgout |= MV_VALID;     /* MV valid */
 496                msgout |= (unsigned int)data->msgout_len; /* len */
 497        } else {
 498                /* data->msgout_len > 3 */
 499                msgout = 0;
 500        }
 501
 502        // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n",
 503        // nsp32_read2(base, SEL_TIME_OUT));
 504        // nsp32_write2(base, SEL_TIME_OUT,   SEL_TIMEOUT_TIME);
 505
 506        /*
 507         * setup asic parameter
 508         */
 509        memset(param, 0, sizeof(nsp32_autoparam));
 510
 511        /* cdb */
 512        for (i = 0; i < SCpnt->cmd_len; i++) {
 513                param->cdb[4 * i] = SCpnt->cmnd[i];
 514        }
 515
 516        /* outgoing messages */
 517        param->msgout = cpu_to_le32(msgout);
 518
 519        /* syncreg, ackwidth, target id, SREQ sampling rate */
 520        param->syncreg    = data->cur_target->syncreg;
 521        param->ackwidth   = data->cur_target->ackwidth;
 522        param->target_id  = BIT(host_id) | BIT(target);
 523        param->sample_reg = data->cur_target->sample_reg;
 524
 525        // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
 526
 527        /* command control */
 528        param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
 529                                             AUTOSCSI_START |
 530                                             AUTO_MSGIN_00_OR_04 |
 531                                             AUTO_MSGIN_02 |
 532                                             AUTO_ATN );
 533
 534
 535        /* transfer control */
 536        s = 0;
 537        switch (data->trans_method) {
 538        case NSP32_TRANSFER_BUSMASTER:
 539                s |= BM_START;
 540                break;
 541        case NSP32_TRANSFER_MMIO:
 542                s |= CB_MMIO_MODE;
 543                break;
 544        case NSP32_TRANSFER_PIO:
 545                s |= CB_IO_MODE;
 546                break;
 547        default:
 548                nsp32_msg(KERN_ERR, "unknown trans_method");
 549                break;
 550        }
 551        /*
 552         * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
 553         * For bus master transfer, it's taken off.
 554         */
 555        s |= (TRANSFER_GO | ALL_COUNTER_CLR);
 556        param->transfer_control = cpu_to_le16(s);
 557
 558        /* sg table addr */
 559        param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
 560
 561        /*
 562         * transfer parameter to ASIC
 563         */
 564        nsp32_write4(base, SGT_ADR, data->auto_paddr);
 565        nsp32_write2(base, COMMAND_CONTROL,
 566                     CLEAR_CDB_FIFO_POINTER | AUTO_PARAMETER );
 567
 568        /*
 569         * Check arbitration
 570         */
 571        ret = nsp32_arbitration(SCpnt, base);
 572
 573        return ret;
 574}
 575
 576
 577/*
 578 * Selection with AUTO SCSI (without AUTO PARAMETER)
 579 */
 580static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
 581{
 582        nsp32_hw_data  *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
 583        unsigned int    base    = SCpnt->device->host->io_port;
 584        unsigned int    host_id = SCpnt->device->host->this_id;
 585        unsigned char   target  = scmd_id(SCpnt);
 586        unsigned char   phase;
 587        int             status;
 588        unsigned short  command = 0;
 589        unsigned int    msgout  = 0;
 590        int             i;
 591
 592        nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
 593
 594        /*
 595         * IRQ disable
 596         */
 597        nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
 598
 599        /*
 600         * check bus line
 601         */
 602        phase = nsp32_read1(base, SCSI_BUS_MONITOR);
 603        if ((phase & BUSMON_BSY) || (phase & BUSMON_SEL)) {
 604                nsp32_msg(KERN_WARNING, "bus busy");
 605                SCpnt->result = DID_BUS_BUSY << 16;
 606                status = 1;
 607                goto out;
 608        }
 609
 610        /*
 611         * clear execph
 612         */
 613        nsp32_read2(base, SCSI_EXECUTE_PHASE);
 614
 615        /*
 616         * clear FIFO counter to set CDBs
 617         */
 618        nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
 619
 620        /*
 621         * set CDB0 - CDB15
 622         */
 623        for (i = 0; i < SCpnt->cmd_len; i++) {
 624                nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
 625        }
 626        nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
 627
 628        /*
 629         * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
 630         */
 631        nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID,
 632                     BIT(host_id) | BIT(target));
 633
 634        /*
 635         * set SCSI MSGOUT REG
 636         *
 637         * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
 638         *       over 3 messages needs another routine.
 639         */
 640        if (data->msgout_len == 0) {
 641                nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
 642                SCpnt->result = DID_ERROR << 16;
 643                status = 1;
 644                goto out;
 645        } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
 646                msgout = 0;
 647                for (i = 0; i < data->msgout_len; i++) {
 648                        /*
 649                         * the sending order of the message is:
 650                         *  MCNT 3: MSG#0 -> MSG#1 -> MSG#2
 651                         *  MCNT 2:          MSG#1 -> MSG#2
 652                         *  MCNT 1:                   MSG#2
 653                         */
 654                        msgout >>= 8;
 655                        msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
 656                }
 657                msgout |= MV_VALID;     /* MV valid */
 658                msgout |= (unsigned int)data->msgout_len; /* len */
 659                nsp32_write4(base, SCSI_MSG_OUT, msgout);
 660        } else {
 661                /* data->msgout_len > 3 */
 662                nsp32_write4(base, SCSI_MSG_OUT, 0);
 663        }
 664
 665        /*
 666         * set selection timeout(= 250ms)
 667         */
 668        nsp32_write2(base, SEL_TIME_OUT,   SEL_TIMEOUT_TIME);
 669
 670        /*
 671         * set SREQ hazard killer sampling rate
 672         *
 673         * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
 674         *      check other internal clock!
 675         */
 676        nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
 677
 678        /*
 679         * clear Arbit
 680         */
 681        nsp32_write1(base, SET_ARBIT,      ARBIT_CLEAR);
 682
 683        /*
 684         * set SYNCREG
 685         * Don't set BM_START_ADR before setting this register.
 686         */
 687        nsp32_write1(base, SYNC_REG,  data->cur_target->syncreg);
 688
 689        /*
 690         * set ACKWIDTH
 691         */
 692        nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
 693
 694        nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
 695                  "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
 696                  nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
 697                  nsp32_read4(base, SGT_ADR),
 698                  nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
 699        nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
 700                  data->msgout_len, msgout);
 701
 702        /*
 703         * set SGT ADDR (physical address)
 704         */
 705        nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
 706
 707        /*
 708         * set TRANSFER CONTROL REG
 709         */
 710        command = 0;
 711        command |= (TRANSFER_GO | ALL_COUNTER_CLR);
 712        if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
 713                if (scsi_bufflen(SCpnt) > 0) {
 714                        command |= BM_START;
 715                }
 716        } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
 717                command |= CB_MMIO_MODE;
 718        } else if (data->trans_method & NSP32_TRANSFER_PIO) {
 719                command |= CB_IO_MODE;
 720        }
 721        nsp32_write2(base, TRANSFER_CONTROL, command);
 722
 723        /*
 724         * start AUTO SCSI, kick off arbitration
 725         */
 726        command = (CLEAR_CDB_FIFO_POINTER |
 727                   AUTOSCSI_START         |
 728                   AUTO_MSGIN_00_OR_04    |
 729                   AUTO_MSGIN_02          |
 730                   AUTO_ATN);
 731        nsp32_write2(base, COMMAND_CONTROL, command);
 732
 733        /*
 734         * Check arbitration
 735         */
 736        status = nsp32_arbitration(SCpnt, base);
 737
 738 out:
 739        /*
 740         * IRQ enable
 741         */
 742        nsp32_write2(base, IRQ_CONTROL, 0);
 743
 744        return status;
 745}
 746
 747
 748/*
 749 * Arbitration Status Check
 750 *
 751 * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
 752 *       Using udelay(1) consumes CPU time and system time, but
 753 *       arbitration delay time is defined minimal 2.4us in SCSI
 754 *       specification, thus udelay works as coarse grained wait timer.
 755 */
 756static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
 757{
 758        unsigned char arbit;
 759        int           status = TRUE;
 760        int           time   = 0;
 761
 762        do {
 763                arbit = nsp32_read1(base, ARBIT_STATUS);
 764                time++;
 765        } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
 766                 (time <= ARBIT_TIMEOUT_TIME));
 767
 768        nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
 769                  "arbit: 0x%x, delay time: %d", arbit, time);
 770
 771        if (arbit & ARBIT_WIN) {
 772                /* Arbitration succeeded */
 773                SCpnt->result = DID_OK << 16;
 774                nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
 775        } else if (arbit & ARBIT_FAIL) {
 776                /* Arbitration failed */
 777                SCpnt->result = DID_BUS_BUSY << 16;
 778                status = FALSE;
 779        } else {
 780                /*
 781                 * unknown error or ARBIT_GO timeout,
 782                 * something lock up! guess no connection.
 783                 */
 784                nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
 785                SCpnt->result = DID_NO_CONNECT << 16;
 786                status = FALSE;
 787        }
 788
 789        /*
 790         * clear Arbit
 791         */
 792        nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
 793
 794        return status;
 795}
 796
 797
 798/*
 799 * reselection
 800 *
 801 * Note: This reselection routine is called from msgin_occur,
 802 *       reselection target id&lun must be already set.
 803 *       SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
 804 */
 805static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
 806{
 807        nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
 808        unsigned int   host_id = SCpnt->device->host->this_id;
 809        unsigned int   base    = SCpnt->device->host->io_port;
 810        unsigned char  tmpid, newid;
 811
 812        nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
 813
 814        /*
 815         * calculate reselected SCSI ID
 816         */
 817        tmpid = nsp32_read1(base, RESELECT_ID);
 818        tmpid &= (~BIT(host_id));
 819        newid = 0;
 820        while (tmpid) {
 821                if (tmpid & 1) {
 822                        break;
 823                }
 824                tmpid >>= 1;
 825                newid++;
 826        }
 827
 828        /*
 829         * If reselected New ID:LUN is not existed
 830         * or current nexus is not existed, unexpected
 831         * reselection is occurred. Send reject message.
 832         */
 833        if (newid >= ARRAY_SIZE(data->lunt) ||
 834            newlun >= ARRAY_SIZE(data->lunt[0])) {
 835                nsp32_msg(KERN_WARNING, "unknown id/lun");
 836                return FALSE;
 837        } else if(data->lunt[newid][newlun].SCpnt == NULL) {
 838                nsp32_msg(KERN_WARNING, "no SCSI command is processing");
 839                return FALSE;
 840        }
 841
 842        data->cur_id    = newid;
 843        data->cur_lun   = newlun;
 844        data->cur_target = &(data->target[newid]);
 845        data->cur_lunt   = &(data->lunt[newid][newlun]);
 846
 847        /* reset SACK/SavedACK counter (or ALL clear?) */
 848        nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
 849
 850        return TRUE;
 851}
 852
 853
 854/*
 855 * nsp32_setup_sg_table - build scatter gather list for transfer data
 856 *                          with bus master.
 857 *
 858 * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
 859 */
 860static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
 861{
 862        nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
 863        struct scatterlist *sg;
 864        nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
 865        int num, i;
 866        u32_le l;
 867
 868        if (sgt == NULL) {
 869                nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
 870                return FALSE;
 871        }
 872
 873        num = scsi_dma_map(SCpnt);
 874        if (!num)
 875                return TRUE;
 876        else if (num < 0)
 877                return FALSE;
 878        else {
 879                scsi_for_each_sg(SCpnt, sg, num, i) {
 880                        /*
 881                         * Build nsp32_sglist, substitute sg dma addresses.
 882                         */
 883                        sgt[i].addr = cpu_to_le32(sg_dma_address(sg));
 884                        sgt[i].len  = cpu_to_le32(sg_dma_len(sg));
 885
 886                        if (le32_to_cpu(sgt[i].len) > 0x10000) {
 887                                nsp32_msg(KERN_ERR,
 888                                        "can't transfer over 64KB at a time, "
 889                                        "size=0x%x", le32_to_cpu(sgt[i].len));
 890                                return FALSE;
 891                        }
 892                        nsp32_dbg(NSP32_DEBUG_SGLIST,
 893                                  "num 0x%x : addr 0x%lx len 0x%lx",
 894                                  i,
 895                                  le32_to_cpu(sgt[i].addr),
 896                                  le32_to_cpu(sgt[i].len ));
 897                }
 898
 899                /* set end mark */
 900                l = le32_to_cpu(sgt[num-1].len);
 901                sgt[num-1].len = cpu_to_le32(l | SGTEND);
 902        }
 903
 904        return TRUE;
 905}
 906
 907static int nsp32_queuecommand_lck(struct scsi_cmnd *SCpnt,
 908                                  void (*done)(struct scsi_cmnd *))
 909{
 910        nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
 911        nsp32_target *target;
 912        nsp32_lunt   *cur_lunt;
 913        int ret;
 914
 915        nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
 916                  "enter. target: 0x%x LUN: 0x%llx cmnd: 0x%x cmndlen: 0x%x "
 917                  "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
 918                  SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0],
 919                  SCpnt->cmd_len, scsi_sg_count(SCpnt), scsi_sglist(SCpnt),
 920                  scsi_bufflen(SCpnt));
 921
 922        if (data->CurrentSC != NULL) {
 923                nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
 924                data->CurrentSC = NULL;
 925                SCpnt->result   = DID_NO_CONNECT << 16;
 926                done(SCpnt);
 927                return 0;
 928        }
 929
 930        /* check target ID is not same as this initiator ID */
 931        if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
 932                nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "target==host???");
 933                SCpnt->result = DID_BAD_TARGET << 16;
 934                done(SCpnt);
 935                return 0;
 936        }
 937
 938        /* check target LUN is allowable value */
 939        if (SCpnt->device->lun >= MAX_LUN) {
 940                nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
 941                SCpnt->result = DID_BAD_TARGET << 16;
 942                done(SCpnt);
 943                return 0;
 944        }
 945
 946        show_command(SCpnt);
 947
 948        SCpnt->scsi_done     = done;
 949        data->CurrentSC      = SCpnt;
 950        SCpnt->SCp.Status    = SAM_STAT_CHECK_CONDITION;
 951        scsi_set_resid(SCpnt, scsi_bufflen(SCpnt));
 952
 953        SCpnt->SCp.ptr              = (char *)scsi_sglist(SCpnt);
 954        SCpnt->SCp.this_residual    = scsi_bufflen(SCpnt);
 955        SCpnt->SCp.buffer           = NULL;
 956        SCpnt->SCp.buffers_residual = 0;
 957
 958        /* initialize data */
 959        data->msgout_len        = 0;
 960        data->msgin_len         = 0;
 961        cur_lunt                = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
 962        cur_lunt->SCpnt         = SCpnt;
 963        cur_lunt->save_datp     = 0;
 964        cur_lunt->msgin03       = FALSE;
 965        data->cur_lunt          = cur_lunt;
 966        data->cur_id            = SCpnt->device->id;
 967        data->cur_lun           = SCpnt->device->lun;
 968
 969        ret = nsp32_setup_sg_table(SCpnt);
 970        if (ret == FALSE) {
 971                nsp32_msg(KERN_ERR, "SGT fail");
 972                SCpnt->result = DID_ERROR << 16;
 973                nsp32_scsi_done(SCpnt);
 974                return 0;
 975        }
 976
 977        /* Build IDENTIFY */
 978        nsp32_build_identify(SCpnt);
 979
 980        /*
 981         * If target is the first time to transfer after the reset
 982         * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
 983         * message SDTR is needed to do synchronous transfer.
 984         */
 985        target = &data->target[scmd_id(SCpnt)];
 986        data->cur_target = target;
 987
 988        if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
 989                unsigned char period, offset;
 990
 991                if (trans_mode != ASYNC_MODE) {
 992                        nsp32_set_max_sync(data, target, &period, &offset);
 993                        nsp32_build_sdtr(SCpnt, period, offset);
 994                        target->sync_flag |= SDTR_INITIATOR;
 995                } else {
 996                        nsp32_set_async(data, target);
 997                        target->sync_flag |= SDTR_DONE;
 998                }
 999
1000                nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1001                          "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
1002                          target->limit_entry, period, offset);
1003        } else if (target->sync_flag & SDTR_INITIATOR) {
1004                /*
1005                 * It was negotiating SDTR with target, sending from the
1006                 * initiator, but there are no chance to remove this flag.
1007                 * Set async because we don't get proper negotiation.
1008                 */
1009                nsp32_set_async(data, target);
1010                target->sync_flag &= ~SDTR_INITIATOR;
1011                target->sync_flag |= SDTR_DONE;
1012
1013                nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1014                          "SDTR_INITIATOR: fall back to async");
1015        } else if (target->sync_flag & SDTR_TARGET) {
1016                /*
1017                 * It was negotiating SDTR with target, sending from target,
1018                 * but there are no chance to remove this flag.  Set async
1019                 * because we don't get proper negotiation.
1020                 */
1021                nsp32_set_async(data, target);
1022                target->sync_flag &= ~SDTR_TARGET;
1023                target->sync_flag |= SDTR_DONE;
1024
1025                nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1026                          "Unknown SDTR from target is reached, fall back to async.");
1027        }
1028
1029        nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
1030                  "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
1031                  SCpnt->device->id, target->sync_flag, target->syncreg,
1032                  target->ackwidth);
1033
1034        /* Selection */
1035        if (auto_param == 0) {
1036                ret = nsp32_selection_autopara(SCpnt);
1037        } else {
1038                ret = nsp32_selection_autoscsi(SCpnt);
1039        }
1040
1041        if (ret != TRUE) {
1042                nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
1043                nsp32_scsi_done(SCpnt);
1044        }
1045
1046        return 0;
1047}
1048
1049static DEF_SCSI_QCMD(nsp32_queuecommand)
1050
1051/* initialize asic */
1052static int nsp32hw_init(nsp32_hw_data *data)
1053{
1054        unsigned int   base = data->BaseAddress;
1055        unsigned short irq_stat;
1056        unsigned long  lc_reg;
1057        unsigned char  power;
1058
1059        lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
1060        if ((lc_reg & 0xff00) == 0) {
1061                lc_reg |= (0x20 << 8);
1062                nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
1063        }
1064
1065        nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1066        nsp32_write2(base, TRANSFER_CONTROL, 0);
1067        nsp32_write4(base, BM_CNT, 0);
1068        nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1069
1070        do {
1071                irq_stat = nsp32_read2(base, IRQ_STATUS);
1072                nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
1073        } while (irq_stat & IRQSTATUS_ANY_IRQ);
1074
1075        /*
1076         * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
1077         *  designated by specification.
1078         */
1079        if ((data->trans_method & NSP32_TRANSFER_PIO) ||
1080            (data->trans_method & NSP32_TRANSFER_MMIO)) {
1081                nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT,  0x40);
1082                nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
1083        } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1084                nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT,  0x10);
1085                nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
1086        } else {
1087                nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
1088        }
1089
1090        nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
1091                  nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
1092                  nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
1093
1094        nsp32_index_write1(base, CLOCK_DIV, data->clock);
1095        nsp32_index_write1(base, BM_CYCLE,
1096                           MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
1097        nsp32_write1(base, PARITY_CONTROL, 0);  /* parity check is disable */
1098
1099        /*
1100         * initialize MISC_WRRD register
1101         *
1102         * Note: Designated parameters is obeyed as following:
1103         *      MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
1104         *      MISC_MASTER_TERMINATION_SELECT:      It must be set.
1105         *      MISC_BMREQ_NEGATE_TIMING_SEL:        It should be set.
1106         *      MISC_AUTOSEL_TIMING_SEL:             It should be set.
1107         *      MISC_BMSTOP_CHANGE2_NONDATA_PHASE:   It should be set.
1108         *      MISC_DELAYED_BMSTART:                It's selected for safety.
1109         *
1110         * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
1111         *      we have to set TRANSFERCONTROL_BM_START as 0 and set
1112         *      appropriate value before restarting bus master transfer.
1113         */
1114        nsp32_index_write2(base, MISC_WR,
1115                           (SCSI_DIRECTION_DETECTOR_SELECT |
1116                            DELAYED_BMSTART |
1117                            MASTER_TERMINATION_SELECT |
1118                            BMREQ_NEGATE_TIMING_SEL |
1119                            AUTOSEL_TIMING_SEL |
1120                            BMSTOP_CHANGE2_NONDATA_PHASE));
1121
1122        nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
1123        power = nsp32_index_read1(base, TERM_PWR_CONTROL);
1124        if (!(power & SENSE)) {
1125                nsp32_msg(KERN_INFO, "term power on");
1126                nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
1127        }
1128
1129        nsp32_write2(base, TIMER_SET, TIMER_STOP);
1130        nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
1131
1132        nsp32_write1(base, SYNC_REG,     0);
1133        nsp32_write1(base, ACK_WIDTH,    0);
1134        nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
1135
1136        /*
1137         * enable to select designated IRQ (except for
1138         * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
1139         */
1140        nsp32_index_write2(base, IRQ_SELECT,
1141                           IRQSELECT_TIMER_IRQ |
1142                           IRQSELECT_SCSIRESET_IRQ |
1143                           IRQSELECT_FIFO_SHLD_IRQ |
1144                           IRQSELECT_RESELECT_IRQ |
1145                           IRQSELECT_PHASE_CHANGE_IRQ |
1146                           IRQSELECT_AUTO_SCSI_SEQ_IRQ |
1147                           //   IRQSELECT_BMCNTERR_IRQ      |
1148                           IRQSELECT_TARGET_ABORT_IRQ |
1149                           IRQSELECT_MASTER_ABORT_IRQ );
1150        nsp32_write2(base, IRQ_CONTROL, 0);
1151
1152        /* PCI LED off */
1153        nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
1154        nsp32_index_write1(base, EXT_PORT,     LED_OFF);
1155
1156        return TRUE;
1157}
1158
1159
1160/* interrupt routine */
1161static irqreturn_t do_nsp32_isr(int irq, void *dev_id)
1162{
1163        nsp32_hw_data *data = dev_id;
1164        unsigned int base = data->BaseAddress;
1165        struct scsi_cmnd *SCpnt = data->CurrentSC;
1166        unsigned short auto_stat, irq_stat, trans_stat;
1167        unsigned char busmon, busphase;
1168        unsigned long flags;
1169        int ret;
1170        int handled = 0;
1171        struct Scsi_Host *host = data->Host;
1172
1173        spin_lock_irqsave(host->host_lock, flags);
1174
1175        /*
1176         * IRQ check, then enable IRQ mask
1177         */
1178        irq_stat = nsp32_read2(base, IRQ_STATUS);
1179        nsp32_dbg(NSP32_DEBUG_INTR,
1180                  "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
1181        /* is this interrupt comes from Ninja asic? */
1182        if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
1183                nsp32_dbg(NSP32_DEBUG_INTR,
1184                          "shared interrupt: irq other 0x%x", irq_stat);
1185                goto out2;
1186        }
1187        handled = 1;
1188        nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1189
1190        busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
1191        busphase = busmon & BUSMON_PHASE_MASK;
1192
1193        trans_stat = nsp32_read2(base, TRANSFER_STATUS);
1194        if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
1195                nsp32_msg(KERN_INFO, "card disconnect");
1196                if (data->CurrentSC != NULL) {
1197                        nsp32_msg(KERN_INFO, "clean up current SCSI command");
1198                        SCpnt->result = DID_BAD_TARGET << 16;
1199                        nsp32_scsi_done(SCpnt);
1200                }
1201                goto out;
1202        }
1203
1204        /* Timer IRQ */
1205        if (irq_stat & IRQSTATUS_TIMER_IRQ) {
1206                nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
1207                nsp32_write2(base, TIMER_SET, TIMER_STOP);
1208                goto out;
1209        }
1210
1211        /* SCSI reset */
1212        if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
1213                nsp32_msg(KERN_INFO, "detected someone do bus reset");
1214                nsp32_do_bus_reset(data);
1215                if (SCpnt != NULL) {
1216                        SCpnt->result = DID_RESET << 16;
1217                        nsp32_scsi_done(SCpnt);
1218                }
1219                goto out;
1220        }
1221
1222        if (SCpnt == NULL) {
1223                nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
1224                nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x",
1225                          irq_stat, trans_stat);
1226                goto out;
1227        }
1228
1229        /*
1230         * AutoSCSI Interrupt.
1231         * Note: This interrupt is occurred when AutoSCSI is finished.  Then
1232         * check SCSIEXECUTEPHASE, and do appropriate action.  Each phases are
1233         * recorded when AutoSCSI sequencer has been processed.
1234         */
1235        if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
1236                /* getting SCSI executed phase */
1237                auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
1238                nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1239
1240                /* Selection Timeout, go busfree phase. */
1241                if (auto_stat & SELECTION_TIMEOUT) {
1242                        nsp32_dbg(NSP32_DEBUG_INTR,
1243                                  "selection timeout occurred");
1244
1245                        SCpnt->result = DID_TIME_OUT << 16;
1246                        nsp32_scsi_done(SCpnt);
1247                        goto out;
1248                }
1249
1250                if (auto_stat & MSGOUT_PHASE) {
1251                        /*
1252                         * MsgOut phase was processed.
1253                         * If MSG_IN_OCCUER is not set, then MsgOut phase is
1254                         * completed. Thus, msgout_len must reset.  Otherwise,
1255                         * nothing to do here. If MSG_OUT_OCCUER is occurred,
1256                         * then we will encounter the condition and check.
1257                         */
1258                        if (!(auto_stat & MSG_IN_OCCUER) &&
1259                             (data->msgout_len <= 3)) {
1260                                /*
1261                                 * !MSG_IN_OCCUER && msgout_len <=3
1262                                 *   ---> AutoSCSI with MSGOUTreg is processed.
1263                                 */
1264                                data->msgout_len = 0;
1265                        }
1266
1267                        nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
1268                }
1269
1270                if ((auto_stat & DATA_IN_PHASE) &&
1271                    (scsi_get_resid(SCpnt) > 0) &&
1272                    ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
1273                        printk( "auto+fifo\n");
1274                        //nsp32_pio_read(SCpnt);
1275                }
1276
1277                if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
1278                        /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
1279                        nsp32_dbg(NSP32_DEBUG_INTR,
1280                                  "Data in/out phase processed");
1281
1282                        /* read BMCNT, SGT pointer addr */
1283                        nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
1284                                    nsp32_read4(base, BM_CNT));
1285                        nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
1286                                    nsp32_read4(base, SGT_ADR));
1287                        nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
1288                                    nsp32_read4(base, SACK_CNT));
1289                        nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
1290                                    nsp32_read4(base, SAVED_SACK_CNT));
1291
1292                        scsi_set_resid(SCpnt, 0); /* all data transferred! */
1293                }
1294
1295                /*
1296                 * MsgIn Occur
1297                 */
1298                if (auto_stat & MSG_IN_OCCUER) {
1299                        nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
1300                }
1301
1302                /*
1303                 * MsgOut Occur
1304                 */
1305                if (auto_stat & MSG_OUT_OCCUER) {
1306                        nsp32_msgout_occur(SCpnt);
1307                }
1308
1309                /*
1310                 * Bus Free Occur
1311                 */
1312                if (auto_stat & BUS_FREE_OCCUER) {
1313                        ret = nsp32_busfree_occur(SCpnt, auto_stat);
1314                        if (ret == TRUE) {
1315                                goto out;
1316                        }
1317                }
1318
1319                if (auto_stat & STATUS_PHASE) {
1320                        /*
1321                         * Read CSB and substitute CSB for SCpnt->result
1322                         * to save status phase stutas byte.
1323                         * scsi error handler checks host_byte (DID_*:
1324                         * low level driver to indicate status), then checks
1325                         * status_byte (SCSI status byte).
1326                         */
1327                        SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
1328                }
1329
1330                if (auto_stat & ILLEGAL_PHASE) {
1331                        /* Illegal phase is detected. SACK is not back. */
1332                        nsp32_msg(KERN_WARNING,
1333                                  "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
1334
1335                        /* TODO: currently we don't have any action... bus reset? */
1336
1337                        /*
1338                         * To send back SACK, assert, wait, and negate.
1339                         */
1340                        nsp32_sack_assert(data);
1341                        nsp32_wait_req(data, NEGATE);
1342                        nsp32_sack_negate(data);
1343
1344                }
1345
1346                if (auto_stat & COMMAND_PHASE) {
1347                        /* nothing to do */
1348                        nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
1349                }
1350
1351                if (auto_stat & AUTOSCSI_BUSY) {
1352                        /* AutoSCSI is running */
1353                }
1354
1355                show_autophase(auto_stat);
1356        }
1357
1358        /* FIFO_SHLD_IRQ */
1359        if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
1360                nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
1361
1362                switch(busphase) {
1363                case BUSPHASE_DATA_OUT:
1364                        nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
1365
1366                        //nsp32_pio_write(SCpnt);
1367
1368                        break;
1369
1370                case BUSPHASE_DATA_IN:
1371                        nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
1372
1373                        //nsp32_pio_read(SCpnt);
1374
1375                        break;
1376
1377                case BUSPHASE_STATUS:
1378                        nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
1379
1380                        SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1381
1382                        break;
1383                default:
1384                        nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
1385                        nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x",
1386                                  irq_stat, trans_stat);
1387                        show_busphase(busphase);
1388                        break;
1389                }
1390
1391                goto out;
1392        }
1393
1394        /* Phase Change IRQ */
1395        if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
1396                nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
1397
1398                switch(busphase) {
1399                case BUSPHASE_MESSAGE_IN:
1400                        nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
1401                        nsp32_msgin_occur(SCpnt, irq_stat, 0);
1402                        break;
1403                default:
1404                        nsp32_msg(KERN_WARNING, "phase chg/other phase?");
1405                        nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
1406                                  irq_stat, trans_stat);
1407                        show_busphase(busphase);
1408                        break;
1409                }
1410                goto out;
1411        }
1412
1413        /* PCI_IRQ */
1414        if (irq_stat & IRQSTATUS_PCI_IRQ) {
1415                nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
1416                /* Do nothing */
1417        }
1418
1419        /* BMCNTERR_IRQ */
1420        if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
1421                nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
1422                /*
1423                 * TODO: To be implemented improving bus master
1424                 * transfer reliability when BMCNTERR is occurred in
1425                 * AutoSCSI phase described in specification.
1426                 */
1427        }
1428
1429#if 0
1430        nsp32_dbg(NSP32_DEBUG_INTR,
1431                  "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1432        show_busphase(busphase);
1433#endif
1434
1435 out:
1436        /* disable IRQ mask */
1437        nsp32_write2(base, IRQ_CONTROL, 0);
1438
1439 out2:
1440        spin_unlock_irqrestore(host->host_lock, flags);
1441
1442        nsp32_dbg(NSP32_DEBUG_INTR, "exit");
1443
1444        return IRQ_RETVAL(handled);
1445}
1446
1447
1448static int nsp32_show_info(struct seq_file *m, struct Scsi_Host *host)
1449{
1450        unsigned long     flags;
1451        nsp32_hw_data    *data;
1452        int               hostno;
1453        unsigned int      base;
1454        unsigned char     mode_reg;
1455        int               id, speed;
1456        long              model;
1457
1458        hostno = host->host_no;
1459        data = (nsp32_hw_data *)host->hostdata;
1460        base = host->io_port;
1461
1462        seq_puts(m, "NinjaSCSI-32 status\n\n");
1463        seq_printf(m, "Driver version:        %s, $Revision: 1.33 $\n",
1464                   nsp32_release_version);
1465        seq_printf(m, "SCSI host No.:         %d\n", hostno);
1466        seq_printf(m, "IRQ:                   %d\n", host->irq);
1467        seq_printf(m, "IO:                    0x%lx-0x%lx\n",
1468                   host->io_port, host->io_port + host->n_io_port - 1);
1469        seq_printf(m, "MMIO(virtual address): 0x%lx-0x%lx\n",
1470                   host->base, host->base + data->MmioLength - 1);
1471        seq_printf(m, "sg_tablesize:          %d\n",
1472                   host->sg_tablesize);
1473        seq_printf(m, "Chip revision:         0x%x\n",
1474                   (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
1475
1476        mode_reg = nsp32_index_read1(base, CHIP_MODE);
1477        model    = data->pci_devid->driver_data;
1478
1479#ifdef CONFIG_PM
1480        seq_printf(m, "Power Management:      %s\n",
1481                   (mode_reg & OPTF) ? "yes" : "no");
1482#endif
1483        seq_printf(m, "OEM:                   %ld, %s\n",
1484                   (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
1485
1486        spin_lock_irqsave(&(data->Lock), flags);
1487        seq_printf(m, "CurrentSC:             0x%p\n\n",      data->CurrentSC);
1488        spin_unlock_irqrestore(&(data->Lock), flags);
1489
1490
1491        seq_puts(m, "SDTR status\n");
1492        for (id = 0; id < ARRAY_SIZE(data->target); id++) {
1493
1494                seq_printf(m, "id %d: ", id);
1495
1496                if (id == host->this_id) {
1497                        seq_puts(m, "----- NinjaSCSI-32 host adapter\n");
1498                        continue;
1499                }
1500
1501                if (data->target[id].sync_flag == SDTR_DONE) {
1502                        if (data->target[id].period == 0 &&
1503                            data->target[id].offset == ASYNC_OFFSET ) {
1504                                seq_puts(m, "async");
1505                        } else {
1506                                seq_puts(m, " sync");
1507                        }
1508                } else {
1509                        seq_puts(m, " none");
1510                }
1511
1512                if (data->target[id].period != 0) {
1513
1514                        speed = 1000000 / (data->target[id].period * 4);
1515
1516                        seq_printf(m, " transfer %d.%dMB/s, offset %d",
1517                                speed / 1000,
1518                                speed % 1000,
1519                                data->target[id].offset
1520                                );
1521                }
1522                seq_putc(m, '\n');
1523        }
1524        return 0;
1525}
1526
1527
1528
1529/*
1530 * Reset parameters and call scsi_done for data->cur_lunt.
1531 * Be careful setting SCpnt->result = DID_* before calling this function.
1532 */
1533static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
1534{
1535        nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1536        unsigned int   base = SCpnt->device->host->io_port;
1537
1538        scsi_dma_unmap(SCpnt);
1539
1540        /*
1541         * clear TRANSFERCONTROL_BM_START
1542         */
1543        nsp32_write2(base, TRANSFER_CONTROL, 0);
1544        nsp32_write4(base, BM_CNT, 0);
1545
1546        /*
1547         * call scsi_done
1548         */
1549        (*SCpnt->scsi_done)(SCpnt);
1550
1551        /*
1552         * reset parameters
1553         */
1554        data->cur_lunt->SCpnt   = NULL;
1555        data->cur_lunt          = NULL;
1556        data->cur_target        = NULL;
1557        data->CurrentSC         = NULL;
1558}
1559
1560
1561/*
1562 * Bus Free Occur
1563 *
1564 * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
1565 * with ACK reply when below condition is matched:
1566 *      MsgIn 00: Command Complete.
1567 *      MsgIn 02: Save Data Pointer.
1568 *      MsgIn 04: Disconnect.
1569 * In other case, unexpected BUSFREE is detected.
1570 */
1571static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
1572{
1573        nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1574        unsigned int base   = SCpnt->device->host->io_port;
1575
1576        nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
1577        show_autophase(execph);
1578
1579        nsp32_write4(base, BM_CNT, 0);
1580        nsp32_write2(base, TRANSFER_CONTROL, 0);
1581
1582        /*
1583         * MsgIn 02: Save Data Pointer
1584         *
1585         * VALID:
1586         *   Save Data Pointer is received. Adjust pointer.
1587         *
1588         * NO-VALID:
1589         *   SCSI-3 says if Save Data Pointer is not received, then we restart
1590         *   processing and we can't adjust any SCSI data pointer in next data
1591         *   phase.
1592         */
1593        if (execph & MSGIN_02_VALID) {
1594                nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
1595
1596                /*
1597                 * Check sack_cnt/saved_sack_cnt, then adjust sg table if
1598                 * needed.
1599                 */
1600                if (!(execph & MSGIN_00_VALID) &&
1601                    ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
1602                        unsigned int sacklen, s_sacklen;
1603
1604                        /*
1605                         * Read SACK count and SAVEDSACK count, then compare.
1606                         */
1607                        sacklen   = nsp32_read4(base, SACK_CNT      );
1608                        s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
1609
1610                        /*
1611                         * If SAVEDSACKCNT == 0, it means SavedDataPointer is
1612                         * come after data transferring.
1613                         */
1614                        if (s_sacklen > 0) {
1615                                /*
1616                                 * Comparing between sack and savedsack to
1617                                 * check the condition of AutoMsgIn03.
1618                                 *
1619                                 * If they are same, set msgin03 == TRUE,
1620                                 * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
1621                                 * reselection.  On the other hand, if they
1622                                 * aren't same, set msgin03 == FALSE, and
1623                                 * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
1624                                 * reselection.
1625                                 */
1626                                if (sacklen != s_sacklen) {
1627                                        data->cur_lunt->msgin03 = FALSE;
1628                                } else {
1629                                        data->cur_lunt->msgin03 = TRUE;
1630                                }
1631
1632                                nsp32_adjust_busfree(SCpnt, s_sacklen);
1633                        }
1634                }
1635
1636                /* This value has not substitude with valid value yet... */
1637                //data->cur_lunt->save_datp = data->cur_datp;
1638        } else {
1639                /*
1640                 * no processing.
1641                 */
1642        }
1643
1644        if (execph & MSGIN_03_VALID) {
1645                /* MsgIn03 was valid to be processed. No need processing. */
1646        }
1647
1648        /*
1649         * target SDTR check
1650         */
1651        if (data->cur_target->sync_flag & SDTR_INITIATOR) {
1652                /*
1653                 * SDTR negotiation pulled by the initiator has not
1654                 * finished yet. Fall back to ASYNC mode.
1655                 */
1656                nsp32_set_async(data, data->cur_target);
1657                data->cur_target->sync_flag &= ~SDTR_INITIATOR;
1658                data->cur_target->sync_flag |= SDTR_DONE;
1659        } else if (data->cur_target->sync_flag & SDTR_TARGET) {
1660                /*
1661                 * SDTR negotiation pulled by the target has been
1662                 * negotiating.
1663                 */
1664                if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
1665                        /*
1666                         * If valid message is received, then
1667                         * negotiation is succeeded.
1668                         */
1669                } else {
1670                        /*
1671                         * On the contrary, if unexpected bus free is
1672                         * occurred, then negotiation is failed. Fall
1673                         * back to ASYNC mode.
1674                         */
1675                        nsp32_set_async(data, data->cur_target);
1676                }
1677                data->cur_target->sync_flag &= ~SDTR_TARGET;
1678                data->cur_target->sync_flag |= SDTR_DONE;
1679        }
1680
1681        /*
1682         * It is always ensured by SCSI standard that initiator
1683         * switches into Bus Free Phase after
1684         * receiving message 00 (Command Complete), 04 (Disconnect).
1685         * It's the reason that processing here is valid.
1686         */
1687        if (execph & MSGIN_00_VALID) {
1688                /* MsgIn 00: Command Complete */
1689                nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
1690
1691                SCpnt->SCp.Status  = nsp32_read1(base, SCSI_CSB_IN);
1692                nsp32_dbg(NSP32_DEBUG_BUSFREE,
1693                          "normal end stat=0x%x resid=0x%x\n",
1694                          SCpnt->SCp.Status, scsi_get_resid(SCpnt));
1695                SCpnt->result = (DID_OK << 16) |
1696                        (SCpnt->SCp.Status << 0);
1697                nsp32_scsi_done(SCpnt);
1698                /* All operation is done */
1699                return TRUE;
1700        } else if (execph & MSGIN_04_VALID) {
1701                /* MsgIn 04: Disconnect */
1702                SCpnt->SCp.Status  = nsp32_read1(base, SCSI_CSB_IN);
1703
1704                nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
1705                return TRUE;
1706        } else {
1707                /* Unexpected bus free */
1708                nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
1709
1710                /* DID_ERROR? */
1711                //SCpnt->result   = (DID_OK << 16) | (SCpnt->SCp.Status << 0);
1712                SCpnt->result = DID_ERROR << 16;
1713                nsp32_scsi_done(SCpnt);
1714                return TRUE;
1715        }
1716        return FALSE;
1717}
1718
1719
1720/*
1721 * nsp32_adjust_busfree - adjusting SG table
1722 *
1723 * Note: This driver adjust the SG table using SCSI ACK
1724 *       counter instead of BMCNT counter!
1725 */
1726static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
1727{
1728        nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1729        int old_entry = data->cur_entry;
1730        int new_entry;
1731        int sg_num = data->cur_lunt->sg_num;
1732        nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
1733        unsigned int restlen, sentlen;
1734        u32_le len, addr;
1735
1736        nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", scsi_get_resid(SCpnt));
1737
1738        /* adjust saved SACK count with 4 byte start address boundary */
1739        s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
1740
1741        /*
1742         * calculate new_entry from sack count and each sgt[].len
1743         * calculate the byte which is intent to send
1744         */
1745        sentlen = 0;
1746        for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
1747                sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
1748                if (sentlen > s_sacklen) {
1749                        break;
1750                }
1751        }
1752
1753        /* all sgt is processed */
1754        if (new_entry == sg_num) {
1755                goto last;
1756        }
1757
1758        if (sentlen == s_sacklen) {
1759                /* XXX: confirm it's ok or not */
1760                /* In this case, it's ok because we are at
1761                 * the head element of the sg. restlen is correctly
1762                 * calculated.
1763                 */
1764        }
1765
1766        /* calculate the rest length for transferring */
1767        restlen = sentlen - s_sacklen;
1768
1769        /* update adjusting current SG table entry */
1770        len  = le32_to_cpu(sgt[new_entry].len);
1771        addr = le32_to_cpu(sgt[new_entry].addr);
1772        addr += (len - restlen);
1773        sgt[new_entry].addr = cpu_to_le32(addr);
1774        sgt[new_entry].len  = cpu_to_le32(restlen);
1775
1776        /* set cur_entry with new_entry */
1777        data->cur_entry = new_entry;
1778
1779        return;
1780
1781 last:
1782        if (scsi_get_resid(SCpnt) < sentlen) {
1783                nsp32_msg(KERN_ERR, "resid underflow");
1784        }
1785
1786        scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) - sentlen);
1787        nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", scsi_get_resid(SCpnt));
1788
1789        /* update hostdata and lun */
1790
1791        return;
1792}
1793
1794
1795/*
1796 * It's called MsgOut phase occur.
1797 * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
1798 * message out phase. It, however, has more than 3 messages,
1799 * HBA creates the interrupt and we have to process by hand.
1800 */
1801static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
1802{
1803        nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1804        unsigned int base   = SCpnt->device->host->io_port;
1805        int i;
1806
1807        nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1808                  "enter: msgout_len: 0x%x", data->msgout_len);
1809
1810        /*
1811         * If MsgOut phase is occurred without having any
1812         * message, then No_Operation is sent (SCSI-2).
1813         */
1814        if (data->msgout_len == 0) {
1815                nsp32_build_nop(SCpnt);
1816        }
1817
1818        /*
1819         * send messages
1820         */
1821        for (i = 0; i < data->msgout_len; i++) {
1822                nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1823                          "%d : 0x%x", i, data->msgoutbuf[i]);
1824
1825                /*
1826                 * Check REQ is asserted.
1827                 */
1828                nsp32_wait_req(data, ASSERT);
1829
1830                if (i == (data->msgout_len - 1)) {
1831                        /*
1832                         * If the last message, set the AutoSCSI restart
1833                         * before send back the ack message. AutoSCSI
1834                         * restart automatically negate ATN signal.
1835                         */
1836                        //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
1837                        //nsp32_restart_autoscsi(SCpnt, command);
1838                        nsp32_write2(base, COMMAND_CONTROL,
1839                                         (CLEAR_CDB_FIFO_POINTER |
1840                                          AUTO_COMMAND_PHASE |
1841                                          AUTOSCSI_RESTART |
1842                                          AUTO_MSGIN_00_OR_04 |
1843                                          AUTO_MSGIN_02 ));
1844                }
1845                /*
1846                 * Write data with SACK, then wait sack is
1847                 * automatically negated.
1848                 */
1849                nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
1850                nsp32_wait_sack(data, NEGATE);
1851
1852                nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
1853                          nsp32_read1(base, SCSI_BUS_MONITOR));
1854        }
1855
1856        data->msgout_len = 0;
1857
1858        nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
1859}
1860
1861/*
1862 * Restart AutoSCSI
1863 *
1864 * Note: Restarting AutoSCSI needs set:
1865 *              SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
1866 */
1867static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
1868{
1869        nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1870        unsigned int   base = data->BaseAddress;
1871        unsigned short transfer = 0;
1872
1873        nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
1874
1875        if (data->cur_target == NULL || data->cur_lunt == NULL) {
1876                nsp32_msg(KERN_ERR, "Target or Lun is invalid");
1877        }
1878
1879        /*
1880         * set SYNC_REG
1881         * Don't set BM_START_ADR before setting this register.
1882         */
1883        nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
1884
1885        /*
1886         * set ACKWIDTH
1887         */
1888        nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
1889
1890        /*
1891         * set SREQ hazard killer sampling rate
1892         */
1893        nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
1894
1895        /*
1896         * set SGT ADDR (physical address)
1897         */
1898        nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
1899
1900        /*
1901         * set TRANSFER CONTROL REG
1902         */
1903        transfer = 0;
1904        transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
1905        if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1906                if (scsi_bufflen(SCpnt) > 0) {
1907                        transfer |= BM_START;
1908                }
1909        } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
1910                transfer |= CB_MMIO_MODE;
1911        } else if (data->trans_method & NSP32_TRANSFER_PIO) {
1912                transfer |= CB_IO_MODE;
1913        }
1914        nsp32_write2(base, TRANSFER_CONTROL, transfer);
1915
1916        /*
1917         * restart AutoSCSI
1918         *
1919         * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
1920         */
1921        command |= (CLEAR_CDB_FIFO_POINTER |
1922                    AUTO_COMMAND_PHASE     |
1923                    AUTOSCSI_RESTART       );
1924        nsp32_write2(base, COMMAND_CONTROL, command);
1925
1926        nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
1927}
1928
1929
1930/*
1931 * cannot run automatically message in occur
1932 */
1933static void nsp32_msgin_occur(struct scsi_cmnd     *SCpnt,
1934                              unsigned long  irq_status,
1935                              unsigned short execph)
1936{
1937        nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1938        unsigned int   base = SCpnt->device->host->io_port;
1939        unsigned char  msg;
1940        unsigned char  msgtype;
1941        unsigned char  newlun;
1942        unsigned short command  = 0;
1943        int            msgclear = TRUE;
1944        long           new_sgtp;
1945        int            ret;
1946
1947        /*
1948         * read first message
1949         *    Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
1950         *    of Message-In have to be processed before sending back SCSI ACK.
1951         */
1952        msg = nsp32_read1(base, SCSI_DATA_IN);
1953        data->msginbuf[(unsigned char)data->msgin_len] = msg;
1954        msgtype = data->msginbuf[0];
1955        nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
1956                  "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
1957                  data->msgin_len, msg, msgtype);
1958
1959        /*
1960         * TODO: We need checking whether bus phase is message in?
1961         */
1962
1963        /*
1964         * assert SCSI ACK
1965         */
1966        nsp32_sack_assert(data);
1967
1968        /*
1969         * processing IDENTIFY
1970         */
1971        if (msgtype & 0x80) {
1972                if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
1973                        /* Invalid (non reselect) phase */
1974                        goto reject;
1975                }
1976
1977                newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
1978                ret = nsp32_reselection(SCpnt, newlun);
1979                if (ret == TRUE) {
1980                        goto restart;
1981                } else {
1982                        goto reject;
1983                }
1984        }
1985
1986        /*
1987         * processing messages except for IDENTIFY
1988         *
1989         * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
1990         */
1991        switch (msgtype) {
1992        /*
1993         * 1-byte message
1994         */
1995        case COMMAND_COMPLETE:
1996        case DISCONNECT:
1997                /*
1998                 * These messages should not be occurred.
1999                 * They should be processed on AutoSCSI sequencer.
2000                 */
2001                nsp32_msg(KERN_WARNING,
2002                           "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
2003                break;
2004
2005        case RESTORE_POINTERS:
2006                /*
2007                 * AutoMsgIn03 is disabled, and HBA gets this message.
2008                 */
2009
2010                if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
2011                        unsigned int s_sacklen;
2012
2013                        s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
2014                        if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
2015                                nsp32_adjust_busfree(SCpnt, s_sacklen);
2016                        } else {
2017                                /* No need to rewrite SGT */
2018                        }
2019                }
2020                data->cur_lunt->msgin03 = FALSE;
2021
2022                /* Update with the new value */
2023
2024                /* reset SACK/SavedACK counter (or ALL clear?) */
2025                nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
2026
2027                /*
2028                 * set new sg pointer
2029                 */
2030                new_sgtp = data->cur_lunt->sglun_paddr +
2031                        (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
2032                nsp32_write4(base, SGT_ADR, new_sgtp);
2033
2034                break;
2035
2036        case SAVE_POINTERS:
2037                /*
2038                 * These messages should not be occurred.
2039                 * They should be processed on AutoSCSI sequencer.
2040                 */
2041                nsp32_msg (KERN_WARNING,
2042                           "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
2043
2044                break;
2045
2046        case MESSAGE_REJECT:
2047                /* If previous message_out is sending SDTR, and get
2048                   message_reject from target, SDTR negotiation is failed */
2049                if (data->cur_target->sync_flag &
2050                                (SDTR_INITIATOR | SDTR_TARGET)) {
2051                        /*
2052                         * Current target is negotiating SDTR, but it's
2053                         * failed.  Fall back to async transfer mode, and set
2054                         * SDTR_DONE.
2055                         */
2056                        nsp32_set_async(data, data->cur_target);
2057                        data->cur_target->sync_flag &= ~SDTR_INITIATOR;
2058                        data->cur_target->sync_flag |= SDTR_DONE;
2059
2060                }
2061                break;
2062
2063        case LINKED_CMD_COMPLETE:
2064        case LINKED_FLG_CMD_COMPLETE:
2065                /* queue tag is not supported currently */
2066                nsp32_msg (KERN_WARNING,
2067                           "unsupported message: 0x%x", msgtype);
2068                break;
2069
2070        case INITIATE_RECOVERY:
2071                /* staring ECA (Extended Contingent Allegiance) state. */
2072                /* This message is declined in SPI2 or later. */
2073
2074                goto reject;
2075
2076        /*
2077         * 2-byte message
2078         */
2079        case SIMPLE_QUEUE_TAG:
2080        case 0x23:
2081                /*
2082                 * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
2083                 * No support is needed.
2084                 */
2085                if (data->msgin_len >= 1) {
2086                        goto reject;
2087                }
2088
2089                /* current position is 1-byte of 2 byte */
2090                msgclear = FALSE;
2091
2092                break;
2093
2094        /*
2095         * extended message
2096         */
2097        case EXTENDED_MESSAGE:
2098                if (data->msgin_len < 1) {
2099                        /*
2100                         * Current position does not reach 2-byte
2101                         * (2-byte is extended message length).
2102                         */
2103                        msgclear = FALSE;
2104                        break;
2105                }
2106
2107                if ((data->msginbuf[1] + 1) > data->msgin_len) {
2108                        /*
2109                         * Current extended message has msginbuf[1] + 2
2110                         * (msgin_len starts counting from 0, so buf[1] + 1).
2111                         * If current message position is not finished,
2112                         * continue receiving message.
2113                         */
2114                        msgclear = FALSE;
2115                        break;
2116                }
2117
2118                /*
2119                 * Reach here means regular length of each type of
2120                 * extended messages.
2121                 */
2122                switch (data->msginbuf[2]) {
2123                case EXTENDED_MODIFY_DATA_POINTER:
2124                        /* TODO */
2125                        goto reject; /* not implemented yet */
2126                        break;
2127
2128                case EXTENDED_SDTR:
2129                        /*
2130                         * Exchange this message between initiator and target.
2131                         */
2132                        if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
2133                                /*
2134                                 * received inappropriate message.
2135                                 */
2136                                goto reject;
2137                                break;
2138                        }
2139
2140                        nsp32_analyze_sdtr(SCpnt);
2141
2142                        break;
2143
2144                case EXTENDED_EXTENDED_IDENTIFY:
2145                        /* SCSI-I only, not supported. */
2146                        goto reject; /* not implemented yet */
2147
2148                        break;
2149
2150                case EXTENDED_WDTR:
2151                        goto reject; /* not implemented yet */
2152
2153                        break;
2154
2155                default:
2156                        goto reject;
2157                }
2158                break;
2159
2160        default:
2161                goto reject;
2162        }
2163
2164 restart:
2165        if (msgclear == TRUE) {
2166                data->msgin_len = 0;
2167
2168                /*
2169                 * If restarting AutoSCSI, but there are some message to out
2170                 * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
2171                 * (MV_VALID = 0). When commandcontrol is written with
2172                 * AutoSCSI restart, at the same time MsgOutOccur should be
2173                 * happened (however, such situation is really possible...?).
2174                 */
2175                if (data->msgout_len > 0) {
2176                        nsp32_write4(base, SCSI_MSG_OUT, 0);
2177                        command |= AUTO_ATN;
2178                }
2179
2180                /*
2181                 * restart AutoSCSI
2182                 * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
2183                 */
2184                command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
2185
2186                /*
2187                 * If current msgin03 is TRUE, then flag on.
2188                 */
2189                if (data->cur_lunt->msgin03 == TRUE) {
2190                        command |= AUTO_MSGIN_03;
2191                }
2192                data->cur_lunt->msgin03 = FALSE;
2193        } else {
2194                data->msgin_len++;
2195        }
2196
2197        /*
2198         * restart AutoSCSI
2199         */
2200        nsp32_restart_autoscsi(SCpnt, command);
2201
2202        /*
2203         * wait SCSI REQ negate for REQ-ACK handshake
2204         */
2205        nsp32_wait_req(data, NEGATE);
2206
2207        /*
2208         * negate SCSI ACK
2209         */
2210        nsp32_sack_negate(data);
2211
2212        nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2213
2214        return;
2215
2216 reject:
2217        nsp32_msg(KERN_WARNING,
2218                  "invalid or unsupported MessageIn, rejected. "
2219                  "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
2220                  msg, data->msgin_len, msgtype);
2221        nsp32_build_reject(SCpnt);
2222        data->msgin_len = 0;
2223
2224        goto restart;
2225}
2226
2227/*
2228 *
2229 */
2230static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
2231{
2232        nsp32_hw_data   *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2233        nsp32_target    *target     = data->cur_target;
2234        unsigned char    get_period = data->msginbuf[3];
2235        unsigned char    get_offset = data->msginbuf[4];
2236        int              entry;
2237
2238        nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
2239
2240        /*
2241         * If this inititor sent the SDTR message, then target responds SDTR,
2242         * initiator SYNCREG, ACKWIDTH from SDTR parameter.
2243         * Messages are not appropriate, then send back reject message.
2244         * If initiator did not send the SDTR, but target sends SDTR,
2245         * initiator calculator the appropriate parameter and send back SDTR.
2246         */
2247        if (target->sync_flag & SDTR_INITIATOR) {
2248                /*
2249                 * Initiator sent SDTR, the target responds and
2250                 * send back negotiation SDTR.
2251                 */
2252                nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
2253
2254                target->sync_flag &= ~SDTR_INITIATOR;
2255                target->sync_flag |= SDTR_DONE;
2256
2257                /*
2258                 * offset:
2259                 */
2260                if (get_offset > SYNC_OFFSET) {
2261                        /*
2262                         * Negotiation is failed, the target send back
2263                         * unexpected offset value.
2264                         */
2265                        goto reject;
2266                }
2267
2268                if (get_offset == ASYNC_OFFSET) {
2269                        /*
2270                         * Negotiation is succeeded, the target want
2271                         * to fall back into asynchronous transfer mode.
2272                         */
2273                        goto async;
2274                }
2275
2276                /*
2277                 * period:
2278                 *    Check whether sync period is too short. If too short,
2279                 *    fall back to async mode. If it's ok, then investigate
2280                 *    the received sync period. If sync period is acceptable
2281                 *    between sync table start_period and end_period, then
2282                 *    set this I_T nexus as sent offset and period.
2283                 *    If it's not acceptable, send back reject and fall back
2284                 *    to async mode.
2285                 */
2286                if (get_period < data->synct[0].period_num) {
2287                        /*
2288                         * Negotiation is failed, the target send back
2289                         * unexpected period value.
2290                         */
2291                        goto reject;
2292                }
2293
2294                entry = nsp32_search_period_entry(data, target, get_period);
2295
2296                if (entry < 0) {
2297                        /*
2298                         * Target want to use long period which is not
2299                         * acceptable NinjaSCSI-32Bi/UDE.
2300                         */
2301                        goto reject;
2302                }
2303
2304                /*
2305                 * Set new sync table and offset in this I_T nexus.
2306                 */
2307                nsp32_set_sync_entry(data, target, entry, get_offset);
2308        } else {
2309                /* Target send SDTR to initiator. */
2310                nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
2311
2312                target->sync_flag |= SDTR_INITIATOR;
2313
2314                /* offset: */
2315                if (get_offset > SYNC_OFFSET) {
2316                        /* send back as SYNC_OFFSET */
2317                        get_offset = SYNC_OFFSET;
2318                }
2319
2320                /* period: */
2321                if (get_period < data->synct[0].period_num) {
2322                        get_period = data->synct[0].period_num;
2323                }
2324
2325                entry = nsp32_search_period_entry(data, target, get_period);
2326
2327                if (get_offset == ASYNC_OFFSET || entry < 0) {
2328                        nsp32_set_async(data, target);
2329                        nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
2330                } else {
2331                        nsp32_set_sync_entry(data, target, entry, get_offset);
2332                        nsp32_build_sdtr(SCpnt, get_period, get_offset);
2333                }
2334        }
2335
2336        target->period = get_period;
2337        nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2338        return;
2339
2340 reject:
2341        /*
2342         * If the current message is unacceptable, send back to the target
2343         * with reject message.
2344         */
2345        nsp32_build_reject(SCpnt);
2346
2347 async:
2348        nsp32_set_async(data, target);  /* set as ASYNC transfer mode */
2349
2350        target->period = 0;
2351        nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
2352        return;
2353}
2354
2355
2356/*
2357 * Search config entry number matched in sync_table from given
2358 * target and speed period value. If failed to search, return negative value.
2359 */
2360static int nsp32_search_period_entry(nsp32_hw_data *data,
2361                                     nsp32_target  *target,
2362                                     unsigned char  period)
2363{
2364        int i;
2365
2366        if (target->limit_entry >= data->syncnum) {
2367                nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
2368                target->limit_entry = 0;
2369        }
2370
2371        for (i = target->limit_entry; i < data->syncnum; i++) {
2372                if (period >= data->synct[i].start_period &&
2373                    period <= data->synct[i].end_period) {
2374                                break;
2375                }
2376        }
2377
2378        /*
2379         * Check given period value is over the sync_table value.
2380         * If so, return max value.
2381         */
2382        if (i == data->syncnum) {
2383                i = -1;
2384        }
2385
2386        return i;
2387}
2388
2389
2390/*
2391 * target <-> initiator use ASYNC transfer
2392 */
2393static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
2394{
2395        unsigned char period = data->synct[target->limit_entry].period_num;
2396
2397        target->offset     = ASYNC_OFFSET;
2398        target->period     = 0;
2399        target->syncreg    = TO_SYNCREG(period, ASYNC_OFFSET);
2400        target->ackwidth   = 0;
2401        target->sample_reg = 0;
2402
2403        nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
2404}
2405
2406
2407/*
2408 * target <-> initiator use maximum SYNC transfer
2409 */
2410static void nsp32_set_max_sync(nsp32_hw_data *data,
2411                               nsp32_target  *target,
2412                               unsigned char *period,
2413                               unsigned char *offset)
2414{
2415        unsigned char period_num, ackwidth;
2416
2417        period_num = data->synct[target->limit_entry].period_num;
2418        *period    = data->synct[target->limit_entry].start_period;
2419        ackwidth   = data->synct[target->limit_entry].ackwidth;
2420        *offset    = SYNC_OFFSET;
2421
2422        target->syncreg    = TO_SYNCREG(period_num, *offset);
2423        target->ackwidth   = ackwidth;
2424        target->offset     = *offset;
2425        target->sample_reg = 0;       /* disable SREQ sampling */
2426}
2427
2428
2429/*
2430 * target <-> initiator use entry number speed
2431 */
2432static void nsp32_set_sync_entry(nsp32_hw_data *data,
2433                                 nsp32_target  *target,
2434                                 int            entry,
2435                                 unsigned char  offset)
2436{
2437        unsigned char period, ackwidth, sample_rate;
2438
2439        period      = data->synct[entry].period_num;
2440        ackwidth    = data->synct[entry].ackwidth;
2441        sample_rate = data->synct[entry].sample_rate;
2442
2443        target->syncreg    = TO_SYNCREG(period, offset);
2444        target->ackwidth   = ackwidth;
2445        target->offset     = offset;
2446        target->sample_reg = sample_rate | SAMPLING_ENABLE;
2447
2448        nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
2449}
2450
2451
2452/*
2453 * It waits until SCSI REQ becomes assertion or negation state.
2454 *
2455 * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
2456 *     connected target responds SCSI REQ negation.  We have to wait
2457 *     SCSI REQ becomes negation in order to negate SCSI ACK signal for
2458 *     REQ-ACK handshake.
2459 */
2460static void nsp32_wait_req(nsp32_hw_data *data, int state)
2461{
2462        unsigned int  base      = data->BaseAddress;
2463        int           wait_time = 0;
2464        unsigned char bus, req_bit;
2465
2466        if (!((state == ASSERT) || (state == NEGATE))) {
2467                nsp32_msg(KERN_ERR, "unknown state designation");
2468        }
2469        /* REQ is BIT(5) */
2470        req_bit = (state == ASSERT ? BUSMON_REQ : 0);
2471
2472        do {
2473                bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2474                if ((bus & BUSMON_REQ) == req_bit) {
2475                        nsp32_dbg(NSP32_DEBUG_WAIT,
2476                                  "wait_time: %d", wait_time);
2477                        return;
2478                }
2479                udelay(1);
2480                wait_time++;
2481        } while (wait_time < REQSACK_TIMEOUT_TIME);
2482
2483        nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
2484}
2485
2486/*
2487 * It waits until SCSI SACK becomes assertion or negation state.
2488 */
2489static void nsp32_wait_sack(nsp32_hw_data *data, int state)
2490{
2491        unsigned int  base      = data->BaseAddress;
2492        int           wait_time = 0;
2493        unsigned char bus, ack_bit;
2494
2495        if (!((state == ASSERT) || (state == NEGATE))) {
2496                nsp32_msg(KERN_ERR, "unknown state designation");
2497        }
2498        /* ACK is BIT(4) */
2499        ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
2500
2501        do {
2502                bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2503                if ((bus & BUSMON_ACK) == ack_bit) {
2504                        nsp32_dbg(NSP32_DEBUG_WAIT,
2505                                  "wait_time: %d", wait_time);
2506                        return;
2507                }
2508                udelay(1);
2509                wait_time++;
2510        } while (wait_time < REQSACK_TIMEOUT_TIME);
2511
2512        nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
2513}
2514
2515/*
2516 * assert SCSI ACK
2517 *
2518 * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
2519 */
2520static void nsp32_sack_assert(nsp32_hw_data *data)
2521{
2522        unsigned int  base = data->BaseAddress;
2523        unsigned char busctrl;
2524
2525        busctrl  = nsp32_read1(base, SCSI_BUS_CONTROL);
2526        busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
2527        nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2528}
2529
2530/*
2531 * negate SCSI ACK
2532 */
2533static void nsp32_sack_negate(nsp32_hw_data *data)
2534{
2535        unsigned int  base = data->BaseAddress;
2536        unsigned char busctrl;
2537
2538        busctrl  = nsp32_read1(base, SCSI_BUS_CONTROL);
2539        busctrl &= ~BUSCTL_ACK;
2540        nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2541}
2542
2543
2544
2545/*
2546 * Note: n_io_port is defined as 0x7f because I/O register port is
2547 *       assigned as:
2548 *      0x800-0x8ff: memory mapped I/O port
2549 *      0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
2550 *      0xc00-0xfff: CardBus status registers
2551 */
2552static int nsp32_detect(struct pci_dev *pdev)
2553{
2554        struct Scsi_Host *host; /* registered host structure */
2555        struct resource  *res;
2556        nsp32_hw_data    *data;
2557        int               ret;
2558        int               i, j;
2559
2560        nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
2561
2562        /*
2563         * register this HBA as SCSI device
2564         */
2565        host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
2566        if (host == NULL) {
2567                nsp32_msg (KERN_ERR, "failed to scsi register");
2568                goto err;
2569        }
2570
2571        /*
2572         * set nsp32_hw_data
2573         */
2574        data = (nsp32_hw_data *)host->hostdata;
2575
2576        memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
2577
2578        host->irq       = data->IrqNumber;
2579        host->io_port   = data->BaseAddress;
2580        host->unique_id = data->BaseAddress;
2581        host->n_io_port = data->NumAddress;
2582        host->base      = (unsigned long)data->MmioAddress;
2583
2584        data->Host      = host;
2585        spin_lock_init(&(data->Lock));
2586
2587        data->cur_lunt   = NULL;
2588        data->cur_target = NULL;
2589
2590        /*
2591         * Bus master transfer mode is supported currently.
2592         */
2593        data->trans_method = NSP32_TRANSFER_BUSMASTER;
2594
2595        /*
2596         * Set clock div, CLOCK_4 (HBA has own external clock, and
2597         * dividing * 100ns/4).
2598         * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
2599         */
2600        data->clock = CLOCK_4;
2601
2602        /*
2603         * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
2604         */
2605        switch (data->clock) {
2606        case CLOCK_4:
2607                /* If data->clock is CLOCK_4, then select 40M sync table. */
2608                data->synct   = nsp32_sync_table_40M;
2609                data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2610                break;
2611        case CLOCK_2:
2612                /* If data->clock is CLOCK_2, then select 20M sync table. */
2613                data->synct   = nsp32_sync_table_20M;
2614                data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
2615                break;
2616        case PCICLK:
2617                /* If data->clock is PCICLK, then select pci sync table. */
2618                data->synct   = nsp32_sync_table_pci;
2619                data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
2620                break;
2621        default:
2622                nsp32_msg(KERN_WARNING,
2623                          "Invalid clock div is selected, set CLOCK_4.");
2624                /* Use default value CLOCK_4 */
2625                data->clock   = CLOCK_4;
2626                data->synct   = nsp32_sync_table_40M;
2627                data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2628        }
2629
2630        /*
2631         * setup nsp32_lunt
2632         */
2633
2634        /*
2635         * setup DMA
2636         */
2637        if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)) != 0) {
2638                nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
2639                goto scsi_unregister;
2640        }
2641
2642        /*
2643         * allocate autoparam DMA resource.
2644         */
2645        data->autoparam = dma_alloc_coherent(&pdev->dev,
2646                        sizeof(nsp32_autoparam), &(data->auto_paddr),
2647                        GFP_KERNEL);
2648        if (data->autoparam == NULL) {
2649                nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2650                goto scsi_unregister;
2651        }
2652
2653        /*
2654         * allocate scatter-gather DMA resource.
2655         */
2656        data->sg_list = dma_alloc_coherent(&pdev->dev, NSP32_SG_TABLE_SIZE,
2657                        &data->sg_paddr, GFP_KERNEL);
2658        if (data->sg_list == NULL) {
2659                nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2660                goto free_autoparam;
2661        }
2662
2663        for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
2664                for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
2665                        int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
2666                        nsp32_lunt tmp = {
2667                                .SCpnt       = NULL,
2668                                .save_datp   = 0,
2669                                .msgin03     = FALSE,
2670                                .sg_num      = 0,
2671                                .cur_entry   = 0,
2672                                .sglun       = &(data->sg_list[offset]),
2673                                .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
2674                        };
2675
2676                        data->lunt[i][j] = tmp;
2677                }
2678        }
2679
2680        /*
2681         * setup target
2682         */
2683        for (i = 0; i < ARRAY_SIZE(data->target); i++) {
2684                nsp32_target *target = &(data->target[i]);
2685
2686                target->limit_entry  = 0;
2687                target->sync_flag    = 0;
2688                nsp32_set_async(data, target);
2689        }
2690
2691        /*
2692         * EEPROM check
2693         */
2694        ret = nsp32_getprom_param(data);
2695        if (ret == FALSE) {
2696                data->resettime = 3;    /* default 3 */
2697        }
2698
2699        /*
2700         * setup HBA
2701         */
2702        nsp32hw_init(data);
2703
2704        snprintf(data->info_str, sizeof(data->info_str),
2705                 "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
2706                 host->irq, host->io_port, host->n_io_port);
2707
2708        /*
2709         * SCSI bus reset
2710         *
2711         * Note: It's important to reset SCSI bus in initialization phase.
2712         *     NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
2713         *     system is coming up, so SCSI devices connected to HBA is set as
2714         *     un-asynchronous mode.  It brings the merit that this HBA is
2715         *     ready to start synchronous transfer without any preparation,
2716         *     but we are difficult to control transfer speed.  In addition,
2717         *     it prevents device transfer speed from effecting EEPROM start-up
2718         *     SDTR.  NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
2719         *     Auto Mode, then FAST-10M is selected when SCSI devices are
2720         *     connected same or more than 4 devices.  It should be avoided
2721         *     depending on this specification. Thus, resetting the SCSI bus
2722         *     restores all connected SCSI devices to asynchronous mode, then
2723         *     this driver set SDTR safely later, and we can control all SCSI
2724         *     device transfer mode.
2725         */
2726        nsp32_do_bus_reset(data);
2727
2728        ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
2729        if (ret < 0) {
2730                nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
2731                          "SCSI PCI controller. Interrupt: %d", host->irq);
2732                goto free_sg_list;
2733        }
2734
2735        /*
2736         * PCI IO register
2737         */
2738        res = request_region(host->io_port, host->n_io_port, "nsp32");
2739        if (res == NULL) {
2740                nsp32_msg(KERN_ERR,
2741                          "I/O region 0x%x+0x%x is already used",
2742                          data->BaseAddress, data->NumAddress);
2743                goto free_irq;
2744        }
2745
2746        ret = scsi_add_host(host, &pdev->dev);
2747        if (ret) {
2748                nsp32_msg(KERN_ERR, "failed to add scsi host");
2749                goto free_region;
2750        }
2751        scsi_scan_host(host);
2752        pci_set_drvdata(pdev, host);
2753        return 0;
2754
2755 free_region:
2756        release_region(host->io_port, host->n_io_port);
2757
2758 free_irq:
2759        free_irq(host->irq, data);
2760
2761 free_sg_list:
2762        dma_free_coherent(&pdev->dev, NSP32_SG_TABLE_SIZE,
2763                            data->sg_list, data->sg_paddr);
2764
2765 free_autoparam:
2766        dma_free_coherent(&pdev->dev, sizeof(nsp32_autoparam),
2767                            data->autoparam, data->auto_paddr);
2768
2769 scsi_unregister:
2770        scsi_host_put(host);
2771
2772 err:
2773        return 1;
2774}
2775
2776static int nsp32_release(struct Scsi_Host *host)
2777{
2778        nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
2779
2780        if (data->autoparam) {
2781                dma_free_coherent(&data->Pci->dev, sizeof(nsp32_autoparam),
2782                                    data->autoparam, data->auto_paddr);
2783        }
2784
2785        if (data->sg_list) {
2786                dma_free_coherent(&data->Pci->dev, NSP32_SG_TABLE_SIZE,
2787                                    data->sg_list, data->sg_paddr);
2788        }
2789
2790        if (host->irq) {
2791                free_irq(host->irq, data);
2792        }
2793
2794        if (host->io_port && host->n_io_port) {
2795                release_region(host->io_port, host->n_io_port);
2796        }
2797
2798        if (data->MmioAddress) {
2799                iounmap(data->MmioAddress);
2800        }
2801
2802        return 0;
2803}
2804
2805static const char *nsp32_info(struct Scsi_Host *shpnt)
2806{
2807        nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
2808
2809        return data->info_str;
2810}
2811
2812
2813/****************************************************************************
2814 * error handler
2815 */
2816static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
2817{
2818        nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2819        unsigned int   base = SCpnt->device->host->io_port;
2820
2821        nsp32_msg(KERN_WARNING, "abort");
2822
2823        if (data->cur_lunt->SCpnt == NULL) {
2824                nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
2825                return FAILED;
2826        }
2827
2828        if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
2829                /* reset SDTR negotiation */
2830                data->cur_target->sync_flag = 0;
2831                nsp32_set_async(data, data->cur_target);
2832        }
2833
2834        nsp32_write2(base, TRANSFER_CONTROL, 0);
2835        nsp32_write2(base, BM_CNT, 0);
2836
2837        SCpnt->result = DID_ABORT << 16;
2838        nsp32_scsi_done(SCpnt);
2839
2840        nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
2841        return SUCCESS;
2842}
2843
2844static void nsp32_do_bus_reset(nsp32_hw_data *data)
2845{
2846        unsigned int   base = data->BaseAddress;
2847        int i;
2848        unsigned short __maybe_unused intrdat;
2849
2850        nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
2851
2852        /*
2853         * stop all transfer
2854         * clear TRANSFERCONTROL_BM_START
2855         * clear counter
2856         */
2857        nsp32_write2(base, TRANSFER_CONTROL, 0);
2858        nsp32_write4(base, BM_CNT, 0);
2859        nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
2860
2861        /*
2862         * fall back to asynchronous transfer mode
2863         * initialize SDTR negotiation flag
2864         */
2865        for (i = 0; i < ARRAY_SIZE(data->target); i++) {
2866                nsp32_target *target = &data->target[i];
2867
2868                target->sync_flag = 0;
2869                nsp32_set_async(data, target);
2870        }
2871
2872        /*
2873         * reset SCSI bus
2874         */
2875        nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
2876        mdelay(RESET_HOLD_TIME / 1000);
2877        nsp32_write1(base, SCSI_BUS_CONTROL, 0);
2878        for(i = 0; i < 5; i++) {
2879                intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
2880                nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
2881        }
2882
2883        data->CurrentSC = NULL;
2884}
2885
2886static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
2887{
2888        struct Scsi_Host *host = SCpnt->device->host;
2889        unsigned int      base = SCpnt->device->host->io_port;
2890        nsp32_hw_data    *data = (nsp32_hw_data *)host->hostdata;
2891
2892        nsp32_msg(KERN_INFO, "Host Reset");
2893        nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
2894
2895        spin_lock_irq(SCpnt->device->host->host_lock);
2896
2897        nsp32hw_init(data);
2898        nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
2899        nsp32_do_bus_reset(data);
2900        nsp32_write2(base, IRQ_CONTROL, 0);
2901
2902        spin_unlock_irq(SCpnt->device->host->host_lock);
2903        return SUCCESS; /* Host reset is succeeded at any time. */
2904}
2905
2906
2907/**************************************************************************
2908 * EEPROM handler
2909 */
2910
2911/*
2912 * getting EEPROM parameter
2913 */
2914static int nsp32_getprom_param(nsp32_hw_data *data)
2915{
2916        int vendor = data->pci_devid->vendor;
2917        int device = data->pci_devid->device;
2918        int ret, i;
2919        int __maybe_unused val;
2920
2921        /*
2922         * EEPROM checking.
2923         */
2924        ret = nsp32_prom_read(data, 0x7e);
2925        if (ret != 0x55) {
2926                nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
2927                return FALSE;
2928        }
2929        ret = nsp32_prom_read(data, 0x7f);
2930        if (ret != 0xaa) {
2931                nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
2932                return FALSE;
2933        }
2934
2935        /*
2936         * check EEPROM type
2937         */
2938        if (vendor == PCI_VENDOR_ID_WORKBIT &&
2939            device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
2940                ret = nsp32_getprom_c16(data);
2941        } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
2942                   device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
2943                ret = nsp32_getprom_at24(data);
2944        } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
2945                   device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
2946                ret = nsp32_getprom_at24(data);
2947        } else {
2948                nsp32_msg(KERN_WARNING, "Unknown EEPROM");
2949                ret = FALSE;
2950        }
2951
2952        /* for debug : SPROM data full checking */
2953        for (i = 0; i <= 0x1f; i++) {
2954                val = nsp32_prom_read(data, i);
2955                nsp32_dbg(NSP32_DEBUG_EEPROM,
2956                          "rom address 0x%x : 0x%x", i, val);
2957        }
2958
2959        return ret;
2960}
2961
2962
2963/*
2964 * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
2965 *
2966 *   ROMADDR
2967 *   0x00 - 0x06 :  Device Synchronous Transfer Period (SCSI ID 0 - 6)
2968 *                      Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
2969 *   0x07        :  HBA Synchronous Transfer Period
2970 *                      Value 0: AutoSync, 1: Manual Setting
2971 *   0x08 - 0x0f :  Not Used? (0x0)
2972 *   0x10        :  Bus Termination
2973 *                      Value 0: Auto[ON], 1: ON, 2: OFF
2974 *   0x11        :  Not Used? (0)
2975 *   0x12        :  Bus Reset Delay Time (0x03)
2976 *   0x13        :  Bootable CD Support
2977 *                      Value 0: Disable, 1: Enable
2978 *   0x14        :  Device Scan
2979 *                      Bit   7  6  5  4  3  2  1  0
2980 *                            |  <----------------->
2981 *                            |    SCSI ID: Value 0: Skip, 1: YES
2982 *                            |->  Value 0: ALL scan,  Value 1: Manual
2983 *   0x15 - 0x1b :  Not Used? (0)
2984 *   0x1c        :  Constant? (0x01) (clock div?)
2985 *   0x1d - 0x7c :  Not Used (0xff)
2986 *   0x7d        :  Not Used? (0xff)
2987 *   0x7e        :  Constant (0x55), Validity signature
2988 *   0x7f        :  Constant (0xaa), Validity signature
2989 */
2990static int nsp32_getprom_at24(nsp32_hw_data *data)
2991{
2992        int           ret, i;
2993        int           auto_sync;
2994        nsp32_target *target;
2995        int           entry;
2996
2997        /*
2998         * Reset time which is designated by EEPROM.
2999         *
3000         * TODO: Not used yet.
3001         */
3002        data->resettime = nsp32_prom_read(data, 0x12);
3003
3004        /*
3005         * HBA Synchronous Transfer Period
3006         *
3007         * Note: auto_sync = 0: auto, 1: manual.  Ninja SCSI HBA spec says
3008         *      that if auto_sync is 0 (auto), and connected SCSI devices are
3009         *      same or lower than 3, then transfer speed is set as ULTRA-20M.
3010         *      On the contrary if connected SCSI devices are same or higher
3011         *      than 4, then transfer speed is set as FAST-10M.
3012         *
3013         *      I break this rule. The number of connected SCSI devices are
3014         *      only ignored. If auto_sync is 0 (auto), then transfer speed is
3015         *      forced as ULTRA-20M.
3016         */
3017        ret = nsp32_prom_read(data, 0x07);
3018        switch (ret) {
3019        case 0:
3020                auto_sync = TRUE;
3021                break;
3022        case 1:
3023                auto_sync = FALSE;
3024                break;
3025        default:
3026                nsp32_msg(KERN_WARNING,
3027                          "Unsupported Auto Sync mode. Fall back to manual mode.");
3028                auto_sync = TRUE;
3029        }
3030
3031        if (trans_mode == ULTRA20M_MODE) {
3032                auto_sync = TRUE;
3033        }
3034
3035        /*
3036         * each device Synchronous Transfer Period
3037         */
3038        for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3039                target = &data->target[i];
3040                if (auto_sync == TRUE) {
3041                        target->limit_entry = 0;   /* set as ULTRA20M */
3042                } else {
3043                        ret   = nsp32_prom_read(data, i);
3044                        entry = nsp32_search_period_entry(data, target, ret);
3045                        if (entry < 0) {
3046                                /* search failed... set maximum speed */
3047                                entry = 0;
3048                        }
3049                        target->limit_entry = entry;
3050                }
3051        }
3052
3053        return TRUE;
3054}
3055
3056
3057/*
3058 * C16 110 (I-O Data: SC-NBD) data map:
3059 *
3060 *   ROMADDR
3061 *   0x00 - 0x06 :  Device Synchronous Transfer Period (SCSI ID 0 - 6)
3062 *                      Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
3063 *   0x07        :  0 (HBA Synchronous Transfer Period: Auto Sync)
3064 *   0x08 - 0x0f :  Not Used? (0x0)
3065 *   0x10        :  Transfer Mode
3066 *                      Value 0: PIO, 1: Busmater
3067 *   0x11        :  Bus Reset Delay Time (0x00-0x20)
3068 *   0x12        :  Bus Termination
3069 *                      Value 0: Disable, 1: Enable
3070 *   0x13 - 0x19 :  Disconnection
3071 *                      Value 0: Disable, 1: Enable
3072 *   0x1a - 0x7c :  Not Used? (0)
3073 *   0x7d        :  Not Used? (0xf8)
3074 *   0x7e        :  Constant (0x55), Validity signature
3075 *   0x7f        :  Constant (0xaa), Validity signature
3076 */
3077static int nsp32_getprom_c16(nsp32_hw_data *data)
3078{
3079        int           ret, i;
3080        nsp32_target *target;
3081        int           entry, val;
3082
3083        /*
3084         * Reset time which is designated by EEPROM.
3085         *
3086         * TODO: Not used yet.
3087         */
3088        data->resettime = nsp32_prom_read(data, 0x11);
3089
3090        /*
3091         * each device Synchronous Transfer Period
3092         */
3093        for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3094                target = &data->target[i];
3095                ret = nsp32_prom_read(data, i);
3096                switch (ret) {
3097                case 0:         /* 20MB/s */
3098                        val = 0x0c;
3099                        break;
3100                case 1:         /* 10MB/s */
3101                        val = 0x19;
3102                        break;
3103                case 2:         /* 5MB/s */
3104                        val = 0x32;
3105                        break;
3106                case 3:         /* ASYNC */
3107                        val = 0x00;
3108                        break;
3109                default:        /* default 20MB/s */
3110                        val = 0x0c;
3111                        break;
3112                }
3113                entry = nsp32_search_period_entry(data, target, val);
3114                if (entry < 0 || trans_mode == ULTRA20M_MODE) {
3115                        /* search failed... set maximum speed */
3116                        entry = 0;
3117                }
3118                target->limit_entry = entry;
3119        }
3120
3121        return TRUE;
3122}
3123
3124
3125/*
3126 * Atmel AT24C01A (drived in 5V) serial EEPROM routines
3127 */
3128static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
3129{
3130        int i, val;
3131
3132        /* start condition */
3133        nsp32_prom_start(data);
3134
3135        /* device address */
3136        nsp32_prom_write_bit(data, 1);  /* 1 */
3137        nsp32_prom_write_bit(data, 0);  /* 0 */
3138        nsp32_prom_write_bit(data, 1);  /* 1 */
3139        nsp32_prom_write_bit(data, 0);  /* 0 */
3140        nsp32_prom_write_bit(data, 0);  /* A2: 0 (GND) */
3141        nsp32_prom_write_bit(data, 0);  /* A1: 0 (GND) */
3142        nsp32_prom_write_bit(data, 0);  /* A0: 0 (GND) */
3143
3144        /* R/W: W for dummy write */
3145        nsp32_prom_write_bit(data, 0);
3146
3147        /* ack */
3148        nsp32_prom_write_bit(data, 0);
3149
3150        /* word address */
3151        for (i = 7; i >= 0; i--) {
3152                nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
3153        }
3154
3155        /* ack */
3156        nsp32_prom_write_bit(data, 0);
3157
3158        /* start condition */
3159        nsp32_prom_start(data);
3160
3161        /* device address */
3162        nsp32_prom_write_bit(data, 1);  /* 1 */
3163        nsp32_prom_write_bit(data, 0);  /* 0 */
3164        nsp32_prom_write_bit(data, 1);  /* 1 */
3165        nsp32_prom_write_bit(data, 0);  /* 0 */
3166        nsp32_prom_write_bit(data, 0);  /* A2: 0 (GND) */
3167        nsp32_prom_write_bit(data, 0);  /* A1: 0 (GND) */
3168        nsp32_prom_write_bit(data, 0);  /* A0: 0 (GND) */
3169
3170        /* R/W: R */
3171        nsp32_prom_write_bit(data, 1);
3172
3173        /* ack */
3174        nsp32_prom_write_bit(data, 0);
3175
3176        /* data... */
3177        val = 0;
3178        for (i = 7; i >= 0; i--) {
3179                val += (nsp32_prom_read_bit(data) << i);
3180        }
3181
3182        /* no ack */
3183        nsp32_prom_write_bit(data, 1);
3184
3185        /* stop condition */
3186        nsp32_prom_stop(data);
3187
3188        return val;
3189}
3190
3191static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
3192{
3193        int base = data->BaseAddress;
3194        int tmp;
3195
3196        tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
3197
3198        if (val == 0) {
3199                tmp &= ~bit;
3200        } else {
3201                tmp |=  bit;
3202        }
3203
3204        nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
3205
3206        udelay(10);
3207}
3208
3209static int nsp32_prom_get(nsp32_hw_data *data, int bit)
3210{
3211        int base = data->BaseAddress;
3212        int tmp, ret;
3213
3214        if (bit != SDA) {
3215                nsp32_msg(KERN_ERR, "return value is not appropriate");
3216                return 0;
3217        }
3218
3219
3220        tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
3221
3222        if (tmp == 0) {
3223                ret = 0;
3224        } else {
3225                ret = 1;
3226        }
3227
3228        udelay(10);
3229
3230        return ret;
3231}
3232
3233static void nsp32_prom_start (nsp32_hw_data *data)
3234{
3235        /* start condition */
3236        nsp32_prom_set(data, SCL, 1);
3237        nsp32_prom_set(data, SDA, 1);
3238        nsp32_prom_set(data, ENA, 1);   /* output mode */
3239        nsp32_prom_set(data, SDA, 0);   /* keeping SCL=1 and transiting
3240                                         * SDA 1->0 is start condition */
3241        nsp32_prom_set(data, SCL, 0);
3242}
3243
3244static void nsp32_prom_stop (nsp32_hw_data *data)
3245{
3246        /* stop condition */
3247        nsp32_prom_set(data, SCL, 1);
3248        nsp32_prom_set(data, SDA, 0);
3249        nsp32_prom_set(data, ENA, 1);   /* output mode */
3250        nsp32_prom_set(data, SDA, 1);
3251        nsp32_prom_set(data, SCL, 0);
3252}
3253
3254static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
3255{
3256        /* write */
3257        nsp32_prom_set(data, SDA, val);
3258        nsp32_prom_set(data, SCL, 1  );
3259        nsp32_prom_set(data, SCL, 0  );
3260}
3261
3262static int nsp32_prom_read_bit(nsp32_hw_data *data)
3263{
3264        int val;
3265
3266        /* read */
3267        nsp32_prom_set(data, ENA, 0);   /* input mode */
3268        nsp32_prom_set(data, SCL, 1);
3269
3270        val = nsp32_prom_get(data, SDA);
3271
3272        nsp32_prom_set(data, SCL, 0);
3273        nsp32_prom_set(data, ENA, 1);   /* output mode */
3274
3275        return val;
3276}
3277
3278
3279/**************************************************************************
3280 * Power Management
3281 */
3282#ifdef CONFIG_PM
3283
3284/* Device suspended */
3285static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
3286{
3287        struct Scsi_Host *host = pci_get_drvdata(pdev);
3288
3289        nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state.event=%x, slot=%s, host=0x%p",
3290                  pdev, state.event, pci_name(pdev), host);
3291
3292        pci_save_state     (pdev);
3293        pci_disable_device (pdev);
3294        pci_set_power_state(pdev, pci_choose_state(pdev, state));
3295
3296        return 0;
3297}
3298
3299/* Device woken up */
3300static int nsp32_resume(struct pci_dev *pdev)
3301{
3302        struct Scsi_Host *host = pci_get_drvdata(pdev);
3303        nsp32_hw_data    *data = (nsp32_hw_data *)host->hostdata;
3304        unsigned short    reg;
3305
3306        nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p",
3307                  pdev, pci_name(pdev), host);
3308
3309        pci_set_power_state(pdev, PCI_D0);
3310        pci_enable_wake    (pdev, PCI_D0, 0);
3311        pci_restore_state  (pdev);
3312
3313        reg = nsp32_read2(data->BaseAddress, INDEX_REG);
3314
3315        nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
3316
3317        if (reg == 0xffff) {
3318                nsp32_msg(KERN_INFO, "missing device. abort resume.");
3319                return 0;
3320        }
3321
3322        nsp32hw_init      (data);
3323        nsp32_do_bus_reset(data);
3324
3325        nsp32_msg(KERN_INFO, "resume success");
3326
3327        return 0;
3328}
3329
3330#endif
3331
3332/************************************************************************
3333 * PCI/Cardbus probe/remove routine
3334 */
3335static int nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3336{
3337        int ret;
3338        nsp32_hw_data *data = &nsp32_data_base;
3339
3340        nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3341
3342        ret = pci_enable_device(pdev);
3343        if (ret) {
3344                nsp32_msg(KERN_ERR, "failed to enable pci device");
3345                return ret;
3346        }
3347
3348        data->Pci         = pdev;
3349        data->pci_devid   = id;
3350        data->IrqNumber   = pdev->irq;
3351        data->BaseAddress = pci_resource_start(pdev, 0);
3352        data->NumAddress  = pci_resource_len  (pdev, 0);
3353        data->MmioAddress = pci_ioremap_bar(pdev, 1);
3354        data->MmioLength  = pci_resource_len  (pdev, 1);
3355
3356        pci_set_master(pdev);
3357
3358        ret = nsp32_detect(pdev);
3359
3360        nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
3361                  pdev->irq,
3362                  data->MmioAddress, data->MmioLength,
3363                  pci_name(pdev),
3364                  nsp32_model[id->driver_data]);
3365
3366        nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
3367
3368        return ret;
3369}
3370
3371static void nsp32_remove(struct pci_dev *pdev)
3372{
3373        struct Scsi_Host *host = pci_get_drvdata(pdev);
3374
3375        nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3376
3377        scsi_remove_host(host);
3378
3379        nsp32_release(host);
3380
3381        scsi_host_put(host);
3382}
3383
3384static struct pci_driver nsp32_driver = {
3385        .name           = "nsp32",
3386        .id_table       = nsp32_pci_table,
3387        .probe          = nsp32_probe,
3388        .remove         = nsp32_remove,
3389#ifdef CONFIG_PM
3390        .suspend        = nsp32_suspend,
3391        .resume         = nsp32_resume,
3392#endif
3393};
3394
3395/*********************************************************************
3396 * Moule entry point
3397 */
3398static int __init init_nsp32(void) {
3399        nsp32_msg(KERN_INFO, "loading...");
3400        return pci_register_driver(&nsp32_driver);
3401}
3402
3403static void __exit exit_nsp32(void) {
3404        nsp32_msg(KERN_INFO, "unloading...");
3405        pci_unregister_driver(&nsp32_driver);
3406}
3407
3408module_init(init_nsp32);
3409module_exit(exit_nsp32);
3410
3411/* end */
3412