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10#include <linux/fs.h>
11#include <linux/init.h>
12#include <linux/types.h>
13#include <linux/errno.h>
14#include <linux/kernel.h>
15#include <linux/ioport.h>
16#include <linux/delay.h>
17#include <linux/pci.h>
18#include <linux/wait.h>
19#include <linux/spinlock.h>
20#include <linux/sched.h>
21#include <linux/interrupt.h>
22#include <linux/blkdev.h>
23#include <linux/firmware.h>
24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/hdreg.h>
27#include <linux/io.h>
28#include <linux/slab.h>
29#include <asm/irq.h>
30#include <asm/processor.h>
31#include <linux/libata.h>
32#include <linux/mutex.h>
33#include <linux/ktime.h>
34#include <scsi/scsi.h>
35#include <scsi/scsi_host.h>
36#include <scsi/scsi_device.h>
37#include <scsi/scsi_tcq.h>
38#include <scsi/scsi_eh.h>
39#include <scsi/scsi_cmnd.h>
40#include <scsi/scsicam.h>
41
42#include "pmcraid.h"
43
44
45
46
47static unsigned int pmcraid_debug_log;
48static unsigned int pmcraid_disable_aen;
49static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST;
50static unsigned int pmcraid_enable_msix;
51
52
53
54
55
56static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0);
57
58
59
60
61
62
63static unsigned int pmcraid_major;
64static struct class *pmcraid_class;
65static DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
66
67
68
69
70MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
71MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver");
72MODULE_LICENSE("GPL");
73MODULE_VERSION(PMCRAID_DRIVER_VERSION);
74
75module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR));
76MODULE_PARM_DESC(log_level,
77 "Enables firmware error code logging, default :1 high-severity"
78 " errors, 2: all errors including high-severity errors,"
79 " 0: disables logging");
80
81module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR));
82MODULE_PARM_DESC(debug,
83 "Enable driver verbose message logging. Set 1 to enable."
84 "(default: 0)");
85
86module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR));
87MODULE_PARM_DESC(disable_aen,
88 "Disable driver aen notifications to apps. Set 1 to disable."
89 "(default: 0)");
90
91
92
93
94static struct pmcraid_chip_details pmcraid_chip_cfg[] = {
95 {
96 .ioastatus = 0x0,
97 .ioarrin = 0x00040,
98 .mailbox = 0x7FC30,
99 .global_intr_mask = 0x00034,
100 .ioa_host_intr = 0x0009C,
101 .ioa_host_intr_clr = 0x000A0,
102 .ioa_host_msix_intr = 0x7FC40,
103 .ioa_host_mask = 0x7FC28,
104 .ioa_host_mask_clr = 0x7FC28,
105 .host_ioa_intr = 0x00020,
106 .host_ioa_intr_clr = 0x00020,
107 .transop_timeout = 300
108 }
109};
110
111
112
113
114static struct pci_device_id pmcraid_pci_table[] = {
115 { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID),
116 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0]
117 },
118 {}
119};
120
121MODULE_DEVICE_TABLE(pci, pmcraid_pci_table);
122
123
124
125
126
127
128
129
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131
132
133
134
135
136
137static int pmcraid_slave_alloc(struct scsi_device *scsi_dev)
138{
139 struct pmcraid_resource_entry *temp, *res = NULL;
140 struct pmcraid_instance *pinstance;
141 u8 target, bus, lun;
142 unsigned long lock_flags;
143 int rc = -ENXIO;
144 u16 fw_version;
145
146 pinstance = shost_priv(scsi_dev->host);
147
148 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
149
150
151
152
153
154
155 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
156 list_for_each_entry(temp, &pinstance->used_res_q, queue) {
157
158
159 if (RES_IS_VSET(temp->cfg_entry)) {
160 if (fw_version <= PMCRAID_FW_VERSION_1)
161 target = temp->cfg_entry.unique_flags1;
162 else
163 target = le16_to_cpu(temp->cfg_entry.array_id) & 0xFF;
164
165 if (target > PMCRAID_MAX_VSET_TARGETS)
166 continue;
167 bus = PMCRAID_VSET_BUS_ID;
168 lun = 0;
169 } else if (RES_IS_GSCSI(temp->cfg_entry)) {
170 target = RES_TARGET(temp->cfg_entry.resource_address);
171 bus = PMCRAID_PHYS_BUS_ID;
172 lun = RES_LUN(temp->cfg_entry.resource_address);
173 } else {
174 continue;
175 }
176
177 if (bus == scsi_dev->channel &&
178 target == scsi_dev->id &&
179 lun == scsi_dev->lun) {
180 res = temp;
181 break;
182 }
183 }
184
185 if (res) {
186 res->scsi_dev = scsi_dev;
187 scsi_dev->hostdata = res;
188 res->change_detected = 0;
189 atomic_set(&res->read_failures, 0);
190 atomic_set(&res->write_failures, 0);
191 rc = 0;
192 }
193 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
194 return rc;
195}
196
197
198
199
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201
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207
208
209
210static int pmcraid_slave_configure(struct scsi_device *scsi_dev)
211{
212 struct pmcraid_resource_entry *res = scsi_dev->hostdata;
213
214 if (!res)
215 return 0;
216
217
218 if (RES_IS_GSCSI(res->cfg_entry) &&
219 scsi_dev->type != TYPE_ENCLOSURE)
220 return -ENXIO;
221
222 pmcraid_info("configuring %x:%x:%x:%x\n",
223 scsi_dev->host->unique_id,
224 scsi_dev->channel,
225 scsi_dev->id,
226 (u8)scsi_dev->lun);
227
228 if (RES_IS_GSCSI(res->cfg_entry)) {
229 scsi_dev->allow_restart = 1;
230 } else if (RES_IS_VSET(res->cfg_entry)) {
231 scsi_dev->allow_restart = 1;
232 blk_queue_rq_timeout(scsi_dev->request_queue,
233 PMCRAID_VSET_IO_TIMEOUT);
234 blk_queue_max_hw_sectors(scsi_dev->request_queue,
235 PMCRAID_VSET_MAX_SECTORS);
236 }
237
238
239
240
241 if (!RES_IS_GSCSI(res->cfg_entry) && !RES_IS_VSET(res->cfg_entry))
242 scsi_dev->tagged_supported = 0;
243
244 return 0;
245}
246
247
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256
257
258static void pmcraid_slave_destroy(struct scsi_device *scsi_dev)
259{
260 struct pmcraid_resource_entry *res;
261
262 res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
263
264 if (res)
265 res->scsi_dev = NULL;
266
267 scsi_dev->hostdata = NULL;
268}
269
270
271
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273
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275
276
277
278static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth)
279{
280 if (depth > PMCRAID_MAX_CMD_PER_LUN)
281 depth = PMCRAID_MAX_CMD_PER_LUN;
282 return scsi_change_queue_depth(scsi_dev, depth);
283}
284
285
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291
292
293
294static void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index)
295{
296 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
297 dma_addr_t dma_addr = cmd->ioa_cb_bus_addr;
298
299 if (index >= 0) {
300
301 u32 ioasa_offset =
302 offsetof(struct pmcraid_control_block, ioasa);
303
304 cmd->index = index;
305 ioarcb->response_handle = cpu_to_le32(index << 2);
306 ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr);
307 ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset);
308 ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa));
309 } else {
310
311
312
313 memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN);
314 ioarcb->hrrq_id = 0;
315 ioarcb->request_flags0 = 0;
316 ioarcb->request_flags1 = 0;
317 ioarcb->cmd_timeout = 0;
318 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
319 ioarcb->ioadl_bus_addr = 0;
320 ioarcb->ioadl_length = 0;
321 ioarcb->data_transfer_length = 0;
322 ioarcb->add_cmd_param_length = 0;
323 ioarcb->add_cmd_param_offset = 0;
324 cmd->ioa_cb->ioasa.ioasc = 0;
325 cmd->ioa_cb->ioasa.residual_data_length = 0;
326 cmd->time_left = 0;
327 }
328
329 cmd->cmd_done = NULL;
330 cmd->scsi_cmd = NULL;
331 cmd->release = 0;
332 cmd->completion_req = 0;
333 cmd->sense_buffer = NULL;
334 cmd->sense_buffer_dma = 0;
335 cmd->dma_handle = 0;
336 timer_setup(&cmd->timer, NULL, 0);
337}
338
339
340
341
342
343
344
345
346
347static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd)
348{
349 pmcraid_init_cmdblk(cmd, -1);
350}
351
352
353
354
355
356
357
358
359static struct pmcraid_cmd *pmcraid_get_free_cmd(
360 struct pmcraid_instance *pinstance
361)
362{
363 struct pmcraid_cmd *cmd = NULL;
364 unsigned long lock_flags;
365
366
367 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
368
369 if (!list_empty(&pinstance->free_cmd_pool)) {
370 cmd = list_entry(pinstance->free_cmd_pool.next,
371 struct pmcraid_cmd, free_list);
372 list_del(&cmd->free_list);
373 }
374 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
375
376
377 if (cmd != NULL)
378 pmcraid_reinit_cmdblk(cmd);
379 return cmd;
380}
381
382
383
384
385
386
387
388
389static void pmcraid_return_cmd(struct pmcraid_cmd *cmd)
390{
391 struct pmcraid_instance *pinstance = cmd->drv_inst;
392 unsigned long lock_flags;
393
394 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
395 list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool);
396 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
397}
398
399
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401
402
403
404
405
406
407static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance)
408{
409 return (pinstance->interrupt_mode) ?
410 ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) :
411 ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
412}
413
414
415
416
417
418
419
420
421
422
423static void pmcraid_disable_interrupts(
424 struct pmcraid_instance *pinstance,
425 u32 intrs
426)
427{
428 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
429 u32 nmask = gmask | GLOBAL_INTERRUPT_MASK;
430
431 iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg);
432 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
433 ioread32(pinstance->int_regs.global_interrupt_mask_reg);
434
435 if (!pinstance->interrupt_mode) {
436 iowrite32(intrs,
437 pinstance->int_regs.ioa_host_interrupt_mask_reg);
438 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
439 }
440}
441
442
443
444
445
446
447
448
449
450
451static void pmcraid_enable_interrupts(
452 struct pmcraid_instance *pinstance,
453 u32 intrs)
454{
455 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
456 u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK);
457
458 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
459
460 if (!pinstance->interrupt_mode) {
461 iowrite32(~intrs,
462 pinstance->int_regs.ioa_host_interrupt_mask_reg);
463 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
464 }
465
466 pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n",
467 ioread32(pinstance->int_regs.global_interrupt_mask_reg),
468 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg));
469}
470
471
472
473
474
475
476
477
478
479static void pmcraid_clr_trans_op(
480 struct pmcraid_instance *pinstance
481)
482{
483 unsigned long lock_flags;
484
485 if (!pinstance->interrupt_mode) {
486 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
487 pinstance->int_regs.ioa_host_interrupt_mask_reg);
488 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
489 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
490 pinstance->int_regs.ioa_host_interrupt_clr_reg);
491 ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg);
492 }
493
494 if (pinstance->reset_cmd != NULL) {
495 del_timer(&pinstance->reset_cmd->timer);
496 spin_lock_irqsave(
497 pinstance->host->host_lock, lock_flags);
498 pinstance->reset_cmd->cmd_done(pinstance->reset_cmd);
499 spin_unlock_irqrestore(
500 pinstance->host->host_lock, lock_flags);
501 }
502}
503
504
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510
511
512
513static void pmcraid_reset_type(struct pmcraid_instance *pinstance)
514{
515 u32 mask;
516 u32 intrs;
517 u32 alerts;
518
519 mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
520 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
521 alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
522
523 if ((mask & INTRS_HRRQ_VALID) == 0 ||
524 (alerts & DOORBELL_IOA_RESET_ALERT) ||
525 (intrs & PMCRAID_ERROR_INTERRUPTS)) {
526 pmcraid_info("IOA requires hard reset\n");
527 pinstance->ioa_hard_reset = 1;
528 }
529
530
531 if (intrs & INTRS_IOA_UNIT_CHECK)
532 pinstance->ioa_unit_check = 1;
533}
534
535static void pmcraid_ioa_reset(struct pmcraid_cmd *);
536
537
538
539
540
541
542static void pmcraid_bist_done(struct timer_list *t)
543{
544 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
545 struct pmcraid_instance *pinstance = cmd->drv_inst;
546 unsigned long lock_flags;
547 int rc;
548 u16 pci_reg;
549
550 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
551
552
553 if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
554 cmd->time_left > 0) {
555 pmcraid_info("BIST not complete, waiting another 2 secs\n");
556 cmd->timer.expires = jiffies + cmd->time_left;
557 cmd->time_left = 0;
558 add_timer(&cmd->timer);
559 } else {
560 cmd->time_left = 0;
561 pmcraid_info("BIST is complete, proceeding with reset\n");
562 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
563 pmcraid_ioa_reset(cmd);
564 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
565 }
566}
567
568
569
570
571
572
573
574static void pmcraid_start_bist(struct pmcraid_cmd *cmd)
575{
576 struct pmcraid_instance *pinstance = cmd->drv_inst;
577 u32 doorbells, intrs;
578
579
580 iowrite32(DOORBELL_IOA_START_BIST,
581 pinstance->int_regs.host_ioa_interrupt_reg);
582 doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
583 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
584 pmcraid_info("doorbells after start bist: %x intrs: %x\n",
585 doorbells, intrs);
586
587 cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
588 cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
589 cmd->timer.function = pmcraid_bist_done;
590 add_timer(&cmd->timer);
591}
592
593
594
595
596
597
598
599static void pmcraid_reset_alert_done(struct timer_list *t)
600{
601 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
602 struct pmcraid_instance *pinstance = cmd->drv_inst;
603 u32 status = ioread32(pinstance->ioa_status);
604 unsigned long lock_flags;
605
606
607
608
609
610 if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) ||
611 cmd->time_left <= 0) {
612 pmcraid_info("critical op is reset proceeding with reset\n");
613 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
614 pmcraid_ioa_reset(cmd);
615 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
616 } else {
617 pmcraid_info("critical op is not yet reset waiting again\n");
618
619 cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT;
620 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
621 cmd->timer.function = pmcraid_reset_alert_done;
622 add_timer(&cmd->timer);
623 }
624}
625
626static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32);
627
628
629
630
631
632
633
634
635
636static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
637{
638 struct pmcraid_instance *pinstance = cmd->drv_inst;
639 u32 doorbells;
640 int rc;
641 u16 pci_reg;
642
643
644
645
646
647
648 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
649 if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) {
650
651
652
653
654
655
656 cmd->time_left = PMCRAID_RESET_TIMEOUT;
657 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
658 cmd->timer.function = pmcraid_reset_alert_done;
659 add_timer(&cmd->timer);
660
661 iowrite32(DOORBELL_IOA_RESET_ALERT,
662 pinstance->int_regs.host_ioa_interrupt_reg);
663 doorbells =
664 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
665 pmcraid_info("doorbells after reset alert: %x\n", doorbells);
666 } else {
667 pmcraid_info("PCI config is not accessible starting BIST\n");
668 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
669 pmcraid_start_bist(cmd);
670 }
671}
672
673
674
675
676
677
678
679
680
681
682
683static void pmcraid_timeout_handler(struct timer_list *t)
684{
685 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
686 struct pmcraid_instance *pinstance = cmd->drv_inst;
687 unsigned long lock_flags;
688
689 dev_info(&pinstance->pdev->dev,
690 "Adapter being reset due to cmd(CDB[0] = %x) timeout\n",
691 cmd->ioa_cb->ioarcb.cdb[0]);
692
693
694
695
696
697
698
699 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
700 if (!pinstance->ioa_reset_in_progress) {
701 pinstance->ioa_reset_attempts = 0;
702 cmd = pmcraid_get_free_cmd(pinstance);
703
704
705
706
707 if (cmd == NULL) {
708 spin_unlock_irqrestore(pinstance->host->host_lock,
709 lock_flags);
710 pmcraid_err("no free cmnd block for timeout handler\n");
711 return;
712 }
713
714 pinstance->reset_cmd = cmd;
715 pinstance->ioa_reset_in_progress = 1;
716 } else {
717 pmcraid_info("reset is already in progress\n");
718
719 if (pinstance->reset_cmd != cmd) {
720
721
722
723
724 pmcraid_err("cmd is pending but reset in progress\n");
725 }
726
727
728
729
730
731
732 if (cmd == pinstance->reset_cmd)
733 cmd->cmd_done = pmcraid_ioa_reset;
734 }
735
736
737 if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START &&
738 pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START)
739 pmcraid_notify_ioastate(pinstance,
740 PMC_DEVICE_EVENT_RESET_START);
741
742 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
743 scsi_block_requests(pinstance->host);
744 pmcraid_reset_alert(cmd);
745 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
746}
747
748
749
750
751
752
753
754
755
756static void pmcraid_internal_done(struct pmcraid_cmd *cmd)
757{
758 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
759 cmd->ioa_cb->ioarcb.cdb[0],
760 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
761
762
763
764
765
766
767 if (cmd->completion_req) {
768 cmd->completion_req = 0;
769 complete(&cmd->wait_for_completion);
770 }
771
772
773
774
775
776 if (cmd->release) {
777 cmd->release = 0;
778 pmcraid_return_cmd(cmd);
779 }
780}
781
782
783
784
785
786
787
788
789
790
791
792
793
794static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd)
795{
796 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
797 cmd->ioa_cb->ioarcb.cdb[0],
798 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
799
800 if (cmd->release) {
801 cmd->release = 0;
802 pmcraid_return_cmd(cmd);
803 }
804 pmcraid_info("scheduling worker for config table reinitialization\n");
805 schedule_work(&cmd->drv_inst->worker_q);
806}
807
808
809
810
811
812
813
814
815
816
817
818static void pmcraid_erp_done(struct pmcraid_cmd *cmd)
819{
820 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
821 struct pmcraid_instance *pinstance = cmd->drv_inst;
822 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
823
824 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) {
825 scsi_cmd->result |= (DID_ERROR << 16);
826 scmd_printk(KERN_INFO, scsi_cmd,
827 "command CDB[0] = %x failed with IOASC: 0x%08X\n",
828 cmd->ioa_cb->ioarcb.cdb[0], ioasc);
829 }
830
831 if (cmd->sense_buffer) {
832 dma_unmap_single(&pinstance->pdev->dev, cmd->sense_buffer_dma,
833 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
834 cmd->sense_buffer = NULL;
835 cmd->sense_buffer_dma = 0;
836 }
837
838 scsi_dma_unmap(scsi_cmd);
839 pmcraid_return_cmd(cmd);
840 scsi_cmd->scsi_done(scsi_cmd);
841}
842
843
844
845
846
847
848
849
850
851
852
853
854static void _pmcraid_fire_command(struct pmcraid_cmd *cmd)
855{
856 struct pmcraid_instance *pinstance = cmd->drv_inst;
857 unsigned long lock_flags;
858
859
860
861
862
863
864 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
865 list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool);
866 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
867 atomic_inc(&pinstance->outstanding_cmds);
868
869
870 mb();
871 iowrite32(le64_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr), pinstance->ioarrin);
872}
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888static void pmcraid_send_cmd(
889 struct pmcraid_cmd *cmd,
890 void (*cmd_done) (struct pmcraid_cmd *),
891 unsigned long timeout,
892 void (*timeout_func) (struct timer_list *)
893)
894{
895
896 cmd->cmd_done = cmd_done;
897
898 if (timeout_func) {
899
900 cmd->timer.expires = jiffies + timeout;
901 cmd->timer.function = timeout_func;
902 add_timer(&cmd->timer);
903 }
904
905
906 _pmcraid_fire_command(cmd);
907}
908
909
910
911
912
913
914
915
916static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd)
917{
918 struct pmcraid_instance *pinstance = cmd->drv_inst;
919 unsigned long lock_flags;
920
921 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
922 pmcraid_ioa_reset(cmd);
923 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
924}
925
926
927
928
929
930
931
932
933
934static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd)
935{
936 pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n",
937 cmd->ioa_cb->ioarcb.cdb[0],
938 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
939
940
941
942
943 pmcraid_reinit_cmdblk(cmd);
944 cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD;
945 cmd->ioa_cb->ioarcb.resource_handle =
946 cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
947 cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN;
948 cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL;
949
950
951 pmcraid_info("firing normal shutdown command (%d) to IOA\n",
952 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle));
953
954 pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START);
955
956 pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done,
957 PMCRAID_SHUTDOWN_TIMEOUT,
958 pmcraid_timeout_handler);
959}
960
961static void pmcraid_querycfg(struct pmcraid_cmd *);
962
963
964
965
966
967
968
969
970static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd)
971{
972 struct pmcraid_instance *pinstance = cmd->drv_inst;
973 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
974 unsigned long lock_flags;
975
976
977
978
979
980 if (ioasc) {
981 pmcraid_err("IOA Inquiry failed with %x\n", ioasc);
982 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
983 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
984 pmcraid_reset_alert(cmd);
985 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
986 } else {
987 pmcraid_querycfg(cmd);
988 }
989}
990
991
992
993
994
995
996
997
998
999static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd)
1000{
1001 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
1002 struct pmcraid_ioadl_desc *ioadl;
1003 struct pmcraid_instance *pinstance = cmd->drv_inst;
1004 u16 data_size = sizeof(struct pmcraid_inquiry_data);
1005
1006 pmcraid_reinit_cmdblk(cmd);
1007 ioarcb->request_type = REQ_TYPE_SCSI;
1008 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1009 ioarcb->cdb[0] = INQUIRY;
1010 ioarcb->cdb[1] = 1;
1011 ioarcb->cdb[2] = 0xD0;
1012 ioarcb->cdb[3] = (data_size >> 8) & 0xFF;
1013 ioarcb->cdb[4] = data_size & 0xFF;
1014
1015
1016
1017 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
1018 offsetof(struct pmcraid_ioarcb,
1019 add_data.u.ioadl[0]));
1020 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
1021 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
1022
1023 ioarcb->request_flags0 |= NO_LINK_DESCS;
1024 ioarcb->data_transfer_length = cpu_to_le32(data_size);
1025 ioadl = &(ioarcb->add_data.u.ioadl[0]);
1026 ioadl->flags = IOADL_FLAGS_LAST_DESC;
1027 ioadl->address = cpu_to_le64(pinstance->inq_data_baddr);
1028 ioadl->data_len = cpu_to_le32(data_size);
1029
1030 pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done,
1031 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
1032}
1033
1034
1035
1036
1037
1038
1039
1040
1041static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd)
1042{
1043 struct pmcraid_instance *pinstance = cmd->drv_inst;
1044 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
1045 int index = cmd->hrrq_index;
1046 __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]);
1047 __be32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD);
1048 void (*done_function)(struct pmcraid_cmd *);
1049
1050 pmcraid_reinit_cmdblk(cmd);
1051 cmd->hrrq_index = index + 1;
1052
1053 if (cmd->hrrq_index < pinstance->num_hrrq) {
1054 done_function = pmcraid_identify_hrrq;
1055 } else {
1056 cmd->hrrq_index = 0;
1057 done_function = pmcraid_get_fwversion;
1058 }
1059
1060
1061 ioarcb->request_type = REQ_TYPE_IOACMD;
1062 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1063
1064
1065 ioarcb->hrrq_id = index;
1066 ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ;
1067 ioarcb->cdb[1] = index;
1068
1069
1070
1071
1072 pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n",
1073 hrrq_addr, ioarcb->ioarcb_bus_addr, index);
1074
1075 memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr));
1076 memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size));
1077
1078
1079
1080
1081
1082 pmcraid_send_cmd(cmd, done_function,
1083 PMCRAID_INTERNAL_TIMEOUT,
1084 pmcraid_timeout_handler);
1085}
1086
1087static void pmcraid_process_ccn(struct pmcraid_cmd *cmd);
1088static void pmcraid_process_ldn(struct pmcraid_cmd *cmd);
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd)
1099{
1100 if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE)
1101 atomic_set(&(cmd->drv_inst->ccn.ignore), 0);
1102 else
1103 atomic_set(&(cmd->drv_inst->ldn.ignore), 0);
1104
1105 pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL);
1106}
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117static struct pmcraid_cmd *pmcraid_init_hcam
1118(
1119 struct pmcraid_instance *pinstance,
1120 u8 type
1121)
1122{
1123 struct pmcraid_cmd *cmd;
1124 struct pmcraid_ioarcb *ioarcb;
1125 struct pmcraid_ioadl_desc *ioadl;
1126 struct pmcraid_hostrcb *hcam;
1127 void (*cmd_done) (struct pmcraid_cmd *);
1128 dma_addr_t dma;
1129 int rcb_size;
1130
1131 cmd = pmcraid_get_free_cmd(pinstance);
1132
1133 if (!cmd) {
1134 pmcraid_err("no free command blocks for hcam\n");
1135 return cmd;
1136 }
1137
1138 if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) {
1139 rcb_size = sizeof(struct pmcraid_hcam_ccn_ext);
1140 cmd_done = pmcraid_process_ccn;
1141 dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE;
1142 hcam = &pinstance->ccn;
1143 } else {
1144 rcb_size = sizeof(struct pmcraid_hcam_ldn);
1145 cmd_done = pmcraid_process_ldn;
1146 dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE;
1147 hcam = &pinstance->ldn;
1148 }
1149
1150
1151 hcam->cmd = cmd;
1152
1153 ioarcb = &cmd->ioa_cb->ioarcb;
1154 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
1155 offsetof(struct pmcraid_ioarcb,
1156 add_data.u.ioadl[0]));
1157 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
1158 ioadl = ioarcb->add_data.u.ioadl;
1159
1160
1161 ioarcb->request_type = REQ_TYPE_HCAM;
1162 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1163 ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC;
1164 ioarcb->cdb[1] = type;
1165 ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF;
1166 ioarcb->cdb[8] = (rcb_size) & 0xFF;
1167
1168 ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
1169
1170 ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
1171 ioadl[0].data_len = cpu_to_le32(rcb_size);
1172 ioadl[0].address = cpu_to_le64(dma);
1173
1174 cmd->cmd_done = cmd_done;
1175 return cmd;
1176}
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type)
1189{
1190 struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type);
1191 pmcraid_send_hcam_cmd(cmd);
1192}
1193
1194
1195
1196
1197
1198
1199
1200
1201static void pmcraid_prepare_cancel_cmd(
1202 struct pmcraid_cmd *cmd,
1203 struct pmcraid_cmd *cmd_to_cancel
1204)
1205{
1206 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
1207 __be64 ioarcb_addr;
1208
1209
1210
1211
1212
1213 ioarcb_addr = cpu_to_be64(le64_to_cpu(cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr));
1214
1215
1216
1217
1218 ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle;
1219 ioarcb->request_type = REQ_TYPE_IOACMD;
1220 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
1221 ioarcb->cdb[0] = PMCRAID_ABORT_CMD;
1222
1223 memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr));
1224}
1225
1226
1227
1228
1229
1230
1231
1232
1233static void pmcraid_cancel_hcam(
1234 struct pmcraid_cmd *cmd,
1235 u8 type,
1236 void (*cmd_done) (struct pmcraid_cmd *)
1237)
1238{
1239 struct pmcraid_instance *pinstance;
1240 struct pmcraid_hostrcb *hcam;
1241
1242 pinstance = cmd->drv_inst;
1243 hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ?
1244 &pinstance->ldn : &pinstance->ccn;
1245
1246
1247
1248
1249 if (hcam->cmd == NULL)
1250 return;
1251
1252 pmcraid_prepare_cancel_cmd(cmd, hcam->cmd);
1253
1254
1255
1256
1257 pmcraid_send_cmd(cmd, cmd_done,
1258 PMCRAID_INTERNAL_TIMEOUT,
1259 pmcraid_timeout_handler);
1260}
1261
1262
1263
1264
1265
1266
1267static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd)
1268{
1269 pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n",
1270 cmd->ioa_cb->ioarcb.cdb[0],
1271 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
1272
1273 pmcraid_reinit_cmdblk(cmd);
1274
1275 pmcraid_cancel_hcam(cmd,
1276 PMCRAID_HCAM_CODE_CONFIG_CHANGE,
1277 pmcraid_ioa_shutdown);
1278}
1279
1280
1281
1282
1283
1284
1285static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd)
1286{
1287 pmcraid_cancel_hcam(cmd,
1288 PMCRAID_HCAM_CODE_LOG_DATA,
1289 pmcraid_cancel_ccn);
1290}
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301static int pmcraid_expose_resource(u16 fw_version,
1302 struct pmcraid_config_table_entry *cfgte)
1303{
1304 int retval = 0;
1305
1306 if (cfgte->resource_type == RES_TYPE_VSET) {
1307 if (fw_version <= PMCRAID_FW_VERSION_1)
1308 retval = ((cfgte->unique_flags1 & 0x80) == 0);
1309 else
1310 retval = ((cfgte->unique_flags0 & 0x80) == 0 &&
1311 (cfgte->unique_flags1 & 0x80) == 0);
1312
1313 } else if (cfgte->resource_type == RES_TYPE_GSCSI)
1314 retval = (RES_BUS(cfgte->resource_address) !=
1315 PMCRAID_VIRTUAL_ENCL_BUS_ID);
1316 return retval;
1317}
1318
1319
1320enum {
1321 PMCRAID_AEN_ATTR_UNSPEC,
1322 PMCRAID_AEN_ATTR_EVENT,
1323 __PMCRAID_AEN_ATTR_MAX,
1324};
1325#define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1)
1326
1327
1328enum {
1329 PMCRAID_AEN_CMD_UNSPEC,
1330 PMCRAID_AEN_CMD_EVENT,
1331 __PMCRAID_AEN_CMD_MAX,
1332};
1333#define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1)
1334
1335static struct genl_multicast_group pmcraid_mcgrps[] = {
1336 { .name = "events", },
1337};
1338
1339static struct genl_family pmcraid_event_family __ro_after_init = {
1340 .module = THIS_MODULE,
1341 .name = "pmcraid",
1342 .version = 1,
1343 .maxattr = PMCRAID_AEN_ATTR_MAX,
1344 .mcgrps = pmcraid_mcgrps,
1345 .n_mcgrps = ARRAY_SIZE(pmcraid_mcgrps),
1346};
1347
1348
1349
1350
1351
1352
1353
1354
1355static int __init pmcraid_netlink_init(void)
1356{
1357 int result;
1358
1359 result = genl_register_family(&pmcraid_event_family);
1360
1361 if (result)
1362 return result;
1363
1364 pmcraid_info("registered NETLINK GENERIC group: %d\n",
1365 pmcraid_event_family.id);
1366
1367 return result;
1368}
1369
1370
1371
1372
1373
1374
1375
1376static void pmcraid_netlink_release(void)
1377{
1378 genl_unregister_family(&pmcraid_event_family);
1379}
1380
1381
1382
1383
1384
1385
1386
1387
1388static int pmcraid_notify_aen(
1389 struct pmcraid_instance *pinstance,
1390 struct pmcraid_aen_msg *aen_msg,
1391 u32 data_size)
1392{
1393 struct sk_buff *skb;
1394 void *msg_header;
1395 u32 total_size, nla_genl_hdr_total_size;
1396 int result;
1397
1398 aen_msg->hostno = (pinstance->host->unique_id << 16 |
1399 MINOR(pinstance->cdev.dev));
1400 aen_msg->length = data_size;
1401
1402 data_size += sizeof(*aen_msg);
1403
1404 total_size = nla_total_size(data_size);
1405
1406 nla_genl_hdr_total_size =
1407 (total_size + (GENL_HDRLEN +
1408 ((struct genl_family *)&pmcraid_event_family)->hdrsize)
1409 + NLMSG_HDRLEN);
1410 skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC);
1411
1412
1413 if (!skb) {
1414 pmcraid_err("Failed to allocate aen data SKB of size: %x\n",
1415 total_size);
1416 return -ENOMEM;
1417 }
1418
1419
1420 msg_header = genlmsg_put(skb, 0, 0,
1421 &pmcraid_event_family, 0,
1422 PMCRAID_AEN_CMD_EVENT);
1423 if (!msg_header) {
1424 pmcraid_err("failed to copy command details\n");
1425 nlmsg_free(skb);
1426 return -ENOMEM;
1427 }
1428
1429 result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg);
1430
1431 if (result) {
1432 pmcraid_err("failed to copy AEN attribute data\n");
1433 nlmsg_free(skb);
1434 return -EINVAL;
1435 }
1436
1437
1438 genlmsg_end(skb, msg_header);
1439
1440 result = genlmsg_multicast(&pmcraid_event_family, skb,
1441 0, 0, GFP_ATOMIC);
1442
1443
1444
1445
1446 if (result)
1447 pmcraid_info("error (%x) sending aen event message\n", result);
1448 return result;
1449}
1450
1451
1452
1453
1454
1455
1456
1457
1458static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance)
1459{
1460 return pmcraid_notify_aen(pinstance,
1461 pinstance->ccn.msg,
1462 le32_to_cpu(pinstance->ccn.hcam->data_len) +
1463 sizeof(struct pmcraid_hcam_hdr));
1464}
1465
1466
1467
1468
1469
1470
1471
1472
1473static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance)
1474{
1475 return pmcraid_notify_aen(pinstance,
1476 pinstance->ldn.msg,
1477 le32_to_cpu(pinstance->ldn.hcam->data_len) +
1478 sizeof(struct pmcraid_hcam_hdr));
1479}
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt)
1490{
1491 pinstance->scn.ioa_state = evt;
1492 pmcraid_notify_aen(pinstance,
1493 &pinstance->scn.msg,
1494 sizeof(u32));
1495}
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
1506{
1507 struct pmcraid_config_table_entry *cfg_entry;
1508 struct pmcraid_hcam_ccn *ccn_hcam;
1509 struct pmcraid_cmd *cmd;
1510 struct pmcraid_cmd *cfgcmd;
1511 struct pmcraid_resource_entry *res = NULL;
1512 unsigned long lock_flags;
1513 unsigned long host_lock_flags;
1514 u32 new_entry = 1;
1515 u32 hidden_entry = 0;
1516 u16 fw_version;
1517 int rc;
1518
1519 ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam;
1520 cfg_entry = &ccn_hcam->cfg_entry;
1521 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
1522
1523 pmcraid_info("CCN(%x): %x timestamp: %llx type: %x lost: %x flags: %x \
1524 res: %x:%x:%x:%x\n",
1525 le32_to_cpu(pinstance->ccn.hcam->ilid),
1526 pinstance->ccn.hcam->op_code,
1527 (le32_to_cpu(pinstance->ccn.hcam->timestamp1) |
1528 ((le32_to_cpu(pinstance->ccn.hcam->timestamp2) & 0xffffffffLL) << 32)),
1529 pinstance->ccn.hcam->notification_type,
1530 pinstance->ccn.hcam->notification_lost,
1531 pinstance->ccn.hcam->flags,
1532 pinstance->host->unique_id,
1533 RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID :
1534 (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID :
1535 RES_BUS(cfg_entry->resource_address)),
1536 RES_IS_VSET(*cfg_entry) ?
1537 (fw_version <= PMCRAID_FW_VERSION_1 ?
1538 cfg_entry->unique_flags1 :
1539 le16_to_cpu(cfg_entry->array_id) & 0xFF) :
1540 RES_TARGET(cfg_entry->resource_address),
1541 RES_LUN(cfg_entry->resource_address));
1542
1543
1544
1545 if (pinstance->ccn.hcam->notification_lost) {
1546 cfgcmd = pmcraid_get_free_cmd(pinstance);
1547 if (cfgcmd) {
1548 pmcraid_info("lost CCN, reading config table\b");
1549 pinstance->reinit_cfg_table = 1;
1550 pmcraid_querycfg(cfgcmd);
1551 } else {
1552 pmcraid_err("lost CCN, no free cmd for querycfg\n");
1553 }
1554 goto out_notify_apps;
1555 }
1556
1557
1558
1559
1560
1561 if (pinstance->ccn.hcam->notification_type ==
1562 NOTIFICATION_TYPE_ENTRY_CHANGED &&
1563 cfg_entry->resource_type == RES_TYPE_VSET) {
1564 hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
1565 } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) {
1566 goto out_notify_apps;
1567 }
1568
1569 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
1570 list_for_each_entry(res, &pinstance->used_res_q, queue) {
1571 rc = memcmp(&res->cfg_entry.resource_address,
1572 &cfg_entry->resource_address,
1573 sizeof(cfg_entry->resource_address));
1574 if (!rc) {
1575 new_entry = 0;
1576 break;
1577 }
1578 }
1579
1580 if (new_entry) {
1581
1582 if (hidden_entry) {
1583 spin_unlock_irqrestore(&pinstance->resource_lock,
1584 lock_flags);
1585 goto out_notify_apps;
1586 }
1587
1588
1589
1590
1591
1592 if (list_empty(&pinstance->free_res_q)) {
1593 spin_unlock_irqrestore(&pinstance->resource_lock,
1594 lock_flags);
1595 pmcraid_err("too many resources attached\n");
1596 spin_lock_irqsave(pinstance->host->host_lock,
1597 host_lock_flags);
1598 pmcraid_send_hcam(pinstance,
1599 PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1600 spin_unlock_irqrestore(pinstance->host->host_lock,
1601 host_lock_flags);
1602 return;
1603 }
1604
1605 res = list_entry(pinstance->free_res_q.next,
1606 struct pmcraid_resource_entry, queue);
1607
1608 list_del(&res->queue);
1609 res->scsi_dev = NULL;
1610 res->reset_progress = 0;
1611 list_add_tail(&res->queue, &pinstance->used_res_q);
1612 }
1613
1614 memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size);
1615
1616 if (pinstance->ccn.hcam->notification_type ==
1617 NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) {
1618 if (res->scsi_dev) {
1619 if (fw_version <= PMCRAID_FW_VERSION_1)
1620 res->cfg_entry.unique_flags1 &= 0x7F;
1621 else
1622 res->cfg_entry.array_id &= cpu_to_le16(0xFF);
1623 res->change_detected = RES_CHANGE_DEL;
1624 res->cfg_entry.resource_handle =
1625 PMCRAID_INVALID_RES_HANDLE;
1626 schedule_work(&pinstance->worker_q);
1627 } else {
1628
1629 list_move_tail(&res->queue, &pinstance->free_res_q);
1630 }
1631 } else if (!res->scsi_dev) {
1632 res->change_detected = RES_CHANGE_ADD;
1633 schedule_work(&pinstance->worker_q);
1634 }
1635 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
1636
1637out_notify_apps:
1638
1639
1640 if (!pmcraid_disable_aen)
1641 pmcraid_notify_ccn(pinstance);
1642
1643 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1644 if (cmd)
1645 pmcraid_send_hcam_cmd(cmd);
1646}
1647
1648
1649
1650
1651
1652
1653
1654static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc)
1655{
1656 int i;
1657 for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) {
1658 if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc)
1659 return &pmcraid_ioasc_error_table[i];
1660 }
1661 return NULL;
1662}
1663
1664
1665
1666
1667
1668
1669static void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd)
1670{
1671 struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc);
1672
1673 if (error_info == NULL ||
1674 cmd->drv_inst->current_log_level < error_info->log_level)
1675 return;
1676
1677
1678 pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n",
1679 cmd->ioa_cb->ioarcb.cdb[0],
1680 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
1681 ioasc, error_info->error_string);
1682}
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance)
1693{
1694 struct pmcraid_hcam_ldn *hcam_ldn;
1695 u32 ioasc;
1696
1697 hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
1698
1699 pmcraid_info
1700 ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n",
1701 pinstance->ldn.hcam->ilid,
1702 pinstance->ldn.hcam->op_code,
1703 pinstance->ldn.hcam->notification_type,
1704 pinstance->ldn.hcam->notification_lost,
1705 pinstance->ldn.hcam->flags,
1706 pinstance->ldn.hcam->overlay_id);
1707
1708
1709 if (pinstance->ldn.hcam->notification_type !=
1710 NOTIFICATION_TYPE_ERROR_LOG)
1711 return;
1712
1713 if (pinstance->ldn.hcam->notification_lost ==
1714 HOSTRCB_NOTIFICATIONS_LOST)
1715 dev_info(&pinstance->pdev->dev, "Error notifications lost\n");
1716
1717 ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc);
1718
1719 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
1720 ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) {
1721 dev_info(&pinstance->pdev->dev,
1722 "UnitAttention due to IOA Bus Reset\n");
1723 scsi_report_bus_reset(
1724 pinstance->host,
1725 RES_BUS(hcam_ldn->error_log.fd_ra));
1726 }
1727
1728 return;
1729}
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741static void pmcraid_process_ccn(struct pmcraid_cmd *cmd)
1742{
1743 struct pmcraid_instance *pinstance = cmd->drv_inst;
1744 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1745 unsigned long lock_flags;
1746
1747 pinstance->ccn.cmd = NULL;
1748 pmcraid_return_cmd(cmd);
1749
1750
1751
1752
1753
1754 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
1755 atomic_read(&pinstance->ccn.ignore) == 1) {
1756 return;
1757 } else if (ioasc) {
1758 dev_info(&pinstance->pdev->dev,
1759 "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc);
1760 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
1761 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1762 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
1763 } else {
1764 pmcraid_handle_config_change(pinstance);
1765 }
1766}
1767
1768static void pmcraid_initiate_reset(struct pmcraid_instance *);
1769static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd);
1770
1771
1772
1773
1774
1775
1776
1777static void pmcraid_process_ldn(struct pmcraid_cmd *cmd)
1778{
1779 struct pmcraid_instance *pinstance = cmd->drv_inst;
1780 struct pmcraid_hcam_ldn *ldn_hcam =
1781 (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
1782 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1783 u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc);
1784 unsigned long lock_flags;
1785
1786
1787 pinstance->ldn.cmd = NULL;
1788 pmcraid_return_cmd(cmd);
1789
1790
1791
1792
1793
1794 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
1795 atomic_read(&pinstance->ccn.ignore) == 1) {
1796 return;
1797 } else if (!ioasc) {
1798 pmcraid_handle_error_log(pinstance);
1799 if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) {
1800 spin_lock_irqsave(pinstance->host->host_lock,
1801 lock_flags);
1802 pmcraid_initiate_reset(pinstance);
1803 spin_unlock_irqrestore(pinstance->host->host_lock,
1804 lock_flags);
1805 return;
1806 }
1807 if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) {
1808 pinstance->timestamp_error = 1;
1809 pmcraid_set_timestamp(cmd);
1810 }
1811 } else {
1812 dev_info(&pinstance->pdev->dev,
1813 "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc);
1814 }
1815
1816 if (!pmcraid_disable_aen)
1817 pmcraid_notify_ldn(pinstance);
1818
1819 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
1820 if (cmd)
1821 pmcraid_send_hcam_cmd(cmd);
1822}
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832static void pmcraid_register_hcams(struct pmcraid_instance *pinstance)
1833{
1834 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1835 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
1836}
1837
1838
1839
1840
1841
1842static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd)
1843{
1844 struct pmcraid_instance *pinstance = cmd->drv_inst;
1845
1846
1847
1848
1849
1850
1851 atomic_set(&pinstance->ccn.ignore, 1);
1852 atomic_set(&pinstance->ldn.ignore, 1);
1853
1854
1855
1856
1857
1858 if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) ||
1859 pinstance->ioa_unit_check) {
1860 pinstance->force_ioa_reset = 0;
1861 pinstance->ioa_unit_check = 0;
1862 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
1863 pmcraid_reset_alert(cmd);
1864 return;
1865 }
1866
1867
1868
1869
1870
1871 pmcraid_cancel_ldn(cmd);
1872}
1873
1874static void pmcraid_reinit_buffers(struct pmcraid_instance *);
1875
1876
1877
1878
1879
1880
1881
1882static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance)
1883{
1884 u32 intrs;
1885
1886 pmcraid_reinit_buffers(pinstance);
1887 intrs = pmcraid_read_interrupts(pinstance);
1888
1889 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
1890
1891 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
1892 if (!pinstance->interrupt_mode) {
1893 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
1894 pinstance->int_regs.
1895 ioa_host_interrupt_mask_reg);
1896 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
1897 pinstance->int_regs.ioa_host_interrupt_clr_reg);
1898 }
1899 return 1;
1900 } else {
1901 return 0;
1902 }
1903}
1904
1905
1906
1907
1908
1909
1910
1911
1912static void pmcraid_soft_reset(struct pmcraid_cmd *cmd)
1913{
1914 struct pmcraid_instance *pinstance = cmd->drv_inst;
1915 u32 int_reg;
1916 u32 doorbell;
1917
1918
1919
1920
1921
1922 cmd->cmd_done = pmcraid_ioa_reset;
1923 cmd->timer.expires = jiffies +
1924 msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT);
1925 cmd->timer.function = pmcraid_timeout_handler;
1926
1927 if (!timer_pending(&cmd->timer))
1928 add_timer(&cmd->timer);
1929
1930
1931
1932
1933 doorbell = DOORBELL_RUNTIME_RESET |
1934 DOORBELL_ENABLE_DESTRUCTIVE_DIAGS;
1935
1936
1937
1938
1939 if (pinstance->interrupt_mode) {
1940 iowrite32(DOORBELL_INTR_MODE_MSIX,
1941 pinstance->int_regs.host_ioa_interrupt_reg);
1942 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
1943 }
1944
1945 iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg);
1946 ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
1947 int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
1948
1949 pmcraid_info("Waiting for IOA to become operational %x:%x\n",
1950 ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
1951 int_reg);
1952}
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962static void pmcraid_get_dump(struct pmcraid_instance *pinstance)
1963{
1964 pmcraid_info("%s is not yet implemented\n", __func__);
1965}
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance)
1980{
1981 struct pmcraid_cmd *cmd, *temp;
1982 unsigned long lock_flags;
1983
1984
1985
1986
1987 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
1988 list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool,
1989 free_list) {
1990 list_del(&cmd->free_list);
1991 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
1992 lock_flags);
1993 cmd->ioa_cb->ioasa.ioasc =
1994 cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET);
1995 cmd->ioa_cb->ioasa.ilid =
1996 cpu_to_le32(PMCRAID_DRIVER_ILID);
1997
1998
1999 del_timer(&cmd->timer);
2000
2001
2002
2003
2004
2005
2006 if (cmd->scsi_cmd) {
2007
2008 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2009 __le32 resp = cmd->ioa_cb->ioarcb.response_handle;
2010
2011 scsi_cmd->result |= DID_ERROR << 16;
2012
2013 scsi_dma_unmap(scsi_cmd);
2014 pmcraid_return_cmd(cmd);
2015
2016 pmcraid_info("failing(%d) CDB[0] = %x result: %x\n",
2017 le32_to_cpu(resp) >> 2,
2018 cmd->ioa_cb->ioarcb.cdb[0],
2019 scsi_cmd->result);
2020 scsi_cmd->scsi_done(scsi_cmd);
2021 } else if (cmd->cmd_done == pmcraid_internal_done ||
2022 cmd->cmd_done == pmcraid_erp_done) {
2023 cmd->cmd_done(cmd);
2024 } else if (cmd->cmd_done != pmcraid_ioa_reset &&
2025 cmd->cmd_done != pmcraid_ioa_shutdown_done) {
2026 pmcraid_return_cmd(cmd);
2027 }
2028
2029 atomic_dec(&pinstance->outstanding_cmds);
2030 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
2031 }
2032
2033 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
2034}
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd)
2052{
2053 struct pmcraid_instance *pinstance = cmd->drv_inst;
2054 u8 reset_complete = 0;
2055
2056 pinstance->ioa_reset_in_progress = 1;
2057
2058 if (pinstance->reset_cmd != cmd) {
2059 pmcraid_err("reset is called with different command block\n");
2060 pinstance->reset_cmd = cmd;
2061 }
2062
2063 pmcraid_info("reset_engine: state = %d, command = %p\n",
2064 pinstance->ioa_state, cmd);
2065
2066 switch (pinstance->ioa_state) {
2067
2068 case IOA_STATE_DEAD:
2069
2070
2071
2072
2073 pmcraid_err("IOA is offline no reset is possible\n");
2074 reset_complete = 1;
2075 break;
2076
2077 case IOA_STATE_IN_BRINGDOWN:
2078
2079
2080
2081
2082 pmcraid_disable_interrupts(pinstance, ~0);
2083 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2084 pmcraid_reset_alert(cmd);
2085 break;
2086
2087 case IOA_STATE_UNKNOWN:
2088
2089
2090
2091 scsi_block_requests(pinstance->host);
2092
2093
2094
2095
2096
2097 if (pinstance->ioa_hard_reset == 0) {
2098 if (ioread32(pinstance->ioa_status) &
2099 INTRS_TRANSITION_TO_OPERATIONAL) {
2100 pmcraid_info("sticky bit set, bring-up\n");
2101 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2102 pmcraid_reinit_cmdblk(cmd);
2103 pmcraid_identify_hrrq(cmd);
2104 } else {
2105 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
2106 pmcraid_soft_reset(cmd);
2107 }
2108 } else {
2109
2110
2111
2112 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2113 pmcraid_reset_alert(cmd);
2114 }
2115 break;
2116
2117 case IOA_STATE_IN_RESET_ALERT:
2118
2119
2120
2121
2122
2123 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
2124 pmcraid_start_bist(cmd);
2125 break;
2126
2127 case IOA_STATE_IN_HARD_RESET:
2128 pinstance->ioa_reset_attempts++;
2129
2130
2131 if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) {
2132 pinstance->ioa_reset_attempts = 0;
2133 pmcraid_err("IOA didn't respond marking it as dead\n");
2134 pinstance->ioa_state = IOA_STATE_DEAD;
2135
2136 if (pinstance->ioa_bringdown)
2137 pmcraid_notify_ioastate(pinstance,
2138 PMC_DEVICE_EVENT_SHUTDOWN_FAILED);
2139 else
2140 pmcraid_notify_ioastate(pinstance,
2141 PMC_DEVICE_EVENT_RESET_FAILED);
2142 reset_complete = 1;
2143 break;
2144 }
2145
2146
2147
2148
2149 pci_restore_state(pinstance->pdev);
2150
2151
2152 pmcraid_fail_outstanding_cmds(pinstance);
2153
2154
2155 if (pinstance->ioa_unit_check) {
2156 pmcraid_info("unit check is active\n");
2157 pinstance->ioa_unit_check = 0;
2158 pmcraid_get_dump(pinstance);
2159 pinstance->ioa_reset_attempts--;
2160 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2161 pmcraid_reset_alert(cmd);
2162 break;
2163 }
2164
2165
2166
2167
2168
2169 if (pinstance->ioa_bringdown) {
2170 pmcraid_info("bringing down the adapter\n");
2171 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2172 pinstance->ioa_bringdown = 0;
2173 pinstance->ioa_state = IOA_STATE_UNKNOWN;
2174 pmcraid_notify_ioastate(pinstance,
2175 PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS);
2176 reset_complete = 1;
2177 } else {
2178
2179
2180
2181
2182 if (pmcraid_reset_enable_ioa(pinstance)) {
2183 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2184 pmcraid_info("bringing up the adapter\n");
2185 pmcraid_reinit_cmdblk(cmd);
2186 pmcraid_identify_hrrq(cmd);
2187 } else {
2188 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
2189 pmcraid_soft_reset(cmd);
2190 }
2191 }
2192 break;
2193
2194 case IOA_STATE_IN_SOFT_RESET:
2195
2196
2197
2198 pmcraid_info("In softreset proceeding with bring-up\n");
2199 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2200
2201
2202
2203
2204
2205 pmcraid_identify_hrrq(cmd);
2206 break;
2207
2208 case IOA_STATE_IN_BRINGUP:
2209
2210
2211
2212 pinstance->ioa_state = IOA_STATE_OPERATIONAL;
2213 reset_complete = 1;
2214 break;
2215
2216 case IOA_STATE_OPERATIONAL:
2217 default:
2218
2219
2220
2221
2222
2223 if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE &&
2224 pinstance->force_ioa_reset == 0) {
2225 pmcraid_notify_ioastate(pinstance,
2226 PMC_DEVICE_EVENT_RESET_SUCCESS);
2227 reset_complete = 1;
2228 } else {
2229 if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE)
2230 pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN;
2231 pmcraid_reinit_cmdblk(cmd);
2232 pmcraid_unregister_hcams(cmd);
2233 }
2234 break;
2235 }
2236
2237
2238
2239
2240
2241
2242 if (reset_complete) {
2243 pinstance->ioa_reset_in_progress = 0;
2244 pinstance->ioa_reset_attempts = 0;
2245 pinstance->reset_cmd = NULL;
2246 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2247 pinstance->ioa_bringdown = 0;
2248 pmcraid_return_cmd(cmd);
2249
2250
2251
2252
2253 if (pinstance->ioa_state == IOA_STATE_OPERATIONAL)
2254 pmcraid_register_hcams(pinstance);
2255
2256 wake_up_all(&pinstance->reset_wait_q);
2257 }
2258
2259 return;
2260}
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance)
2274{
2275 struct pmcraid_cmd *cmd;
2276
2277
2278
2279
2280 if (!pinstance->ioa_reset_in_progress) {
2281 scsi_block_requests(pinstance->host);
2282 cmd = pmcraid_get_free_cmd(pinstance);
2283
2284 if (cmd == NULL) {
2285 pmcraid_err("no cmnd blocks for initiate_reset\n");
2286 return;
2287 }
2288
2289 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2290 pinstance->reset_cmd = cmd;
2291 pinstance->force_ioa_reset = 1;
2292 pmcraid_notify_ioastate(pinstance,
2293 PMC_DEVICE_EVENT_RESET_START);
2294 pmcraid_ioa_reset(cmd);
2295 }
2296}
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312static int pmcraid_reset_reload(
2313 struct pmcraid_instance *pinstance,
2314 u8 shutdown_type,
2315 u8 target_state
2316)
2317{
2318 struct pmcraid_cmd *reset_cmd = NULL;
2319 unsigned long lock_flags;
2320 int reset = 1;
2321
2322 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2323
2324 if (pinstance->ioa_reset_in_progress) {
2325 pmcraid_info("reset_reload: reset is already in progress\n");
2326
2327 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2328
2329 wait_event(pinstance->reset_wait_q,
2330 !pinstance->ioa_reset_in_progress);
2331
2332 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2333
2334 if (pinstance->ioa_state == IOA_STATE_DEAD) {
2335 pmcraid_info("reset_reload: IOA is dead\n");
2336 goto out_unlock;
2337 }
2338
2339 if (pinstance->ioa_state == target_state) {
2340 reset = 0;
2341 goto out_unlock;
2342 }
2343 }
2344
2345 pmcraid_info("reset_reload: proceeding with reset\n");
2346 scsi_block_requests(pinstance->host);
2347 reset_cmd = pmcraid_get_free_cmd(pinstance);
2348 if (reset_cmd == NULL) {
2349 pmcraid_err("no free cmnd for reset_reload\n");
2350 goto out_unlock;
2351 }
2352
2353 if (shutdown_type == SHUTDOWN_NORMAL)
2354 pinstance->ioa_bringdown = 1;
2355
2356 pinstance->ioa_shutdown_type = shutdown_type;
2357 pinstance->reset_cmd = reset_cmd;
2358 pinstance->force_ioa_reset = reset;
2359 pmcraid_info("reset_reload: initiating reset\n");
2360 pmcraid_ioa_reset(reset_cmd);
2361 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2362 pmcraid_info("reset_reload: waiting for reset to complete\n");
2363 wait_event(pinstance->reset_wait_q,
2364 !pinstance->ioa_reset_in_progress);
2365
2366 pmcraid_info("reset_reload: reset is complete !!\n");
2367 scsi_unblock_requests(pinstance->host);
2368 return pinstance->ioa_state != target_state;
2369
2370out_unlock:
2371 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2372 return reset;
2373}
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance)
2384{
2385 return pmcraid_reset_reload(pinstance,
2386 SHUTDOWN_NORMAL,
2387 IOA_STATE_UNKNOWN);
2388}
2389
2390
2391
2392
2393
2394
2395
2396
2397
2398static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance)
2399{
2400 pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START);
2401
2402 return pmcraid_reset_reload(pinstance,
2403 SHUTDOWN_NONE,
2404 IOA_STATE_OPERATIONAL);
2405}
2406
2407
2408
2409
2410
2411
2412
2413
2414static void pmcraid_request_sense(struct pmcraid_cmd *cmd)
2415{
2416 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
2417 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
2418 struct device *dev = &cmd->drv_inst->pdev->dev;
2419
2420 cmd->sense_buffer = cmd->scsi_cmd->sense_buffer;
2421 cmd->sense_buffer_dma = dma_map_single(dev, cmd->sense_buffer,
2422 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
2423 if (dma_mapping_error(dev, cmd->sense_buffer_dma)) {
2424 pmcraid_err
2425 ("couldn't allocate sense buffer for request sense\n");
2426 pmcraid_erp_done(cmd);
2427 return;
2428 }
2429
2430
2431 memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa));
2432 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
2433 ioarcb->request_flags0 = (SYNC_COMPLETE |
2434 NO_LINK_DESCS |
2435 INHIBIT_UL_CHECK);
2436 ioarcb->request_type = REQ_TYPE_SCSI;
2437 ioarcb->cdb[0] = REQUEST_SENSE;
2438 ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE;
2439
2440 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
2441 offsetof(struct pmcraid_ioarcb,
2442 add_data.u.ioadl[0]));
2443 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
2444
2445 ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
2446
2447 ioadl->address = cpu_to_le64(cmd->sense_buffer_dma);
2448 ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
2449 ioadl->flags = IOADL_FLAGS_LAST_DESC;
2450
2451
2452
2453
2454
2455
2456 pmcraid_send_cmd(cmd, pmcraid_erp_done,
2457 PMCRAID_REQUEST_SENSE_TIMEOUT,
2458 pmcraid_timeout_handler);
2459}
2460
2461
2462
2463
2464
2465
2466
2467
2468static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, bool need_sense)
2469{
2470 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2471 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
2472 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
2473
2474 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
2475 ioarcb->request_flags0 = SYNC_OVERRIDE;
2476 ioarcb->request_type = REQ_TYPE_IOACMD;
2477 ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS;
2478
2479 if (RES_IS_GSCSI(res->cfg_entry))
2480 ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL;
2481
2482 ioarcb->ioadl_bus_addr = 0;
2483 ioarcb->ioadl_length = 0;
2484 ioarcb->data_transfer_length = 0;
2485 ioarcb->ioarcb_bus_addr &= cpu_to_le64((~0x1FULL));
2486
2487
2488
2489
2490 pmcraid_send_cmd(cmd, need_sense ?
2491 pmcraid_erp_done : pmcraid_request_sense,
2492 PMCRAID_REQUEST_SENSE_TIMEOUT,
2493 pmcraid_timeout_handler);
2494}
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd)
2505{
2506 u8 *sense_buf = cmd->scsi_cmd->sense_buffer;
2507 struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata;
2508 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
2509 u32 ioasc = le32_to_cpu(ioasa->ioasc);
2510 u32 failing_lba = 0;
2511
2512 memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
2513 cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
2514
2515 if (RES_IS_VSET(res->cfg_entry) &&
2516 ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC &&
2517 ioasa->u.vset.failing_lba_hi != 0) {
2518
2519 sense_buf[0] = 0x72;
2520 sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc);
2521 sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc);
2522 sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
2523
2524 sense_buf[7] = 12;
2525 sense_buf[8] = 0;
2526 sense_buf[9] = 0x0A;
2527 sense_buf[10] = 0x80;
2528
2529 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi);
2530
2531 sense_buf[12] = (failing_lba & 0xff000000) >> 24;
2532 sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
2533 sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
2534 sense_buf[15] = failing_lba & 0x000000ff;
2535
2536 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo);
2537
2538 sense_buf[16] = (failing_lba & 0xff000000) >> 24;
2539 sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
2540 sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
2541 sense_buf[19] = failing_lba & 0x000000ff;
2542 } else {
2543 sense_buf[0] = 0x70;
2544 sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc);
2545 sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc);
2546 sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
2547
2548 if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) {
2549 if (RES_IS_VSET(res->cfg_entry))
2550 failing_lba =
2551 le32_to_cpu(ioasa->u.
2552 vset.failing_lba_lo);
2553 sense_buf[0] |= 0x80;
2554 sense_buf[3] = (failing_lba >> 24) & 0xff;
2555 sense_buf[4] = (failing_lba >> 16) & 0xff;
2556 sense_buf[5] = (failing_lba >> 8) & 0xff;
2557 sense_buf[6] = failing_lba & 0xff;
2558 }
2559
2560 sense_buf[7] = 6;
2561 }
2562}
2563
2564
2565
2566
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
2577{
2578 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2579 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
2580 struct pmcraid_instance *pinstance = cmd->drv_inst;
2581 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
2582 u32 ioasc = le32_to_cpu(ioasa->ioasc);
2583 u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK;
2584 bool sense_copied = false;
2585
2586 if (!res) {
2587 pmcraid_info("resource pointer is NULL\n");
2588 return 0;
2589 }
2590
2591
2592 if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD)
2593 atomic_inc(&res->read_failures);
2594 else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD)
2595 atomic_inc(&res->write_failures);
2596
2597 if (!RES_IS_GSCSI(res->cfg_entry) &&
2598 masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) {
2599 pmcraid_frame_auto_sense(cmd);
2600 }
2601
2602
2603 pmcraid_ioasc_logger(ioasc, cmd);
2604
2605 switch (masked_ioasc) {
2606
2607 case PMCRAID_IOASC_AC_TERMINATED_BY_HOST:
2608 scsi_cmd->result |= (DID_ABORT << 16);
2609 break;
2610
2611 case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE:
2612 case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE:
2613 scsi_cmd->result |= (DID_NO_CONNECT << 16);
2614 break;
2615
2616 case PMCRAID_IOASC_NR_SYNC_REQUIRED:
2617 res->sync_reqd = 1;
2618 scsi_cmd->result |= (DID_IMM_RETRY << 16);
2619 break;
2620
2621 case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC:
2622 scsi_cmd->result |= (DID_PASSTHROUGH << 16);
2623 break;
2624
2625 case PMCRAID_IOASC_UA_BUS_WAS_RESET:
2626 case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER:
2627 if (!res->reset_progress)
2628 scsi_report_bus_reset(pinstance->host,
2629 scsi_cmd->device->channel);
2630 scsi_cmd->result |= (DID_ERROR << 16);
2631 break;
2632
2633 case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR:
2634 scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc);
2635 res->sync_reqd = 1;
2636
2637
2638
2639
2640 if (PMCRAID_IOASC_SENSE_STATUS(ioasc) !=
2641 SAM_STAT_CHECK_CONDITION &&
2642 PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE)
2643 return 0;
2644
2645
2646
2647
2648 if (ioasa->auto_sense_length != 0) {
2649 short sense_len = le16_to_cpu(ioasa->auto_sense_length);
2650 int data_size = min_t(u16, sense_len,
2651 SCSI_SENSE_BUFFERSIZE);
2652
2653 memcpy(scsi_cmd->sense_buffer,
2654 ioasa->sense_data,
2655 data_size);
2656 sense_copied = true;
2657 }
2658
2659 if (RES_IS_GSCSI(res->cfg_entry))
2660 pmcraid_cancel_all(cmd, sense_copied);
2661 else if (sense_copied)
2662 pmcraid_erp_done(cmd);
2663 else
2664 pmcraid_request_sense(cmd);
2665
2666 return 1;
2667
2668 case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED:
2669 break;
2670
2671 default:
2672 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
2673 scsi_cmd->result |= (DID_ERROR << 16);
2674 break;
2675 }
2676 return 0;
2677}
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693static int pmcraid_reset_device(
2694 struct scsi_cmnd *scsi_cmd,
2695 unsigned long timeout,
2696 u8 modifier)
2697{
2698 struct pmcraid_cmd *cmd;
2699 struct pmcraid_instance *pinstance;
2700 struct pmcraid_resource_entry *res;
2701 struct pmcraid_ioarcb *ioarcb;
2702 unsigned long lock_flags;
2703 u32 ioasc;
2704
2705 pinstance =
2706 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
2707 res = scsi_cmd->device->hostdata;
2708
2709 if (!res) {
2710 sdev_printk(KERN_ERR, scsi_cmd->device,
2711 "reset_device: NULL resource pointer\n");
2712 return FAILED;
2713 }
2714
2715
2716
2717
2718
2719 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2720 if (pinstance->ioa_reset_in_progress ||
2721 pinstance->ioa_state == IOA_STATE_DEAD) {
2722 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2723 return FAILED;
2724 }
2725
2726 res->reset_progress = 1;
2727 pmcraid_info("Resetting %s resource with addr %x\n",
2728 ((modifier & RESET_DEVICE_LUN) ? "LUN" :
2729 ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")),
2730 le32_to_cpu(res->cfg_entry.resource_address));
2731
2732
2733 cmd = pmcraid_get_free_cmd(pinstance);
2734
2735 if (cmd == NULL) {
2736 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2737 pmcraid_err("%s: no cmd blocks are available\n", __func__);
2738 return FAILED;
2739 }
2740
2741 ioarcb = &cmd->ioa_cb->ioarcb;
2742 ioarcb->resource_handle = res->cfg_entry.resource_handle;
2743 ioarcb->request_type = REQ_TYPE_IOACMD;
2744 ioarcb->cdb[0] = PMCRAID_RESET_DEVICE;
2745
2746
2747 if (modifier)
2748 modifier = ENABLE_RESET_MODIFIER | modifier;
2749
2750 ioarcb->cdb[1] = modifier;
2751
2752 init_completion(&cmd->wait_for_completion);
2753 cmd->completion_req = 1;
2754
2755 pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n",
2756 cmd->ioa_cb->ioarcb.cdb[0],
2757 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
2758 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
2759
2760 pmcraid_send_cmd(cmd,
2761 pmcraid_internal_done,
2762 timeout,
2763 pmcraid_timeout_handler);
2764
2765 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2766
2767
2768
2769
2770
2771 wait_for_completion(&cmd->wait_for_completion);
2772
2773
2774
2775
2776 pmcraid_return_cmd(cmd);
2777 res->reset_progress = 0;
2778 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
2779
2780
2781 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
2782}
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797
2798
2799
2800static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc)
2801{
2802 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2803 int rc = 0;
2804
2805 scsi_set_resid(scsi_cmd, reslen);
2806
2807 pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n",
2808 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
2809 cmd->ioa_cb->ioarcb.cdb[0],
2810 ioasc, scsi_cmd->result);
2811
2812 if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0)
2813 rc = pmcraid_error_handler(cmd);
2814
2815 if (rc == 0) {
2816 scsi_dma_unmap(scsi_cmd);
2817 scsi_cmd->scsi_done(scsi_cmd);
2818 }
2819
2820 return rc;
2821}
2822
2823
2824
2825
2826
2827
2828
2829
2830
2831
2832
2833
2834
2835static void pmcraid_io_done(struct pmcraid_cmd *cmd)
2836{
2837 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
2838 u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length);
2839
2840 if (_pmcraid_io_done(cmd, reslen, ioasc) == 0)
2841 pmcraid_return_cmd(cmd);
2842}
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd)
2853{
2854 struct pmcraid_cmd *cancel_cmd;
2855 struct pmcraid_instance *pinstance;
2856
2857 pinstance = (struct pmcraid_instance *)cmd->drv_inst;
2858
2859 cancel_cmd = pmcraid_get_free_cmd(pinstance);
2860
2861 if (cancel_cmd == NULL) {
2862 pmcraid_err("%s: no cmd blocks are available\n", __func__);
2863 return NULL;
2864 }
2865
2866 pmcraid_prepare_cancel_cmd(cancel_cmd, cmd);
2867
2868 pmcraid_info("aborting command CDB[0]= %x with index = %d\n",
2869 cmd->ioa_cb->ioarcb.cdb[0],
2870 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
2871
2872 init_completion(&cancel_cmd->wait_for_completion);
2873 cancel_cmd->completion_req = 1;
2874
2875 pmcraid_info("command (%d) CDB[0] = %x for %x\n",
2876 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2,
2877 cancel_cmd->ioa_cb->ioarcb.cdb[0],
2878 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle));
2879
2880 pmcraid_send_cmd(cancel_cmd,
2881 pmcraid_internal_done,
2882 PMCRAID_INTERNAL_TIMEOUT,
2883 pmcraid_timeout_handler);
2884 return cancel_cmd;
2885}
2886
2887
2888
2889
2890
2891
2892
2893
2894
2895
2896static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd)
2897{
2898 struct pmcraid_resource_entry *res;
2899 u32 ioasc;
2900
2901 wait_for_completion(&cancel_cmd->wait_for_completion);
2902 res = cancel_cmd->res;
2903 cancel_cmd->res = NULL;
2904 ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
2905
2906
2907
2908
2909
2910
2911 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
2912 ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) {
2913 if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED)
2914 res->sync_reqd = 1;
2915 ioasc = 0;
2916 }
2917
2918
2919 pmcraid_return_cmd(cancel_cmd);
2920 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
2921}
2922
2923
2924
2925
2926
2927
2928
2929
2930
2931
2932
2933static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd)
2934{
2935 struct pmcraid_instance *pinstance;
2936 struct pmcraid_cmd *cmd;
2937 struct pmcraid_resource_entry *res;
2938 unsigned long host_lock_flags;
2939 unsigned long pending_lock_flags;
2940 struct pmcraid_cmd *cancel_cmd = NULL;
2941 int cmd_found = 0;
2942 int rc = FAILED;
2943
2944 pinstance =
2945 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
2946
2947 scmd_printk(KERN_INFO, scsi_cmd,
2948 "I/O command timed out, aborting it.\n");
2949
2950 res = scsi_cmd->device->hostdata;
2951
2952 if (res == NULL)
2953 return rc;
2954
2955
2956
2957
2958
2959
2960 spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags);
2961
2962 if (pinstance->ioa_reset_in_progress ||
2963 pinstance->ioa_state == IOA_STATE_DEAD) {
2964 spin_unlock_irqrestore(pinstance->host->host_lock,
2965 host_lock_flags);
2966 return rc;
2967 }
2968
2969
2970
2971
2972
2973
2974 spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags);
2975 list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) {
2976
2977 if (cmd->scsi_cmd == scsi_cmd) {
2978 cmd_found = 1;
2979 break;
2980 }
2981 }
2982
2983 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
2984 pending_lock_flags);
2985
2986
2987
2988
2989 if (cmd_found)
2990 cancel_cmd = pmcraid_abort_cmd(cmd);
2991
2992 spin_unlock_irqrestore(pinstance->host->host_lock,
2993 host_lock_flags);
2994
2995 if (cancel_cmd) {
2996 cancel_cmd->res = cmd->scsi_cmd->device->hostdata;
2997 rc = pmcraid_abort_complete(cancel_cmd);
2998 }
2999
3000 return cmd_found ? rc : SUCCESS;
3001}
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd)
3018{
3019 scmd_printk(KERN_INFO, scmd,
3020 "resetting device due to an I/O command timeout.\n");
3021 return pmcraid_reset_device(scmd,
3022 PMCRAID_INTERNAL_TIMEOUT,
3023 RESET_DEVICE_LUN);
3024}
3025
3026static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd)
3027{
3028 scmd_printk(KERN_INFO, scmd,
3029 "Doing bus reset due to an I/O command timeout.\n");
3030 return pmcraid_reset_device(scmd,
3031 PMCRAID_RESET_BUS_TIMEOUT,
3032 RESET_DEVICE_BUS);
3033}
3034
3035static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd)
3036{
3037 scmd_printk(KERN_INFO, scmd,
3038 "Doing target reset due to an I/O command timeout.\n");
3039 return pmcraid_reset_device(scmd,
3040 PMCRAID_INTERNAL_TIMEOUT,
3041 RESET_DEVICE_TARGET);
3042}
3043
3044
3045
3046
3047
3048
3049
3050
3051
3052
3053
3054static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd)
3055{
3056 unsigned long interval = 10000;
3057 int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval;
3058 struct pmcraid_instance *pinstance =
3059 (struct pmcraid_instance *)(scmd->device->host->hostdata);
3060
3061
3062
3063
3064
3065
3066 while (waits--) {
3067 if (atomic_read(&pinstance->outstanding_cmds) <=
3068 PMCRAID_MAX_HCAM_CMD)
3069 return SUCCESS;
3070 msleep(interval);
3071 }
3072
3073 dev_err(&pinstance->pdev->dev,
3074 "Adapter being reset due to an I/O command timeout.\n");
3075 return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED;
3076}
3077
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087static struct pmcraid_ioadl_desc *
3088pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount)
3089{
3090 struct pmcraid_ioadl_desc *ioadl;
3091 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
3092 int ioadl_count = 0;
3093
3094 if (ioarcb->add_cmd_param_length)
3095 ioadl_count = DIV_ROUND_UP(le16_to_cpu(ioarcb->add_cmd_param_length), 16);
3096 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc) * sgcount);
3097
3098 if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) {
3099
3100
3101
3102
3103
3104 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
3105 ioarcb->ioadl_bus_addr =
3106 cpu_to_le64((cmd->ioa_cb_bus_addr) +
3107 offsetof(struct pmcraid_ioarcb,
3108 add_data.u.ioadl[3]));
3109 ioadl = &ioarcb->add_data.u.ioadl[3];
3110 } else {
3111 ioarcb->ioadl_bus_addr =
3112 cpu_to_le64((cmd->ioa_cb_bus_addr) +
3113 offsetof(struct pmcraid_ioarcb,
3114 add_data.u.ioadl[ioadl_count]));
3115
3116 ioadl = &ioarcb->add_data.u.ioadl[ioadl_count];
3117 ioarcb->ioarcb_bus_addr |=
3118 cpu_to_le64(DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8));
3119 }
3120
3121 return ioadl;
3122}
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132
3133
3134
3135static int pmcraid_build_ioadl(
3136 struct pmcraid_instance *pinstance,
3137 struct pmcraid_cmd *cmd
3138)
3139{
3140 int i, nseg;
3141 struct scatterlist *sglist;
3142
3143 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
3144 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
3145 struct pmcraid_ioadl_desc *ioadl;
3146
3147 u32 length = scsi_bufflen(scsi_cmd);
3148
3149 if (!length)
3150 return 0;
3151
3152 nseg = scsi_dma_map(scsi_cmd);
3153
3154 if (nseg < 0) {
3155 scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n");
3156 return -1;
3157 } else if (nseg > PMCRAID_MAX_IOADLS) {
3158 scsi_dma_unmap(scsi_cmd);
3159 scmd_printk(KERN_ERR, scsi_cmd,
3160 "sg count is (%d) more than allowed!\n", nseg);
3161 return -1;
3162 }
3163
3164
3165 if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE)
3166 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
3167
3168 ioarcb->request_flags0 |= NO_LINK_DESCS;
3169 ioarcb->data_transfer_length = cpu_to_le32(length);
3170 ioadl = pmcraid_init_ioadls(cmd, nseg);
3171
3172
3173 scsi_for_each_sg(scsi_cmd, sglist, nseg, i) {
3174 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist));
3175 ioadl[i].address = cpu_to_le64(sg_dma_address(sglist));
3176 ioadl[i].flags = 0;
3177 }
3178
3179 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
3180
3181 return 0;
3182}
3183
3184
3185
3186
3187
3188
3189
3190
3191
3192
3193static void pmcraid_free_sglist(struct pmcraid_sglist *sglist)
3194{
3195 sgl_free_order(sglist->scatterlist, sglist->order);
3196 kfree(sglist);
3197}
3198
3199
3200
3201
3202
3203
3204
3205
3206
3207
3208
3209static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen)
3210{
3211 struct pmcraid_sglist *sglist;
3212 int sg_size;
3213 int order;
3214
3215 sg_size = buflen / (PMCRAID_MAX_IOADLS - 1);
3216 order = (sg_size > 0) ? get_order(sg_size) : 0;
3217
3218
3219 sglist = kzalloc(sizeof(struct pmcraid_sglist), GFP_KERNEL);
3220 if (sglist == NULL)
3221 return NULL;
3222
3223 sglist->order = order;
3224 sgl_alloc_order(buflen, order, false,
3225 GFP_KERNEL | GFP_DMA | __GFP_ZERO, &sglist->num_sg);
3226
3227 return sglist;
3228}
3229
3230
3231
3232
3233
3234
3235
3236
3237
3238
3239
3240
3241
3242static int pmcraid_copy_sglist(
3243 struct pmcraid_sglist *sglist,
3244 void __user *buffer,
3245 u32 len,
3246 int direction
3247)
3248{
3249 struct scatterlist *sg;
3250 void *kaddr;
3251 int bsize_elem;
3252 int i;
3253 int rc = 0;
3254
3255
3256 bsize_elem = PAGE_SIZE * (1 << sglist->order);
3257
3258 sg = sglist->scatterlist;
3259
3260 for (i = 0; i < (len / bsize_elem); i++, sg = sg_next(sg), buffer += bsize_elem) {
3261 struct page *page = sg_page(sg);
3262
3263 kaddr = kmap(page);
3264 if (direction == DMA_TO_DEVICE)
3265 rc = copy_from_user(kaddr, buffer, bsize_elem);
3266 else
3267 rc = copy_to_user(buffer, kaddr, bsize_elem);
3268
3269 kunmap(page);
3270
3271 if (rc) {
3272 pmcraid_err("failed to copy user data into sg list\n");
3273 return -EFAULT;
3274 }
3275
3276 sg->length = bsize_elem;
3277 }
3278
3279 if (len % bsize_elem) {
3280 struct page *page = sg_page(sg);
3281
3282 kaddr = kmap(page);
3283
3284 if (direction == DMA_TO_DEVICE)
3285 rc = copy_from_user(kaddr, buffer, len % bsize_elem);
3286 else
3287 rc = copy_to_user(buffer, kaddr, len % bsize_elem);
3288
3289 kunmap(page);
3290
3291 sg->length = len % bsize_elem;
3292 }
3293
3294 if (rc) {
3295 pmcraid_err("failed to copy user data into sg list\n");
3296 rc = -EFAULT;
3297 }
3298
3299 return rc;
3300}
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316static int pmcraid_queuecommand_lck(
3317 struct scsi_cmnd *scsi_cmd,
3318 void (*done) (struct scsi_cmnd *)
3319)
3320{
3321 struct pmcraid_instance *pinstance;
3322 struct pmcraid_resource_entry *res;
3323 struct pmcraid_ioarcb *ioarcb;
3324 struct pmcraid_cmd *cmd;
3325 u32 fw_version;
3326 int rc = 0;
3327
3328 pinstance =
3329 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
3330 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
3331 scsi_cmd->scsi_done = done;
3332 res = scsi_cmd->device->hostdata;
3333 scsi_cmd->result = (DID_OK << 16);
3334
3335
3336
3337
3338 if (pinstance->ioa_state == IOA_STATE_DEAD) {
3339 pmcraid_info("IOA is dead, but queuecommand is scheduled\n");
3340 scsi_cmd->result = (DID_NO_CONNECT << 16);
3341 scsi_cmd->scsi_done(scsi_cmd);
3342 return 0;
3343 }
3344
3345
3346 if (pinstance->ioa_reset_in_progress)
3347 return SCSI_MLQUEUE_HOST_BUSY;
3348
3349
3350
3351
3352 if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) {
3353 pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n");
3354 scsi_cmd->scsi_done(scsi_cmd);
3355 return 0;
3356 }
3357
3358
3359 cmd = pmcraid_get_free_cmd(pinstance);
3360
3361 if (cmd == NULL) {
3362 pmcraid_err("free command block is not available\n");
3363 return SCSI_MLQUEUE_HOST_BUSY;
3364 }
3365
3366 cmd->scsi_cmd = scsi_cmd;
3367 ioarcb = &(cmd->ioa_cb->ioarcb);
3368 memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
3369 ioarcb->resource_handle = res->cfg_entry.resource_handle;
3370 ioarcb->request_type = REQ_TYPE_SCSI;
3371
3372
3373
3374
3375
3376
3377 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
3378 pinstance->num_hrrq;
3379 cmd->cmd_done = pmcraid_io_done;
3380
3381 if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) {
3382 if (scsi_cmd->underflow == 0)
3383 ioarcb->request_flags0 |= INHIBIT_UL_CHECK;
3384
3385 if (res->sync_reqd) {
3386 ioarcb->request_flags0 |= SYNC_COMPLETE;
3387 res->sync_reqd = 0;
3388 }
3389
3390 ioarcb->request_flags0 |= NO_LINK_DESCS;
3391
3392 if (scsi_cmd->flags & SCMD_TAGGED)
3393 ioarcb->request_flags1 |= TASK_TAG_SIMPLE;
3394
3395 if (RES_IS_GSCSI(res->cfg_entry))
3396 ioarcb->request_flags1 |= DELAY_AFTER_RESET;
3397 }
3398
3399 rc = pmcraid_build_ioadl(pinstance, cmd);
3400
3401 pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n",
3402 le32_to_cpu(ioarcb->response_handle) >> 2,
3403 scsi_cmd->cmnd[0], pinstance->host->unique_id,
3404 RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID :
3405 PMCRAID_PHYS_BUS_ID,
3406 RES_IS_VSET(res->cfg_entry) ?
3407 (fw_version <= PMCRAID_FW_VERSION_1 ?
3408 res->cfg_entry.unique_flags1 :
3409 le16_to_cpu(res->cfg_entry.array_id) & 0xFF) :
3410 RES_TARGET(res->cfg_entry.resource_address),
3411 RES_LUN(res->cfg_entry.resource_address));
3412
3413 if (likely(rc == 0)) {
3414 _pmcraid_fire_command(cmd);
3415 } else {
3416 pmcraid_err("queuecommand could not build ioadl\n");
3417 pmcraid_return_cmd(cmd);
3418 rc = SCSI_MLQUEUE_HOST_BUSY;
3419 }
3420
3421 return rc;
3422}
3423
3424static DEF_SCSI_QCMD(pmcraid_queuecommand)
3425
3426
3427
3428
3429static int pmcraid_chr_open(struct inode *inode, struct file *filep)
3430{
3431 struct pmcraid_instance *pinstance;
3432
3433 if (!capable(CAP_SYS_ADMIN))
3434 return -EACCES;
3435
3436
3437 pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev);
3438 filep->private_data = pinstance;
3439
3440 return 0;
3441}
3442
3443
3444
3445
3446
3447
3448
3449static int pmcraid_chr_fasync(int fd, struct file *filep, int mode)
3450{
3451 struct pmcraid_instance *pinstance;
3452 int rc;
3453
3454 pinstance = filep->private_data;
3455 mutex_lock(&pinstance->aen_queue_lock);
3456 rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue);
3457 mutex_unlock(&pinstance->aen_queue_lock);
3458
3459 return rc;
3460}
3461
3462
3463
3464
3465
3466
3467
3468
3469
3470
3471
3472
3473
3474static int pmcraid_build_passthrough_ioadls(
3475 struct pmcraid_cmd *cmd,
3476 int buflen,
3477 int direction
3478)
3479{
3480 struct pmcraid_sglist *sglist = NULL;
3481 struct scatterlist *sg = NULL;
3482 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
3483 struct pmcraid_ioadl_desc *ioadl;
3484 int i;
3485
3486 sglist = pmcraid_alloc_sglist(buflen);
3487
3488 if (!sglist) {
3489 pmcraid_err("can't allocate memory for passthrough SGls\n");
3490 return -ENOMEM;
3491 }
3492
3493 sglist->num_dma_sg = dma_map_sg(&cmd->drv_inst->pdev->dev,
3494 sglist->scatterlist,
3495 sglist->num_sg, direction);
3496
3497 if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) {
3498 dev_err(&cmd->drv_inst->pdev->dev,
3499 "Failed to map passthrough buffer!\n");
3500 pmcraid_free_sglist(sglist);
3501 return -EIO;
3502 }
3503
3504 cmd->sglist = sglist;
3505 ioarcb->request_flags0 |= NO_LINK_DESCS;
3506
3507 ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg);
3508
3509
3510 for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) {
3511 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg));
3512 ioadl[i].address = cpu_to_le64(sg_dma_address(sg));
3513 ioadl[i].flags = 0;
3514 }
3515
3516
3517 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
3518
3519 return 0;
3520}
3521
3522
3523
3524
3525
3526
3527
3528
3529
3530
3531
3532
3533static void pmcraid_release_passthrough_ioadls(
3534 struct pmcraid_cmd *cmd,
3535 int buflen,
3536 int direction
3537)
3538{
3539 struct pmcraid_sglist *sglist = cmd->sglist;
3540
3541 if (buflen > 0) {
3542 dma_unmap_sg(&cmd->drv_inst->pdev->dev,
3543 sglist->scatterlist,
3544 sglist->num_sg,
3545 direction);
3546 pmcraid_free_sglist(sglist);
3547 cmd->sglist = NULL;
3548 }
3549}
3550
3551
3552
3553
3554
3555
3556
3557
3558
3559
3560
3561
3562static long pmcraid_ioctl_passthrough(
3563 struct pmcraid_instance *pinstance,
3564 unsigned int ioctl_cmd,
3565 unsigned int buflen,
3566 void __user *arg
3567)
3568{
3569 struct pmcraid_passthrough_ioctl_buffer *buffer;
3570 struct pmcraid_ioarcb *ioarcb;
3571 struct pmcraid_cmd *cmd;
3572 struct pmcraid_cmd *cancel_cmd;
3573 void __user *request_buffer;
3574 unsigned long request_offset;
3575 unsigned long lock_flags;
3576 void __user *ioasa;
3577 u32 ioasc;
3578 int request_size;
3579 int buffer_size;
3580 u8 direction;
3581 int rc = 0;
3582
3583
3584 if (pinstance->ioa_reset_in_progress) {
3585 rc = wait_event_interruptible_timeout(
3586 pinstance->reset_wait_q,
3587 !pinstance->ioa_reset_in_progress,
3588 msecs_to_jiffies(10000));
3589
3590 if (!rc)
3591 return -ETIMEDOUT;
3592 else if (rc < 0)
3593 return -ERESTARTSYS;
3594 }
3595
3596
3597 if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) {
3598 pmcraid_err("IOA is not operational\n");
3599 return -ENOTTY;
3600 }
3601
3602 buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer);
3603 buffer = kmalloc(buffer_size, GFP_KERNEL);
3604
3605 if (!buffer) {
3606 pmcraid_err("no memory for passthrough buffer\n");
3607 return -ENOMEM;
3608 }
3609
3610 request_offset =
3611 offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer);
3612
3613 request_buffer = arg + request_offset;
3614
3615 rc = copy_from_user(buffer, arg,
3616 sizeof(struct pmcraid_passthrough_ioctl_buffer));
3617
3618 ioasa = arg + offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa);
3619
3620 if (rc) {
3621 pmcraid_err("ioctl: can't copy passthrough buffer\n");
3622 rc = -EFAULT;
3623 goto out_free_buffer;
3624 }
3625
3626 request_size = le32_to_cpu(buffer->ioarcb.data_transfer_length);
3627
3628 if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) {
3629 direction = DMA_TO_DEVICE;
3630 } else {
3631 direction = DMA_FROM_DEVICE;
3632 }
3633
3634 if (request_size < 0) {
3635 rc = -EINVAL;
3636 goto out_free_buffer;
3637 }
3638
3639
3640 if (le16_to_cpu(buffer->ioarcb.add_cmd_param_length)
3641 > PMCRAID_ADD_CMD_PARAM_LEN) {
3642 rc = -EINVAL;
3643 goto out_free_buffer;
3644 }
3645
3646 cmd = pmcraid_get_free_cmd(pinstance);
3647
3648 if (!cmd) {
3649 pmcraid_err("free command block is not available\n");
3650 rc = -ENOMEM;
3651 goto out_free_buffer;
3652 }
3653
3654 cmd->scsi_cmd = NULL;
3655 ioarcb = &(cmd->ioa_cb->ioarcb);
3656
3657
3658 ioarcb->resource_handle = buffer->ioarcb.resource_handle;
3659 ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length;
3660 ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout;
3661 ioarcb->request_type = buffer->ioarcb.request_type;
3662 ioarcb->request_flags0 = buffer->ioarcb.request_flags0;
3663 ioarcb->request_flags1 = buffer->ioarcb.request_flags1;
3664 memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN);
3665
3666 if (buffer->ioarcb.add_cmd_param_length) {
3667 ioarcb->add_cmd_param_length =
3668 buffer->ioarcb.add_cmd_param_length;
3669 ioarcb->add_cmd_param_offset =
3670 buffer->ioarcb.add_cmd_param_offset;
3671 memcpy(ioarcb->add_data.u.add_cmd_params,
3672 buffer->ioarcb.add_data.u.add_cmd_params,
3673 le16_to_cpu(buffer->ioarcb.add_cmd_param_length));
3674 }
3675
3676
3677
3678
3679
3680
3681 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
3682 pinstance->num_hrrq;
3683
3684 if (request_size) {
3685 rc = pmcraid_build_passthrough_ioadls(cmd,
3686 request_size,
3687 direction);
3688 if (rc) {
3689 pmcraid_err("couldn't build passthrough ioadls\n");
3690 goto out_free_cmd;
3691 }
3692 }
3693
3694
3695
3696
3697 if (direction == DMA_TO_DEVICE && request_size > 0) {
3698 rc = pmcraid_copy_sglist(cmd->sglist,
3699 request_buffer,
3700 request_size,
3701 direction);
3702 if (rc) {
3703 pmcraid_err("failed to copy user buffer\n");
3704 goto out_free_sglist;
3705 }
3706 }
3707
3708
3709
3710
3711 cmd->cmd_done = pmcraid_internal_done;
3712 init_completion(&cmd->wait_for_completion);
3713 cmd->completion_req = 1;
3714
3715 pmcraid_info("command(%d) (CDB[0] = %x) for %x\n",
3716 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
3717 cmd->ioa_cb->ioarcb.cdb[0],
3718 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle));
3719
3720 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
3721 _pmcraid_fire_command(cmd);
3722 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
3723
3724
3725
3726
3727
3728
3729
3730 buffer->ioarcb.cmd_timeout = 0;
3731
3732
3733
3734
3735
3736 if (buffer->ioarcb.cmd_timeout == 0) {
3737 wait_for_completion(&cmd->wait_for_completion);
3738 } else if (!wait_for_completion_timeout(
3739 &cmd->wait_for_completion,
3740 msecs_to_jiffies(le16_to_cpu(buffer->ioarcb.cmd_timeout) * 1000))) {
3741
3742 pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n",
3743 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
3744 cmd->ioa_cb->ioarcb.cdb[0]);
3745
3746 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
3747 cancel_cmd = pmcraid_abort_cmd(cmd);
3748 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
3749
3750 if (cancel_cmd) {
3751 wait_for_completion(&cancel_cmd->wait_for_completion);
3752 ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
3753 pmcraid_return_cmd(cancel_cmd);
3754
3755
3756
3757
3758
3759
3760
3761 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
3762 PMCRAID_IOASC_SENSE_KEY(ioasc) == 0x00) {
3763 if (ioasc != PMCRAID_IOASC_GC_IOARCB_NOTFOUND)
3764 rc = -ETIMEDOUT;
3765 goto out_handle_response;
3766 }
3767 }
3768
3769
3770
3771
3772
3773 if (!wait_for_completion_timeout(
3774 &cmd->wait_for_completion,
3775 msecs_to_jiffies(150 * 1000))) {
3776 pmcraid_reset_bringup(cmd->drv_inst);
3777 rc = -ETIMEDOUT;
3778 }
3779 }
3780
3781out_handle_response:
3782
3783
3784
3785
3786 if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa,
3787 sizeof(struct pmcraid_ioasa))) {
3788 pmcraid_err("failed to copy ioasa buffer to user\n");
3789 rc = -EFAULT;
3790 }
3791
3792
3793
3794
3795 else if (direction == DMA_FROM_DEVICE && request_size > 0) {
3796 rc = pmcraid_copy_sglist(cmd->sglist,
3797 request_buffer,
3798 request_size,
3799 direction);
3800 if (rc) {
3801 pmcraid_err("failed to copy user buffer\n");
3802 rc = -EFAULT;
3803 }
3804 }
3805
3806out_free_sglist:
3807 pmcraid_release_passthrough_ioadls(cmd, request_size, direction);
3808
3809out_free_cmd:
3810 pmcraid_return_cmd(cmd);
3811
3812out_free_buffer:
3813 kfree(buffer);
3814
3815 return rc;
3816}
3817
3818
3819
3820
3821
3822
3823
3824
3825
3826
3827
3828
3829
3830
3831
3832static long pmcraid_ioctl_driver(
3833 struct pmcraid_instance *pinstance,
3834 unsigned int cmd,
3835 unsigned int buflen,
3836 void __user *user_buffer
3837)
3838{
3839 int rc = -ENOSYS;
3840
3841 switch (cmd) {
3842 case PMCRAID_IOCTL_RESET_ADAPTER:
3843 pmcraid_reset_bringup(pinstance);
3844 rc = 0;
3845 break;
3846
3847 default:
3848 break;
3849 }
3850
3851 return rc;
3852}
3853
3854
3855
3856
3857
3858
3859
3860
3861
3862
3863
3864
3865
3866static int pmcraid_check_ioctl_buffer(
3867 int cmd,
3868 void __user *arg,
3869 struct pmcraid_ioctl_header *hdr
3870)
3871{
3872 int rc;
3873
3874 if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) {
3875 pmcraid_err("couldn't copy ioctl header from user buffer\n");
3876 return -EFAULT;
3877 }
3878
3879
3880 rc = memcmp(hdr->signature,
3881 PMCRAID_IOCTL_SIGNATURE,
3882 sizeof(hdr->signature));
3883 if (rc) {
3884 pmcraid_err("signature verification failed\n");
3885 return -EINVAL;
3886 }
3887
3888 return 0;
3889}
3890
3891
3892
3893
3894static long pmcraid_chr_ioctl(
3895 struct file *filep,
3896 unsigned int cmd,
3897 unsigned long arg
3898)
3899{
3900 struct pmcraid_instance *pinstance = NULL;
3901 struct pmcraid_ioctl_header *hdr = NULL;
3902 void __user *argp = (void __user *)arg;
3903 int retval = -ENOTTY;
3904
3905 hdr = kmalloc(sizeof(struct pmcraid_ioctl_header), GFP_KERNEL);
3906
3907 if (!hdr) {
3908 pmcraid_err("failed to allocate memory for ioctl header\n");
3909 return -ENOMEM;
3910 }
3911
3912 retval = pmcraid_check_ioctl_buffer(cmd, argp, hdr);
3913
3914 if (retval) {
3915 pmcraid_info("chr_ioctl: header check failed\n");
3916 kfree(hdr);
3917 return retval;
3918 }
3919
3920 pinstance = filep->private_data;
3921
3922 if (!pinstance) {
3923 pmcraid_info("adapter instance is not found\n");
3924 kfree(hdr);
3925 return -ENOTTY;
3926 }
3927
3928 switch (_IOC_TYPE(cmd)) {
3929
3930 case PMCRAID_PASSTHROUGH_IOCTL:
3931
3932
3933
3934 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
3935 scsi_block_requests(pinstance->host);
3936
3937 retval = pmcraid_ioctl_passthrough(pinstance, cmd,
3938 hdr->buffer_length, argp);
3939
3940 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
3941 scsi_unblock_requests(pinstance->host);
3942 break;
3943
3944 case PMCRAID_DRIVER_IOCTL:
3945 arg += sizeof(struct pmcraid_ioctl_header);
3946 retval = pmcraid_ioctl_driver(pinstance, cmd,
3947 hdr->buffer_length, argp);
3948 break;
3949
3950 default:
3951 retval = -ENOTTY;
3952 break;
3953 }
3954
3955 kfree(hdr);
3956
3957 return retval;
3958}
3959
3960
3961
3962
3963static const struct file_operations pmcraid_fops = {
3964 .owner = THIS_MODULE,
3965 .open = pmcraid_chr_open,
3966 .fasync = pmcraid_chr_fasync,
3967 .unlocked_ioctl = pmcraid_chr_ioctl,
3968 .compat_ioctl = compat_ptr_ioctl,
3969 .llseek = noop_llseek,
3970};
3971
3972
3973
3974
3975
3976
3977
3978
3979
3980
3981
3982
3983
3984static ssize_t pmcraid_show_log_level(
3985 struct device *dev,
3986 struct device_attribute *attr,
3987 char *buf)
3988{
3989 struct Scsi_Host *shost = class_to_shost(dev);
3990 struct pmcraid_instance *pinstance =
3991 (struct pmcraid_instance *)shost->hostdata;
3992 return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level);
3993}
3994
3995
3996
3997
3998
3999
4000
4001
4002
4003
4004
4005static ssize_t pmcraid_store_log_level(
4006 struct device *dev,
4007 struct device_attribute *attr,
4008 const char *buf,
4009 size_t count
4010)
4011{
4012 struct Scsi_Host *shost;
4013 struct pmcraid_instance *pinstance;
4014 u8 val;
4015
4016 if (kstrtou8(buf, 10, &val))
4017 return -EINVAL;
4018
4019 if (val > 2)
4020 return -EINVAL;
4021
4022 shost = class_to_shost(dev);
4023 pinstance = (struct pmcraid_instance *)shost->hostdata;
4024 pinstance->current_log_level = val;
4025
4026 return strlen(buf);
4027}
4028
4029static struct device_attribute pmcraid_log_level_attr = {
4030 .attr = {
4031 .name = "log_level",
4032 .mode = S_IRUGO | S_IWUSR,
4033 },
4034 .show = pmcraid_show_log_level,
4035 .store = pmcraid_store_log_level,
4036};
4037
4038
4039
4040
4041
4042
4043
4044
4045
4046
4047static ssize_t pmcraid_show_drv_version(
4048 struct device *dev,
4049 struct device_attribute *attr,
4050 char *buf
4051)
4052{
4053 return snprintf(buf, PAGE_SIZE, "version: %s\n",
4054 PMCRAID_DRIVER_VERSION);
4055}
4056
4057static struct device_attribute pmcraid_driver_version_attr = {
4058 .attr = {
4059 .name = "drv_version",
4060 .mode = S_IRUGO,
4061 },
4062 .show = pmcraid_show_drv_version,
4063};
4064
4065
4066
4067
4068
4069
4070
4071
4072
4073
4074static ssize_t pmcraid_show_adapter_id(
4075 struct device *dev,
4076 struct device_attribute *attr,
4077 char *buf
4078)
4079{
4080 struct Scsi_Host *shost = class_to_shost(dev);
4081 struct pmcraid_instance *pinstance =
4082 (struct pmcraid_instance *)shost->hostdata;
4083 u32 adapter_id = (pinstance->pdev->bus->number << 8) |
4084 pinstance->pdev->devfn;
4085 u32 aen_group = pmcraid_event_family.id;
4086
4087 return snprintf(buf, PAGE_SIZE,
4088 "adapter id: %d\nminor: %d\naen group: %d\n",
4089 adapter_id, MINOR(pinstance->cdev.dev), aen_group);
4090}
4091
4092static struct device_attribute pmcraid_adapter_id_attr = {
4093 .attr = {
4094 .name = "adapter_id",
4095 .mode = S_IRUGO,
4096 },
4097 .show = pmcraid_show_adapter_id,
4098};
4099
4100static struct device_attribute *pmcraid_host_attrs[] = {
4101 &pmcraid_log_level_attr,
4102 &pmcraid_driver_version_attr,
4103 &pmcraid_adapter_id_attr,
4104 NULL,
4105};
4106
4107
4108
4109static struct scsi_host_template pmcraid_host_template = {
4110 .module = THIS_MODULE,
4111 .name = PMCRAID_DRIVER_NAME,
4112 .queuecommand = pmcraid_queuecommand,
4113 .eh_abort_handler = pmcraid_eh_abort_handler,
4114 .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler,
4115 .eh_target_reset_handler = pmcraid_eh_target_reset_handler,
4116 .eh_device_reset_handler = pmcraid_eh_device_reset_handler,
4117 .eh_host_reset_handler = pmcraid_eh_host_reset_handler,
4118
4119 .slave_alloc = pmcraid_slave_alloc,
4120 .slave_configure = pmcraid_slave_configure,
4121 .slave_destroy = pmcraid_slave_destroy,
4122 .change_queue_depth = pmcraid_change_queue_depth,
4123 .can_queue = PMCRAID_MAX_IO_CMD,
4124 .this_id = -1,
4125 .sg_tablesize = PMCRAID_MAX_IOADLS,
4126 .max_sectors = PMCRAID_IOA_MAX_SECTORS,
4127 .no_write_same = 1,
4128 .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN,
4129 .shost_attrs = pmcraid_host_attrs,
4130 .proc_name = PMCRAID_DRIVER_NAME,
4131};
4132
4133
4134
4135
4136
4137
4138
4139
4140
4141
4142static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id)
4143{
4144 struct pmcraid_isr_param *hrrq_vector;
4145 struct pmcraid_instance *pinstance;
4146 unsigned long lock_flags;
4147 u32 intrs_val;
4148 int hrrq_id;
4149
4150 hrrq_vector = (struct pmcraid_isr_param *)dev_id;
4151 hrrq_id = hrrq_vector->hrrq_id;
4152 pinstance = hrrq_vector->drv_inst;
4153
4154 if (!hrrq_id) {
4155
4156 intrs_val = pmcraid_read_interrupts(pinstance);
4157 if (intrs_val &&
4158 ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg)
4159 & DOORBELL_INTR_MSIX_CLR) == 0)) {
4160
4161
4162
4163
4164
4165 if (intrs_val & PMCRAID_ERROR_INTERRUPTS) {
4166 if (intrs_val & INTRS_IOA_UNIT_CHECK)
4167 pinstance->ioa_unit_check = 1;
4168
4169 pmcraid_err("ISR: error interrupts: %x \
4170 initiating reset\n", intrs_val);
4171 spin_lock_irqsave(pinstance->host->host_lock,
4172 lock_flags);
4173 pmcraid_initiate_reset(pinstance);
4174 spin_unlock_irqrestore(
4175 pinstance->host->host_lock,
4176 lock_flags);
4177 }
4178
4179
4180
4181
4182 if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL)
4183 pmcraid_clr_trans_op(pinstance);
4184
4185
4186
4187
4188
4189 iowrite32(DOORBELL_INTR_MSIX_CLR,
4190 pinstance->int_regs.host_ioa_interrupt_reg);
4191 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
4192
4193
4194 }
4195 }
4196
4197 tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id]));
4198
4199 return IRQ_HANDLED;
4200}
4201
4202
4203
4204
4205
4206
4207
4208
4209
4210
4211static irqreturn_t pmcraid_isr(int irq, void *dev_id)
4212{
4213 struct pmcraid_isr_param *hrrq_vector;
4214 struct pmcraid_instance *pinstance;
4215 u32 intrs;
4216 unsigned long lock_flags;
4217 int hrrq_id = 0;
4218
4219
4220
4221
4222 if (!dev_id) {
4223 printk(KERN_INFO "%s(): NULL host pointer\n", __func__);
4224 return IRQ_NONE;
4225 }
4226 hrrq_vector = (struct pmcraid_isr_param *)dev_id;
4227 pinstance = hrrq_vector->drv_inst;
4228
4229 intrs = pmcraid_read_interrupts(pinstance);
4230
4231 if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0))
4232 return IRQ_NONE;
4233
4234
4235
4236
4237
4238 if (intrs & PMCRAID_ERROR_INTERRUPTS) {
4239
4240 if (intrs & INTRS_IOA_UNIT_CHECK)
4241 pinstance->ioa_unit_check = 1;
4242
4243 iowrite32(intrs,
4244 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4245 pmcraid_err("ISR: error interrupts: %x initiating reset\n",
4246 intrs);
4247 intrs = ioread32(
4248 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4249 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
4250 pmcraid_initiate_reset(pinstance);
4251 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
4252 } else {
4253
4254
4255
4256
4257 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
4258 pmcraid_clr_trans_op(pinstance);
4259 } else {
4260 iowrite32(intrs,
4261 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4262 ioread32(
4263 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4264
4265 tasklet_schedule(
4266 &(pinstance->isr_tasklet[hrrq_id]));
4267 }
4268 }
4269
4270 return IRQ_HANDLED;
4271}
4272
4273
4274
4275
4276
4277
4278
4279
4280
4281
4282
4283static void pmcraid_worker_function(struct work_struct *workp)
4284{
4285 struct pmcraid_instance *pinstance;
4286 struct pmcraid_resource_entry *res;
4287 struct pmcraid_resource_entry *temp;
4288 struct scsi_device *sdev;
4289 unsigned long lock_flags;
4290 unsigned long host_lock_flags;
4291 u16 fw_version;
4292 u8 bus, target, lun;
4293
4294 pinstance = container_of(workp, struct pmcraid_instance, worker_q);
4295
4296 if (!atomic_read(&pinstance->expose_resources))
4297 return;
4298
4299 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
4300
4301 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
4302 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) {
4303
4304 if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) {
4305 sdev = res->scsi_dev;
4306
4307
4308
4309
4310 spin_lock_irqsave(pinstance->host->host_lock,
4311 host_lock_flags);
4312 if (!scsi_device_get(sdev)) {
4313 spin_unlock_irqrestore(
4314 pinstance->host->host_lock,
4315 host_lock_flags);
4316 pmcraid_info("deleting %x from midlayer\n",
4317 res->cfg_entry.resource_address);
4318 list_move_tail(&res->queue,
4319 &pinstance->free_res_q);
4320 spin_unlock_irqrestore(
4321 &pinstance->resource_lock,
4322 lock_flags);
4323 scsi_remove_device(sdev);
4324 scsi_device_put(sdev);
4325 spin_lock_irqsave(&pinstance->resource_lock,
4326 lock_flags);
4327 res->change_detected = 0;
4328 } else {
4329 spin_unlock_irqrestore(
4330 pinstance->host->host_lock,
4331 host_lock_flags);
4332 }
4333 }
4334 }
4335
4336 list_for_each_entry(res, &pinstance->used_res_q, queue) {
4337
4338 if (res->change_detected == RES_CHANGE_ADD) {
4339
4340 if (!pmcraid_expose_resource(fw_version,
4341 &res->cfg_entry))
4342 continue;
4343
4344 if (RES_IS_VSET(res->cfg_entry)) {
4345 bus = PMCRAID_VSET_BUS_ID;
4346 if (fw_version <= PMCRAID_FW_VERSION_1)
4347 target = res->cfg_entry.unique_flags1;
4348 else
4349 target = le16_to_cpu(res->cfg_entry.array_id) & 0xFF;
4350 lun = PMCRAID_VSET_LUN_ID;
4351 } else {
4352 bus = PMCRAID_PHYS_BUS_ID;
4353 target =
4354 RES_TARGET(
4355 res->cfg_entry.resource_address);
4356 lun = RES_LUN(res->cfg_entry.resource_address);
4357 }
4358
4359 res->change_detected = 0;
4360 spin_unlock_irqrestore(&pinstance->resource_lock,
4361 lock_flags);
4362 scsi_add_device(pinstance->host, bus, target, lun);
4363 spin_lock_irqsave(&pinstance->resource_lock,
4364 lock_flags);
4365 }
4366 }
4367
4368 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
4369}
4370
4371
4372
4373
4374
4375
4376
4377
4378
4379static void pmcraid_tasklet_function(unsigned long instance)
4380{
4381 struct pmcraid_isr_param *hrrq_vector;
4382 struct pmcraid_instance *pinstance;
4383 unsigned long hrrq_lock_flags;
4384 unsigned long pending_lock_flags;
4385 unsigned long host_lock_flags;
4386 spinlock_t *lockp;
4387 int id;
4388 u32 resp;
4389
4390 hrrq_vector = (struct pmcraid_isr_param *)instance;
4391 pinstance = hrrq_vector->drv_inst;
4392 id = hrrq_vector->hrrq_id;
4393 lockp = &(pinstance->hrrq_lock[id]);
4394
4395
4396
4397
4398
4399
4400
4401 spin_lock_irqsave(lockp, hrrq_lock_flags);
4402
4403 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4404
4405 while ((resp & HRRQ_TOGGLE_BIT) ==
4406 pinstance->host_toggle_bit[id]) {
4407
4408 int cmd_index = resp >> 2;
4409 struct pmcraid_cmd *cmd = NULL;
4410
4411 if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) {
4412 pinstance->hrrq_curr[id]++;
4413 } else {
4414 pinstance->hrrq_curr[id] = pinstance->hrrq_start[id];
4415 pinstance->host_toggle_bit[id] ^= 1u;
4416 }
4417
4418 if (cmd_index >= PMCRAID_MAX_CMD) {
4419
4420 pmcraid_err("Invalid response handle %d\n", cmd_index);
4421 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4422 continue;
4423 }
4424
4425 cmd = pinstance->cmd_list[cmd_index];
4426 spin_unlock_irqrestore(lockp, hrrq_lock_flags);
4427
4428 spin_lock_irqsave(&pinstance->pending_pool_lock,
4429 pending_lock_flags);
4430 list_del(&cmd->free_list);
4431 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
4432 pending_lock_flags);
4433 del_timer(&cmd->timer);
4434 atomic_dec(&pinstance->outstanding_cmds);
4435
4436 if (cmd->cmd_done == pmcraid_ioa_reset) {
4437 spin_lock_irqsave(pinstance->host->host_lock,
4438 host_lock_flags);
4439 cmd->cmd_done(cmd);
4440 spin_unlock_irqrestore(pinstance->host->host_lock,
4441 host_lock_flags);
4442 } else if (cmd->cmd_done != NULL) {
4443 cmd->cmd_done(cmd);
4444 }
4445
4446 spin_lock_irqsave(lockp, hrrq_lock_flags);
4447 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4448 }
4449
4450 spin_unlock_irqrestore(lockp, hrrq_lock_flags);
4451}
4452
4453
4454
4455
4456
4457
4458
4459
4460
4461
4462
4463static
4464void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance)
4465{
4466 struct pci_dev *pdev = pinstance->pdev;
4467 int i;
4468
4469 for (i = 0; i < pinstance->num_hrrq; i++)
4470 free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
4471
4472 pinstance->interrupt_mode = 0;
4473 pci_free_irq_vectors(pdev);
4474}
4475
4476
4477
4478
4479
4480
4481
4482
4483static int
4484pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance)
4485{
4486 struct pci_dev *pdev = pinstance->pdev;
4487 unsigned int irq_flag = PCI_IRQ_LEGACY, flag;
4488 int num_hrrq, rc, i;
4489 irq_handler_t isr;
4490
4491 if (pmcraid_enable_msix)
4492 irq_flag |= PCI_IRQ_MSIX;
4493
4494 num_hrrq = pci_alloc_irq_vectors(pdev, 1, PMCRAID_NUM_MSIX_VECTORS,
4495 irq_flag);
4496 if (num_hrrq < 0)
4497 return num_hrrq;
4498
4499 if (pdev->msix_enabled) {
4500 flag = 0;
4501 isr = pmcraid_isr_msix;
4502 } else {
4503 flag = IRQF_SHARED;
4504 isr = pmcraid_isr;
4505 }
4506
4507 for (i = 0; i < num_hrrq; i++) {
4508 struct pmcraid_isr_param *vec = &pinstance->hrrq_vector[i];
4509
4510 vec->hrrq_id = i;
4511 vec->drv_inst = pinstance;
4512 rc = request_irq(pci_irq_vector(pdev, i), isr, flag,
4513 PMCRAID_DRIVER_NAME, vec);
4514 if (rc)
4515 goto out_unwind;
4516 }
4517
4518 pinstance->num_hrrq = num_hrrq;
4519 if (pdev->msix_enabled) {
4520 pinstance->interrupt_mode = 1;
4521 iowrite32(DOORBELL_INTR_MODE_MSIX,
4522 pinstance->int_regs.host_ioa_interrupt_reg);
4523 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
4524 }
4525
4526 return 0;
4527
4528out_unwind:
4529 while (--i > 0)
4530 free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
4531 pci_free_irq_vectors(pdev);
4532 return rc;
4533}
4534
4535
4536
4537
4538
4539
4540
4541
4542
4543static void
4544pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index)
4545{
4546 int i;
4547 for (i = 0; i < max_index; i++) {
4548 kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]);
4549 pinstance->cmd_list[i] = NULL;
4550 }
4551 kmem_cache_destroy(pinstance->cmd_cachep);
4552 pinstance->cmd_cachep = NULL;
4553}
4554
4555
4556
4557
4558
4559
4560
4561
4562
4563
4564
4565
4566static void
4567pmcraid_release_control_blocks(
4568 struct pmcraid_instance *pinstance,
4569 int max_index
4570)
4571{
4572 int i;
4573
4574 if (pinstance->control_pool == NULL)
4575 return;
4576
4577 for (i = 0; i < max_index; i++) {
4578 dma_pool_free(pinstance->control_pool,
4579 pinstance->cmd_list[i]->ioa_cb,
4580 pinstance->cmd_list[i]->ioa_cb_bus_addr);
4581 pinstance->cmd_list[i]->ioa_cb = NULL;
4582 pinstance->cmd_list[i]->ioa_cb_bus_addr = 0;
4583 }
4584 dma_pool_destroy(pinstance->control_pool);
4585 pinstance->control_pool = NULL;
4586}
4587
4588
4589
4590
4591
4592
4593
4594
4595
4596
4597static int pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance)
4598{
4599 int i;
4600
4601 sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d",
4602 pinstance->host->unique_id);
4603
4604
4605 pinstance->cmd_cachep = kmem_cache_create(
4606 pinstance->cmd_pool_name,
4607 sizeof(struct pmcraid_cmd), 0,
4608 SLAB_HWCACHE_ALIGN, NULL);
4609 if (!pinstance->cmd_cachep)
4610 return -ENOMEM;
4611
4612 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
4613 pinstance->cmd_list[i] =
4614 kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL);
4615 if (!pinstance->cmd_list[i]) {
4616 pmcraid_release_cmd_blocks(pinstance, i);
4617 return -ENOMEM;
4618 }
4619 }
4620 return 0;
4621}
4622
4623
4624
4625
4626
4627
4628
4629
4630
4631
4632
4633static int pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance)
4634{
4635 int i;
4636
4637 sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d",
4638 pinstance->host->unique_id);
4639
4640 pinstance->control_pool =
4641 dma_pool_create(pinstance->ctl_pool_name,
4642 &pinstance->pdev->dev,
4643 sizeof(struct pmcraid_control_block),
4644 PMCRAID_IOARCB_ALIGNMENT, 0);
4645
4646 if (!pinstance->control_pool)
4647 return -ENOMEM;
4648
4649 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
4650 pinstance->cmd_list[i]->ioa_cb =
4651 dma_pool_zalloc(
4652 pinstance->control_pool,
4653 GFP_KERNEL,
4654 &(pinstance->cmd_list[i]->ioa_cb_bus_addr));
4655
4656 if (!pinstance->cmd_list[i]->ioa_cb) {
4657 pmcraid_release_control_blocks(pinstance, i);
4658 return -ENOMEM;
4659 }
4660 }
4661 return 0;
4662}
4663
4664
4665
4666
4667
4668
4669
4670
4671
4672static void
4673pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex)
4674{
4675 int i;
4676
4677 for (i = 0; i < maxindex; i++) {
4678 dma_free_coherent(&pinstance->pdev->dev,
4679 HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD,
4680 pinstance->hrrq_start[i],
4681 pinstance->hrrq_start_bus_addr[i]);
4682
4683
4684 pinstance->hrrq_start[i] = NULL;
4685 pinstance->hrrq_start_bus_addr[i] = 0;
4686 pinstance->host_toggle_bit[i] = 0;
4687 }
4688}
4689
4690
4691
4692
4693
4694
4695
4696
4697static int pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance)
4698{
4699 int i, buffer_size;
4700
4701 buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
4702
4703 for (i = 0; i < pinstance->num_hrrq; i++) {
4704 pinstance->hrrq_start[i] =
4705 dma_alloc_coherent(&pinstance->pdev->dev, buffer_size,
4706 &pinstance->hrrq_start_bus_addr[i],
4707 GFP_KERNEL);
4708 if (!pinstance->hrrq_start[i]) {
4709 pmcraid_err("pci_alloc failed for hrrq vector : %d\n",
4710 i);
4711 pmcraid_release_host_rrqs(pinstance, i);
4712 return -ENOMEM;
4713 }
4714
4715 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
4716 pinstance->hrrq_end[i] =
4717 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
4718 pinstance->host_toggle_bit[i] = 1;
4719 spin_lock_init(&pinstance->hrrq_lock[i]);
4720 }
4721 return 0;
4722}
4723
4724
4725
4726
4727
4728
4729
4730
4731
4732static void pmcraid_release_hcams(struct pmcraid_instance *pinstance)
4733{
4734 if (pinstance->ccn.msg != NULL) {
4735 dma_free_coherent(&pinstance->pdev->dev,
4736 PMCRAID_AEN_HDR_SIZE +
4737 sizeof(struct pmcraid_hcam_ccn_ext),
4738 pinstance->ccn.msg,
4739 pinstance->ccn.baddr);
4740
4741 pinstance->ccn.msg = NULL;
4742 pinstance->ccn.hcam = NULL;
4743 pinstance->ccn.baddr = 0;
4744 }
4745
4746 if (pinstance->ldn.msg != NULL) {
4747 dma_free_coherent(&pinstance->pdev->dev,
4748 PMCRAID_AEN_HDR_SIZE +
4749 sizeof(struct pmcraid_hcam_ldn),
4750 pinstance->ldn.msg,
4751 pinstance->ldn.baddr);
4752
4753 pinstance->ldn.msg = NULL;
4754 pinstance->ldn.hcam = NULL;
4755 pinstance->ldn.baddr = 0;
4756 }
4757}
4758
4759
4760
4761
4762
4763
4764
4765
4766static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)
4767{
4768 pinstance->ccn.msg = dma_alloc_coherent(&pinstance->pdev->dev,
4769 PMCRAID_AEN_HDR_SIZE +
4770 sizeof(struct pmcraid_hcam_ccn_ext),
4771 &pinstance->ccn.baddr, GFP_KERNEL);
4772
4773 pinstance->ldn.msg = dma_alloc_coherent(&pinstance->pdev->dev,
4774 PMCRAID_AEN_HDR_SIZE +
4775 sizeof(struct pmcraid_hcam_ldn),
4776 &pinstance->ldn.baddr, GFP_KERNEL);
4777
4778 if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {
4779 pmcraid_release_hcams(pinstance);
4780 } else {
4781 pinstance->ccn.hcam =
4782 (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE;
4783 pinstance->ldn.hcam =
4784 (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE;
4785
4786 atomic_set(&pinstance->ccn.ignore, 0);
4787 atomic_set(&pinstance->ldn.ignore, 0);
4788 }
4789
4790 return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0;
4791}
4792
4793
4794
4795
4796
4797
4798
4799
4800static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance)
4801{
4802 if (pinstance->cfg_table != NULL &&
4803 pinstance->cfg_table_bus_addr != 0) {
4804 dma_free_coherent(&pinstance->pdev->dev,
4805 sizeof(struct pmcraid_config_table),
4806 pinstance->cfg_table,
4807 pinstance->cfg_table_bus_addr);
4808 pinstance->cfg_table = NULL;
4809 pinstance->cfg_table_bus_addr = 0;
4810 }
4811
4812 if (pinstance->res_entries != NULL) {
4813 int i;
4814
4815 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
4816 list_del(&pinstance->res_entries[i].queue);
4817 kfree(pinstance->res_entries);
4818 pinstance->res_entries = NULL;
4819 }
4820
4821 pmcraid_release_hcams(pinstance);
4822}
4823
4824
4825
4826
4827
4828
4829
4830
4831static int pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance)
4832{
4833 int i;
4834
4835 pinstance->res_entries =
4836 kcalloc(PMCRAID_MAX_RESOURCES,
4837 sizeof(struct pmcraid_resource_entry),
4838 GFP_KERNEL);
4839
4840 if (NULL == pinstance->res_entries) {
4841 pmcraid_err("failed to allocate memory for resource table\n");
4842 return -ENOMEM;
4843 }
4844
4845 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
4846 list_add_tail(&pinstance->res_entries[i].queue,
4847 &pinstance->free_res_q);
4848
4849 pinstance->cfg_table = dma_alloc_coherent(&pinstance->pdev->dev,
4850 sizeof(struct pmcraid_config_table),
4851 &pinstance->cfg_table_bus_addr,
4852 GFP_KERNEL);
4853
4854 if (NULL == pinstance->cfg_table) {
4855 pmcraid_err("couldn't alloc DMA memory for config table\n");
4856 pmcraid_release_config_buffers(pinstance);
4857 return -ENOMEM;
4858 }
4859
4860 if (pmcraid_allocate_hcams(pinstance)) {
4861 pmcraid_err("could not alloc DMA memory for HCAMS\n");
4862 pmcraid_release_config_buffers(pinstance);
4863 return -ENOMEM;
4864 }
4865
4866 return 0;
4867}
4868
4869
4870
4871
4872
4873
4874
4875
4876
4877static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance)
4878{
4879 int i;
4880 for (i = 0; i < pinstance->num_hrrq; i++)
4881 tasklet_init(&pinstance->isr_tasklet[i],
4882 pmcraid_tasklet_function,
4883 (unsigned long)&pinstance->hrrq_vector[i]);
4884}
4885
4886
4887
4888
4889
4890
4891
4892
4893
4894static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance)
4895{
4896 int i;
4897 for (i = 0; i < pinstance->num_hrrq; i++)
4898 tasklet_kill(&pinstance->isr_tasklet[i]);
4899}
4900
4901
4902
4903
4904
4905
4906
4907
4908
4909static void pmcraid_release_buffers(struct pmcraid_instance *pinstance)
4910{
4911 pmcraid_release_config_buffers(pinstance);
4912 pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD);
4913 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
4914 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
4915
4916 if (pinstance->inq_data != NULL) {
4917 dma_free_coherent(&pinstance->pdev->dev,
4918 sizeof(struct pmcraid_inquiry_data),
4919 pinstance->inq_data,
4920 pinstance->inq_data_baddr);
4921
4922 pinstance->inq_data = NULL;
4923 pinstance->inq_data_baddr = 0;
4924 }
4925
4926 if (pinstance->timestamp_data != NULL) {
4927 dma_free_coherent(&pinstance->pdev->dev,
4928 sizeof(struct pmcraid_timestamp_data),
4929 pinstance->timestamp_data,
4930 pinstance->timestamp_data_baddr);
4931
4932 pinstance->timestamp_data = NULL;
4933 pinstance->timestamp_data_baddr = 0;
4934 }
4935}
4936
4937
4938
4939
4940
4941
4942
4943
4944
4945
4946
4947
4948
4949
4950static int pmcraid_init_buffers(struct pmcraid_instance *pinstance)
4951{
4952 int i;
4953
4954 if (pmcraid_allocate_host_rrqs(pinstance)) {
4955 pmcraid_err("couldn't allocate memory for %d host rrqs\n",
4956 pinstance->num_hrrq);
4957 return -ENOMEM;
4958 }
4959
4960 if (pmcraid_allocate_config_buffers(pinstance)) {
4961 pmcraid_err("couldn't allocate memory for config buffers\n");
4962 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
4963 return -ENOMEM;
4964 }
4965
4966 if (pmcraid_allocate_cmd_blocks(pinstance)) {
4967 pmcraid_err("couldn't allocate memory for cmd blocks\n");
4968 pmcraid_release_config_buffers(pinstance);
4969 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
4970 return -ENOMEM;
4971 }
4972
4973 if (pmcraid_allocate_control_blocks(pinstance)) {
4974 pmcraid_err("couldn't allocate memory control blocks\n");
4975 pmcraid_release_config_buffers(pinstance);
4976 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
4977 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
4978 return -ENOMEM;
4979 }
4980
4981
4982 pinstance->inq_data = dma_alloc_coherent(&pinstance->pdev->dev,
4983 sizeof(struct pmcraid_inquiry_data),
4984 &pinstance->inq_data_baddr, GFP_KERNEL);
4985 if (pinstance->inq_data == NULL) {
4986 pmcraid_err("couldn't allocate DMA memory for INQUIRY\n");
4987 pmcraid_release_buffers(pinstance);
4988 return -ENOMEM;
4989 }
4990
4991
4992 pinstance->timestamp_data = dma_alloc_coherent(&pinstance->pdev->dev,
4993 sizeof(struct pmcraid_timestamp_data),
4994 &pinstance->timestamp_data_baddr,
4995 GFP_KERNEL);
4996 if (pinstance->timestamp_data == NULL) {
4997 pmcraid_err("couldn't allocate DMA memory for \
4998 set time_stamp \n");
4999 pmcraid_release_buffers(pinstance);
5000 return -ENOMEM;
5001 }
5002
5003
5004
5005
5006
5007
5008 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
5009 struct pmcraid_cmd *cmdp = pinstance->cmd_list[i];
5010 pmcraid_init_cmdblk(cmdp, i);
5011 cmdp->drv_inst = pinstance;
5012 list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool);
5013 }
5014
5015 return 0;
5016}
5017
5018
5019
5020
5021
5022
5023
5024static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance)
5025{
5026 int i;
5027 int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
5028
5029 for (i = 0; i < pinstance->num_hrrq; i++) {
5030 memset(pinstance->hrrq_start[i], 0, buffer_size);
5031 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
5032 pinstance->hrrq_end[i] =
5033 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
5034 pinstance->host_toggle_bit[i] = 1;
5035 }
5036}
5037
5038
5039
5040
5041
5042
5043
5044
5045
5046
5047static int pmcraid_init_instance(struct pci_dev *pdev, struct Scsi_Host *host,
5048 void __iomem *mapped_pci_addr)
5049{
5050 struct pmcraid_instance *pinstance =
5051 (struct pmcraid_instance *)host->hostdata;
5052
5053 pinstance->host = host;
5054 pinstance->pdev = pdev;
5055
5056
5057 pinstance->mapped_dma_addr = mapped_pci_addr;
5058
5059
5060 {
5061 struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg;
5062 struct pmcraid_interrupts *pint_regs = &pinstance->int_regs;
5063
5064 pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin;
5065
5066 pint_regs->ioa_host_interrupt_reg =
5067 mapped_pci_addr + chip_cfg->ioa_host_intr;
5068 pint_regs->ioa_host_interrupt_clr_reg =
5069 mapped_pci_addr + chip_cfg->ioa_host_intr_clr;
5070 pint_regs->ioa_host_msix_interrupt_reg =
5071 mapped_pci_addr + chip_cfg->ioa_host_msix_intr;
5072 pint_regs->host_ioa_interrupt_reg =
5073 mapped_pci_addr + chip_cfg->host_ioa_intr;
5074 pint_regs->host_ioa_interrupt_clr_reg =
5075 mapped_pci_addr + chip_cfg->host_ioa_intr_clr;
5076
5077
5078
5079
5080 pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox;
5081 pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus;
5082 pint_regs->ioa_host_interrupt_mask_reg =
5083 mapped_pci_addr + chip_cfg->ioa_host_mask;
5084 pint_regs->ioa_host_interrupt_mask_clr_reg =
5085 mapped_pci_addr + chip_cfg->ioa_host_mask_clr;
5086 pint_regs->global_interrupt_mask_reg =
5087 mapped_pci_addr + chip_cfg->global_intr_mask;
5088 };
5089
5090 pinstance->ioa_reset_attempts = 0;
5091 init_waitqueue_head(&pinstance->reset_wait_q);
5092
5093 atomic_set(&pinstance->outstanding_cmds, 0);
5094 atomic_set(&pinstance->last_message_id, 0);
5095 atomic_set(&pinstance->expose_resources, 0);
5096
5097 INIT_LIST_HEAD(&pinstance->free_res_q);
5098 INIT_LIST_HEAD(&pinstance->used_res_q);
5099 INIT_LIST_HEAD(&pinstance->free_cmd_pool);
5100 INIT_LIST_HEAD(&pinstance->pending_cmd_pool);
5101
5102 spin_lock_init(&pinstance->free_pool_lock);
5103 spin_lock_init(&pinstance->pending_pool_lock);
5104 spin_lock_init(&pinstance->resource_lock);
5105 mutex_init(&pinstance->aen_queue_lock);
5106
5107
5108 INIT_WORK(&pinstance->worker_q, pmcraid_worker_function);
5109
5110
5111 pinstance->current_log_level = pmcraid_log_level;
5112
5113
5114 pinstance->ioa_state = IOA_STATE_UNKNOWN;
5115 pinstance->reset_cmd = NULL;
5116 return 0;
5117}
5118
5119
5120
5121
5122
5123
5124
5125
5126
5127
5128static void pmcraid_shutdown(struct pci_dev *pdev)
5129{
5130 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5131 pmcraid_reset_bringdown(pinstance);
5132}
5133
5134
5135
5136
5137
5138static unsigned short pmcraid_get_minor(void)
5139{
5140 int minor;
5141
5142 minor = find_first_zero_bit(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
5143 __set_bit(minor, pmcraid_minor);
5144 return minor;
5145}
5146
5147
5148
5149
5150static void pmcraid_release_minor(unsigned short minor)
5151{
5152 __clear_bit(minor, pmcraid_minor);
5153}
5154
5155
5156
5157
5158
5159
5160
5161
5162
5163static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance)
5164{
5165 int minor;
5166 int error;
5167
5168 minor = pmcraid_get_minor();
5169 cdev_init(&pinstance->cdev, &pmcraid_fops);
5170 pinstance->cdev.owner = THIS_MODULE;
5171
5172 error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1);
5173
5174 if (error)
5175 pmcraid_release_minor(minor);
5176 else
5177 device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor),
5178 NULL, "%s%u", PMCRAID_DEVFILE, minor);
5179 return error;
5180}
5181
5182
5183
5184
5185
5186
5187
5188
5189
5190static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance)
5191{
5192 pmcraid_release_minor(MINOR(pinstance->cdev.dev));
5193 device_destroy(pmcraid_class,
5194 MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev)));
5195 cdev_del(&pinstance->cdev);
5196}
5197
5198
5199
5200
5201
5202
5203
5204
5205static void pmcraid_remove(struct pci_dev *pdev)
5206{
5207 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5208
5209
5210 pmcraid_release_chrdev(pinstance);
5211
5212
5213 scsi_remove_host(pinstance->host);
5214
5215
5216 scsi_block_requests(pinstance->host);
5217
5218
5219 pmcraid_shutdown(pdev);
5220
5221 pmcraid_disable_interrupts(pinstance, ~0);
5222 flush_work(&pinstance->worker_q);
5223
5224 pmcraid_kill_tasklets(pinstance);
5225 pmcraid_unregister_interrupt_handler(pinstance);
5226 pmcraid_release_buffers(pinstance);
5227 iounmap(pinstance->mapped_dma_addr);
5228 pci_release_regions(pdev);
5229 scsi_host_put(pinstance->host);
5230 pci_disable_device(pdev);
5231
5232 return;
5233}
5234
5235
5236
5237
5238
5239
5240
5241static int __maybe_unused pmcraid_suspend(struct device *dev)
5242{
5243 struct pci_dev *pdev = to_pci_dev(dev);
5244 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5245
5246 pmcraid_shutdown(pdev);
5247 pmcraid_disable_interrupts(pinstance, ~0);
5248 pmcraid_kill_tasklets(pinstance);
5249 pmcraid_unregister_interrupt_handler(pinstance);
5250
5251 return 0;
5252}
5253
5254
5255
5256
5257
5258
5259
5260static int __maybe_unused pmcraid_resume(struct device *dev)
5261{
5262 struct pci_dev *pdev = to_pci_dev(dev);
5263 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5264 struct Scsi_Host *host = pinstance->host;
5265 int rc = 0;
5266
5267 if (sizeof(dma_addr_t) == 4 ||
5268 dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)))
5269 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
5270
5271 if (rc == 0)
5272 rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
5273
5274 if (rc != 0) {
5275 dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n");
5276 goto disable_device;
5277 }
5278
5279 pmcraid_disable_interrupts(pinstance, ~0);
5280 atomic_set(&pinstance->outstanding_cmds, 0);
5281 rc = pmcraid_register_interrupt_handler(pinstance);
5282
5283 if (rc) {
5284 dev_err(&pdev->dev,
5285 "resume: couldn't register interrupt handlers\n");
5286 rc = -ENODEV;
5287 goto release_host;
5288 }
5289
5290 pmcraid_init_tasklets(pinstance);
5291 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
5292
5293
5294
5295
5296 pinstance->ioa_hard_reset = 1;
5297
5298
5299
5300
5301 if (pmcraid_reset_bringup(pinstance)) {
5302 dev_err(&pdev->dev, "couldn't initialize IOA\n");
5303 rc = -ENODEV;
5304 goto release_tasklets;
5305 }
5306
5307 return 0;
5308
5309release_tasklets:
5310 pmcraid_disable_interrupts(pinstance, ~0);
5311 pmcraid_kill_tasklets(pinstance);
5312 pmcraid_unregister_interrupt_handler(pinstance);
5313
5314release_host:
5315 scsi_host_put(host);
5316
5317disable_device:
5318
5319 return rc;
5320}
5321
5322
5323
5324
5325
5326
5327static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd)
5328{
5329 struct pmcraid_instance *pinstance = cmd->drv_inst;
5330 unsigned long flags;
5331
5332 spin_lock_irqsave(pinstance->host->host_lock, flags);
5333 pmcraid_ioa_reset(cmd);
5334 spin_unlock_irqrestore(pinstance->host->host_lock, flags);
5335 scsi_unblock_requests(pinstance->host);
5336 schedule_work(&pinstance->worker_q);
5337}
5338
5339
5340
5341
5342
5343
5344
5345
5346
5347static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd)
5348{
5349 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5350 void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset;
5351
5352 pmcraid_reinit_cmdblk(cmd);
5353
5354 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5355 ioarcb->request_type = REQ_TYPE_IOACMD;
5356 ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES;
5357 ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED;
5358
5359
5360
5361
5362
5363 if (cmd->drv_inst->reinit_cfg_table) {
5364 cmd->drv_inst->reinit_cfg_table = 0;
5365 cmd->release = 1;
5366 cmd_done = pmcraid_reinit_cfgtable_done;
5367 }
5368
5369
5370
5371
5372
5373 pmcraid_send_cmd(cmd,
5374 cmd_done,
5375 PMCRAID_SET_SUP_DEV_TIMEOUT,
5376 pmcraid_timeout_handler);
5377 return;
5378}
5379
5380
5381
5382
5383
5384
5385
5386
5387
5388static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd)
5389{
5390 struct pmcraid_instance *pinstance = cmd->drv_inst;
5391 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5392 __be32 time_stamp_len = cpu_to_be32(PMCRAID_TIMESTAMP_LEN);
5393 struct pmcraid_ioadl_desc *ioadl;
5394 u64 timestamp;
5395
5396 timestamp = ktime_get_real_seconds() * 1000;
5397
5398 pinstance->timestamp_data->timestamp[0] = (__u8)(timestamp);
5399 pinstance->timestamp_data->timestamp[1] = (__u8)((timestamp) >> 8);
5400 pinstance->timestamp_data->timestamp[2] = (__u8)((timestamp) >> 16);
5401 pinstance->timestamp_data->timestamp[3] = (__u8)((timestamp) >> 24);
5402 pinstance->timestamp_data->timestamp[4] = (__u8)((timestamp) >> 32);
5403 pinstance->timestamp_data->timestamp[5] = (__u8)((timestamp) >> 40);
5404
5405 pmcraid_reinit_cmdblk(cmd);
5406 ioarcb->request_type = REQ_TYPE_SCSI;
5407 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5408 ioarcb->cdb[0] = PMCRAID_SCSI_SET_TIMESTAMP;
5409 ioarcb->cdb[1] = PMCRAID_SCSI_SERVICE_ACTION;
5410 memcpy(&(ioarcb->cdb[6]), &time_stamp_len, sizeof(time_stamp_len));
5411
5412 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
5413 offsetof(struct pmcraid_ioarcb,
5414 add_data.u.ioadl[0]));
5415 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
5416 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
5417
5418 ioarcb->request_flags0 |= NO_LINK_DESCS;
5419 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
5420 ioarcb->data_transfer_length =
5421 cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
5422 ioadl = &(ioarcb->add_data.u.ioadl[0]);
5423 ioadl->flags = IOADL_FLAGS_LAST_DESC;
5424 ioadl->address = cpu_to_le64(pinstance->timestamp_data_baddr);
5425 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
5426
5427 if (!pinstance->timestamp_error) {
5428 pinstance->timestamp_error = 0;
5429 pmcraid_send_cmd(cmd, pmcraid_set_supported_devs,
5430 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5431 } else {
5432 pmcraid_send_cmd(cmd, pmcraid_return_cmd,
5433 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5434 return;
5435 }
5436}
5437
5438
5439
5440
5441
5442
5443
5444
5445
5446
5447
5448
5449
5450
5451static void pmcraid_init_res_table(struct pmcraid_cmd *cmd)
5452{
5453 struct pmcraid_instance *pinstance = cmd->drv_inst;
5454 struct pmcraid_resource_entry *res, *temp;
5455 struct pmcraid_config_table_entry *cfgte;
5456 unsigned long lock_flags;
5457 int found, rc, i;
5458 u16 fw_version;
5459 LIST_HEAD(old_res);
5460
5461 if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED)
5462 pmcraid_err("IOA requires microcode download\n");
5463
5464 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
5465
5466
5467
5468
5469
5470 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
5471
5472 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue)
5473 list_move_tail(&res->queue, &old_res);
5474
5475 for (i = 0; i < le16_to_cpu(pinstance->cfg_table->num_entries); i++) {
5476 if (be16_to_cpu(pinstance->inq_data->fw_version) <=
5477 PMCRAID_FW_VERSION_1)
5478 cfgte = &pinstance->cfg_table->entries[i];
5479 else
5480 cfgte = (struct pmcraid_config_table_entry *)
5481 &pinstance->cfg_table->entries_ext[i];
5482
5483 if (!pmcraid_expose_resource(fw_version, cfgte))
5484 continue;
5485
5486 found = 0;
5487
5488
5489 list_for_each_entry_safe(res, temp, &old_res, queue) {
5490
5491 rc = memcmp(&res->cfg_entry.resource_address,
5492 &cfgte->resource_address,
5493 sizeof(cfgte->resource_address));
5494 if (!rc) {
5495 list_move_tail(&res->queue,
5496 &pinstance->used_res_q);
5497 found = 1;
5498 break;
5499 }
5500 }
5501
5502
5503 if (!found) {
5504
5505 if (list_empty(&pinstance->free_res_q)) {
5506 pmcraid_err("Too many devices attached\n");
5507 break;
5508 }
5509
5510 found = 1;
5511 res = list_entry(pinstance->free_res_q.next,
5512 struct pmcraid_resource_entry, queue);
5513
5514 res->scsi_dev = NULL;
5515 res->change_detected = RES_CHANGE_ADD;
5516 res->reset_progress = 0;
5517 list_move_tail(&res->queue, &pinstance->used_res_q);
5518 }
5519
5520
5521
5522
5523 if (found) {
5524 memcpy(&res->cfg_entry, cfgte,
5525 pinstance->config_table_entry_size);
5526 pmcraid_info("New res type:%x, vset:%x, addr:%x:\n",
5527 res->cfg_entry.resource_type,
5528 (fw_version <= PMCRAID_FW_VERSION_1 ?
5529 res->cfg_entry.unique_flags1 :
5530 le16_to_cpu(res->cfg_entry.array_id) & 0xFF),
5531 le32_to_cpu(res->cfg_entry.resource_address));
5532 }
5533 }
5534
5535
5536 list_for_each_entry_safe(res, temp, &old_res, queue) {
5537
5538 if (res->scsi_dev) {
5539 res->change_detected = RES_CHANGE_DEL;
5540 res->cfg_entry.resource_handle =
5541 PMCRAID_INVALID_RES_HANDLE;
5542 list_move_tail(&res->queue, &pinstance->used_res_q);
5543 } else {
5544 list_move_tail(&res->queue, &pinstance->free_res_q);
5545 }
5546 }
5547
5548
5549 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
5550 pmcraid_set_timestamp(cmd);
5551}
5552
5553
5554
5555
5556
5557
5558
5559
5560
5561
5562
5563static void pmcraid_querycfg(struct pmcraid_cmd *cmd)
5564{
5565 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5566 struct pmcraid_ioadl_desc *ioadl;
5567 struct pmcraid_instance *pinstance = cmd->drv_inst;
5568 __be32 cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table));
5569
5570 if (be16_to_cpu(pinstance->inq_data->fw_version) <=
5571 PMCRAID_FW_VERSION_1)
5572 pinstance->config_table_entry_size =
5573 sizeof(struct pmcraid_config_table_entry);
5574 else
5575 pinstance->config_table_entry_size =
5576 sizeof(struct pmcraid_config_table_entry_ext);
5577
5578 ioarcb->request_type = REQ_TYPE_IOACMD;
5579 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5580
5581 ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG;
5582
5583
5584 memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size));
5585
5586
5587
5588
5589 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
5590 offsetof(struct pmcraid_ioarcb,
5591 add_data.u.ioadl[0]));
5592 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
5593 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
5594
5595 ioarcb->request_flags0 |= NO_LINK_DESCS;
5596 ioarcb->data_transfer_length =
5597 cpu_to_le32(sizeof(struct pmcraid_config_table));
5598
5599 ioadl = &(ioarcb->add_data.u.ioadl[0]);
5600 ioadl->flags = IOADL_FLAGS_LAST_DESC;
5601 ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr);
5602 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table));
5603
5604 pmcraid_send_cmd(cmd, pmcraid_init_res_table,
5605 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5606}
5607
5608
5609
5610
5611
5612
5613
5614
5615
5616
5617
5618static int pmcraid_probe(struct pci_dev *pdev,
5619 const struct pci_device_id *dev_id)
5620{
5621 struct pmcraid_instance *pinstance;
5622 struct Scsi_Host *host;
5623 void __iomem *mapped_pci_addr;
5624 int rc = PCIBIOS_SUCCESSFUL;
5625
5626 if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
5627 pmcraid_err
5628 ("maximum number(%d) of supported adapters reached\n",
5629 atomic_read(&pmcraid_adapter_count));
5630 return -ENOMEM;
5631 }
5632
5633 atomic_inc(&pmcraid_adapter_count);
5634 rc = pci_enable_device(pdev);
5635
5636 if (rc) {
5637 dev_err(&pdev->dev, "Cannot enable adapter\n");
5638 atomic_dec(&pmcraid_adapter_count);
5639 return rc;
5640 }
5641
5642 dev_info(&pdev->dev,
5643 "Found new IOA(%x:%x), Total IOA count: %d\n",
5644 pdev->vendor, pdev->device,
5645 atomic_read(&pmcraid_adapter_count));
5646
5647 rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME);
5648
5649 if (rc < 0) {
5650 dev_err(&pdev->dev,
5651 "Couldn't register memory range of registers\n");
5652 goto out_disable_device;
5653 }
5654
5655 mapped_pci_addr = pci_iomap(pdev, 0, 0);
5656
5657 if (!mapped_pci_addr) {
5658 dev_err(&pdev->dev, "Couldn't map PCI registers memory\n");
5659 rc = -ENOMEM;
5660 goto out_release_regions;
5661 }
5662
5663 pci_set_master(pdev);
5664
5665
5666
5667
5668
5669
5670
5671
5672 if (sizeof(dma_addr_t) == 4 ||
5673 dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)))
5674 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
5675
5676
5677
5678
5679 if (rc == 0)
5680 rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
5681
5682 if (rc != 0) {
5683 dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
5684 goto cleanup_nomem;
5685 }
5686
5687 host = scsi_host_alloc(&pmcraid_host_template,
5688 sizeof(struct pmcraid_instance));
5689
5690 if (!host) {
5691 dev_err(&pdev->dev, "scsi_host_alloc failed!\n");
5692 rc = -ENOMEM;
5693 goto cleanup_nomem;
5694 }
5695
5696 host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS;
5697 host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET;
5698 host->unique_id = host->host_no;
5699 host->max_channel = PMCRAID_MAX_BUS_TO_SCAN;
5700 host->max_cmd_len = PMCRAID_MAX_CDB_LEN;
5701
5702
5703 pinstance = (struct pmcraid_instance *)host->hostdata;
5704 memset(pinstance, 0, sizeof(*pinstance));
5705
5706 pinstance->chip_cfg =
5707 (struct pmcraid_chip_details *)(dev_id->driver_data);
5708
5709 rc = pmcraid_init_instance(pdev, host, mapped_pci_addr);
5710
5711 if (rc < 0) {
5712 dev_err(&pdev->dev, "failed to initialize adapter instance\n");
5713 goto out_scsi_host_put;
5714 }
5715
5716 pci_set_drvdata(pdev, pinstance);
5717
5718
5719 rc = pci_save_state(pinstance->pdev);
5720
5721 if (rc != 0) {
5722 dev_err(&pdev->dev, "Failed to save PCI config space\n");
5723 goto out_scsi_host_put;
5724 }
5725
5726 pmcraid_disable_interrupts(pinstance, ~0);
5727
5728 rc = pmcraid_register_interrupt_handler(pinstance);
5729
5730 if (rc) {
5731 dev_err(&pdev->dev, "couldn't register interrupt handler\n");
5732 goto out_scsi_host_put;
5733 }
5734
5735 pmcraid_init_tasklets(pinstance);
5736
5737
5738 rc = pmcraid_init_buffers(pinstance);
5739
5740 if (rc) {
5741 pmcraid_err("couldn't allocate memory blocks\n");
5742 goto out_unregister_isr;
5743 }
5744
5745
5746 pmcraid_reset_type(pinstance);
5747
5748 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
5749
5750
5751
5752
5753 pmcraid_info("starting IOA initialization sequence\n");
5754 if (pmcraid_reset_bringup(pinstance)) {
5755 dev_err(&pdev->dev, "couldn't initialize IOA\n");
5756 rc = 1;
5757 goto out_release_bufs;
5758 }
5759
5760
5761 rc = scsi_add_host(pinstance->host, &pdev->dev);
5762 if (rc != 0) {
5763 pmcraid_err("couldn't add host into mid-layer: %d\n", rc);
5764 goto out_release_bufs;
5765 }
5766
5767 scsi_scan_host(pinstance->host);
5768
5769 rc = pmcraid_setup_chrdev(pinstance);
5770
5771 if (rc != 0) {
5772 pmcraid_err("couldn't create mgmt interface, error: %x\n",
5773 rc);
5774 goto out_remove_host;
5775 }
5776
5777
5778
5779
5780 atomic_set(&pinstance->expose_resources, 1);
5781 schedule_work(&pinstance->worker_q);
5782 return rc;
5783
5784out_remove_host:
5785 scsi_remove_host(host);
5786
5787out_release_bufs:
5788 pmcraid_release_buffers(pinstance);
5789
5790out_unregister_isr:
5791 pmcraid_kill_tasklets(pinstance);
5792 pmcraid_unregister_interrupt_handler(pinstance);
5793
5794out_scsi_host_put:
5795 scsi_host_put(host);
5796
5797cleanup_nomem:
5798 iounmap(mapped_pci_addr);
5799
5800out_release_regions:
5801 pci_release_regions(pdev);
5802
5803out_disable_device:
5804 atomic_dec(&pmcraid_adapter_count);
5805 pci_disable_device(pdev);
5806 return -ENODEV;
5807}
5808
5809static SIMPLE_DEV_PM_OPS(pmcraid_pm_ops, pmcraid_suspend, pmcraid_resume);
5810
5811
5812
5813
5814static struct pci_driver pmcraid_driver = {
5815 .name = PMCRAID_DRIVER_NAME,
5816 .id_table = pmcraid_pci_table,
5817 .probe = pmcraid_probe,
5818 .remove = pmcraid_remove,
5819 .driver.pm = &pmcraid_pm_ops,
5820 .shutdown = pmcraid_shutdown
5821};
5822
5823
5824
5825
5826static int __init pmcraid_init(void)
5827{
5828 dev_t dev;
5829 int error;
5830
5831 pmcraid_info("%s Device Driver version: %s\n",
5832 PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION);
5833
5834 error = alloc_chrdev_region(&dev, 0,
5835 PMCRAID_MAX_ADAPTERS,
5836 PMCRAID_DEVFILE);
5837
5838 if (error) {
5839 pmcraid_err("failed to get a major number for adapters\n");
5840 goto out_init;
5841 }
5842
5843 pmcraid_major = MAJOR(dev);
5844 pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE);
5845
5846 if (IS_ERR(pmcraid_class)) {
5847 error = PTR_ERR(pmcraid_class);
5848 pmcraid_err("failed to register with sysfs, error = %x\n",
5849 error);
5850 goto out_unreg_chrdev;
5851 }
5852
5853 error = pmcraid_netlink_init();
5854
5855 if (error) {
5856 class_destroy(pmcraid_class);
5857 goto out_unreg_chrdev;
5858 }
5859
5860 error = pci_register_driver(&pmcraid_driver);
5861
5862 if (error == 0)
5863 goto out_init;
5864
5865 pmcraid_err("failed to register pmcraid driver, error = %x\n",
5866 error);
5867 class_destroy(pmcraid_class);
5868 pmcraid_netlink_release();
5869
5870out_unreg_chrdev:
5871 unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS);
5872
5873out_init:
5874 return error;
5875}
5876
5877
5878
5879
5880static void __exit pmcraid_exit(void)
5881{
5882 pmcraid_netlink_release();
5883 unregister_chrdev_region(MKDEV(pmcraid_major, 0),
5884 PMCRAID_MAX_ADAPTERS);
5885 pci_unregister_driver(&pmcraid_driver);
5886 class_destroy(pmcraid_class);
5887}
5888
5889module_init(pmcraid_init);
5890module_exit(pmcraid_exit);
5891