LXR linux/drivers/soc/tegra/fuse/fuse.h

   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * Copyright (C) 2010 Google, Inc.
   4 * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
   5 *
   6 * Author:
   7 *      Colin Cross <ccross@android.com>
   8 */
   9
  10#ifndef __DRIVERS_MISC_TEGRA_FUSE_H
  11#define __DRIVERS_MISC_TEGRA_FUSE_H
  12
  13#include <linux/dmaengine.h>
  14#include <linux/types.h>
  15
  16struct nvmem_cell_lookup;
  17struct nvmem_device;
  18struct tegra_fuse;
  19
  20struct tegra_fuse_info {
  21        u32 (*read)(struct tegra_fuse *fuse, unsigned int offset);
  22        unsigned int size;
  23        unsigned int spare;
  24};
  25
  26struct tegra_fuse_soc {
  27        void (*init)(struct tegra_fuse *fuse);
  28        void (*speedo_init)(struct tegra_sku_info *info);
  29        int (*probe)(struct tegra_fuse *fuse);
  30
  31        const struct tegra_fuse_info *info;
  32
  33        const struct nvmem_cell_lookup *lookups;
  34        unsigned int num_lookups;
  35
  36        const struct attribute_group *soc_attr_group;
  37
  38        bool clk_suspend_on;
  39};
  40
  41struct tegra_fuse {
  42        struct device *dev;
  43        void __iomem *base;
  44        phys_addr_t phys;
  45        struct clk *clk;
  46
  47        u32 (*read_early)(struct tegra_fuse *fuse, unsigned int offset);
  48        u32 (*read)(struct tegra_fuse *fuse, unsigned int offset);
  49        const struct tegra_fuse_soc *soc;
  50
  51        /* APBDMA on Tegra20 */
  52        struct {
  53                struct mutex lock;
  54                struct completion wait;
  55                struct dma_chan *chan;
  56                struct dma_slave_config config;
  57                dma_addr_t phys;
  58                u32 *virt;
  59        } apbdma;
  60
  61        struct nvmem_device *nvmem;
  62        struct nvmem_cell_lookup *lookups;
  63};
  64
  65void tegra_init_revision(void);
  66void tegra_init_apbmisc(void);
  67
  68bool __init tegra_fuse_read_spare(unsigned int spare);
  69u32 __init tegra_fuse_read_early(unsigned int offset);
  70
  71u8 tegra_get_major_rev(void);
  72u8 tegra_get_minor_rev(void);
  73
  74extern const struct attribute_group tegra_soc_attr_group;
  75
  76#ifdef CONFIG_ARCH_TEGRA_2x_SOC
  77void tegra20_init_speedo_data(struct tegra_sku_info *sku_info);
  78#endif
  79
  80#ifdef CONFIG_ARCH_TEGRA_3x_SOC
  81void tegra30_init_speedo_data(struct tegra_sku_info *sku_info);
  82#endif
  83
  84#ifdef CONFIG_ARCH_TEGRA_114_SOC
  85void tegra114_init_speedo_data(struct tegra_sku_info *sku_info);
  86#endif
  87
  88#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
  89void tegra124_init_speedo_data(struct tegra_sku_info *sku_info);
  90#endif
  91
  92#ifdef CONFIG_ARCH_TEGRA_210_SOC
  93void tegra210_init_speedo_data(struct tegra_sku_info *sku_info);
  94#endif
  95
  96#ifdef CONFIG_ARCH_TEGRA_2x_SOC
  97extern const struct tegra_fuse_soc tegra20_fuse_soc;
  98#endif
  99
 100#ifdef CONFIG_ARCH_TEGRA_3x_SOC
 101extern const struct tegra_fuse_soc tegra30_fuse_soc;
 102#endif
 103
 104#ifdef CONFIG_ARCH_TEGRA_114_SOC
 105extern const struct tegra_fuse_soc tegra114_fuse_soc;
 106#endif
 107
 108#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
 109extern const struct tegra_fuse_soc tegra124_fuse_soc;
 110#endif
 111
 112#ifdef CONFIG_ARCH_TEGRA_210_SOC
 113extern const struct tegra_fuse_soc tegra210_fuse_soc;
 114#endif
 115
 116#ifdef CONFIG_ARCH_TEGRA_186_SOC
 117extern const struct tegra_fuse_soc tegra186_fuse_soc;
 118#endif
 119
 120#if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
 121    IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
 122extern const struct attribute_group tegra194_soc_attr_group;
 123#endif
 124
 125#ifdef CONFIG_ARCH_TEGRA_194_SOC
 126extern const struct tegra_fuse_soc tegra194_fuse_soc;
 127#endif
 128
 129#ifdef CONFIG_ARCH_TEGRA_234_SOC
 130extern const struct tegra_fuse_soc tegra234_fuse_soc;
 131#endif
 132
 133#endif
 134