LXR linux/drivers/soc/tegra/regulators-tegra30.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Voltage regulators coupler for NVIDIA Tegra30
   4 * Copyright (C) 2019 GRATE-DRIVER project
   5 *
   6 * Voltage constraints borrowed from downstream kernel sources
   7 * Copyright (C) 2010-2011 NVIDIA Corporation
   8 */
   9
  10#define pr_fmt(fmt)     "tegra voltage-coupler: " fmt
  11
  12#include <linux/init.h>
  13#include <linux/kernel.h>
  14#include <linux/of.h>
  15#include <linux/reboot.h>
  16#include <linux/regulator/coupler.h>
  17#include <linux/regulator/driver.h>
  18#include <linux/regulator/machine.h>
  19
  20#include <soc/tegra/fuse.h>
  21#include <soc/tegra/pmc.h>
  22
  23struct tegra_regulator_coupler {
  24        struct regulator_coupler coupler;
  25        struct regulator_dev *core_rdev;
  26        struct regulator_dev *cpu_rdev;
  27        struct notifier_block reboot_notifier;
  28        int core_min_uV, cpu_min_uV;
  29        bool sys_reboot_mode_req;
  30        bool sys_reboot_mode;
  31};
  32
  33static inline struct tegra_regulator_coupler *
  34to_tegra_coupler(struct regulator_coupler *coupler)
  35{
  36        return container_of(coupler, struct tegra_regulator_coupler, coupler);
  37}
  38
  39static int tegra30_core_limit(struct tegra_regulator_coupler *tegra,
  40                              struct regulator_dev *core_rdev)
  41{
  42        int core_min_uV = 0;
  43        int core_max_uV;
  44        int core_cur_uV;
  45        int err;
  46
  47        /*
  48         * Tegra30 SoC has critical DVFS-capable devices that are
  49         * permanently-active or active at a boot time, like EMC
  50         * (DRAM controller) or Display controller for example.
  51         *
  52         * The voltage of a CORE SoC power domain shall not be dropped below
  53         * a minimum level, which is determined by device's clock rate.
  54         * This means that we can't fully allow CORE voltage scaling until
  55         * the state of all DVFS-critical CORE devices is synced.
  56         */
  57        if (tegra_pmc_core_domain_state_synced() && !tegra->sys_reboot_mode) {
  58                pr_info_once("voltage state synced\n");
  59                return 0;
  60        }
  61
  62        if (tegra->core_min_uV > 0)
  63                return tegra->core_min_uV;
  64
  65        core_cur_uV = regulator_get_voltage_rdev(core_rdev);
  66        if (core_cur_uV < 0)
  67                return core_cur_uV;
  68
  69        core_max_uV = max(core_cur_uV, 1200000);
  70
  71        err = regulator_check_voltage(core_rdev, &core_min_uV, &core_max_uV);
  72        if (err)
  73                return err;
  74
  75        /*
  76         * Limit minimum CORE voltage to a value left from bootloader or,
  77         * if it's unreasonably low value, to the most common 1.2v or to
  78         * whatever maximum value defined via board's device-tree.
  79         */
  80        tegra->core_min_uV = core_max_uV;
  81
  82        pr_info("core voltage initialized to %duV\n", tegra->core_min_uV);
  83
  84        return tegra->core_min_uV;
  85}
  86
  87static int tegra30_core_cpu_limit(int cpu_uV)
  88{
  89        if (cpu_uV < 800000)
  90                return 950000;
  91
  92        if (cpu_uV < 900000)
  93                return 1000000;
  94
  95        if (cpu_uV < 1000000)
  96                return 1100000;
  97
  98        if (cpu_uV < 1100000)
  99                return 1200000;
 100
 101        if (cpu_uV < 1250000) {
 102                switch (tegra_sku_info.cpu_speedo_id) {
 103                case 0 ... 1:
 104                case 4:
 105                case 7 ... 8:
 106                        return 1200000;
 107
 108                default:
 109                        return 1300000;
 110                }
 111        }
 112
 113        return -EINVAL;
 114}
 115
 116static int tegra30_voltage_update(struct tegra_regulator_coupler *tegra,
 117                                  struct regulator_dev *cpu_rdev,
 118                                  struct regulator_dev *core_rdev)
 119{
 120        int core_min_uV, core_max_uV = INT_MAX;
 121        int cpu_min_uV, cpu_max_uV = INT_MAX;
 122        int cpu_min_uV_consumers = 0;
 123        int core_min_limited_uV;
 124        int core_target_uV;
 125        int cpu_target_uV;
 126        int core_max_step;
 127        int cpu_max_step;
 128        int max_spread;
 129        int core_uV;
 130        int cpu_uV;
 131        int err;
 132
 133        /*
 134         * CPU voltage should not got lower than 300mV from the CORE.
 135         * CPU voltage should stay below the CORE by 100mV+, depending
 136         * by the CORE voltage. This applies to all Tegra30 SoC's.
 137         */
 138        max_spread = cpu_rdev->constraints->max_spread[0];
 139        cpu_max_step = cpu_rdev->constraints->max_uV_step;
 140        core_max_step = core_rdev->constraints->max_uV_step;
 141
 142        if (!max_spread) {
 143                pr_err_once("cpu-core max-spread is undefined in device-tree\n");
 144                max_spread = 300000;
 145        }
 146
 147        if (!cpu_max_step) {
 148                pr_err_once("cpu max-step is undefined in device-tree\n");
 149                cpu_max_step = 150000;
 150        }
 151
 152        if (!core_max_step) {
 153                pr_err_once("core max-step is undefined in device-tree\n");
 154                core_max_step = 150000;
 155        }
 156
 157        /*
 158         * The CORE voltage scaling is currently not hooked up in drivers,
 159         * hence we will limit the minimum CORE voltage to a reasonable value.
 160         * This should be good enough for the time being.
 161         */
 162        core_min_uV = tegra30_core_limit(tegra, core_rdev);
 163        if (core_min_uV < 0)
 164                return core_min_uV;
 165
 166        err = regulator_check_consumers(core_rdev, &core_min_uV, &core_max_uV,
 167                                        PM_SUSPEND_ON);
 168        if (err)
 169                return err;
 170
 171        core_uV = regulator_get_voltage_rdev(core_rdev);
 172        if (core_uV < 0)
 173                return core_uV;
 174
 175        cpu_min_uV = core_min_uV - max_spread;
 176
 177        err = regulator_check_consumers(cpu_rdev, &cpu_min_uV, &cpu_max_uV,
 178                                        PM_SUSPEND_ON);
 179        if (err)
 180                return err;
 181
 182        err = regulator_check_consumers(cpu_rdev, &cpu_min_uV_consumers,
 183                                        &cpu_max_uV, PM_SUSPEND_ON);
 184        if (err)
 185                return err;
 186
 187        err = regulator_check_voltage(cpu_rdev, &cpu_min_uV, &cpu_max_uV);
 188        if (err)
 189                return err;
 190
 191        cpu_uV = regulator_get_voltage_rdev(cpu_rdev);
 192        if (cpu_uV < 0)
 193                return cpu_uV;
 194
 195        /* store boot voltage level */
 196        if (!tegra->cpu_min_uV)
 197                tegra->cpu_min_uV = cpu_uV;
 198
 199        /*
 200         * CPU's regulator may not have any consumers, hence the voltage
 201         * must not be changed in that case because CPU simply won't
 202         * survive the voltage drop if it's running on a higher frequency.
 203         */
 204        if (!cpu_min_uV_consumers)
 205                cpu_min_uV = max(cpu_uV, cpu_min_uV);
 206
 207        /*
 208         * Bootloader shall set up voltages correctly, but if it
 209         * happens that there is a violation, then try to fix it
 210         * at first.
 211         */
 212        core_min_limited_uV = tegra30_core_cpu_limit(cpu_uV);
 213        if (core_min_limited_uV < 0)
 214                return core_min_limited_uV;
 215
 216        core_min_uV = max(core_min_uV, tegra30_core_cpu_limit(cpu_min_uV));
 217
 218        err = regulator_check_voltage(core_rdev, &core_min_uV, &core_max_uV);
 219        if (err)
 220                return err;
 221
 222        /* restore boot voltage level */
 223        if (tegra->sys_reboot_mode)
 224                cpu_min_uV = max(cpu_min_uV, tegra->cpu_min_uV);
 225
 226        if (core_min_limited_uV > core_uV) {
 227                pr_err("core voltage constraint violated: %d %d %d\n",
 228                       core_uV, core_min_limited_uV, cpu_uV);
 229                goto update_core;
 230        }
 231
 232        while (cpu_uV != cpu_min_uV || core_uV != core_min_uV) {
 233                if (cpu_uV < cpu_min_uV) {
 234                        cpu_target_uV = min(cpu_uV + cpu_max_step, cpu_min_uV);
 235                } else {
 236                        cpu_target_uV = max(cpu_uV - cpu_max_step, cpu_min_uV);
 237                        cpu_target_uV = max(core_uV - max_spread, cpu_target_uV);
 238                }
 239
 240                if (cpu_uV == cpu_target_uV)
 241                        goto update_core;
 242
 243                err = regulator_set_voltage_rdev(cpu_rdev,
 244                                                 cpu_target_uV,
 245                                                 cpu_max_uV,
 246                                                 PM_SUSPEND_ON);
 247                if (err)
 248                        return err;
 249
 250                cpu_uV = cpu_target_uV;
 251update_core:
 252                core_min_limited_uV = tegra30_core_cpu_limit(cpu_uV);
 253                if (core_min_limited_uV < 0)
 254                        return core_min_limited_uV;
 255
 256                core_target_uV = max(core_min_limited_uV, core_min_uV);
 257
 258                if (core_uV < core_target_uV) {
 259                        core_target_uV = min(core_target_uV, core_uV + core_max_step);
 260                        core_target_uV = min(core_target_uV, cpu_uV + max_spread);
 261                } else {
 262                        core_target_uV = max(core_target_uV, core_uV - core_max_step);
 263                }
 264
 265                if (core_uV == core_target_uV)
 266                        continue;
 267
 268                err = regulator_set_voltage_rdev(core_rdev,
 269                                                 core_target_uV,
 270                                                 core_max_uV,
 271                                                 PM_SUSPEND_ON);
 272                if (err)
 273                        return err;
 274
 275                core_uV = core_target_uV;
 276        }
 277
 278        return 0;
 279}
 280
 281static int tegra30_regulator_balance_voltage(struct regulator_coupler *coupler,
 282                                             struct regulator_dev *rdev,
 283                                             suspend_state_t state)
 284{
 285        struct tegra_regulator_coupler *tegra = to_tegra_coupler(coupler);
 286        struct regulator_dev *core_rdev = tegra->core_rdev;
 287        struct regulator_dev *cpu_rdev = tegra->cpu_rdev;
 288
 289        if ((core_rdev != rdev && cpu_rdev != rdev) || state != PM_SUSPEND_ON) {
 290                pr_err("regulators are not coupled properly\n");
 291                return -EINVAL;
 292        }
 293
 294        tegra->sys_reboot_mode = READ_ONCE(tegra->sys_reboot_mode_req);
 295
 296        return tegra30_voltage_update(tegra, cpu_rdev, core_rdev);
 297}
 298
 299static int tegra30_regulator_prepare_reboot(struct tegra_regulator_coupler *tegra,
 300                                            bool sys_reboot_mode)
 301{
 302        int err;
 303
 304        if (!tegra->core_rdev || !tegra->cpu_rdev)
 305                return 0;
 306
 307        WRITE_ONCE(tegra->sys_reboot_mode_req, true);
 308
 309        /*
 310         * Some devices use CPU soft-reboot method and in this case we
 311         * should ensure that voltages are sane for the reboot by restoring
 312         * the minimum boot levels.
 313         */
 314        err = regulator_sync_voltage_rdev(tegra->cpu_rdev);
 315        if (err)
 316                return err;
 317
 318        err = regulator_sync_voltage_rdev(tegra->core_rdev);
 319        if (err)
 320                return err;
 321
 322        WRITE_ONCE(tegra->sys_reboot_mode_req, sys_reboot_mode);
 323
 324        return 0;
 325}
 326
 327static int tegra30_regulator_reboot(struct notifier_block *notifier,
 328                                    unsigned long event, void *cmd)
 329{
 330        struct tegra_regulator_coupler *tegra;
 331        int ret;
 332
 333        if (event != SYS_RESTART)
 334                return NOTIFY_DONE;
 335
 336        tegra = container_of(notifier, struct tegra_regulator_coupler,
 337                             reboot_notifier);
 338
 339        ret = tegra30_regulator_prepare_reboot(tegra, true);
 340
 341        return notifier_from_errno(ret);
 342}
 343
 344static int tegra30_regulator_attach(struct regulator_coupler *coupler,
 345                                    struct regulator_dev *rdev)
 346{
 347        struct tegra_regulator_coupler *tegra = to_tegra_coupler(coupler);
 348        struct device_node *np = rdev->dev.of_node;
 349
 350        if (of_property_read_bool(np, "nvidia,tegra-core-regulator") &&
 351            !tegra->core_rdev) {
 352                tegra->core_rdev = rdev;
 353                return 0;
 354        }
 355
 356        if (of_property_read_bool(np, "nvidia,tegra-cpu-regulator") &&
 357            !tegra->cpu_rdev) {
 358                tegra->cpu_rdev = rdev;
 359                return 0;
 360        }
 361
 362        return -EINVAL;
 363}
 364
 365static int tegra30_regulator_detach(struct regulator_coupler *coupler,
 366                                    struct regulator_dev *rdev)
 367{
 368        struct tegra_regulator_coupler *tegra = to_tegra_coupler(coupler);
 369
 370        /*
 371         * We don't expect regulators to be decoupled during reboot,
 372         * this may race with the reboot handler and shouldn't ever
 373         * happen in practice.
 374         */
 375        if (WARN_ON_ONCE(system_state > SYSTEM_RUNNING))
 376                return -EPERM;
 377
 378        if (tegra->core_rdev == rdev) {
 379                tegra->core_rdev = NULL;
 380                return 0;
 381        }
 382
 383        if (tegra->cpu_rdev == rdev) {
 384                tegra->cpu_rdev = NULL;
 385                return 0;
 386        }
 387
 388        return -EINVAL;
 389}
 390
 391static struct tegra_regulator_coupler tegra30_coupler = {
 392        .coupler = {
 393                .attach_regulator = tegra30_regulator_attach,
 394                .detach_regulator = tegra30_regulator_detach,
 395                .balance_voltage = tegra30_regulator_balance_voltage,
 396        },
 397        .reboot_notifier.notifier_call = tegra30_regulator_reboot,
 398};
 399
 400static int __init tegra_regulator_coupler_init(void)
 401{
 402        int err;
 403
 404        if (!of_machine_is_compatible("nvidia,tegra30"))
 405                return 0;
 406
 407        err = register_reboot_notifier(&tegra30_coupler.reboot_notifier);
 408        WARN_ON(err);
 409
 410        return regulator_coupler_register(&tegra30_coupler.coupler);
 411}
 412arch_initcall(tegra_regulator_coupler_init);
 413