LXR linux/drivers/spi/spi-fsl-lib.h

   1/* SPDX-License-Identifier: GPL-2.0-or-later */
   2/*
   3 * Freescale SPI/eSPI controller driver library.
   4 *
   5 * Maintainer: Kumar Gala
   6 *
   7 * Copyright 2010 Freescale Semiconductor, Inc.
   8 * Copyright (C) 2006 Polycom, Inc.
   9 *
  10 * CPM SPI and QE buffer descriptors mode support:
  11 * Copyright (c) 2009  MontaVista Software, Inc.
  12 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
  13 */
  14#ifndef __SPI_FSL_LIB_H__
  15#define __SPI_FSL_LIB_H__
  16
  17#include <asm/io.h>
  18
  19/* SPI/eSPI Controller driver's private data. */
  20struct mpc8xxx_spi {
  21        struct device *dev;
  22        void __iomem *reg_base;
  23
  24        /* rx & tx bufs from the spi_transfer */
  25        const void *tx;
  26        void *rx;
  27
  28        int subblock;
  29        struct spi_pram __iomem *pram;
  30#ifdef CONFIG_FSL_SOC
  31        struct cpm_buf_desc __iomem *tx_bd;
  32        struct cpm_buf_desc __iomem *rx_bd;
  33#endif
  34
  35        struct spi_transfer *xfer_in_progress;
  36
  37        /* dma addresses for CPM transfers */
  38        dma_addr_t tx_dma;
  39        dma_addr_t rx_dma;
  40        bool map_tx_dma;
  41        bool map_rx_dma;
  42
  43        dma_addr_t dma_dummy_tx;
  44        dma_addr_t dma_dummy_rx;
  45
  46        /* functions to deal with different sized buffers */
  47        void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
  48        u32(*get_tx) (struct mpc8xxx_spi *);
  49
  50        unsigned int count;
  51        unsigned int irq;
  52
  53        unsigned nsecs;         /* (clock cycle time)/2 */
  54
  55        u32 spibrg;             /* SPIBRG input clock */
  56        u32 rx_shift;           /* RX data reg shift when in qe mode */
  57        u32 tx_shift;           /* TX data reg shift when in qe mode */
  58
  59        unsigned int flags;
  60
  61#if IS_ENABLED(CONFIG_SPI_FSL_SPI)
  62        int type;
  63        int native_chipselects;
  64        u8 max_bits_per_word;
  65
  66        void (*set_shifts)(u32 *rx_shift, u32 *tx_shift,
  67                           int bits_per_word, int msb_first);
  68#endif
  69
  70        struct completion done;
  71};
  72
  73struct spi_mpc8xxx_cs {
  74        /* functions to deal with different sized buffers */
  75        void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
  76        u32 (*get_tx) (struct mpc8xxx_spi *);
  77        u32 rx_shift;           /* RX data reg shift when in qe mode */
  78        u32 tx_shift;           /* TX data reg shift when in qe mode */
  79        u32 hw_mode;            /* Holds HW mode register settings */
  80};
  81
  82static inline void mpc8xxx_spi_write_reg(__be32 __iomem *reg, u32 val)
  83{
  84        iowrite32be(val, reg);
  85}
  86
  87static inline u32 mpc8xxx_spi_read_reg(__be32 __iomem *reg)
  88{
  89        return ioread32be(reg);
  90}
  91
  92struct mpc8xxx_spi_probe_info {
  93        struct fsl_spi_platform_data pdata;
  94        __be32 __iomem *immr_spi_cs;
  95};
  96
  97extern u32 mpc8xxx_spi_tx_buf_u8(struct mpc8xxx_spi *mpc8xxx_spi);
  98extern u32 mpc8xxx_spi_tx_buf_u16(struct mpc8xxx_spi *mpc8xxx_spi);
  99extern u32 mpc8xxx_spi_tx_buf_u32(struct mpc8xxx_spi *mpc8xxx_spi);
 100extern void mpc8xxx_spi_rx_buf_u8(u32 data, struct mpc8xxx_spi *mpc8xxx_spi);
 101extern void mpc8xxx_spi_rx_buf_u16(u32 data, struct mpc8xxx_spi *mpc8xxx_spi);
 102extern void mpc8xxx_spi_rx_buf_u32(u32 data, struct mpc8xxx_spi *mpc8xxx_spi);
 103
 104extern struct mpc8xxx_spi_probe_info *to_of_pinfo(
 105                struct fsl_spi_platform_data *pdata);
 106extern int mpc8xxx_spi_bufs(struct mpc8xxx_spi *mspi,
 107                struct spi_transfer *t, unsigned int len);
 108extern const char *mpc8xxx_spi_strmode(unsigned int flags);
 109extern void mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
 110                unsigned int irq);
 111extern int mpc8xxx_spi_remove(struct device *dev);
 112extern int of_mpc8xxx_spi_probe(struct platform_device *ofdev);
 113
 114#endif /* __SPI_FSL_LIB_H__ */
 115