LXR linux/drivers/staging/media/atomisp/i2c/ov2722.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * Support for OmniVision OV2722 1080p HD camera sensor.
   4 *
   5 * Copyright (c) 2013 Intel Corporation. All Rights Reserved.
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License version
   9 * 2 as published by the Free Software Foundation.
  10 *
  11 * This program is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 * GNU General Public License for more details.
  15 *
  16 *
  17 */
  18
  19#ifndef __OV2722_H__
  20#define __OV2722_H__
  21#include <linux/kernel.h>
  22#include <linux/types.h>
  23#include <linux/i2c.h>
  24#include <linux/delay.h>
  25#include <linux/videodev2.h>
  26#include <linux/spinlock.h>
  27#include <media/v4l2-subdev.h>
  28#include <media/v4l2-device.h>
  29#include <linux/v4l2-mediabus.h>
  30#include <media/media-entity.h>
  31#include <media/v4l2-ctrls.h>
  32
  33#include "../include/linux/atomisp_platform.h"
  34
  35#define OV2722_POWER_UP_RETRY_NUM 5
  36
  37/* Defines for register writes and register array processing */
  38#define I2C_MSG_LENGTH          0x2
  39#define I2C_RETRY_COUNT         5
  40
  41#define OV2722_FOCAL_LENGTH_NUM 278     /*2.78mm*/
  42#define OV2722_FOCAL_LENGTH_DEM 100
  43#define OV2722_F_NUMBER_DEFAULT_NUM     26
  44#define OV2722_F_NUMBER_DEM     10
  45
  46#define MAX_FMTS                1
  47
  48/*
  49 * focal length bits definition:
  50 * bits 31-16: numerator, bits 15-0: denominator
  51 */
  52#define OV2722_FOCAL_LENGTH_DEFAULT 0x1160064
  53
  54/*
  55 * current f-number bits definition:
  56 * bits 31-16: numerator, bits 15-0: denominator
  57 */
  58#define OV2722_F_NUMBER_DEFAULT 0x1a000a
  59
  60/*
  61 * f-number range bits definition:
  62 * bits 31-24: max f-number numerator
  63 * bits 23-16: max f-number denominator
  64 * bits 15-8: min f-number numerator
  65 * bits 7-0: min f-number denominator
  66 */
  67#define OV2722_F_NUMBER_RANGE 0x1a0a1a0a
  68#define OV2720_ID       0x2720
  69#define OV2722_ID       0x2722
  70
  71#define OV2722_FINE_INTG_TIME_MIN 0
  72#define OV2722_FINE_INTG_TIME_MAX_MARGIN 0
  73#define OV2722_COARSE_INTG_TIME_MIN 1
  74#define OV2722_COARSE_INTG_TIME_MAX_MARGIN 4
  75
  76/*
  77 * OV2722 System control registers
  78 */
  79#define OV2722_SW_SLEEP                         0x0100
  80#define OV2722_SW_RESET                         0x0103
  81#define OV2722_SW_STREAM                        0x0100
  82
  83#define OV2722_SC_CMMN_CHIP_ID_H                0x300A
  84#define OV2722_SC_CMMN_CHIP_ID_L                0x300B
  85#define OV2722_SC_CMMN_SCCB_ID                  0x300C
  86#define OV2722_SC_CMMN_SUB_ID                   0x302A /* process, version*/
  87
  88#define OV2722_SC_CMMN_PAD_OEN0                 0x3000
  89#define OV2722_SC_CMMN_PAD_OEN1                 0x3001
  90#define OV2722_SC_CMMN_PAD_OEN2                 0x3002
  91#define OV2722_SC_CMMN_PAD_OUT0                 0x3008
  92#define OV2722_SC_CMMN_PAD_OUT1                 0x3009
  93#define OV2722_SC_CMMN_PAD_OUT2                 0x300D
  94#define OV2722_SC_CMMN_PAD_SEL0                 0x300E
  95#define OV2722_SC_CMMN_PAD_SEL1                 0x300F
  96#define OV2722_SC_CMMN_PAD_SEL2                 0x3010
  97
  98#define OV2722_SC_CMMN_PAD_PK                   0x3011
  99#define OV2722_SC_CMMN_A_PWC_PK_O_13            0x3013
 100#define OV2722_SC_CMMN_A_PWC_PK_O_14            0x3014
 101
 102#define OV2722_SC_CMMN_CLKRST0                  0x301A
 103#define OV2722_SC_CMMN_CLKRST1                  0x301B
 104#define OV2722_SC_CMMN_CLKRST2                  0x301C
 105#define OV2722_SC_CMMN_CLKRST3                  0x301D
 106#define OV2722_SC_CMMN_CLKRST4                  0x301E
 107#define OV2722_SC_CMMN_CLKRST5                  0x3005
 108#define OV2722_SC_CMMN_PCLK_DIV_CTRL            0x3007
 109#define OV2722_SC_CMMN_CLOCK_SEL                0x3020
 110#define OV2722_SC_SOC_CLKRST5                   0x3040
 111
 112#define OV2722_SC_CMMN_PLL_CTRL0                0x3034
 113#define OV2722_SC_CMMN_PLL_CTRL1                0x3035
 114#define OV2722_SC_CMMN_PLL_CTRL2                0x3039
 115#define OV2722_SC_CMMN_PLL_CTRL3                0x3037
 116#define OV2722_SC_CMMN_PLL_MULTIPLIER           0x3036
 117#define OV2722_SC_CMMN_PLL_DEBUG_OPT            0x3038
 118#define OV2722_SC_CMMN_PLLS_CTRL0               0x303A
 119#define OV2722_SC_CMMN_PLLS_CTRL1               0x303B
 120#define OV2722_SC_CMMN_PLLS_CTRL2               0x303C
 121#define OV2722_SC_CMMN_PLLS_CTRL3               0x303D
 122
 123#define OV2722_SC_CMMN_MIPI_PHY_16              0x3016
 124#define OV2722_SC_CMMN_MIPI_PHY_17              0x3017
 125#define OV2722_SC_CMMN_MIPI_SC_CTRL_18          0x3018
 126#define OV2722_SC_CMMN_MIPI_SC_CTRL_19          0x3019
 127#define OV2722_SC_CMMN_MIPI_SC_CTRL_21          0x3021
 128#define OV2722_SC_CMMN_MIPI_SC_CTRL_22          0x3022
 129
 130#define OV2722_AEC_PK_EXPO_H                    0x3500
 131#define OV2722_AEC_PK_EXPO_M                    0x3501
 132#define OV2722_AEC_PK_EXPO_L                    0x3502
 133#define OV2722_AEC_MANUAL_CTRL                  0x3503
 134#define OV2722_AGC_ADJ_H                        0x3508
 135#define OV2722_AGC_ADJ_L                        0x3509
 136#define OV2722_VTS_DIFF_H                       0x350c
 137#define OV2722_VTS_DIFF_L                       0x350d
 138#define OV2722_GROUP_ACCESS                     0x3208
 139#define OV2722_HTS_H                            0x380c
 140#define OV2722_HTS_L                            0x380d
 141#define OV2722_VTS_H                            0x380e
 142#define OV2722_VTS_L                            0x380f
 143
 144#define OV2722_MWB_GAIN_R_H                     0x5186
 145#define OV2722_MWB_GAIN_R_L                     0x5187
 146#define OV2722_MWB_GAIN_G_H                     0x5188
 147#define OV2722_MWB_GAIN_G_L                     0x5189
 148#define OV2722_MWB_GAIN_B_H                     0x518a
 149#define OV2722_MWB_GAIN_B_L                     0x518b
 150
 151#define OV2722_H_CROP_START_H                   0x3800
 152#define OV2722_H_CROP_START_L                   0x3801
 153#define OV2722_V_CROP_START_H                   0x3802
 154#define OV2722_V_CROP_START_L                   0x3803
 155#define OV2722_H_CROP_END_H                     0x3804
 156#define OV2722_H_CROP_END_L                     0x3805
 157#define OV2722_V_CROP_END_H                     0x3806
 158#define OV2722_V_CROP_END_L                     0x3807
 159#define OV2722_H_OUTSIZE_H                      0x3808
 160#define OV2722_H_OUTSIZE_L                      0x3809
 161#define OV2722_V_OUTSIZE_H                      0x380a
 162#define OV2722_V_OUTSIZE_L                      0x380b
 163
 164#define OV2722_START_STREAMING                  0x01
 165#define OV2722_STOP_STREAMING                   0x00
 166
 167struct regval_list {
 168        u16 reg_num;
 169        u8 value;
 170};
 171
 172struct ov2722_resolution {
 173        u8 *desc;
 174        const struct ov2722_reg *regs;
 175        int res;
 176        int width;
 177        int height;
 178        int fps;
 179        int pix_clk_freq;
 180        u32 skip_frames;
 181        u16 pixels_per_line;
 182        u16 lines_per_frame;
 183        u8 bin_factor_x;
 184        u8 bin_factor_y;
 185        u8 bin_mode;
 186        bool used;
 187        int mipi_freq;
 188};
 189
 190struct ov2722_format {
 191        u8 *desc;
 192        u32 pixelformat;
 193        struct ov2722_reg *regs;
 194};
 195
 196/*
 197 * ov2722 device structure.
 198 */
 199struct ov2722_device {
 200        struct v4l2_subdev sd;
 201        struct media_pad pad;
 202        struct v4l2_mbus_framefmt format;
 203        struct mutex input_lock;
 204
 205        struct camera_sensor_platform_data *platform_data;
 206        int vt_pix_clk_freq_mhz;
 207        int fmt_idx;
 208        int run_mode;
 209        u16 pixels_per_line;
 210        u16 lines_per_frame;
 211        u8 res;
 212        u8 type;
 213
 214        struct v4l2_ctrl_handler ctrl_handler;
 215        struct v4l2_ctrl *link_freq;
 216};
 217
 218enum ov2722_tok_type {
 219        OV2722_8BIT  = 0x0001,
 220        OV2722_16BIT = 0x0002,
 221        OV2722_32BIT = 0x0004,
 222        OV2722_TOK_TERM   = 0xf000,     /* terminating token for reg list */
 223        OV2722_TOK_DELAY  = 0xfe00,     /* delay token for reg list */
 224        OV2722_TOK_MASK = 0xfff0
 225};
 226
 227/**
 228 * struct ov2722_reg - MI sensor  register format
 229 * @type: type of the register
 230 * @reg: 16-bit offset to register
 231 * @val: 8/16/32-bit register value
 232 *
 233 * Define a structure for sensor register initialization values
 234 */
 235struct ov2722_reg {
 236        enum ov2722_tok_type type;
 237        u16 reg;
 238        u32 val;        /* @set value for read/mod/write, @mask */
 239};
 240
 241#define to_ov2722_sensor(x) container_of(x, struct ov2722_device, sd)
 242
 243#define OV2722_MAX_WRITE_BUF_SIZE       30
 244
 245struct ov2722_write_buffer {
 246        u16 addr;
 247        u8 data[OV2722_MAX_WRITE_BUF_SIZE];
 248};
 249
 250struct ov2722_write_ctrl {
 251        int index;
 252        struct ov2722_write_buffer buffer;
 253};
 254
 255/*
 256 * Register settings for various resolution
 257 */
 258#if 0
 259static struct ov2722_reg const ov2722_QVGA_30fps[] = {
 260        {OV2722_8BIT, 0x3718, 0x10},
 261        {OV2722_8BIT, 0x3702, 0x0c},
 262        {OV2722_8BIT, 0x373a, 0x1c},
 263        {OV2722_8BIT, 0x3715, 0x01},
 264        {OV2722_8BIT, 0x3703, 0x0c},
 265        {OV2722_8BIT, 0x3705, 0x06},
 266        {OV2722_8BIT, 0x3730, 0x0e},
 267        {OV2722_8BIT, 0x3704, 0x1c},
 268        {OV2722_8BIT, 0x3f06, 0x00},
 269        {OV2722_8BIT, 0x371c, 0x00},
 270        {OV2722_8BIT, 0x371d, 0x46},
 271        {OV2722_8BIT, 0x371e, 0x00},
 272        {OV2722_8BIT, 0x371f, 0x63},
 273        {OV2722_8BIT, 0x3708, 0x61},
 274        {OV2722_8BIT, 0x3709, 0x12},
 275        {OV2722_8BIT, 0x3800, 0x01},
 276        {OV2722_8BIT, 0x3801, 0x42}, /* H crop start: 322 */
 277        {OV2722_8BIT, 0x3802, 0x00},
 278        {OV2722_8BIT, 0x3803, 0x20}, /* V crop start: 32 */
 279        {OV2722_8BIT, 0x3804, 0x06},
 280        {OV2722_8BIT, 0x3805, 0x95}, /* H crop end:  1685 */
 281        {OV2722_8BIT, 0x3806, 0x04},
 282        {OV2722_8BIT, 0x3807, 0x27}, /* V crop end:  1063 */
 283        {OV2722_8BIT, 0x3808, 0x01},
 284        {OV2722_8BIT, 0x3809, 0x50}, /* H output size: 336 */
 285        {OV2722_8BIT, 0x380a, 0x01},
 286        {OV2722_8BIT, 0x380b, 0x00}, /* V output size: 256 */
 287
 288        /* H blank timing */
 289        {OV2722_8BIT, 0x380c, 0x08},
 290        {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */
 291        {OV2722_8BIT, 0x380e, 0x04},
 292        {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */
 293        {OV2722_8BIT, 0x3810, 0x00},
 294        {OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */
 295        {OV2722_8BIT, 0x3812, 0x00},
 296        {OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */
 297        {OV2722_8BIT, 0x3820, 0xc0},
 298        {OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/
 299        {OV2722_8BIT, 0x3814, 0x71},
 300        {OV2722_8BIT, 0x3815, 0x71},
 301        {OV2722_8BIT, 0x3612, 0x49},
 302        {OV2722_8BIT, 0x3618, 0x00},
 303        {OV2722_8BIT, 0x3a08, 0x01},
 304        {OV2722_8BIT, 0x3a09, 0xc3},
 305        {OV2722_8BIT, 0x3a0a, 0x01},
 306        {OV2722_8BIT, 0x3a0b, 0x77},
 307        {OV2722_8BIT, 0x3a0d, 0x00},
 308        {OV2722_8BIT, 0x3a0e, 0x00},
 309        {OV2722_8BIT, 0x4520, 0x09},
 310        {OV2722_8BIT, 0x4837, 0x1b},
 311        {OV2722_8BIT, 0x3000, 0xff},
 312        {OV2722_8BIT, 0x3001, 0xff},
 313        {OV2722_8BIT, 0x3002, 0xf0},
 314        {OV2722_8BIT, 0x3600, 0x08},
 315        {OV2722_8BIT, 0x3621, 0xc0},
 316        {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */
 317        {OV2722_8BIT, 0x3633, 0x63},
 318        {OV2722_8BIT, 0x3634, 0x24},
 319        {OV2722_8BIT, 0x3f01, 0x0c},
 320        {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */
 321        {OV2722_8BIT, 0x3614, 0xf0},
 322        {OV2722_8BIT, 0x3630, 0x2d},
 323        {OV2722_8BIT, 0x370b, 0x62},
 324        {OV2722_8BIT, 0x3706, 0x61},
 325        {OV2722_8BIT, 0x4000, 0x02},
 326        {OV2722_8BIT, 0x4002, 0xc5},
 327        {OV2722_8BIT, 0x4005, 0x08},
 328        {OV2722_8BIT, 0x404f, 0x84},
 329        {OV2722_8BIT, 0x4051, 0x00},
 330        {OV2722_8BIT, 0x5000, 0xff},
 331        {OV2722_8BIT, 0x3a18, 0x00},
 332        {OV2722_8BIT, 0x3a19, 0x80},
 333        {OV2722_8BIT, 0x4521, 0x00},
 334        {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */
 335        {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */
 336        {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */
 337        {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */
 338        {OV2722_8BIT, 0x370c, 0x0c},
 339        {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */
 340        {OV2722_8BIT, 0x3035, 0x00},
 341        {OV2722_8BIT, 0x3036, 0x26},
 342        {OV2722_8BIT, 0x3037, 0xa1},
 343        {OV2722_8BIT, 0x303e, 0x19},
 344        {OV2722_8BIT, 0x3038, 0x06},
 345        {OV2722_8BIT, 0x3018, 0x04},
 346
 347        /* Added for power optimization */
 348        {OV2722_8BIT, 0x3000, 0x00},
 349        {OV2722_8BIT, 0x3001, 0x00},
 350        {OV2722_8BIT, 0x3002, 0x00},
 351        {OV2722_8BIT, 0x3a0f, 0x40},
 352        {OV2722_8BIT, 0x3a10, 0x38},
 353        {OV2722_8BIT, 0x3a1b, 0x48},
 354        {OV2722_8BIT, 0x3a1e, 0x30},
 355        {OV2722_8BIT, 0x3a11, 0x90},
 356        {OV2722_8BIT, 0x3a1f, 0x10},
 357        {OV2722_8BIT, 0x3011, 0x22},
 358        {OV2722_8BIT, 0x3a00, 0x58},
 359        {OV2722_8BIT, 0x3503, 0x17},
 360        {OV2722_8BIT, 0x3500, 0x00},
 361        {OV2722_8BIT, 0x3501, 0x46},
 362        {OV2722_8BIT, 0x3502, 0x00},
 363        {OV2722_8BIT, 0x3508, 0x00},
 364        {OV2722_8BIT, 0x3509, 0x10},
 365        {OV2722_TOK_TERM, 0, 0},
 366
 367};
 368
 369static struct ov2722_reg const ov2722_480P_30fps[] = {
 370        {OV2722_8BIT, 0x3718, 0x10},
 371        {OV2722_8BIT, 0x3702, 0x18},
 372        {OV2722_8BIT, 0x373a, 0x3c},
 373        {OV2722_8BIT, 0x3715, 0x01},
 374        {OV2722_8BIT, 0x3703, 0x1d},
 375        {OV2722_8BIT, 0x3705, 0x12},
 376        {OV2722_8BIT, 0x3730, 0x1f},
 377        {OV2722_8BIT, 0x3704, 0x3f},
 378        {OV2722_8BIT, 0x3f06, 0x1d},
 379        {OV2722_8BIT, 0x371c, 0x00},
 380        {OV2722_8BIT, 0x371d, 0x83},
 381        {OV2722_8BIT, 0x371e, 0x00},
 382        {OV2722_8BIT, 0x371f, 0xbd},
 383        {OV2722_8BIT, 0x3708, 0x63},
 384        {OV2722_8BIT, 0x3709, 0x52},
 385        {OV2722_8BIT, 0x3800, 0x00},
 386        {OV2722_8BIT, 0x3801, 0xf2}, /* H crop start: 322 - 80 = 242*/
 387        {OV2722_8BIT, 0x3802, 0x00},
 388        {OV2722_8BIT, 0x3803, 0x20}, /* V crop start:  32*/
 389        {OV2722_8BIT, 0x3804, 0x06},
 390        {OV2722_8BIT, 0x3805, 0xBB}, /* H crop end:   1643 + 80 = 1723*/
 391        {OV2722_8BIT, 0x3806, 0x04},
 392        {OV2722_8BIT, 0x3807, 0x03}, /* V crop end:   1027*/
 393        {OV2722_8BIT, 0x3808, 0x02},
 394        {OV2722_8BIT, 0x3809, 0xE0}, /* H output size: 656 +80 = 736*/
 395        {OV2722_8BIT, 0x380a, 0x01},
 396        {OV2722_8BIT, 0x380b, 0xF0}, /* V output size: 496 */
 397
 398        /* H blank timing */
 399        {OV2722_8BIT, 0x380c, 0x08},
 400        {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */
 401        {OV2722_8BIT, 0x380e, 0x04},
 402        {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */
 403        {OV2722_8BIT, 0x3810, 0x00},
 404        {OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */
 405        {OV2722_8BIT, 0x3812, 0x00},
 406        {OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */
 407        {OV2722_8BIT, 0x3820, 0x80},
 408        {OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/
 409        {OV2722_8BIT, 0x3814, 0x31},
 410        {OV2722_8BIT, 0x3815, 0x31},
 411        {OV2722_8BIT, 0x3612, 0x4b},
 412        {OV2722_8BIT, 0x3618, 0x04},
 413        {OV2722_8BIT, 0x3a08, 0x02},
 414        {OV2722_8BIT, 0x3a09, 0x67},
 415        {OV2722_8BIT, 0x3a0a, 0x02},
 416        {OV2722_8BIT, 0x3a0b, 0x00},
 417        {OV2722_8BIT, 0x3a0d, 0x00},
 418        {OV2722_8BIT, 0x3a0e, 0x00},
 419        {OV2722_8BIT, 0x4520, 0x0a},
 420        {OV2722_8BIT, 0x4837, 0x1b},
 421        {OV2722_8BIT, 0x3000, 0xff},
 422        {OV2722_8BIT, 0x3001, 0xff},
 423        {OV2722_8BIT, 0x3002, 0xf0},
 424        {OV2722_8BIT, 0x3600, 0x08},
 425        {OV2722_8BIT, 0x3621, 0xc0},
 426        {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */
 427        {OV2722_8BIT, 0x3633, 0x63},
 428        {OV2722_8BIT, 0x3634, 0x24},
 429        {OV2722_8BIT, 0x3f01, 0x0c},
 430        {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */
 431        {OV2722_8BIT, 0x3614, 0xf0},
 432        {OV2722_8BIT, 0x3630, 0x2d},
 433        {OV2722_8BIT, 0x370b, 0x62},
 434        {OV2722_8BIT, 0x3706, 0x61},
 435        {OV2722_8BIT, 0x4000, 0x02},
 436        {OV2722_8BIT, 0x4002, 0xc5},
 437        {OV2722_8BIT, 0x4005, 0x08},
 438        {OV2722_8BIT, 0x404f, 0x84},
 439        {OV2722_8BIT, 0x4051, 0x00},
 440        {OV2722_8BIT, 0x5000, 0xff},
 441        {OV2722_8BIT, 0x3a18, 0x00},
 442        {OV2722_8BIT, 0x3a19, 0x80},
 443        {OV2722_8BIT, 0x4521, 0x00},
 444        {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */
 445        {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */
 446        {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */
 447        {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */
 448        {OV2722_8BIT, 0x370c, 0x0c},
 449        {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */
 450        {OV2722_8BIT, 0x3035, 0x00},
 451        {OV2722_8BIT, 0x3036, 0x26},
 452        {OV2722_8BIT, 0x3037, 0xa1},
 453        {OV2722_8BIT, 0x303e, 0x19},
 454        {OV2722_8BIT, 0x3038, 0x06},
 455        {OV2722_8BIT, 0x3018, 0x04},
 456
 457        /* Added for power optimization */
 458        {OV2722_8BIT, 0x3000, 0x00},
 459        {OV2722_8BIT, 0x3001, 0x00},
 460        {OV2722_8BIT, 0x3002, 0x00},
 461        {OV2722_8BIT, 0x3a0f, 0x40},
 462        {OV2722_8BIT, 0x3a10, 0x38},
 463        {OV2722_8BIT, 0x3a1b, 0x48},
 464        {OV2722_8BIT, 0x3a1e, 0x30},
 465        {OV2722_8BIT, 0x3a11, 0x90},
 466        {OV2722_8BIT, 0x3a1f, 0x10},
 467        {OV2722_8BIT, 0x3011, 0x22},
 468        {OV2722_8BIT, 0x3a00, 0x58},
 469        {OV2722_8BIT, 0x3503, 0x17},
 470        {OV2722_8BIT, 0x3500, 0x00},
 471        {OV2722_8BIT, 0x3501, 0x46},
 472        {OV2722_8BIT, 0x3502, 0x00},
 473        {OV2722_8BIT, 0x3508, 0x00},
 474        {OV2722_8BIT, 0x3509, 0x10},
 475        {OV2722_TOK_TERM, 0, 0},
 476};
 477
 478static struct ov2722_reg const ov2722_VGA_30fps[] = {
 479        {OV2722_8BIT, 0x3718, 0x10},
 480        {OV2722_8BIT, 0x3702, 0x18},
 481        {OV2722_8BIT, 0x373a, 0x3c},
 482        {OV2722_8BIT, 0x3715, 0x01},
 483        {OV2722_8BIT, 0x3703, 0x1d},
 484        {OV2722_8BIT, 0x3705, 0x12},
 485        {OV2722_8BIT, 0x3730, 0x1f},
 486        {OV2722_8BIT, 0x3704, 0x3f},
 487        {OV2722_8BIT, 0x3f06, 0x1d},
 488        {OV2722_8BIT, 0x371c, 0x00},
 489        {OV2722_8BIT, 0x371d, 0x83},
 490        {OV2722_8BIT, 0x371e, 0x00},
 491        {OV2722_8BIT, 0x371f, 0xbd},
 492        {OV2722_8BIT, 0x3708, 0x63},
 493        {OV2722_8BIT, 0x3709, 0x52},
 494        {OV2722_8BIT, 0x3800, 0x01},
 495        {OV2722_8BIT, 0x3801, 0x42}, /* H crop start: 322 */
 496        {OV2722_8BIT, 0x3802, 0x00},
 497        {OV2722_8BIT, 0x3803, 0x20}, /* V crop start:  32*/
 498        {OV2722_8BIT, 0x3804, 0x06},
 499        {OV2722_8BIT, 0x3805, 0x6B}, /* H crop end:   1643*/
 500        {OV2722_8BIT, 0x3806, 0x04},
 501        {OV2722_8BIT, 0x3807, 0x03}, /* V crop end:   1027*/
 502        {OV2722_8BIT, 0x3808, 0x02},
 503        {OV2722_8BIT, 0x3809, 0x90}, /* H output size: 656 */
 504        {OV2722_8BIT, 0x380a, 0x01},
 505        {OV2722_8BIT, 0x380b, 0xF0}, /* V output size: 496 */
 506
 507        /* H blank timing */
 508        {OV2722_8BIT, 0x380c, 0x08},
 509        {OV2722_8BIT, 0x380d, 0x00}, /* H total size: 2048 */
 510        {OV2722_8BIT, 0x380e, 0x04},
 511        {OV2722_8BIT, 0x380f, 0xa0}, /* V total size: 1184 */
 512        {OV2722_8BIT, 0x3810, 0x00},
 513        {OV2722_8BIT, 0x3811, 0x04}, /* H window offset: 5 */
 514        {OV2722_8BIT, 0x3812, 0x00},
 515        {OV2722_8BIT, 0x3813, 0x01}, /* V window offset: 2 */
 516        {OV2722_8BIT, 0x3820, 0x80},
 517        {OV2722_8BIT, 0x3821, 0x06}, /* flip isp*/
 518        {OV2722_8BIT, 0x3814, 0x31},
 519        {OV2722_8BIT, 0x3815, 0x31},
 520        {OV2722_8BIT, 0x3612, 0x4b},
 521        {OV2722_8BIT, 0x3618, 0x04},
 522        {OV2722_8BIT, 0x3a08, 0x02},
 523        {OV2722_8BIT, 0x3a09, 0x67},
 524        {OV2722_8BIT, 0x3a0a, 0x02},
 525        {OV2722_8BIT, 0x3a0b, 0x00},
 526        {OV2722_8BIT, 0x3a0d, 0x00},
 527        {OV2722_8BIT, 0x3a0e, 0x00},
 528        {OV2722_8BIT, 0x4520, 0x0a},
 529        {OV2722_8BIT, 0x4837, 0x29},
 530        {OV2722_8BIT, 0x3000, 0xff},
 531        {OV2722_8BIT, 0x3001, 0xff},
 532        {OV2722_8BIT, 0x3002, 0xf0},
 533        {OV2722_8BIT, 0x3600, 0x08},
 534        {OV2722_8BIT, 0x3621, 0xc0},
 535        {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */
 536        {OV2722_8BIT, 0x3633, 0x63},
 537        {OV2722_8BIT, 0x3634, 0x24},
 538        {OV2722_8BIT, 0x3f01, 0x0c},
 539        {OV2722_8BIT, 0x5001, 0xc1}, /* v_en, h_en, blc_en */
 540        {OV2722_8BIT, 0x3614, 0xf0},
 541        {OV2722_8BIT, 0x3630, 0x2d},
 542        {OV2722_8BIT, 0x370b, 0x62},
 543        {OV2722_8BIT, 0x3706, 0x61},
 544        {OV2722_8BIT, 0x4000, 0x02},
 545        {OV2722_8BIT, 0x4002, 0xc5},
 546        {OV2722_8BIT, 0x4005, 0x08},
 547        {OV2722_8BIT, 0x404f, 0x84},
 548        {OV2722_8BIT, 0x4051, 0x00},
 549        {OV2722_8BIT, 0x5000, 0xff},
 550        {OV2722_8BIT, 0x3a18, 0x00},
 551        {OV2722_8BIT, 0x3a19, 0x80},
 552        {OV2722_8BIT, 0x4521, 0x00},
 553        {OV2722_8BIT, 0x5183, 0xb0}, /* AWB red */
 554        {OV2722_8BIT, 0x5184, 0xb0}, /* AWB green */
 555        {OV2722_8BIT, 0x5185, 0xb0}, /* AWB blue */
 556        {OV2722_8BIT, 0x5180, 0x03}, /* AWB manual mode */
 557        {OV2722_8BIT, 0x370c, 0x0c},
 558        {OV2722_8BIT, 0x4800, 0x24}, /* clk lane gate enable */
 559        {OV2722_8BIT, 0x3035, 0x00},
 560        {OV2722_8BIT, 0x3036, 0x26},
 561        {OV2722_8BIT, 0x3037, 0xa1},
 562        {OV2722_8BIT, 0x303e, 0x19},
 563        {OV2722_8BIT, 0x3038, 0x06},
 564        {OV2722_8BIT, 0x3018, 0x04},
 565
 566        /* Added for power optimization */
 567        {OV2722_8BIT, 0x3000, 0x00},
 568        {OV2722_8BIT, 0x3001, 0x00},
 569        {OV2722_8BIT, 0x3002, 0x00},
 570        {OV2722_8BIT, 0x3a0f, 0x40},
 571        {OV2722_8BIT, 0x3a10, 0x38},
 572        {OV2722_8BIT, 0x3a1b, 0x48},
 573        {OV2722_8BIT, 0x3a1e, 0x30},
 574        {OV2722_8BIT, 0x3a11, 0x90},
 575        {OV2722_8BIT, 0x3a1f, 0x10},
 576        {OV2722_8BIT, 0x3011, 0x22},
 577        {OV2722_8BIT, 0x3a00, 0x58},
 578        {OV2722_8BIT, 0x3503, 0x17},
 579        {OV2722_8BIT, 0x3500, 0x00},
 580        {OV2722_8BIT, 0x3501, 0x46},
 581        {OV2722_8BIT, 0x3502, 0x00},
 582        {OV2722_8BIT, 0x3508, 0x00},
 583        {OV2722_8BIT, 0x3509, 0x10},
 584        {OV2722_TOK_TERM, 0, 0},
 585};
 586#endif
 587
 588static struct ov2722_reg const ov2722_1632_1092_30fps[] = {
 589        {OV2722_8BIT, 0x3021, 0x03}, /* For stand wait for
 590                                a whole frame complete.(vblank) */
 591        {OV2722_8BIT, 0x3718, 0x10},
 592        {OV2722_8BIT, 0x3702, 0x24},
 593        {OV2722_8BIT, 0x373a, 0x60},
 594        {OV2722_8BIT, 0x3715, 0x01},
 595        {OV2722_8BIT, 0x3703, 0x2e},
 596        {OV2722_8BIT, 0x3705, 0x10},
 597        {OV2722_8BIT, 0x3730, 0x30},
 598        {OV2722_8BIT, 0x3704, 0x62},
 599        {OV2722_8BIT, 0x3f06, 0x3a},
 600        {OV2722_8BIT, 0x371c, 0x00},
 601        {OV2722_8BIT, 0x371d, 0xc4},
 602        {OV2722_8BIT, 0x371e, 0x01},
 603        {OV2722_8BIT, 0x371f, 0x0d},
 604        {OV2722_8BIT, 0x3708, 0x61},
 605        {OV2722_8BIT, 0x3709, 0x12},
 606        {OV2722_8BIT, 0x3800, 0x00},
 607        {OV2722_8BIT, 0x3801, 0x9E}, /* H crop start: 158 */
 608        {OV2722_8BIT, 0x3802, 0x00},
 609        {OV2722_8BIT, 0x3803, 0x01}, /* V crop start: 1 */
 610        {OV2722_8BIT, 0x3804, 0x07},
 611        {OV2722_8BIT, 0x3805, 0x05}, /* H crop end: 1797 */
 612        {OV2722_8BIT, 0x3806, 0x04},
 613        {OV2722_8BIT, 0x3807, 0x45}, /* V crop end: 1093 */
 614
 615        {OV2722_8BIT, 0x3808, 0x06},
 616        {OV2722_8BIT, 0x3809, 0x60}, /* H output size: 1632 */
 617        {OV2722_8BIT, 0x380a, 0x04},
 618        {OV2722_8BIT, 0x380b, 0x44}, /* V output size: 1092 */
 619        {OV2722_8BIT, 0x380c, 0x08},
 620        {OV2722_8BIT, 0x380d, 0xd4}, /* H timing: 2260 */
 621        {OV2722_8BIT, 0x380e, 0x04},
 622        {OV2722_8BIT, 0x380f, 0xdc}, /* V timing: 1244 */
 623        {OV2722_8BIT, 0x3810, 0x00},
 624        {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */
 625        {OV2722_8BIT, 0x3812, 0x00},
 626        {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */
 627        {OV2722_8BIT, 0x3820, 0x80},
 628        {OV2722_8BIT, 0x3821, 0x06}, /*  mirror */
 629        {OV2722_8BIT, 0x3814, 0x11},
 630        {OV2722_8BIT, 0x3815, 0x11},
 631        {OV2722_8BIT, 0x3612, 0x0b},
 632        {OV2722_8BIT, 0x3618, 0x04},
 633        {OV2722_8BIT, 0x3a08, 0x01},
 634        {OV2722_8BIT, 0x3a09, 0x50},
 635        {OV2722_8BIT, 0x3a0a, 0x01},
 636        {OV2722_8BIT, 0x3a0b, 0x18},
 637        {OV2722_8BIT, 0x3a0d, 0x03},
 638        {OV2722_8BIT, 0x3a0e, 0x03},
 639        {OV2722_8BIT, 0x4520, 0x00},
 640        {OV2722_8BIT, 0x4837, 0x1b},
 641        {OV2722_8BIT, 0x3600, 0x08},
 642        {OV2722_8BIT, 0x3621, 0xc0},
 643        {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */
 644        {OV2722_8BIT, 0x3633, 0x23},
 645        {OV2722_8BIT, 0x3634, 0x54},
 646        {OV2722_8BIT, 0x3f01, 0x0c},
 647        {OV2722_8BIT, 0x5001, 0xc1},
 648        {OV2722_8BIT, 0x3614, 0xf0},
 649        {OV2722_8BIT, 0x3630, 0x2d},
 650        {OV2722_8BIT, 0x370b, 0x62},
 651        {OV2722_8BIT, 0x3706, 0x61},
 652        {OV2722_8BIT, 0x4000, 0x02},
 653        {OV2722_8BIT, 0x4002, 0xc5},
 654        {OV2722_8BIT, 0x4005, 0x08},
 655        {OV2722_8BIT, 0x404f, 0x84},
 656        {OV2722_8BIT, 0x4051, 0x00},
 657        {OV2722_8BIT, 0x5000, 0xcf}, /* manual 3a */
 658        {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */
 659        {OV2722_8BIT, 0x3a18, 0x00},
 660        {OV2722_8BIT, 0x3a19, 0x80},
 661        {OV2722_8BIT, 0x4521, 0x00},
 662        {OV2722_8BIT, 0x5183, 0xb0},
 663        {OV2722_8BIT, 0x5184, 0xb0},
 664        {OV2722_8BIT, 0x5185, 0xb0},
 665        {OV2722_8BIT, 0x370c, 0x0c},
 666        {OV2722_8BIT, 0x3035, 0x00},
 667        {OV2722_8BIT, 0x3036, 0x2c}, /* 422.4 MHz */
 668        {OV2722_8BIT, 0x3037, 0xa1},
 669        {OV2722_8BIT, 0x303e, 0x19},
 670        {OV2722_8BIT, 0x3038, 0x06},
 671        {OV2722_8BIT, 0x3018, 0x04},
 672        {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */
 673        {OV2722_8BIT, 0x3001, 0x00},
 674        {OV2722_8BIT, 0x3002, 0x00},
 675        {OV2722_8BIT, 0x3a0f, 0x40},
 676        {OV2722_8BIT, 0x3a10, 0x38},
 677        {OV2722_8BIT, 0x3a1b, 0x48},
 678        {OV2722_8BIT, 0x3a1e, 0x30},
 679        {OV2722_8BIT, 0x3a11, 0x90},
 680        {OV2722_8BIT, 0x3a1f, 0x10},
 681        {OV2722_8BIT, 0x3503, 0x17}, /* manual 3a */
 682        {OV2722_8BIT, 0x3500, 0x00},
 683        {OV2722_8BIT, 0x3501, 0x3F},
 684        {OV2722_8BIT, 0x3502, 0x00},
 685        {OV2722_8BIT, 0x3508, 0x00},
 686        {OV2722_8BIT, 0x3509, 0x00},
 687        {OV2722_TOK_TERM, 0, 0}
 688};
 689
 690static struct ov2722_reg const ov2722_1452_1092_30fps[] = {
 691        {OV2722_8BIT, 0x3021, 0x03}, /* For stand wait for
 692                                a whole frame complete.(vblank) */
 693        {OV2722_8BIT, 0x3718, 0x10},
 694        {OV2722_8BIT, 0x3702, 0x24},
 695        {OV2722_8BIT, 0x373a, 0x60},
 696        {OV2722_8BIT, 0x3715, 0x01},
 697        {OV2722_8BIT, 0x3703, 0x2e},
 698        {OV2722_8BIT, 0x3705, 0x10},
 699        {OV2722_8BIT, 0x3730, 0x30},
 700        {OV2722_8BIT, 0x3704, 0x62},
 701        {OV2722_8BIT, 0x3f06, 0x3a},
 702        {OV2722_8BIT, 0x371c, 0x00},
 703        {OV2722_8BIT, 0x371d, 0xc4},
 704        {OV2722_8BIT, 0x371e, 0x01},
 705        {OV2722_8BIT, 0x371f, 0x0d},
 706        {OV2722_8BIT, 0x3708, 0x61},
 707        {OV2722_8BIT, 0x3709, 0x12},
 708        {OV2722_8BIT, 0x3800, 0x00},
 709        {OV2722_8BIT, 0x3801, 0xF8}, /* H crop start: 248 */
 710        {OV2722_8BIT, 0x3802, 0x00},
 711        {OV2722_8BIT, 0x3803, 0x01}, /* V crop start: 1 */
 712        {OV2722_8BIT, 0x3804, 0x06},
 713        {OV2722_8BIT, 0x3805, 0xab}, /* H crop end: 1707 */
 714        {OV2722_8BIT, 0x3806, 0x04},
 715        {OV2722_8BIT, 0x3807, 0x45}, /* V crop end: 1093 */
 716        {OV2722_8BIT, 0x3808, 0x05},
 717        {OV2722_8BIT, 0x3809, 0xac}, /* H output size: 1452 */
 718        {OV2722_8BIT, 0x380a, 0x04},
 719        {OV2722_8BIT, 0x380b, 0x44}, /* V output size: 1092 */
 720        {OV2722_8BIT, 0x380c, 0x08},
 721        {OV2722_8BIT, 0x380d, 0xd4}, /* H timing: 2260 */
 722        {OV2722_8BIT, 0x380e, 0x04},
 723        {OV2722_8BIT, 0x380f, 0xdc}, /* V timing: 1244 */
 724        {OV2722_8BIT, 0x3810, 0x00},
 725        {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */
 726        {OV2722_8BIT, 0x3812, 0x00},
 727        {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */
 728        {OV2722_8BIT, 0x3820, 0x80},
 729        {OV2722_8BIT, 0x3821, 0x06}, /*  mirror */
 730        {OV2722_8BIT, 0x3814, 0x11},
 731        {OV2722_8BIT, 0x3815, 0x11},
 732        {OV2722_8BIT, 0x3612, 0x0b},
 733        {OV2722_8BIT, 0x3618, 0x04},
 734        {OV2722_8BIT, 0x3a08, 0x01},
 735        {OV2722_8BIT, 0x3a09, 0x50},
 736        {OV2722_8BIT, 0x3a0a, 0x01},
 737        {OV2722_8BIT, 0x3a0b, 0x18},
 738        {OV2722_8BIT, 0x3a0d, 0x03},
 739        {OV2722_8BIT, 0x3a0e, 0x03},
 740        {OV2722_8BIT, 0x4520, 0x00},
 741        {OV2722_8BIT, 0x4837, 0x1b},
 742        {OV2722_8BIT, 0x3600, 0x08},
 743        {OV2722_8BIT, 0x3621, 0xc0},
 744        {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */
 745        {OV2722_8BIT, 0x3633, 0x23},
 746        {OV2722_8BIT, 0x3634, 0x54},
 747        {OV2722_8BIT, 0x3f01, 0x0c},
 748        {OV2722_8BIT, 0x5001, 0xc1},
 749        {OV2722_8BIT, 0x3614, 0xf0},
 750        {OV2722_8BIT, 0x3630, 0x2d},
 751        {OV2722_8BIT, 0x370b, 0x62},
 752        {OV2722_8BIT, 0x3706, 0x61},
 753        {OV2722_8BIT, 0x4000, 0x02},
 754        {OV2722_8BIT, 0x4002, 0xc5},
 755        {OV2722_8BIT, 0x4005, 0x08},
 756        {OV2722_8BIT, 0x404f, 0x84},
 757        {OV2722_8BIT, 0x4051, 0x00},
 758        {OV2722_8BIT, 0x5000, 0xcf}, /* manual 3a */
 759        {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */
 760        {OV2722_8BIT, 0x3a18, 0x00},
 761        {OV2722_8BIT, 0x3a19, 0x80},
 762        {OV2722_8BIT, 0x4521, 0x00},
 763        {OV2722_8BIT, 0x5183, 0xb0},
 764        {OV2722_8BIT, 0x5184, 0xb0},
 765        {OV2722_8BIT, 0x5185, 0xb0},
 766        {OV2722_8BIT, 0x370c, 0x0c},
 767        {OV2722_8BIT, 0x3035, 0x00},
 768        {OV2722_8BIT, 0x3036, 0x2c}, /* 422.4 MHz */
 769        {OV2722_8BIT, 0x3037, 0xa1},
 770        {OV2722_8BIT, 0x303e, 0x19},
 771        {OV2722_8BIT, 0x3038, 0x06},
 772        {OV2722_8BIT, 0x3018, 0x04},
 773        {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */
 774        {OV2722_8BIT, 0x3001, 0x00},
 775        {OV2722_8BIT, 0x3002, 0x00},
 776        {OV2722_8BIT, 0x3a0f, 0x40},
 777        {OV2722_8BIT, 0x3a10, 0x38},
 778        {OV2722_8BIT, 0x3a1b, 0x48},
 779        {OV2722_8BIT, 0x3a1e, 0x30},
 780        {OV2722_8BIT, 0x3a11, 0x90},
 781        {OV2722_8BIT, 0x3a1f, 0x10},
 782        {OV2722_8BIT, 0x3503, 0x17}, /* manual 3a */
 783        {OV2722_8BIT, 0x3500, 0x00},
 784        {OV2722_8BIT, 0x3501, 0x3F},
 785        {OV2722_8BIT, 0x3502, 0x00},
 786        {OV2722_8BIT, 0x3508, 0x00},
 787        {OV2722_8BIT, 0x3509, 0x00},
 788        {OV2722_TOK_TERM, 0, 0}
 789};
 790
 791#if 0
 792static struct ov2722_reg const ov2722_1M3_30fps[] = {
 793        {OV2722_8BIT, 0x3718, 0x10},
 794        {OV2722_8BIT, 0x3702, 0x24},
 795        {OV2722_8BIT, 0x373a, 0x60},
 796        {OV2722_8BIT, 0x3715, 0x01},
 797        {OV2722_8BIT, 0x3703, 0x2e},
 798        {OV2722_8BIT, 0x3705, 0x10},
 799        {OV2722_8BIT, 0x3730, 0x30},
 800        {OV2722_8BIT, 0x3704, 0x62},
 801        {OV2722_8BIT, 0x3f06, 0x3a},
 802        {OV2722_8BIT, 0x371c, 0x00},
 803        {OV2722_8BIT, 0x371d, 0xc4},
 804        {OV2722_8BIT, 0x371e, 0x01},
 805        {OV2722_8BIT, 0x371f, 0x0d},
 806        {OV2722_8BIT, 0x3708, 0x61},
 807        {OV2722_8BIT, 0x3709, 0x12},
 808        {OV2722_8BIT, 0x3800, 0x01},
 809        {OV2722_8BIT, 0x3801, 0x4a},    /* H crop start: 330 */
 810        {OV2722_8BIT, 0x3802, 0x00},
 811        {OV2722_8BIT, 0x3803, 0x03},    /* V crop start: 3 */
 812        {OV2722_8BIT, 0x3804, 0x06},
 813        {OV2722_8BIT, 0x3805, 0xe1},    /* H crop end:  1761 */
 814        {OV2722_8BIT, 0x3806, 0x04},
 815        {OV2722_8BIT, 0x3807, 0x47},    /* V crop end:  1095 */
 816        {OV2722_8BIT, 0x3808, 0x05},
 817        {OV2722_8BIT, 0x3809, 0x88},    /* H output size: 1416 */
 818        {OV2722_8BIT, 0x380a, 0x04},
 819        {OV2722_8BIT, 0x380b, 0x0a},    /* V output size: 1034 */
 820
 821        /* H blank timing */
 822        {OV2722_8BIT, 0x380c, 0x08},
 823        {OV2722_8BIT, 0x380d, 0x00},    /* H total size: 2048 */
 824        {OV2722_8BIT, 0x380e, 0x04},
 825        {OV2722_8BIT, 0x380f, 0xa0},    /* V total size: 1184 */
 826        {OV2722_8BIT, 0x3810, 0x00},
 827        {OV2722_8BIT, 0x3811, 0x05},    /* H window offset: 5 */
 828        {OV2722_8BIT, 0x3812, 0x00},
 829        {OV2722_8BIT, 0x3813, 0x02},    /* V window offset: 2 */
 830        {OV2722_8BIT, 0x3820, 0x80},
 831        {OV2722_8BIT, 0x3821, 0x06},    /* flip isp */
 832        {OV2722_8BIT, 0x3814, 0x11},
 833        {OV2722_8BIT, 0x3815, 0x11},
 834        {OV2722_8BIT, 0x3612, 0x0b},
 835        {OV2722_8BIT, 0x3618, 0x04},
 836        {OV2722_8BIT, 0x3a08, 0x01},
 837        {OV2722_8BIT, 0x3a09, 0x50},
 838        {OV2722_8BIT, 0x3a0a, 0x01},
 839        {OV2722_8BIT, 0x3a0b, 0x18},
 840        {OV2722_8BIT, 0x3a0d, 0x03},
 841        {OV2722_8BIT, 0x3a0e, 0x03},
 842        {OV2722_8BIT, 0x4520, 0x00},
 843        {OV2722_8BIT, 0x4837, 0x1b},
 844        {OV2722_8BIT, 0x3000, 0xff},
 845        {OV2722_8BIT, 0x3001, 0xff},
 846        {OV2722_8BIT, 0x3002, 0xf0},
 847        {OV2722_8BIT, 0x3600, 0x08},
 848        {OV2722_8BIT, 0x3621, 0xc0},
 849        {OV2722_8BIT, 0x3632, 0xd2},    /* added for power opt */
 850        {OV2722_8BIT, 0x3633, 0x23},
 851        {OV2722_8BIT, 0x3634, 0x54},
 852        {OV2722_8BIT, 0x3f01, 0x0c},
 853        {OV2722_8BIT, 0x5001, 0xc1},    /* v_en, h_en, blc_en */
 854        {OV2722_8BIT, 0x3614, 0xf0},
 855        {OV2722_8BIT, 0x3630, 0x2d},
 856        {OV2722_8BIT, 0x370b, 0x62},
 857        {OV2722_8BIT, 0x3706, 0x61},
 858        {OV2722_8BIT, 0x4000, 0x02},
 859        {OV2722_8BIT, 0x4002, 0xc5},
 860        {OV2722_8BIT, 0x4005, 0x08},
 861        {OV2722_8BIT, 0x404f, 0x84},
 862        {OV2722_8BIT, 0x4051, 0x00},
 863        {OV2722_8BIT, 0x5000, 0xcf},
 864        {OV2722_8BIT, 0x3a18, 0x00},
 865        {OV2722_8BIT, 0x3a19, 0x80},
 866        {OV2722_8BIT, 0x4521, 0x00},
 867        {OV2722_8BIT, 0x5183, 0xb0},    /* AWB red */
 868        {OV2722_8BIT, 0x5184, 0xb0},    /* AWB green */
 869        {OV2722_8BIT, 0x5185, 0xb0},    /* AWB blue */
 870        {OV2722_8BIT, 0x5180, 0x03},    /* AWB manual mode */
 871        {OV2722_8BIT, 0x370c, 0x0c},
 872        {OV2722_8BIT, 0x4800, 0x24},    /* clk lane gate enable */
 873        {OV2722_8BIT, 0x3035, 0x00},
 874        {OV2722_8BIT, 0x3036, 0x26},
 875        {OV2722_8BIT, 0x3037, 0xa1},
 876        {OV2722_8BIT, 0x303e, 0x19},
 877        {OV2722_8BIT, 0x3038, 0x06},
 878        {OV2722_8BIT, 0x3018, 0x04},
 879
 880        /* Added for power optimization */
 881        {OV2722_8BIT, 0x3000, 0x00},
 882        {OV2722_8BIT, 0x3001, 0x00},
 883        {OV2722_8BIT, 0x3002, 0x00},
 884        {OV2722_8BIT, 0x3a0f, 0x40},
 885        {OV2722_8BIT, 0x3a10, 0x38},
 886        {OV2722_8BIT, 0x3a1b, 0x48},
 887        {OV2722_8BIT, 0x3a1e, 0x30},
 888        {OV2722_8BIT, 0x3a11, 0x90},
 889        {OV2722_8BIT, 0x3a1f, 0x10},
 890        {OV2722_8BIT, 0x3503, 0x17},
 891        {OV2722_8BIT, 0x3500, 0x00},
 892        {OV2722_8BIT, 0x3501, 0x46},
 893        {OV2722_8BIT, 0x3502, 0x00},
 894        {OV2722_8BIT, 0x3508, 0x00},
 895        {OV2722_8BIT, 0x3509, 0x10},
 896        {OV2722_TOK_TERM, 0, 0},
 897};
 898#endif
 899
 900static struct ov2722_reg const ov2722_1080p_30fps[] = {
 901        {OV2722_8BIT, 0x3021, 0x03}, /* For stand wait for a whole
 902                                        frame complete.(vblank) */
 903        {OV2722_8BIT, 0x3718, 0x10},
 904        {OV2722_8BIT, 0x3702, 0x24},
 905        {OV2722_8BIT, 0x373a, 0x60},
 906        {OV2722_8BIT, 0x3715, 0x01},
 907        {OV2722_8BIT, 0x3703, 0x2e},
 908        {OV2722_8BIT, 0x3705, 0x2b},
 909        {OV2722_8BIT, 0x3730, 0x30},
 910        {OV2722_8BIT, 0x3704, 0x62},
 911        {OV2722_8BIT, 0x3f06, 0x3a},
 912        {OV2722_8BIT, 0x371c, 0x00},
 913        {OV2722_8BIT, 0x371d, 0xc4},
 914        {OV2722_8BIT, 0x371e, 0x01},
 915        {OV2722_8BIT, 0x371f, 0x28},
 916        {OV2722_8BIT, 0x3708, 0x61},
 917        {OV2722_8BIT, 0x3709, 0x12},
 918        {OV2722_8BIT, 0x3800, 0x00},
 919        {OV2722_8BIT, 0x3801, 0x08}, /* H crop start: 8 */
 920        {OV2722_8BIT, 0x3802, 0x00},
 921        {OV2722_8BIT, 0x3803, 0x01}, /* V crop start: 1 */
 922        {OV2722_8BIT, 0x3804, 0x07},
 923        {OV2722_8BIT, 0x3805, 0x9b}, /* H crop end: 1947 */
 924        {OV2722_8BIT, 0x3806, 0x04},
 925        {OV2722_8BIT, 0x3807, 0x45}, /* V crop end: 1093 */
 926        {OV2722_8BIT, 0x3808, 0x07},
 927        {OV2722_8BIT, 0x3809, 0x8c}, /* H output size: 1932 */
 928        {OV2722_8BIT, 0x380a, 0x04},
 929        {OV2722_8BIT, 0x380b, 0x44}, /* V output size: 1092 */
 930        {OV2722_8BIT, 0x380c, 0x08},
 931        {OV2722_8BIT, 0x380d, 0x14}, /* H timing: 2068 */
 932        {OV2722_8BIT, 0x380e, 0x04},
 933        {OV2722_8BIT, 0x380f, 0x5a}, /* V timing: 1114 */
 934        {OV2722_8BIT, 0x3810, 0x00},
 935        {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */
 936        {OV2722_8BIT, 0x3812, 0x00},
 937        {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */
 938        {OV2722_8BIT, 0x3820, 0x80},
 939        {OV2722_8BIT, 0x3821, 0x06}, /*  mirror */
 940        {OV2722_8BIT, 0x3814, 0x11},
 941        {OV2722_8BIT, 0x3815, 0x11},
 942        {OV2722_8BIT, 0x3612, 0x4b},
 943        {OV2722_8BIT, 0x3618, 0x04},
 944        {OV2722_8BIT, 0x3a08, 0x01},
 945        {OV2722_8BIT, 0x3a09, 0x50},
 946        {OV2722_8BIT, 0x3a0a, 0x01},
 947        {OV2722_8BIT, 0x3a0b, 0x18},
 948        {OV2722_8BIT, 0x3a0d, 0x03},
 949        {OV2722_8BIT, 0x3a0e, 0x03},
 950        {OV2722_8BIT, 0x4520, 0x00},
 951        {OV2722_8BIT, 0x4837, 0x1b},
 952        {OV2722_8BIT, 0x3000, 0xff},
 953        {OV2722_8BIT, 0x3001, 0xff},
 954        {OV2722_8BIT, 0x3002, 0xf0},
 955        {OV2722_8BIT, 0x3600, 0x08},
 956        {OV2722_8BIT, 0x3621, 0xc0},
 957        {OV2722_8BIT, 0x3632, 0x53}, /* added for power opt */
 958        {OV2722_8BIT, 0x3633, 0x63},
 959        {OV2722_8BIT, 0x3634, 0x24},
 960        {OV2722_8BIT, 0x3f01, 0x0c},
 961        {OV2722_8BIT, 0x5001, 0xc1},
 962        {OV2722_8BIT, 0x3614, 0xf0},
 963        {OV2722_8BIT, 0x3630, 0x2d},
 964        {OV2722_8BIT, 0x370b, 0x62},
 965        {OV2722_8BIT, 0x3706, 0x61},
 966        {OV2722_8BIT, 0x4000, 0x02},
 967        {OV2722_8BIT, 0x4002, 0xc5},
 968        {OV2722_8BIT, 0x4005, 0x08},
 969        {OV2722_8BIT, 0x404f, 0x84},
 970        {OV2722_8BIT, 0x4051, 0x00},
 971        {OV2722_8BIT, 0x5000, 0xcd}, /* manual 3a */
 972        {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */
 973        {OV2722_8BIT, 0x3a18, 0x00},
 974        {OV2722_8BIT, 0x3a19, 0x80},
 975        {OV2722_8BIT, 0x3503, 0x17},
 976        {OV2722_8BIT, 0x4521, 0x00},
 977        {OV2722_8BIT, 0x5183, 0xb0},
 978        {OV2722_8BIT, 0x5184, 0xb0},
 979        {OV2722_8BIT, 0x5185, 0xb0},
 980        {OV2722_8BIT, 0x370c, 0x0c},
 981        {OV2722_8BIT, 0x3035, 0x00},
 982        {OV2722_8BIT, 0x3036, 0x24}, /* 345.6 MHz */
 983        {OV2722_8BIT, 0x3037, 0xa1},
 984        {OV2722_8BIT, 0x303e, 0x19},
 985        {OV2722_8BIT, 0x3038, 0x06},
 986        {OV2722_8BIT, 0x3018, 0x04},
 987        {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */
 988        {OV2722_8BIT, 0x3001, 0x00},
 989        {OV2722_8BIT, 0x3002, 0x00},
 990        {OV2722_8BIT, 0x3a0f, 0x40},
 991        {OV2722_8BIT, 0x3a10, 0x38},
 992        {OV2722_8BIT, 0x3a1b, 0x48},
 993        {OV2722_8BIT, 0x3a1e, 0x30},
 994        {OV2722_8BIT, 0x3a11, 0x90},
 995        {OV2722_8BIT, 0x3a1f, 0x10},
 996        {OV2722_8BIT, 0x3011, 0x22},
 997        {OV2722_8BIT, 0x3500, 0x00},
 998        {OV2722_8BIT, 0x3501, 0x3F},
 999        {OV2722_8BIT, 0x3502, 0x00},
1000        {OV2722_8BIT, 0x3508, 0x00},

1001        {OV2722_8BIT, 0x3509, 0x00},
1002        {OV2722_TOK_TERM, 0, 0}
1003};
1004
1005#if 0 /* Currently unused */
1006static struct ov2722_reg const ov2722_720p_30fps[] = {
1007        {OV2722_8BIT, 0x3021, 0x03},
1008        {OV2722_8BIT, 0x3718, 0x10},
1009        {OV2722_8BIT, 0x3702, 0x24},
1010        {OV2722_8BIT, 0x373a, 0x60},
1011        {OV2722_8BIT, 0x3715, 0x01},
1012        {OV2722_8BIT, 0x3703, 0x2e},
1013        {OV2722_8BIT, 0x3705, 0x10},
1014        {OV2722_8BIT, 0x3730, 0x30},
1015        {OV2722_8BIT, 0x3704, 0x62},
1016        {OV2722_8BIT, 0x3f06, 0x3a},
1017        {OV2722_8BIT, 0x371c, 0x00},
1018        {OV2722_8BIT, 0x371d, 0xc4},
1019        {OV2722_8BIT, 0x371e, 0x01},
1020        {OV2722_8BIT, 0x371f, 0x0d},
1021        {OV2722_8BIT, 0x3708, 0x61},
1022        {OV2722_8BIT, 0x3709, 0x12},
1023        {OV2722_8BIT, 0x3800, 0x01},
1024        {OV2722_8BIT, 0x3801, 0x40}, /* H crop start: 320 */
1025        {OV2722_8BIT, 0x3802, 0x00},
1026        {OV2722_8BIT, 0x3803, 0xb1}, /* V crop start: 177 */
1027        {OV2722_8BIT, 0x3804, 0x06},
1028        {OV2722_8BIT, 0x3805, 0x55}, /* H crop end: 1621 */
1029        {OV2722_8BIT, 0x3806, 0x03},
1030        {OV2722_8BIT, 0x3807, 0x95}, /* V crop end: 918 */
1031        {OV2722_8BIT, 0x3808, 0x05},
1032        {OV2722_8BIT, 0x3809, 0x10}, /* H output size: 0x0788==1928 */
1033        {OV2722_8BIT, 0x380a, 0x02},
1034        {OV2722_8BIT, 0x380b, 0xe0}, /* output size: 0x02DE==734 */
1035        {OV2722_8BIT, 0x380c, 0x08},
1036        {OV2722_8BIT, 0x380d, 0x00}, /* H timing: 2048 */
1037        {OV2722_8BIT, 0x380e, 0x04},
1038        {OV2722_8BIT, 0x380f, 0xa3}, /* V timing: 1187 */
1039        {OV2722_8BIT, 0x3810, 0x00},
1040        {OV2722_8BIT, 0x3811, 0x03}, /* H window offset: 3 */
1041        {OV2722_8BIT, 0x3812, 0x00},
1042        {OV2722_8BIT, 0x3813, 0x02}, /* V window offset: 2 */
1043        {OV2722_8BIT, 0x3820, 0x80},
1044        {OV2722_8BIT, 0x3821, 0x06}, /* mirror */
1045        {OV2722_8BIT, 0x3814, 0x11},
1046        {OV2722_8BIT, 0x3815, 0x11},
1047        {OV2722_8BIT, 0x3612, 0x0b},
1048        {OV2722_8BIT, 0x3618, 0x04},
1049        {OV2722_8BIT, 0x3a08, 0x01},
1050        {OV2722_8BIT, 0x3a09, 0x50},
1051        {OV2722_8BIT, 0x3a0a, 0x01},
1052        {OV2722_8BIT, 0x3a0b, 0x18},
1053        {OV2722_8BIT, 0x3a0d, 0x03},
1054        {OV2722_8BIT, 0x3a0e, 0x03},
1055        {OV2722_8BIT, 0x4520, 0x00},
1056        {OV2722_8BIT, 0x4837, 0x1b},
1057        {OV2722_8BIT, 0x3600, 0x08},
1058        {OV2722_8BIT, 0x3621, 0xc0},
1059        {OV2722_8BIT, 0x3632, 0xd2}, /* added for power opt */
1060        {OV2722_8BIT, 0x3633, 0x23},
1061        {OV2722_8BIT, 0x3634, 0x54},
1062        {OV2722_8BIT, 0x3f01, 0x0c},
1063        {OV2722_8BIT, 0x5001, 0xc1},
1064        {OV2722_8BIT, 0x3614, 0xf0},
1065        {OV2722_8BIT, 0x3630, 0x2d},
1066        {OV2722_8BIT, 0x370b, 0x62},
1067        {OV2722_8BIT, 0x3706, 0x61},
1068        {OV2722_8BIT, 0x4000, 0x02},
1069        {OV2722_8BIT, 0x4002, 0xc5},
1070        {OV2722_8BIT, 0x4005, 0x08},
1071        {OV2722_8BIT, 0x404f, 0x84},
1072        {OV2722_8BIT, 0x4051, 0x00},
1073        {OV2722_8BIT, 0x5000, 0xcf}, /* manual 3a */
1074        {OV2722_8BIT, 0x301d, 0xf0}, /* enable group hold */
1075        {OV2722_8BIT, 0x3a18, 0x00},
1076        {OV2722_8BIT, 0x3a19, 0x80},
1077        {OV2722_8BIT, 0x4521, 0x00},
1078        {OV2722_8BIT, 0x5183, 0xb0},
1079        {OV2722_8BIT, 0x5184, 0xb0},
1080        {OV2722_8BIT, 0x5185, 0xb0},
1081        {OV2722_8BIT, 0x370c, 0x0c},
1082        {OV2722_8BIT, 0x3035, 0x00},
1083        {OV2722_8BIT, 0x3036, 0x26}, /* {0x3036, 0x2c}, //422.4 MHz */
1084        {OV2722_8BIT, 0x3037, 0xa1},
1085        {OV2722_8BIT, 0x303e, 0x19},
1086        {OV2722_8BIT, 0x3038, 0x06},
1087        {OV2722_8BIT, 0x3018, 0x04},
1088        {OV2722_8BIT, 0x3000, 0x00}, /* added for power optimization */
1089        {OV2722_8BIT, 0x3001, 0x00},
1090        {OV2722_8BIT, 0x3002, 0x00},
1091        {OV2722_8BIT, 0x3a0f, 0x40},
1092        {OV2722_8BIT, 0x3a10, 0x38},
1093        {OV2722_8BIT, 0x3a1b, 0x48},
1094        {OV2722_8BIT, 0x3a1e, 0x30},
1095        {OV2722_8BIT, 0x3a11, 0x90},
1096        {OV2722_8BIT, 0x3a1f, 0x10},
1097        {OV2722_8BIT, 0x3503, 0x17}, /* manual 3a */
1098        {OV2722_8BIT, 0x3500, 0x00},
1099        {OV2722_8BIT, 0x3501, 0x3F},
1100        {OV2722_8BIT, 0x3502, 0x00},
1101        {OV2722_8BIT, 0x3508, 0x00},
1102        {OV2722_8BIT, 0x3509, 0x00},
1103        {OV2722_TOK_TERM, 0, 0},
1104};
1105#endif
1106
1107static struct ov2722_resolution ov2722_res_preview[] = {
1108        {
1109                .desc = "ov2722_1632_1092_30fps",
1110                .width = 1632,
1111                .height = 1092,
1112                .fps = 30,
1113                .pix_clk_freq = 85,
1114                .used = 0,
1115                .pixels_per_line = 2260,
1116                .lines_per_frame = 1244,
1117                .bin_factor_x = 1,
1118                .bin_factor_y = 1,
1119                .bin_mode = 0,
1120                .skip_frames = 3,
1121                .regs = ov2722_1632_1092_30fps,
1122                .mipi_freq = 422400,
1123        },
1124        {
1125                .desc = "ov2722_1452_1092_30fps",
1126                .width = 1452,
1127                .height = 1092,
1128                .fps = 30,
1129                .pix_clk_freq = 85,
1130                .used = 0,
1131                .pixels_per_line = 2260,
1132                .lines_per_frame = 1244,
1133                .bin_factor_x = 1,
1134                .bin_factor_y = 1,
1135                .bin_mode = 0,
1136                .skip_frames = 3,
1137                .regs = ov2722_1452_1092_30fps,
1138                .mipi_freq = 422400,
1139        },
1140        {
1141                .desc = "ov2722_1080P_30fps",
1142                .width = 1932,
1143                .height = 1092,
1144                .pix_clk_freq = 69,
1145                .fps = 30,
1146                .used = 0,
1147                .pixels_per_line = 2068,
1148                .lines_per_frame = 1114,
1149                .bin_factor_x = 1,
1150                .bin_factor_y = 1,
1151                .bin_mode = 0,
1152                .skip_frames = 3,
1153                .regs = ov2722_1080p_30fps,
1154                .mipi_freq = 345600,
1155        },
1156};
1157
1158#define N_RES_PREVIEW (ARRAY_SIZE(ov2722_res_preview))
1159
1160/*
1161 * Disable non-preview configurations until the configuration selection is
1162 * improved.
1163 */
1164#if 0
1165struct ov2722_resolution ov2722_res_still[] = {
1166        {
1167                .desc = "ov2722_480P_30fps",
1168                .width = 1632,
1169                .height = 1092,
1170                .fps = 30,
1171                .pix_clk_freq = 85,
1172                .used = 0,
1173                .pixels_per_line = 2260,
1174                .lines_per_frame = 1244,
1175                .bin_factor_x = 1,
1176                .bin_factor_y = 1,
1177                .bin_mode = 0,
1178                .skip_frames = 3,
1179                .regs = ov2722_1632_1092_30fps,
1180                .mipi_freq = 422400,
1181        },
1182        {
1183                .desc = "ov2722_1452_1092_30fps",
1184                .width = 1452,
1185                .height = 1092,
1186                .fps = 30,
1187                .pix_clk_freq = 85,
1188                .used = 0,
1189                .pixels_per_line = 2260,
1190                .lines_per_frame = 1244,
1191                .bin_factor_x = 1,
1192                .bin_factor_y = 1,
1193                .bin_mode = 0,
1194                .skip_frames = 3,
1195                .regs = ov2722_1452_1092_30fps,
1196                .mipi_freq = 422400,
1197        },
1198        {
1199                .desc = "ov2722_1080P_30fps",
1200                .width = 1932,
1201                .height = 1092,
1202                .pix_clk_freq = 69,
1203                .fps = 30,
1204                .used = 0,
1205                .pixels_per_line = 2068,
1206                .lines_per_frame = 1114,
1207                .bin_factor_x = 1,
1208                .bin_factor_y = 1,
1209                .bin_mode = 0,
1210                .skip_frames = 3,
1211                .regs = ov2722_1080p_30fps,
1212                .mipi_freq = 345600,
1213        },
1214};
1215
1216#define N_RES_STILL (ARRAY_SIZE(ov2722_res_still))
1217
1218struct ov2722_resolution ov2722_res_video[] = {
1219        {
1220                .desc = "ov2722_QVGA_30fps",
1221                .width = 336,
1222                .height = 256,
1223                .fps = 30,
1224                .pix_clk_freq = 73,
1225                .used = 0,
1226                .pixels_per_line = 2048,
1227                .lines_per_frame = 1184,
1228                .bin_factor_x = 1,
1229                .bin_factor_y = 1,
1230                .bin_mode = 0,
1231                .skip_frames = 3,
1232                .regs = ov2722_QVGA_30fps,
1233                .mipi_freq = 364800,
1234        },
1235        {
1236                .desc = "ov2722_480P_30fps",
1237                .width = 736,
1238                .height = 496,
1239                .fps = 30,
1240                .pix_clk_freq = 73,
1241                .used = 0,
1242                .pixels_per_line = 2048,
1243                .lines_per_frame = 1184,
1244                .bin_factor_x = 1,
1245                .bin_factor_y = 1,
1246                .bin_mode = 0,
1247                .skip_frames = 3,
1248                .regs = ov2722_480P_30fps,
1249        },
1250        {
1251                .desc = "ov2722_1080P_30fps",
1252                .width = 1932,
1253                .height = 1092,
1254                .pix_clk_freq = 69,
1255                .fps = 30,
1256                .used = 0,
1257                .pixels_per_line = 2068,
1258                .lines_per_frame = 1114,
1259                .bin_factor_x = 1,
1260                .bin_factor_y = 1,
1261                .bin_mode = 0,
1262                .skip_frames = 3,
1263                .regs = ov2722_1080p_30fps,
1264                .mipi_freq = 345600,
1265        },
1266};
1267
1268#define N_RES_VIDEO (ARRAY_SIZE(ov2722_res_video))
1269#endif
1270
1271static struct ov2722_resolution *ov2722_res = ov2722_res_preview;
1272static unsigned long N_RES = N_RES_PREVIEW;
1273#endif
1274