LXR linux/drivers/staging/media/ipu3/ipu3.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/* Copyright (C) 2018 Intel Corporation */
   3
   4#ifndef __IPU3_H
   5#define __IPU3_H
   6
   7#include <linux/iova.h>
   8#include <linux/pci.h>
   9
  10#include <media/v4l2-ctrls.h>
  11#include <media/v4l2-device.h>
  12#include <media/videobuf2-dma-sg.h>
  13
  14#include "ipu3-css.h"
  15
  16#define IMGU_NAME                       "ipu3-imgu"
  17
  18/*
  19 * The semantics of the driver is that whenever there is a buffer available in
  20 * master queue, the driver queues a buffer also to all other active nodes.
  21 * If user space hasn't provided a buffer to all other video nodes first,
  22 * the driver gets an internal dummy buffer and queues it.
  23 */
  24#define IMGU_QUEUE_MASTER               IPU3_CSS_QUEUE_IN
  25#define IMGU_QUEUE_FIRST_INPUT          IPU3_CSS_QUEUE_OUT
  26#define IMGU_MAX_QUEUE_DEPTH            (2 + 2)
  27
  28#define IMGU_NODE_IN                    0 /* Input RAW image */
  29#define IMGU_NODE_PARAMS                1 /* Input parameters */
  30#define IMGU_NODE_OUT                   2 /* Main output for still or video */
  31#define IMGU_NODE_VF                    3 /* Preview */
  32#define IMGU_NODE_STAT_3A               4 /* 3A statistics */
  33#define IMGU_NODE_NUM                   5
  34
  35#define file_to_intel_imgu_node(__file) \
  36        container_of(video_devdata(__file), struct imgu_video_device, vdev)
  37
  38#define IPU3_INPUT_MIN_WIDTH            0U
  39#define IPU3_INPUT_MIN_HEIGHT           0U
  40#define IPU3_INPUT_MAX_WIDTH            5120U
  41#define IPU3_INPUT_MAX_HEIGHT           38404U
  42#define IPU3_OUTPUT_MIN_WIDTH           2U
  43#define IPU3_OUTPUT_MIN_HEIGHT          2U
  44#define IPU3_OUTPUT_MAX_WIDTH           4480U
  45#define IPU3_OUTPUT_MAX_HEIGHT          34004U
  46
  47struct imgu_vb2_buffer {
  48        /* Public fields */
  49        struct vb2_v4l2_buffer vbb;     /* Must be the first field */
  50
  51        /* Private fields */
  52        struct list_head list;
  53};
  54
  55struct imgu_buffer {
  56        struct imgu_vb2_buffer vid_buf; /* Must be the first field */
  57        struct imgu_css_buffer css_buf;
  58        struct imgu_css_map map;
  59};
  60
  61struct imgu_node_mapping {
  62        unsigned int css_queue;
  63        const char *name;
  64};
  65
  66struct imgu_video_device {
  67        const char *name;
  68        bool output;
  69        bool enabled;
  70        struct v4l2_format vdev_fmt;    /* Currently set format */
  71
  72        /* Private fields */
  73        struct video_device vdev;
  74        struct media_pad vdev_pad;
  75        struct v4l2_mbus_framefmt pad_fmt;
  76        struct vb2_queue vbq;
  77        struct list_head buffers;
  78        /* Protect vb2_queue and vdev structs*/
  79        struct mutex lock;
  80        atomic_t sequence;
  81        unsigned int id;
  82        unsigned int pipe;
  83};
  84
  85struct imgu_v4l2_subdev {
  86        unsigned int pipe;
  87        struct v4l2_subdev subdev;
  88        struct media_pad subdev_pads[IMGU_NODE_NUM];
  89        struct {
  90                struct v4l2_rect eff; /* effective resolution */
  91                struct v4l2_rect bds; /* bayer-domain scaled resolution*/
  92                struct v4l2_rect gdc; /* gdc output resolution */
  93        } rect;
  94        struct v4l2_ctrl_handler ctrl_handler;
  95        struct v4l2_ctrl *ctrl;
  96        atomic_t running_mode;
  97        bool active;
  98};
  99
 100struct imgu_media_pipe {
 101        unsigned int pipe;
 102
 103        /* Internally enabled queues */
 104        struct {
 105                struct imgu_css_map dmap;
 106                struct imgu_css_buffer dummybufs[IMGU_MAX_QUEUE_DEPTH];
 107        } queues[IPU3_CSS_QUEUES];
 108        struct imgu_video_device nodes[IMGU_NODE_NUM];
 109        bool queue_enabled[IMGU_NODE_NUM];
 110        struct media_pipeline pipeline;
 111        struct imgu_v4l2_subdev imgu_sd;
 112};
 113
 114/*
 115 * imgu_device -- ImgU (Imaging Unit) driver
 116 */
 117struct imgu_device {
 118        struct pci_dev *pci_dev;
 119        void __iomem *base;
 120
 121        /* Public fields, fill before registering */
 122        unsigned int buf_struct_size;
 123        bool streaming;         /* Public read only */
 124
 125        struct imgu_media_pipe imgu_pipe[IMGU_MAX_PIPE_NUM];
 126
 127        /* Private fields */
 128        struct v4l2_device v4l2_dev;
 129        struct media_device media_dev;
 130        struct v4l2_file_operations v4l2_file_ops;
 131
 132        /* MMU driver for css */
 133        struct imgu_mmu_info *mmu;
 134        struct iova_domain iova_domain;
 135
 136        /* css - Camera Sub-System */
 137        struct imgu_css css;
 138
 139        /*
 140         * Coarse-grained lock to protect
 141         * vid_buf.list and css->queue
 142         */
 143        struct mutex lock;
 144
 145        /* Lock to protect writes to streaming flag in this struct */
 146        struct mutex streaming_lock;
 147
 148        /* Forbid streaming and buffer queuing during system suspend. */
 149        atomic_t qbuf_barrier;
 150        /* Indicate if system suspend take place while imgu is streaming. */
 151        bool suspend_in_stream;
 152        /* Used to wait for FW buffer queue drain. */
 153        wait_queue_head_t buf_drain_wq;
 154};
 155
 156unsigned int imgu_node_to_queue(unsigned int node);
 157unsigned int imgu_map_node(struct imgu_device *imgu, unsigned int css_queue);
 158int imgu_queue_buffers(struct imgu_device *imgu, bool initial,
 159                       unsigned int pipe);
 160
 161int imgu_v4l2_register(struct imgu_device *dev);
 162int imgu_v4l2_unregister(struct imgu_device *dev);
 163void imgu_v4l2_buffer_done(struct vb2_buffer *vb, enum vb2_buffer_state state);
 164
 165int imgu_s_stream(struct imgu_device *imgu, int enable);
 166
 167#endif
 168