linux/drivers/staging/qlge/qlge_mpi.c
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   1// SPDX-License-Identifier: GPL-2.0
   2#include "qlge.h"
   3
   4int qlge_unpause_mpi_risc(struct qlge_adapter *qdev)
   5{
   6        u32 tmp;
   7
   8        /* Un-pause the RISC */
   9        tmp = qlge_read32(qdev, CSR);
  10        if (!(tmp & CSR_RP))
  11                return -EIO;
  12
  13        qlge_write32(qdev, CSR, CSR_CMD_CLR_PAUSE);
  14        return 0;
  15}
  16
  17int qlge_pause_mpi_risc(struct qlge_adapter *qdev)
  18{
  19        u32 tmp;
  20        int count;
  21
  22        /* Pause the RISC */
  23        qlge_write32(qdev, CSR, CSR_CMD_SET_PAUSE);
  24        for (count = UDELAY_COUNT; count; count--) {
  25                tmp = qlge_read32(qdev, CSR);
  26                if (tmp & CSR_RP)
  27                        break;
  28                mdelay(UDELAY_DELAY);
  29        }
  30        return (count == 0) ? -ETIMEDOUT : 0;
  31}
  32
  33int qlge_hard_reset_mpi_risc(struct qlge_adapter *qdev)
  34{
  35        u32 tmp;
  36        int count;
  37
  38        /* Reset the RISC */
  39        qlge_write32(qdev, CSR, CSR_CMD_SET_RST);
  40        for (count = UDELAY_COUNT; count; count--) {
  41                tmp = qlge_read32(qdev, CSR);
  42                if (tmp & CSR_RR) {
  43                        qlge_write32(qdev, CSR, CSR_CMD_CLR_RST);
  44                        break;
  45                }
  46                mdelay(UDELAY_DELAY);
  47        }
  48        return (count == 0) ? -ETIMEDOUT : 0;
  49}
  50
  51int qlge_read_mpi_reg(struct qlge_adapter *qdev, u32 reg, u32 *data)
  52{
  53        int status;
  54        /* wait for reg to come ready */
  55        status = qlge_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
  56        if (status)
  57                goto exit;
  58        /* set up for reg read */
  59        qlge_write32(qdev, PROC_ADDR, reg | PROC_ADDR_R);
  60        /* wait for reg to come ready */
  61        status = qlge_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
  62        if (status)
  63                goto exit;
  64        /* get the data */
  65        *data = qlge_read32(qdev, PROC_DATA);
  66exit:
  67        return status;
  68}
  69
  70int qlge_write_mpi_reg(struct qlge_adapter *qdev, u32 reg, u32 data)
  71{
  72        int status = 0;
  73        /* wait for reg to come ready */
  74        status = qlge_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
  75        if (status)
  76                goto exit;
  77        /* write the data to the data reg */
  78        qlge_write32(qdev, PROC_DATA, data);
  79        /* trigger the write */
  80        qlge_write32(qdev, PROC_ADDR, reg);
  81        /* wait for reg to come ready */
  82        status = qlge_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
  83        if (status)
  84                goto exit;
  85exit:
  86        return status;
  87}
  88
  89int qlge_soft_reset_mpi_risc(struct qlge_adapter *qdev)
  90{
  91        return qlge_write_mpi_reg(qdev, 0x00001010, 1);
  92}
  93
  94/* Determine if we are in charge of the firmware. If
  95 * we are the lower of the 2 NIC pcie functions, or if
  96 * we are the higher function and the lower function
  97 * is not enabled.
  98 */
  99int qlge_own_firmware(struct qlge_adapter *qdev)
 100{
 101        u32 temp;
 102
 103        /* If we are the lower of the 2 NIC functions
 104         * on the chip the we are responsible for
 105         * core dump and firmware reset after an error.
 106         */
 107        if (qdev->func < qdev->alt_func)
 108                return 1;
 109
 110        /* If we are the higher of the 2 NIC functions
 111         * on the chip and the lower function is not
 112         * enabled, then we are responsible for
 113         * core dump and firmware reset after an error.
 114         */
 115        temp =  qlge_read32(qdev, STS);
 116        if (!(temp & (1 << (8 + qdev->alt_func))))
 117                return 1;
 118
 119        return 0;
 120}
 121
 122static int qlge_get_mb_sts(struct qlge_adapter *qdev, struct mbox_params *mbcp)
 123{
 124        int i, status;
 125
 126        status = qlge_sem_spinlock(qdev, SEM_PROC_REG_MASK);
 127        if (status)
 128                return -EBUSY;
 129        for (i = 0; i < mbcp->out_count; i++) {
 130                status =
 131                    qlge_read_mpi_reg(qdev, qdev->mailbox_out + i,
 132                                      &mbcp->mbox_out[i]);
 133                if (status) {
 134                        netif_err(qdev, drv, qdev->ndev, "Failed mailbox read.\n");
 135                        break;
 136                }
 137        }
 138        qlge_sem_unlock(qdev, SEM_PROC_REG_MASK);       /* does flush too */
 139        return status;
 140}
 141
 142/* Wait for a single mailbox command to complete.
 143 * Returns zero on success.
 144 */
 145static int qlge_wait_mbx_cmd_cmplt(struct qlge_adapter *qdev)
 146{
 147        int count;
 148        u32 value;
 149
 150        for (count = 100; count; count--) {
 151                value = qlge_read32(qdev, STS);
 152                if (value & STS_PI)
 153                        return 0;
 154                mdelay(UDELAY_DELAY); /* 100ms */
 155        }
 156        return -ETIMEDOUT;
 157}
 158
 159/* Execute a single mailbox command.
 160 * Caller must hold PROC_ADDR semaphore.
 161 */
 162static int qlge_exec_mb_cmd(struct qlge_adapter *qdev, struct mbox_params *mbcp)
 163{
 164        int i, status;
 165
 166        /*
 167         * Make sure there's nothing pending.
 168         * This shouldn't happen.
 169         */
 170        if (qlge_read32(qdev, CSR) & CSR_HRI)
 171                return -EIO;
 172
 173        status = qlge_sem_spinlock(qdev, SEM_PROC_REG_MASK);
 174        if (status)
 175                return status;
 176
 177        /*
 178         * Fill the outbound mailboxes.
 179         */
 180        for (i = 0; i < mbcp->in_count; i++) {
 181                status = qlge_write_mpi_reg(qdev, qdev->mailbox_in + i,
 182                                            mbcp->mbox_in[i]);
 183                if (status)
 184                        goto end;
 185        }
 186        /*
 187         * Wake up the MPI firmware.
 188         */
 189        qlge_write32(qdev, CSR, CSR_CMD_SET_H2R_INT);
 190end:
 191        qlge_sem_unlock(qdev, SEM_PROC_REG_MASK);
 192        return status;
 193}
 194
 195/* We are being asked by firmware to accept
 196 * a change to the port.  This is only
 197 * a change to max frame sizes (Tx/Rx), pause
 198 * parameters, or loopback mode. We wake up a worker
 199 * to handler processing this since a mailbox command
 200 * will need to be sent to ACK the request.
 201 */
 202static int qlge_idc_req_aen(struct qlge_adapter *qdev)
 203{
 204        int status;
 205        struct mbox_params *mbcp = &qdev->idc_mbc;
 206
 207        netif_err(qdev, drv, qdev->ndev, "Enter!\n");
 208        /* Get the status data and start up a thread to
 209         * handle the request.
 210         */
 211        mbcp->out_count = 4;
 212        status = qlge_get_mb_sts(qdev, mbcp);
 213        if (status) {
 214                netif_err(qdev, drv, qdev->ndev,
 215                          "Could not read MPI, resetting ASIC!\n");
 216                qlge_queue_asic_error(qdev);
 217        } else  {
 218                /* Begin polled mode early so
 219                 * we don't get another interrupt
 220                 * when we leave mpi_worker.
 221                 */
 222                qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
 223                queue_delayed_work(qdev->workqueue, &qdev->mpi_idc_work, 0);
 224        }
 225        return status;
 226}
 227
 228/* Process an inter-device event completion.
 229 * If good, signal the caller's completion.
 230 */
 231static int qlge_idc_cmplt_aen(struct qlge_adapter *qdev)
 232{
 233        int status;
 234        struct mbox_params *mbcp = &qdev->idc_mbc;
 235
 236        mbcp->out_count = 4;
 237        status = qlge_get_mb_sts(qdev, mbcp);
 238        if (status) {
 239                netif_err(qdev, drv, qdev->ndev,
 240                          "Could not read MPI, resetting RISC!\n");
 241                qlge_queue_fw_error(qdev);
 242        } else {
 243                /* Wake up the sleeping mpi_idc_work thread that is
 244                 * waiting for this event.
 245                 */
 246                complete(&qdev->ide_completion);
 247        }
 248        return status;
 249}
 250
 251static void qlge_link_up(struct qlge_adapter *qdev, struct mbox_params *mbcp)
 252{
 253        int status;
 254
 255        mbcp->out_count = 2;
 256
 257        status = qlge_get_mb_sts(qdev, mbcp);
 258        if (status) {
 259                netif_err(qdev, drv, qdev->ndev,
 260                          "%s: Could not get mailbox status.\n", __func__);
 261                return;
 262        }
 263
 264        qdev->link_status = mbcp->mbox_out[1];
 265        netif_err(qdev, drv, qdev->ndev, "Link Up.\n");
 266
 267        /* If we're coming back from an IDC event
 268         * then set up the CAM and frame routing.
 269         */
 270        if (test_bit(QL_CAM_RT_SET, &qdev->flags)) {
 271                status = qlge_cam_route_initialize(qdev);
 272                if (status) {
 273                        netif_err(qdev, ifup, qdev->ndev,
 274                                  "Failed to init CAM/Routing tables.\n");
 275                        return;
 276                }
 277                clear_bit(QL_CAM_RT_SET, &qdev->flags);
 278        }
 279
 280        /* Queue up a worker to check the frame
 281         * size information, and fix it if it's not
 282         * to our liking.
 283         */
 284        if (!test_bit(QL_PORT_CFG, &qdev->flags)) {
 285                netif_err(qdev, drv, qdev->ndev, "Queue Port Config Worker!\n");
 286                set_bit(QL_PORT_CFG, &qdev->flags);
 287                /* Begin polled mode early so
 288                 * we don't get another interrupt
 289                 * when we leave mpi_worker dpc.
 290                 */
 291                qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
 292                queue_delayed_work(qdev->workqueue,
 293                                   &qdev->mpi_port_cfg_work, 0);
 294        }
 295
 296        qlge_link_on(qdev);
 297}
 298
 299static void qlge_link_down(struct qlge_adapter *qdev, struct mbox_params *mbcp)
 300{
 301        int status;
 302
 303        mbcp->out_count = 3;
 304
 305        status = qlge_get_mb_sts(qdev, mbcp);
 306        if (status)
 307                netif_err(qdev, drv, qdev->ndev, "Link down AEN broken!\n");
 308
 309        qlge_link_off(qdev);
 310}
 311
 312static int qlge_sfp_in(struct qlge_adapter *qdev, struct mbox_params *mbcp)
 313{
 314        int status;
 315
 316        mbcp->out_count = 5;
 317
 318        status = qlge_get_mb_sts(qdev, mbcp);
 319        if (status)
 320                netif_err(qdev, drv, qdev->ndev, "SFP in AEN broken!\n");
 321        else
 322                netif_err(qdev, drv, qdev->ndev, "SFP insertion detected.\n");
 323
 324        return status;
 325}
 326
 327static int qlge_sfp_out(struct qlge_adapter *qdev, struct mbox_params *mbcp)
 328{
 329        int status;
 330
 331        mbcp->out_count = 1;
 332
 333        status = qlge_get_mb_sts(qdev, mbcp);
 334        if (status)
 335                netif_err(qdev, drv, qdev->ndev, "SFP out AEN broken!\n");
 336        else
 337                netif_err(qdev, drv, qdev->ndev, "SFP removal detected.\n");
 338
 339        return status;
 340}
 341
 342static int qlge_aen_lost(struct qlge_adapter *qdev, struct mbox_params *mbcp)
 343{
 344        int status;
 345
 346        mbcp->out_count = 6;
 347
 348        status = qlge_get_mb_sts(qdev, mbcp);
 349        if (status) {
 350                netif_err(qdev, drv, qdev->ndev, "Lost AEN broken!\n");
 351        } else {
 352                int i;
 353
 354                netif_err(qdev, drv, qdev->ndev, "Lost AEN detected.\n");
 355                for (i = 0; i < mbcp->out_count; i++)
 356                        netif_err(qdev, drv, qdev->ndev, "mbox_out[%d] = 0x%.08x.\n",
 357                                  i, mbcp->mbox_out[i]);
 358        }
 359
 360        return status;
 361}
 362
 363static void qlge_init_fw_done(struct qlge_adapter *qdev, struct mbox_params *mbcp)
 364{
 365        int status;
 366
 367        mbcp->out_count = 2;
 368
 369        status = qlge_get_mb_sts(qdev, mbcp);
 370        if (status) {
 371                netif_err(qdev, drv, qdev->ndev, "Firmware did not initialize!\n");
 372        } else {
 373                netif_err(qdev, drv, qdev->ndev, "Firmware Revision  = 0x%.08x.\n",
 374                          mbcp->mbox_out[1]);
 375                qdev->fw_rev_id = mbcp->mbox_out[1];
 376                status = qlge_cam_route_initialize(qdev);
 377                if (status)
 378                        netif_err(qdev, ifup, qdev->ndev,
 379                                  "Failed to init CAM/Routing tables.\n");
 380        }
 381}
 382
 383/* Process an async event and clear it unless it's an
 384 * error condition.
 385 *  This can get called iteratively from the mpi_work thread
 386 *  when events arrive via an interrupt.
 387 *  It also gets called when a mailbox command is polling for
 388 *  it's completion.
 389 */
 390static int qlge_mpi_handler(struct qlge_adapter *qdev, struct mbox_params *mbcp)
 391{
 392        int status;
 393        int orig_count = mbcp->out_count;
 394
 395        /* Just get mailbox zero for now. */
 396        mbcp->out_count = 1;
 397        status = qlge_get_mb_sts(qdev, mbcp);
 398        if (status) {
 399                netif_err(qdev, drv, qdev->ndev,
 400                          "Could not read MPI, resetting ASIC!\n");
 401                qlge_queue_asic_error(qdev);
 402                goto end;
 403        }
 404
 405        switch (mbcp->mbox_out[0]) {
 406                /* This case is only active when we arrive here
 407                 * as a result of issuing a mailbox command to
 408                 * the firmware.
 409                 */
 410        case MB_CMD_STS_INTRMDT:
 411        case MB_CMD_STS_GOOD:
 412        case MB_CMD_STS_INVLD_CMD:
 413        case MB_CMD_STS_XFC_ERR:
 414        case MB_CMD_STS_CSUM_ERR:
 415        case MB_CMD_STS_ERR:
 416        case MB_CMD_STS_PARAM_ERR:
 417                /* We can only get mailbox status if we're polling from an
 418                 * unfinished command.  Get the rest of the status data and
 419                 * return back to the caller.
 420                 * We only end up here when we're polling for a mailbox
 421                 * command completion.
 422                 */
 423                mbcp->out_count = orig_count;
 424                status = qlge_get_mb_sts(qdev, mbcp);
 425                return status;
 426
 427                /* We are being asked by firmware to accept
 428                 * a change to the port.  This is only
 429                 * a change to max frame sizes (Tx/Rx), pause
 430                 * parameters, or loopback mode.
 431                 */
 432        case AEN_IDC_REQ:
 433                status = qlge_idc_req_aen(qdev);
 434                break;
 435
 436                /* Process and inbound IDC event.
 437                 * This will happen when we're trying to
 438                 * change tx/rx max frame size, change pause
 439                 * parameters or loopback mode.
 440                 */
 441        case AEN_IDC_CMPLT:
 442        case AEN_IDC_EXT:
 443                status = qlge_idc_cmplt_aen(qdev);
 444                break;
 445
 446        case AEN_LINK_UP:
 447                qlge_link_up(qdev, mbcp);
 448                break;
 449
 450        case AEN_LINK_DOWN:
 451                qlge_link_down(qdev, mbcp);
 452                break;
 453
 454        case AEN_FW_INIT_DONE:
 455                /* If we're in process on executing the firmware,
 456                 * then convert the status to normal mailbox status.
 457                 */
 458                if (mbcp->mbox_in[0] == MB_CMD_EX_FW) {
 459                        mbcp->out_count = orig_count;
 460                        status = qlge_get_mb_sts(qdev, mbcp);
 461                        mbcp->mbox_out[0] = MB_CMD_STS_GOOD;
 462                        return status;
 463                }
 464                qlge_init_fw_done(qdev, mbcp);
 465                break;
 466
 467        case AEN_AEN_SFP_IN:
 468                qlge_sfp_in(qdev, mbcp);
 469                break;
 470
 471        case AEN_AEN_SFP_OUT:
 472                qlge_sfp_out(qdev, mbcp);
 473                break;
 474
 475                /* This event can arrive at boot time or after an
 476                 * MPI reset if the firmware failed to initialize.
 477                 */
 478        case AEN_FW_INIT_FAIL:
 479                /* If we're in process on executing the firmware,
 480                 * then convert the status to normal mailbox status.
 481                 */
 482                if (mbcp->mbox_in[0] == MB_CMD_EX_FW) {
 483                        mbcp->out_count = orig_count;
 484                        status = qlge_get_mb_sts(qdev, mbcp);
 485                        mbcp->mbox_out[0] = MB_CMD_STS_ERR;
 486                        return status;
 487                }
 488                netif_err(qdev, drv, qdev->ndev,
 489                          "Firmware initialization failed.\n");
 490                status = -EIO;
 491                qlge_queue_fw_error(qdev);
 492                break;
 493
 494        case AEN_SYS_ERR:
 495                netif_err(qdev, drv, qdev->ndev, "System Error.\n");
 496                qlge_queue_fw_error(qdev);
 497                status = -EIO;
 498                break;
 499
 500        case AEN_AEN_LOST:
 501                qlge_aen_lost(qdev, mbcp);
 502                break;
 503
 504        case AEN_DCBX_CHG:
 505                /* Need to support AEN 8110 */
 506                break;
 507        default:
 508                netif_err(qdev, drv, qdev->ndev,
 509                          "Unsupported AE %.08x.\n", mbcp->mbox_out[0]);
 510                /* Clear the MPI firmware status. */
 511        }
 512end:
 513        qlge_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
 514        /* Restore the original mailbox count to
 515         * what the caller asked for.  This can get
 516         * changed when a mailbox command is waiting
 517         * for a response and an AEN arrives and
 518         * is handled.
 519         */
 520        mbcp->out_count = orig_count;
 521        return status;
 522}
 523
 524/* Execute a single mailbox command.
 525 * mbcp is a pointer to an array of u32.  Each
 526 * element in the array contains the value for it's
 527 * respective mailbox register.
 528 */
 529static int qlge_mailbox_command(struct qlge_adapter *qdev, struct mbox_params *mbcp)
 530{
 531        int status;
 532        unsigned long count;
 533
 534        mutex_lock(&qdev->mpi_mutex);
 535
 536        /* Begin polled mode for MPI */
 537        qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
 538
 539        /* Load the mailbox registers and wake up MPI RISC. */
 540        status = qlge_exec_mb_cmd(qdev, mbcp);
 541        if (status)
 542                goto end;
 543
 544        /* If we're generating a system error, then there's nothing
 545         * to wait for.
 546         */
 547        if (mbcp->mbox_in[0] == MB_CMD_MAKE_SYS_ERR)
 548                goto end;
 549
 550        /* Wait for the command to complete. We loop
 551         * here because some AEN might arrive while
 552         * we're waiting for the mailbox command to
 553         * complete. If more than 5 seconds expire we can
 554         * assume something is wrong.
 555         */
 556        count = jiffies + HZ * MAILBOX_TIMEOUT;
 557        do {
 558                /* Wait for the interrupt to come in. */
 559                status = qlge_wait_mbx_cmd_cmplt(qdev);
 560                if (status)
 561                        continue;
 562
 563                /* Process the event.  If it's an AEN, it
 564                 * will be handled in-line or a worker
 565                 * will be spawned. If it's our completion
 566                 * we will catch it below.
 567                 */
 568                status = qlge_mpi_handler(qdev, mbcp);
 569                if (status)
 570                        goto end;
 571
 572                /* It's either the completion for our mailbox
 573                 * command complete or an AEN.  If it's our
 574                 * completion then get out.
 575                 */
 576                if (((mbcp->mbox_out[0] & 0x0000f000) ==
 577                     MB_CMD_STS_GOOD) ||
 578                    ((mbcp->mbox_out[0] & 0x0000f000) ==
 579                     MB_CMD_STS_INTRMDT))
 580                        goto done;
 581        } while (time_before(jiffies, count));
 582
 583        netif_err(qdev, drv, qdev->ndev,
 584                  "Timed out waiting for mailbox complete.\n");
 585        status = -ETIMEDOUT;
 586        goto end;
 587
 588done:
 589
 590        /* Now we can clear the interrupt condition
 591         * and look at our status.
 592         */
 593        qlge_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
 594
 595        if (((mbcp->mbox_out[0] & 0x0000f000) !=
 596             MB_CMD_STS_GOOD) &&
 597            ((mbcp->mbox_out[0] & 0x0000f000) !=
 598             MB_CMD_STS_INTRMDT)) {
 599                status = -EIO;
 600        }
 601end:
 602        /* End polled mode for MPI */
 603        qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
 604        mutex_unlock(&qdev->mpi_mutex);
 605        return status;
 606}
 607
 608/* Get MPI firmware version. This will be used for
 609 * driver banner and for ethtool info.
 610 * Returns zero on success.
 611 */
 612int qlge_mb_about_fw(struct qlge_adapter *qdev)
 613{
 614        struct mbox_params mbc;
 615        struct mbox_params *mbcp = &mbc;
 616        int status = 0;
 617
 618        memset(mbcp, 0, sizeof(struct mbox_params));
 619
 620        mbcp->in_count = 1;
 621        mbcp->out_count = 3;
 622
 623        mbcp->mbox_in[0] = MB_CMD_ABOUT_FW;
 624
 625        status = qlge_mailbox_command(qdev, mbcp);
 626        if (status)
 627                return status;
 628
 629        if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
 630                netif_err(qdev, drv, qdev->ndev,
 631                          "Failed about firmware command\n");
 632                status = -EIO;
 633        }
 634
 635        /* Store the firmware version */
 636        qdev->fw_rev_id = mbcp->mbox_out[1];
 637
 638        return status;
 639}
 640
 641/* Get functional state for MPI firmware.
 642 * Returns zero on success.
 643 */
 644int qlge_mb_get_fw_state(struct qlge_adapter *qdev)
 645{
 646        struct mbox_params mbc;
 647        struct mbox_params *mbcp = &mbc;
 648        int status = 0;
 649
 650        memset(mbcp, 0, sizeof(struct mbox_params));
 651
 652        mbcp->in_count = 1;
 653        mbcp->out_count = 2;
 654
 655        mbcp->mbox_in[0] = MB_CMD_GET_FW_STATE;
 656
 657        status = qlge_mailbox_command(qdev, mbcp);
 658        if (status)
 659                return status;
 660
 661        if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
 662                netif_err(qdev, drv, qdev->ndev,
 663                          "Failed Get Firmware State.\n");
 664                status = -EIO;
 665        }
 666
 667        /* If bit zero is set in mbx 1 then the firmware is
 668         * running, but not initialized.  This should never
 669         * happen.
 670         */
 671        if (mbcp->mbox_out[1] & 1) {
 672                netif_err(qdev, drv, qdev->ndev,
 673                          "Firmware waiting for initialization.\n");
 674                status = -EIO;
 675        }
 676
 677        return status;
 678}
 679
 680/* Send and ACK mailbox command to the firmware to
 681 * let it continue with the change.
 682 */
 683static int qlge_mb_idc_ack(struct qlge_adapter *qdev)
 684{
 685        struct mbox_params mbc;
 686        struct mbox_params *mbcp = &mbc;
 687        int status = 0;
 688
 689        memset(mbcp, 0, sizeof(struct mbox_params));
 690
 691        mbcp->in_count = 5;
 692        mbcp->out_count = 1;
 693
 694        mbcp->mbox_in[0] = MB_CMD_IDC_ACK;
 695        mbcp->mbox_in[1] = qdev->idc_mbc.mbox_out[1];
 696        mbcp->mbox_in[2] = qdev->idc_mbc.mbox_out[2];
 697        mbcp->mbox_in[3] = qdev->idc_mbc.mbox_out[3];
 698        mbcp->mbox_in[4] = qdev->idc_mbc.mbox_out[4];
 699
 700        status = qlge_mailbox_command(qdev, mbcp);
 701        if (status)
 702                return status;
 703
 704        if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
 705                netif_err(qdev, drv, qdev->ndev, "Failed IDC ACK send.\n");
 706                status = -EIO;
 707        }
 708        return status;
 709}
 710
 711/* Get link settings and maximum frame size settings
 712 * for the current port.
 713 * Most likely will block.
 714 */
 715int qlge_mb_set_port_cfg(struct qlge_adapter *qdev)
 716{
 717        struct mbox_params mbc;
 718        struct mbox_params *mbcp = &mbc;
 719        int status = 0;
 720
 721        memset(mbcp, 0, sizeof(struct mbox_params));
 722
 723        mbcp->in_count = 3;
 724        mbcp->out_count = 1;
 725
 726        mbcp->mbox_in[0] = MB_CMD_SET_PORT_CFG;
 727        mbcp->mbox_in[1] = qdev->link_config;
 728        mbcp->mbox_in[2] = qdev->max_frame_size;
 729
 730        status = qlge_mailbox_command(qdev, mbcp);
 731        if (status)
 732                return status;
 733
 734        if (mbcp->mbox_out[0] == MB_CMD_STS_INTRMDT) {
 735                netif_err(qdev, drv, qdev->ndev,
 736                          "Port Config sent, wait for IDC.\n");
 737        } else  if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
 738                netif_err(qdev, drv, qdev->ndev,
 739                          "Failed Set Port Configuration.\n");
 740                status = -EIO;
 741        }
 742        return status;
 743}
 744
 745static int qlge_mb_dump_ram(struct qlge_adapter *qdev, u64 req_dma, u32 addr,
 746                            u32 size)
 747{
 748        int status = 0;
 749        struct mbox_params mbc;
 750        struct mbox_params *mbcp = &mbc;
 751
 752        memset(mbcp, 0, sizeof(struct mbox_params));
 753
 754        mbcp->in_count = 9;
 755        mbcp->out_count = 1;
 756
 757        mbcp->mbox_in[0] = MB_CMD_DUMP_RISC_RAM;
 758        mbcp->mbox_in[1] = LSW(addr);
 759        mbcp->mbox_in[2] = MSW(req_dma);
 760        mbcp->mbox_in[3] = LSW(req_dma);
 761        mbcp->mbox_in[4] = MSW(size);
 762        mbcp->mbox_in[5] = LSW(size);
 763        mbcp->mbox_in[6] = MSW(MSD(req_dma));
 764        mbcp->mbox_in[7] = LSW(MSD(req_dma));
 765        mbcp->mbox_in[8] = MSW(addr);
 766
 767        status = qlge_mailbox_command(qdev, mbcp);
 768        if (status)
 769                return status;
 770
 771        if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
 772                netif_err(qdev, drv, qdev->ndev, "Failed to dump risc RAM.\n");
 773                status = -EIO;
 774        }
 775        return status;
 776}
 777
 778/* Issue a mailbox command to dump RISC RAM. */
 779int qlge_dump_risc_ram_area(struct qlge_adapter *qdev, void *buf,
 780                            u32 ram_addr, int word_count)
 781{
 782        int status;
 783        char *my_buf;
 784        dma_addr_t buf_dma;
 785
 786        my_buf = dma_alloc_coherent(&qdev->pdev->dev,
 787                                    word_count * sizeof(u32), &buf_dma,
 788                                    GFP_ATOMIC);
 789        if (!my_buf)
 790                return -EIO;
 791
 792        status = qlge_mb_dump_ram(qdev, buf_dma, ram_addr, word_count);
 793        if (!status)
 794                memcpy(buf, my_buf, word_count * sizeof(u32));
 795
 796        dma_free_coherent(&qdev->pdev->dev, word_count * sizeof(u32), my_buf,
 797                          buf_dma);
 798        return status;
 799}
 800
 801/* Get link settings and maximum frame size settings
 802 * for the current port.
 803 * Most likely will block.
 804 */
 805int qlge_mb_get_port_cfg(struct qlge_adapter *qdev)
 806{
 807        struct mbox_params mbc;
 808        struct mbox_params *mbcp = &mbc;
 809        int status = 0;
 810
 811        memset(mbcp, 0, sizeof(struct mbox_params));
 812
 813        mbcp->in_count = 1;
 814        mbcp->out_count = 3;
 815
 816        mbcp->mbox_in[0] = MB_CMD_GET_PORT_CFG;
 817
 818        status = qlge_mailbox_command(qdev, mbcp);
 819        if (status)
 820                return status;
 821
 822        if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
 823                netif_err(qdev, drv, qdev->ndev,
 824                          "Failed Get Port Configuration.\n");
 825                status = -EIO;
 826        } else  {
 827                netif_printk(qdev, drv, KERN_DEBUG, qdev->ndev,
 828                             "Passed Get Port Configuration.\n");
 829                qdev->link_config = mbcp->mbox_out[1];
 830                qdev->max_frame_size = mbcp->mbox_out[2];
 831        }
 832        return status;
 833}
 834
 835int qlge_mb_wol_mode(struct qlge_adapter *qdev, u32 wol)
 836{
 837        struct mbox_params mbc;
 838        struct mbox_params *mbcp = &mbc;
 839        int status;
 840
 841        memset(mbcp, 0, sizeof(struct mbox_params));
 842
 843        mbcp->in_count = 2;
 844        mbcp->out_count = 1;
 845
 846        mbcp->mbox_in[0] = MB_CMD_SET_WOL_MODE;
 847        mbcp->mbox_in[1] = wol;
 848
 849        status = qlge_mailbox_command(qdev, mbcp);
 850        if (status)
 851                return status;
 852
 853        if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
 854                netif_err(qdev, drv, qdev->ndev, "Failed to set WOL mode.\n");
 855                status = -EIO;
 856        }
 857        return status;
 858}
 859
 860int qlge_mb_wol_set_magic(struct qlge_adapter *qdev, u32 enable_wol)
 861{
 862        struct mbox_params mbc;
 863        struct mbox_params *mbcp = &mbc;
 864        int status;
 865        u8 *addr = qdev->ndev->dev_addr;
 866
 867        memset(mbcp, 0, sizeof(struct mbox_params));
 868
 869        mbcp->in_count = 8;
 870        mbcp->out_count = 1;
 871
 872        mbcp->mbox_in[0] = MB_CMD_SET_WOL_MAGIC;
 873        if (enable_wol) {
 874                mbcp->mbox_in[1] = (u32)addr[0];
 875                mbcp->mbox_in[2] = (u32)addr[1];
 876                mbcp->mbox_in[3] = (u32)addr[2];
 877                mbcp->mbox_in[4] = (u32)addr[3];
 878                mbcp->mbox_in[5] = (u32)addr[4];
 879                mbcp->mbox_in[6] = (u32)addr[5];
 880                mbcp->mbox_in[7] = 0;
 881        } else {
 882                mbcp->mbox_in[1] = 0;
 883                mbcp->mbox_in[2] = 1;
 884                mbcp->mbox_in[3] = 1;
 885                mbcp->mbox_in[4] = 1;
 886                mbcp->mbox_in[5] = 1;
 887                mbcp->mbox_in[6] = 1;
 888                mbcp->mbox_in[7] = 0;
 889        }
 890
 891        status = qlge_mailbox_command(qdev, mbcp);
 892        if (status)
 893                return status;
 894
 895        if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
 896                netif_err(qdev, drv, qdev->ndev, "Failed to set WOL mode.\n");
 897                status = -EIO;
 898        }
 899        return status;
 900}
 901
 902/* IDC - Inter Device Communication...
 903 * Some firmware commands require consent of adjacent FCOE
 904 * function.  This function waits for the OK, or a
 905 * counter-request for a little more time.i
 906 * The firmware will complete the request if the other
 907 * function doesn't respond.
 908 */
 909static int qlge_idc_wait(struct qlge_adapter *qdev)
 910{
 911        int status = -ETIMEDOUT;
 912        struct mbox_params *mbcp = &qdev->idc_mbc;
 913        long wait_time;
 914
 915        for (wait_time = 1 * HZ; wait_time;) {
 916                /* Wait here for the command to complete
 917                 * via the IDC process.
 918                 */
 919                wait_time =
 920                        wait_for_completion_timeout(&qdev->ide_completion,
 921                                                    wait_time);
 922                if (!wait_time) {
 923                        netif_err(qdev, drv, qdev->ndev, "IDC Timeout.\n");
 924                        break;
 925                }
 926                /* Now examine the response from the IDC process.
 927                 * We might have a good completion or a request for
 928                 * more wait time.
 929                 */
 930                if (mbcp->mbox_out[0] == AEN_IDC_EXT) {
 931                        netif_err(qdev, drv, qdev->ndev,
 932                                  "IDC Time Extension from function.\n");
 933                        wait_time += (mbcp->mbox_out[1] >> 8) & 0x0000000f;
 934                } else if (mbcp->mbox_out[0] == AEN_IDC_CMPLT) {
 935                        netif_err(qdev, drv, qdev->ndev, "IDC Success.\n");
 936                        status = 0;
 937                        break;
 938                } else {
 939                        netif_err(qdev, drv, qdev->ndev,
 940                                  "IDC: Invalid State 0x%.04x.\n",
 941                                  mbcp->mbox_out[0]);
 942                        status = -EIO;
 943                        break;
 944                }
 945        }
 946
 947        return status;
 948}
 949
 950int qlge_mb_set_led_cfg(struct qlge_adapter *qdev, u32 led_config)
 951{
 952        struct mbox_params mbc;
 953        struct mbox_params *mbcp = &mbc;
 954        int status;
 955
 956        memset(mbcp, 0, sizeof(struct mbox_params));
 957
 958        mbcp->in_count = 2;
 959        mbcp->out_count = 1;
 960
 961        mbcp->mbox_in[0] = MB_CMD_SET_LED_CFG;
 962        mbcp->mbox_in[1] = led_config;
 963
 964        status = qlge_mailbox_command(qdev, mbcp);
 965        if (status)
 966                return status;
 967
 968        if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
 969                netif_err(qdev, drv, qdev->ndev,
 970                          "Failed to set LED Configuration.\n");
 971                status = -EIO;
 972        }
 973
 974        return status;
 975}
 976
 977int qlge_mb_get_led_cfg(struct qlge_adapter *qdev)
 978{
 979        struct mbox_params mbc;
 980        struct mbox_params *mbcp = &mbc;
 981        int status;
 982
 983        memset(mbcp, 0, sizeof(struct mbox_params));
 984
 985        mbcp->in_count = 1;
 986        mbcp->out_count = 2;
 987
 988        mbcp->mbox_in[0] = MB_CMD_GET_LED_CFG;
 989
 990        status = qlge_mailbox_command(qdev, mbcp);
 991        if (status)
 992                return status;
 993
 994        if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
 995                netif_err(qdev, drv, qdev->ndev,
 996                          "Failed to get LED Configuration.\n");
 997                status = -EIO;
 998        } else {
 999                qdev->led_config = mbcp->mbox_out[1];
1000        }
1001        return status;
1002}
1003
1004int qlge_mb_set_mgmnt_traffic_ctl(struct qlge_adapter *qdev, u32 control)
1005{
1006        struct mbox_params mbc;
1007        struct mbox_params *mbcp = &mbc;
1008        int status;
1009
1010        memset(mbcp, 0, sizeof(struct mbox_params));
1011
1012        mbcp->in_count = 1;
1013        mbcp->out_count = 2;
1014
1015        mbcp->mbox_in[0] = MB_CMD_SET_MGMNT_TFK_CTL;
1016        mbcp->mbox_in[1] = control;
1017
1018        status = qlge_mailbox_command(qdev, mbcp);
1019        if (status)
1020                return status;
1021
1022        if (mbcp->mbox_out[0] == MB_CMD_STS_GOOD)
1023                return status;
1024
1025        if (mbcp->mbox_out[0] == MB_CMD_STS_INVLD_CMD) {
1026                netif_err(qdev, drv, qdev->ndev,
1027                          "Command not supported by firmware.\n");
1028                status = -EINVAL;
1029        } else if (mbcp->mbox_out[0] == MB_CMD_STS_ERR) {
1030                /* This indicates that the firmware is
1031                 * already in the state we are trying to
1032                 * change it to.
1033                 */
1034                netif_err(qdev, drv, qdev->ndev,
1035                          "Command parameters make no change.\n");
1036        }
1037        return status;
1038}
1039
1040/* Returns a negative error code or the mailbox command status. */
1041static int qlge_mb_get_mgmnt_traffic_ctl(struct qlge_adapter *qdev, u32 *control)
1042{
1043        struct mbox_params mbc;
1044        struct mbox_params *mbcp = &mbc;
1045        int status;
1046
1047        memset(mbcp, 0, sizeof(struct mbox_params));
1048        *control = 0;
1049
1050        mbcp->in_count = 1;
1051        mbcp->out_count = 1;
1052
1053        mbcp->mbox_in[0] = MB_CMD_GET_MGMNT_TFK_CTL;
1054
1055        status = qlge_mailbox_command(qdev, mbcp);
1056        if (status)
1057                return status;
1058
1059        if (mbcp->mbox_out[0] == MB_CMD_STS_GOOD) {
1060                *control = mbcp->mbox_in[1];
1061                return status;
1062        }
1063
1064        if (mbcp->mbox_out[0] == MB_CMD_STS_INVLD_CMD) {
1065                netif_err(qdev, drv, qdev->ndev,
1066                          "Command not supported by firmware.\n");
1067                status = -EINVAL;
1068        } else if (mbcp->mbox_out[0] == MB_CMD_STS_ERR) {
1069                netif_err(qdev, drv, qdev->ndev,
1070                          "Failed to get MPI traffic control.\n");
1071                status = -EIO;
1072        }
1073        return status;
1074}
1075
1076int qlge_wait_fifo_empty(struct qlge_adapter *qdev)
1077{
1078        int count;
1079        u32 mgmnt_fifo_empty;
1080        u32 nic_fifo_empty;
1081
1082        for (count = 6; count; count--) {
1083                nic_fifo_empty = qlge_read32(qdev, STS) & STS_NFE;
1084                qlge_mb_get_mgmnt_traffic_ctl(qdev, &mgmnt_fifo_empty);
1085                mgmnt_fifo_empty &= MB_GET_MPI_TFK_FIFO_EMPTY;
1086                if (nic_fifo_empty && mgmnt_fifo_empty)
1087                        return 0;
1088                msleep(100);
1089        }
1090        return -ETIMEDOUT;
1091}
1092
1093/* API called in work thread context to set new TX/RX
1094 * maximum frame size values to match MTU.
1095 */
1096static int qlge_set_port_cfg(struct qlge_adapter *qdev)
1097{
1098        int status;
1099
1100        status = qlge_mb_set_port_cfg(qdev);
1101        if (status)
1102                return status;
1103        status = qlge_idc_wait(qdev);
1104        return status;
1105}
1106
1107/* The following routines are worker threads that process
1108 * events that may sleep waiting for completion.
1109 */
1110
1111/* This thread gets the maximum TX and RX frame size values
1112 * from the firmware and, if necessary, changes them to match
1113 * the MTU setting.
1114 */
1115void qlge_mpi_port_cfg_work(struct work_struct *work)
1116{
1117        struct qlge_adapter *qdev =
1118                container_of(work, struct qlge_adapter, mpi_port_cfg_work.work);
1119        int status;
1120
1121        status = qlge_mb_get_port_cfg(qdev);
1122        if (status) {
1123                netif_err(qdev, drv, qdev->ndev,
1124                          "Bug: Failed to get port config data.\n");
1125                goto err;
1126        }
1127
1128        if (qdev->link_config & CFG_JUMBO_FRAME_SIZE &&
1129            qdev->max_frame_size == CFG_DEFAULT_MAX_FRAME_SIZE)
1130                goto end;
1131
1132        qdev->link_config |=    CFG_JUMBO_FRAME_SIZE;
1133        qdev->max_frame_size = CFG_DEFAULT_MAX_FRAME_SIZE;
1134        status = qlge_set_port_cfg(qdev);
1135        if (status) {
1136                netif_err(qdev, drv, qdev->ndev,
1137                          "Bug: Failed to set port config data.\n");
1138                goto err;
1139        }
1140end:
1141        clear_bit(QL_PORT_CFG, &qdev->flags);
1142        return;
1143err:
1144        qlge_queue_fw_error(qdev);
1145        goto end;
1146}
1147
1148/* Process an inter-device request.  This is issues by
1149 * the firmware in response to another function requesting
1150 * a change to the port. We set a flag to indicate a change
1151 * has been made and then send a mailbox command ACKing
1152 * the change request.
1153 */
1154void qlge_mpi_idc_work(struct work_struct *work)
1155{
1156        struct qlge_adapter *qdev =
1157                container_of(work, struct qlge_adapter, mpi_idc_work.work);
1158        int status;
1159        struct mbox_params *mbcp = &qdev->idc_mbc;
1160        u32 aen;
1161        int timeout;
1162
1163        aen = mbcp->mbox_out[1] >> 16;
1164        timeout = (mbcp->mbox_out[1] >> 8) & 0xf;
1165
1166        switch (aen) {
1167        default:
1168                netif_err(qdev, drv, qdev->ndev,
1169                          "Bug: Unhandled IDC action.\n");
1170                break;
1171        case MB_CMD_PORT_RESET:
1172        case MB_CMD_STOP_FW:
1173                qlge_link_off(qdev);
1174                fallthrough;
1175        case MB_CMD_SET_PORT_CFG:
1176                /* Signal the resulting link up AEN
1177                 * that the frame routing and mac addr
1178                 * needs to be set.
1179                 */
1180                set_bit(QL_CAM_RT_SET, &qdev->flags);
1181                /* Do ACK if required */
1182                if (timeout) {
1183                        status = qlge_mb_idc_ack(qdev);
1184                        if (status)
1185                                netif_err(qdev, drv, qdev->ndev,
1186                                          "Bug: No pending IDC!\n");
1187                } else {
1188                        netif_printk(qdev, drv, KERN_DEBUG, qdev->ndev,
1189                                     "IDC ACK not required\n");
1190                        status = 0; /* success */
1191                }
1192                break;
1193
1194                /* These sub-commands issued by another (FCoE)
1195                 * function are requesting to do an operation
1196                 * on the shared resource (MPI environment).
1197                 * We currently don't issue these so we just
1198                 * ACK the request.
1199                 */
1200        case MB_CMD_IOP_RESTART_MPI:
1201        case MB_CMD_IOP_PREP_LINK_DOWN:
1202                /* Drop the link, reload the routing
1203                 * table when link comes up.
1204                 */
1205                qlge_link_off(qdev);
1206                set_bit(QL_CAM_RT_SET, &qdev->flags);
1207                fallthrough;
1208        case MB_CMD_IOP_DVR_START:
1209        case MB_CMD_IOP_FLASH_ACC:
1210        case MB_CMD_IOP_CORE_DUMP_MPI:
1211        case MB_CMD_IOP_PREP_UPDATE_MPI:
1212        case MB_CMD_IOP_COMP_UPDATE_MPI:
1213        case MB_CMD_IOP_NONE:   /*  an IDC without params */
1214                /* Do ACK if required */
1215                if (timeout) {
1216                        status = qlge_mb_idc_ack(qdev);
1217                        if (status)
1218                                netif_err(qdev, drv, qdev->ndev,
1219                                          "Bug: No pending IDC!\n");
1220                } else {
1221                        netif_printk(qdev, drv, KERN_DEBUG, qdev->ndev,
1222                                     "IDC ACK not required\n");
1223                        status = 0; /* success */
1224                }
1225                break;
1226        }
1227}
1228
1229void qlge_mpi_work(struct work_struct *work)
1230{
1231        struct qlge_adapter *qdev =
1232                container_of(work, struct qlge_adapter, mpi_work.work);
1233        struct mbox_params mbc;
1234        struct mbox_params *mbcp = &mbc;
1235        int err = 0;
1236
1237        mutex_lock(&qdev->mpi_mutex);
1238        /* Begin polled mode for MPI */
1239        qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
1240
1241        while (qlge_read32(qdev, STS) & STS_PI) {
1242                memset(mbcp, 0, sizeof(struct mbox_params));
1243                mbcp->out_count = 1;
1244                /* Don't continue if an async event
1245                 * did not complete properly.
1246                 */
1247                err = qlge_mpi_handler(qdev, mbcp);
1248                if (err)
1249                        break;
1250        }
1251
1252        /* End polled mode for MPI */
1253        qlge_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
1254        mutex_unlock(&qdev->mpi_mutex);
1255}
1256
1257void qlge_mpi_reset_work(struct work_struct *work)
1258{
1259        struct qlge_adapter *qdev =
1260                container_of(work, struct qlge_adapter, mpi_reset_work.work);
1261        cancel_delayed_work_sync(&qdev->mpi_work);
1262        cancel_delayed_work_sync(&qdev->mpi_port_cfg_work);
1263        cancel_delayed_work_sync(&qdev->mpi_idc_work);
1264        /* If we're not the dominant NIC function,
1265         * then there is nothing to do.
1266         */
1267        if (!qlge_own_firmware(qdev)) {
1268                netif_err(qdev, drv, qdev->ndev, "Don't own firmware!\n");
1269                return;
1270        }
1271
1272        qlge_soft_reset_mpi_risc(qdev);
1273}
1274