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8#include "Mp_Precomp.h"
9
10
11#define HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(val) \
12do { \
13 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, val); \
14 pCoexDm->psTdmaDuAdjType = val; \
15} while (0)
16
17
18static struct coex_dm_8723b_2ant GLCoexDm8723b2Ant;
19static struct coex_dm_8723b_2ant *pCoexDm = &GLCoexDm8723b2Ant;
20static struct coex_sta_8723b_2ant GLCoexSta8723b2Ant;
21static struct coex_sta_8723b_2ant *pCoexSta = &GLCoexSta8723b2Ant;
22
23
24static u8 halbtc8723b2ant_BtRssiState(
25 u8 levelNum, u8 rssiThresh, u8 rssiThresh1
26)
27{
28 s32 btRssi = 0;
29 u8 btRssiState = pCoexSta->preBtRssiState;
30
31 btRssi = pCoexSta->btRssi;
32
33 if (levelNum == 2) {
34 if (
35 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
36 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)
37 ) {
38 if (btRssi >= (rssiThresh + BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
39 btRssiState = BTC_RSSI_STATE_HIGH;
40 } else {
41 btRssiState = BTC_RSSI_STATE_STAY_LOW;
42 }
43 } else {
44 if (btRssi < rssiThresh) {
45 btRssiState = BTC_RSSI_STATE_LOW;
46 } else {
47 btRssiState = BTC_RSSI_STATE_STAY_HIGH;
48 }
49 }
50 } else if (levelNum == 3) {
51 if (rssiThresh > rssiThresh1) {
52 return pCoexSta->preBtRssiState;
53 }
54
55 if (
56 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
57 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)
58 ) {
59 if (btRssi >= (rssiThresh + BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
60 btRssiState = BTC_RSSI_STATE_MEDIUM;
61 } else {
62 btRssiState = BTC_RSSI_STATE_STAY_LOW;
63 }
64 } else if (
65 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) ||
66 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)
67 ) {
68 if (btRssi >= (rssiThresh1 + BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
69 btRssiState = BTC_RSSI_STATE_HIGH;
70 } else if (btRssi < rssiThresh) {
71 btRssiState = BTC_RSSI_STATE_LOW;
72 } else {
73 btRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
74 }
75 } else {
76 if (btRssi < rssiThresh1) {
77 btRssiState = BTC_RSSI_STATE_MEDIUM;
78 } else {
79 btRssiState = BTC_RSSI_STATE_STAY_HIGH;
80 }
81 }
82 }
83
84 pCoexSta->preBtRssiState = btRssiState;
85
86 return btRssiState;
87}
88
89static u8 halbtc8723b2ant_WifiRssiState(
90 struct btc_coexist *pBtCoexist,
91 u8 index,
92 u8 levelNum,
93 u8 rssiThresh,
94 u8 rssiThresh1
95)
96{
97 s32 wifiRssi = 0;
98 u8 wifiRssiState = pCoexSta->preWifiRssiState[index];
99
100 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
101
102 if (levelNum == 2) {
103 if (
104 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
105 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)
106 ) {
107 if (wifiRssi >= (rssiThresh + BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
108 wifiRssiState = BTC_RSSI_STATE_HIGH;
109 } else {
110 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
111 }
112 } else {
113 if (wifiRssi < rssiThresh) {
114 wifiRssiState = BTC_RSSI_STATE_LOW;
115 } else {
116 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
117 }
118 }
119 } else if (levelNum == 3) {
120 if (rssiThresh > rssiThresh1) {
121 return pCoexSta->preWifiRssiState[index];
122 }
123
124 if (
125 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
126 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)
127 ) {
128 if (wifiRssi >= (rssiThresh + BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
129 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
130 } else {
131 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
132 }
133 } else if (
134 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) ||
135 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)
136 ) {
137 if (wifiRssi >= (rssiThresh1 + BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT)) {
138 wifiRssiState = BTC_RSSI_STATE_HIGH;
139 } else if (wifiRssi < rssiThresh) {
140 wifiRssiState = BTC_RSSI_STATE_LOW;
141 } else {
142 wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
143 }
144 } else {
145 if (wifiRssi < rssiThresh1) {
146 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
147 } else {
148 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
149 }
150 }
151 }
152
153 pCoexSta->preWifiRssiState[index] = wifiRssiState;
154
155 return wifiRssiState;
156}
157
158static void halbtc8723b2ant_LimitedRx(
159 struct btc_coexist *pBtCoexist,
160 bool bForceExec,
161 bool bRejApAggPkt,
162 bool bBtCtrlAggBufSize,
163 u8 aggBufSize
164)
165{
166 bool bRejectRxAgg = bRejApAggPkt;
167 bool bBtCtrlRxAggSize = bBtCtrlAggBufSize;
168 u8 rxAggSize = aggBufSize;
169
170
171
172
173 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg);
174
175 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize);
176
177 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize);
178
179 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
180}
181
182static void halbtc8723b2ant_QueryBtInfo(struct btc_coexist *pBtCoexist)
183{
184 u8 H2C_Parameter[1] = {0};
185
186 pCoexSta->bC2hBtInfoReqSent = true;
187
188 H2C_Parameter[0] |= BIT0;
189
190 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter);
191}
192
193static bool halbtc8723b2ant_IsWifiStatusChanged(struct btc_coexist *pBtCoexist)
194{
195 static bool bPreWifiBusy, bPreUnder4way, bPreBtHsOn;
196 bool bWifiBusy = false, bUnder4way = false, bBtHsOn = false;
197 bool bWifiConnected = false;
198
199 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
200 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
201 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
202 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way);
203
204 if (bWifiConnected) {
205 if (bWifiBusy != bPreWifiBusy) {
206 bPreWifiBusy = bWifiBusy;
207 return true;
208 }
209
210 if (bUnder4way != bPreUnder4way) {
211 bPreUnder4way = bUnder4way;
212 return true;
213 }
214
215 if (bBtHsOn != bPreBtHsOn) {
216 bPreBtHsOn = bBtHsOn;
217 return true;
218 }
219 }
220
221 return false;
222}
223
224static void halbtc8723b2ant_UpdateBtLinkInfo(struct btc_coexist *pBtCoexist)
225{
226 struct btc_bt_link_info *pBtLinkInfo = &pBtCoexist->btLinkInfo;
227 bool bBtHsOn = false;
228
229 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
230
231 pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist;
232 pBtLinkInfo->bScoExist = pCoexSta->bScoExist;
233 pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist;
234 pBtLinkInfo->bPanExist = pCoexSta->bPanExist;
235 pBtLinkInfo->bHidExist = pCoexSta->bHidExist;
236
237
238 if (bBtHsOn) {
239 pBtLinkInfo->bPanExist = true;
240 pBtLinkInfo->bBtLinkExist = true;
241 }
242
243
244 if (
245 pBtLinkInfo->bScoExist &&
246 !pBtLinkInfo->bA2dpExist &&
247 !pBtLinkInfo->bPanExist &&
248 !pBtLinkInfo->bHidExist
249 )
250 pBtLinkInfo->bScoOnly = true;
251 else
252 pBtLinkInfo->bScoOnly = false;
253
254
255 if (
256 !pBtLinkInfo->bScoExist &&
257 pBtLinkInfo->bA2dpExist &&
258 !pBtLinkInfo->bPanExist &&
259 !pBtLinkInfo->bHidExist
260 )
261 pBtLinkInfo->bA2dpOnly = true;
262 else
263 pBtLinkInfo->bA2dpOnly = false;
264
265
266 if (
267 !pBtLinkInfo->bScoExist &&
268 !pBtLinkInfo->bA2dpExist &&
269 pBtLinkInfo->bPanExist &&
270 !pBtLinkInfo->bHidExist
271 )
272 pBtLinkInfo->bPanOnly = true;
273 else
274 pBtLinkInfo->bPanOnly = false;
275
276
277 if (
278 !pBtLinkInfo->bScoExist &&
279 !pBtLinkInfo->bA2dpExist &&
280 !pBtLinkInfo->bPanExist &&
281 pBtLinkInfo->bHidExist
282 )
283 pBtLinkInfo->bHidOnly = true;
284 else
285 pBtLinkInfo->bHidOnly = false;
286}
287
288static u8 halbtc8723b2ant_ActionAlgorithm(struct btc_coexist *pBtCoexist)
289{
290 struct btc_bt_link_info *pBtLinkInfo = &pBtCoexist->btLinkInfo;
291 bool bBtHsOn = false;
292 u8 algorithm = BT_8723B_2ANT_COEX_ALGO_UNDEFINED;
293 u8 numOfDiffProfile = 0;
294
295 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
296
297 if (!pBtLinkInfo->bBtLinkExist) {
298 return algorithm;
299 }
300
301 if (pBtLinkInfo->bScoExist)
302 numOfDiffProfile++;
303
304 if (pBtLinkInfo->bHidExist)
305 numOfDiffProfile++;
306
307 if (pBtLinkInfo->bPanExist)
308 numOfDiffProfile++;
309
310 if (pBtLinkInfo->bA2dpExist)
311 numOfDiffProfile++;
312
313 if (numOfDiffProfile == 1) {
314 if (pBtLinkInfo->bScoExist) {
315 algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
316 } else {
317 if (pBtLinkInfo->bHidExist) {
318 algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
319 } else if (pBtLinkInfo->bA2dpExist) {
320 algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP;
321 } else if (pBtLinkInfo->bPanExist) {
322 if (bBtHsOn) {
323 algorithm = BT_8723B_2ANT_COEX_ALGO_PANHS;
324 } else {
325 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR;
326 }
327 }
328 }
329 } else if (numOfDiffProfile == 2) {
330 if (pBtLinkInfo->bScoExist) {
331 if (pBtLinkInfo->bHidExist) {
332 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
333 } else if (pBtLinkInfo->bA2dpExist) {
334 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
335 } else if (pBtLinkInfo->bPanExist) {
336 if (bBtHsOn) {
337 algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
338 } else {
339 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
340 }
341 }
342 } else {
343 if (
344 pBtLinkInfo->bHidExist &&
345 pBtLinkInfo->bA2dpExist
346 ) {
347 algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
348 } else if (
349 pBtLinkInfo->bHidExist &&
350 pBtLinkInfo->bPanExist
351 ) {
352 if (bBtHsOn) {
353 algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
354 } else {
355 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
356 }
357 } else if (
358 pBtLinkInfo->bPanExist &&
359 pBtLinkInfo->bA2dpExist
360 ) {
361 if (bBtHsOn) {
362 algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS;
363 } else {
364 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP;
365 }
366 }
367 }
368 } else if (numOfDiffProfile == 3) {
369 if (pBtLinkInfo->bScoExist) {
370 if (
371 pBtLinkInfo->bHidExist &&
372 pBtLinkInfo->bA2dpExist
373 ) {
374 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
375 } else if (
376 pBtLinkInfo->bHidExist &&
377 pBtLinkInfo->bPanExist
378 ) {
379 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
380 } else if (
381 pBtLinkInfo->bPanExist &&
382 pBtLinkInfo->bA2dpExist
383 ) {
384 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
385 }
386 } else {
387 if (
388 pBtLinkInfo->bHidExist &&
389 pBtLinkInfo->bPanExist &&
390 pBtLinkInfo->bA2dpExist
391 ) {
392 if (bBtHsOn) {
393 algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
394 } else {
395 algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
396 }
397 }
398 }
399 } else if (numOfDiffProfile >= 3) {
400 if (pBtLinkInfo->bScoExist) {
401 if (
402 pBtLinkInfo->bHidExist &&
403 pBtLinkInfo->bPanExist &&
404 pBtLinkInfo->bA2dpExist
405 ) {
406 if (bBtHsOn) {
407 } else {
408 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
409 }
410 }
411 }
412 }
413
414 return algorithm;
415}
416
417static void halbtc8723b2ant_SetFwDacSwingLevel(
418 struct btc_coexist *pBtCoexist, u8 dacSwingLvl
419)
420{
421 u8 H2C_Parameter[1] = {0};
422
423
424
425 H2C_Parameter[0] = dacSwingLvl;
426
427 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter);
428}
429
430static void halbtc8723b2ant_SetFwDecBtPwr(
431 struct btc_coexist *pBtCoexist, u8 decBtPwrLvl
432)
433{
434 u8 H2C_Parameter[1] = {0};
435
436 H2C_Parameter[0] = decBtPwrLvl;
437
438 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter);
439}
440
441static void halbtc8723b2ant_DecBtPwr(
442 struct btc_coexist *pBtCoexist, bool bForceExec, u8 decBtPwrLvl
443)
444{
445 pCoexDm->curBtDecPwrLvl = decBtPwrLvl;
446
447 if (!bForceExec) {
448 if (pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl)
449 return;
450 }
451 halbtc8723b2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl);
452
453 pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl;
454}
455
456static void halbtc8723b2ant_FwDacSwingLvl(
457 struct btc_coexist *pBtCoexist, bool bForceExec, u8 fwDacSwingLvl
458)
459{
460 pCoexDm->curFwDacSwingLvl = fwDacSwingLvl;
461
462 if (!bForceExec) {
463 if (pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl)
464 return;
465 }
466
467 halbtc8723b2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl);
468
469 pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl;
470}
471
472static void halbtc8723b2ant_SetSwRfRxLpfCorner(
473 struct btc_coexist *pBtCoexist,
474 bool bRxRfShrinkOn
475)
476{
477 if (bRxRfShrinkOn) {
478
479 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc);
480 } else {
481
482
483 if (pBtCoexist->bInitilized) {
484 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup);
485 }
486 }
487}
488
489static void halbtc8723b2ant_RfShrink(
490 struct btc_coexist *pBtCoexist, bool bForceExec, bool bRxRfShrinkOn
491)
492{
493 pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn;
494
495 if (!bForceExec) {
496 if (pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink)
497 return;
498 }
499 halbtc8723b2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink);
500
501 pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink;
502}
503
504static void halbtc8723b2ant_SetSwPenaltyTxRateAdaptive(
505 struct btc_coexist *pBtCoexist, bool bLowPenaltyRa
506)
507{
508 u8 H2C_Parameter[6] = {0};
509
510 H2C_Parameter[0] = 0x6;
511
512 if (bLowPenaltyRa) {
513 H2C_Parameter[1] |= BIT0;
514 H2C_Parameter[2] = 0x00;
515 H2C_Parameter[3] = 0xf7;
516 H2C_Parameter[4] = 0xf8;
517 H2C_Parameter[5] = 0xf9;
518 }
519
520 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter);
521}
522
523static void halbtc8723b2ant_LowPenaltyRa(
524 struct btc_coexist *pBtCoexist, bool bForceExec, bool bLowPenaltyRa
525)
526{
527
528 pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa;
529
530 if (!bForceExec) {
531 if (pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa)
532 return;
533 }
534 halbtc8723b2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa);
535
536 pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa;
537}
538
539static void halbtc8723b2ant_SetDacSwingReg(struct btc_coexist *pBtCoexist, u32 level)
540{
541 u8 val = (u8)level;
542
543 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x883, 0x3e, val);
544}
545
546static void halbtc8723b2ant_SetSwFullTimeDacSwing(
547 struct btc_coexist *pBtCoexist, bool bSwDacSwingOn, u32 swDacSwingLvl
548)
549{
550 if (bSwDacSwingOn)
551 halbtc8723b2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl);
552 else
553 halbtc8723b2ant_SetDacSwingReg(pBtCoexist, 0x18);
554}
555
556
557static void halbtc8723b2ant_DacSwing(
558 struct btc_coexist *pBtCoexist,
559 bool bForceExec,
560 bool bDacSwingOn,
561 u32 dacSwingLvl
562)
563{
564 pCoexDm->bCurDacSwingOn = bDacSwingOn;
565 pCoexDm->curDacSwingLvl = dacSwingLvl;
566
567 if (!bForceExec) {
568 if ((pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) &&
569 (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl))
570 return;
571 }
572 mdelay(30);
573 halbtc8723b2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl);
574
575 pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn;
576 pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl;
577}
578
579static void halbtc8723b2ant_SetAgcTable(
580 struct btc_coexist *pBtCoexist, bool bAgcTableEn
581)
582{
583 u8 rssiAdjustVal = 0;
584
585
586 if (bAgcTableEn) {
587 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e1A0001);
588 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d1B0001);
589 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1C0001);
590 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1D0001);
591 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1E0001);
592 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691F0001);
593 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68200001);
594 } else {
595 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xaa1A0001);
596 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa91B0001);
597 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa81C0001);
598 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa71D0001);
599 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa61E0001);
600 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa51F0001);
601 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa4200001);
602 }
603
604
605
606 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000);
607 if (bAgcTableEn) {
608 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38fff);
609 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38ffe);
610 } else {
611 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x380c3);
612 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28ce6);
613 }
614 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0);
615
616 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x1);
617 if (bAgcTableEn) {
618 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38fff);
619 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38ffe);
620 } else {
621 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x380c3);
622 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x28ce6);
623 }
624 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x0);
625
626
627 if (bAgcTableEn)
628 rssiAdjustVal = 8;
629
630 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal);
631}
632
633static void halbtc8723b2ant_AgcTable(
634 struct btc_coexist *pBtCoexist, bool bForceExec, bool bAgcTableEn
635)
636{
637 pCoexDm->bCurAgcTableEn = bAgcTableEn;
638
639 if (!bForceExec) {
640 if (pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn)
641 return;
642 }
643 halbtc8723b2ant_SetAgcTable(pBtCoexist, bAgcTableEn);
644
645 pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn;
646}
647
648static void halbtc8723b2ant_SetCoexTable(
649 struct btc_coexist *pBtCoexist,
650 u32 val0x6c0,
651 u32 val0x6c4,
652 u32 val0x6c8,
653 u8 val0x6cc
654)
655{
656 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0);
657
658 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4);
659
660 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8);
661
662 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc);
663}
664
665static void halbtc8723b2ant_CoexTable(
666 struct btc_coexist *pBtCoexist,
667 bool bForceExec,
668 u32 val0x6c0,
669 u32 val0x6c4,
670 u32 val0x6c8,
671 u8 val0x6cc
672)
673{
674 pCoexDm->curVal0x6c0 = val0x6c0;
675 pCoexDm->curVal0x6c4 = val0x6c4;
676 pCoexDm->curVal0x6c8 = val0x6c8;
677 pCoexDm->curVal0x6cc = val0x6cc;
678
679 if (!bForceExec) {
680 if (
681 (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) &&
682 (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) &&
683 (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) &&
684 (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc)
685 )
686 return;
687 }
688 halbtc8723b2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc);
689
690 pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0;
691 pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4;
692 pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8;
693 pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc;
694}
695
696static void halbtc8723b2ant_CoexTableWithType(
697 struct btc_coexist *pBtCoexist, bool bForceExec, u8 type
698)
699{
700 switch (type) {
701 case 0:
702 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffff, 0x3);
703 break;
704 case 1:
705 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5afa5afa, 0xffff, 0x3);
706 break;
707 case 2:
708 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffff, 0x3);
709 break;
710 case 3:
711 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffff, 0x3);
712 break;
713 case 4:
714 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xffffffff, 0xffff, 0x3);
715 break;
716 case 5:
717 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5fff5fff, 0xffff, 0x3);
718 break;
719 case 6:
720 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3);
721 break;
722 case 7:
723 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0xfafafafa, 0xffff, 0x3);
724 break;
725 case 8:
726 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5aea5aea, 0x5aea5aea, 0xffff, 0x3);
727 break;
728 case 9:
729 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5aea5aea, 0xffff, 0x3);
730 break;
731 case 10:
732 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5aff5aff, 0xffff, 0x3);
733 break;
734 case 11:
735 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5f5a5f, 0xffff, 0x3);
736 break;
737 case 12:
738 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5f5f5f5f, 0xffff, 0x3);
739 break;
740 default:
741 break;
742 }
743}
744
745static void halbtc8723b2ant_SetFwIgnoreWlanAct(
746 struct btc_coexist *pBtCoexist, bool bEnable
747)
748{
749 u8 H2C_Parameter[1] = {0};
750
751 if (bEnable)
752 H2C_Parameter[0] |= BIT0;
753
754 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter);
755}
756
757static void halbtc8723b2ant_IgnoreWlanAct(
758 struct btc_coexist *pBtCoexist, bool bForceExec, bool bEnable
759)
760{
761 pCoexDm->bCurIgnoreWlanAct = bEnable;
762
763 if (!bForceExec) {
764 if (pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct)
765 return;
766 }
767 halbtc8723b2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable);
768
769 pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct;
770}
771
772static void halbtc8723b2ant_SetFwPstdma(
773 struct btc_coexist *pBtCoexist,
774 u8 byte1,
775 u8 byte2,
776 u8 byte3,
777 u8 byte4,
778 u8 byte5
779)
780{
781 u8 H2C_Parameter[5] = {0};
782
783 H2C_Parameter[0] = byte1;
784 H2C_Parameter[1] = byte2;
785 H2C_Parameter[2] = byte3;
786 H2C_Parameter[3] = byte4;
787 H2C_Parameter[4] = byte5;
788
789 pCoexDm->psTdmaPara[0] = byte1;
790 pCoexDm->psTdmaPara[1] = byte2;
791 pCoexDm->psTdmaPara[2] = byte3;
792 pCoexDm->psTdmaPara[3] = byte4;
793 pCoexDm->psTdmaPara[4] = byte5;
794
795 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter);
796}
797
798static void halbtc8723b2ant_SwMechanism1(
799 struct btc_coexist *pBtCoexist,
800 bool bShrinkRxLPF,
801 bool bLowPenaltyRA,
802 bool bLimitedDIG,
803 bool bBTLNAConstrain
804)
805{
806 halbtc8723b2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF);
807 halbtc8723b2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA);
808}
809
810static void halbtc8723b2ant_SwMechanism2(
811 struct btc_coexist *pBtCoexist,
812 bool bAGCTableShift,
813 bool bADCBackOff,
814 bool bSWDACSwing,
815 u32 dacSwingLvl
816)
817{
818 halbtc8723b2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift);
819 halbtc8723b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl);
820}
821
822static void halbtc8723b2ant_SetAntPath(
823 struct btc_coexist *pBtCoexist, u8 antPosType, bool bInitHwCfg, bool bWifiOff
824)
825{
826 struct btc_board_info *pBoardInfo = &pBtCoexist->boardInfo;
827 u32 fwVer = 0, u4Tmp = 0;
828 bool bPgExtSwitch = false;
829 bool bUseExtSwitch = false;
830 u8 H2C_Parameter[2] = {0};
831
832 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_EXT_SWITCH, &bPgExtSwitch);
833 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
834
835 if ((fwVer > 0 && fwVer < 0xc0000) || bPgExtSwitch)
836 bUseExtSwitch = true;
837
838 if (bInitHwCfg) {
839 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x39, 0x8, 0x1);
840 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x974, 0xff);
841 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x944, 0x3, 0x3);
842 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x930, 0x77);
843 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1);
844
845 if (fwVer >= 0x180000) {
846
847 H2C_Parameter[0] = 0;
848 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
849 } else {
850 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x0);
851 }
852
853 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
854
855 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
856 pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01);
857
858 if (pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) {
859
860 H2C_Parameter[0] = 0;
861 } else {
862
863 H2C_Parameter[0] = 1;
864 }
865
866 if (bUseExtSwitch) {
867
868 H2C_Parameter[1] = 1;
869 } else {
870
871 H2C_Parameter[1] = 0;
872 }
873 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter);
874 }
875
876
877 if (bUseExtSwitch) {
878 if (bInitHwCfg) {
879
880 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
881 u4Tmp &= ~BIT23;
882 u4Tmp |= BIT24;
883 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
884 }
885
886 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
887 switch (antPosType) {
888 case BTC_ANT_WIFI_AT_MAIN:
889 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1);
890 break;
891 case BTC_ANT_WIFI_AT_AUX:
892 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2);
893 break;
894 }
895 } else {
896 if (bInitHwCfg) {
897
898 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
899 u4Tmp |= BIT23;
900 u4Tmp &= ~BIT24;
901 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
902 }
903
904 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0);
905 switch (antPosType) {
906 case BTC_ANT_WIFI_AT_MAIN:
907 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
908 break;
909 case BTC_ANT_WIFI_AT_AUX:
910 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280);
911 break;
912 }
913 }
914}
915
916static void halbtc8723b2ant_PsTdma(
917 struct btc_coexist *pBtCoexist, bool bForceExec, bool bTurnOn, u8 type
918)
919{
920 pCoexDm->bCurPsTdmaOn = bTurnOn;
921 pCoexDm->curPsTdma = type;
922
923 if (!bForceExec) {
924 if (
925 (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) &&
926 (pCoexDm->prePsTdma == pCoexDm->curPsTdma)
927 )
928 return;
929 }
930
931 if (bTurnOn) {
932 switch (type) {
933 case 1:
934 default:
935 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
936 break;
937 case 2:
938 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90);
939 break;
940 case 3:
941 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90);
942 break;
943 case 4:
944 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x03, 0xf1, 0x90);
945 break;
946 case 5:
947 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90);
948 break;
949 case 6:
950 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90);
951 break;
952 case 7:
953 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90);
954 break;
955 case 8:
956 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90);
957 break;
958 case 9:
959 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
960 break;
961 case 10:
962 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90);
963 break;
964 case 11:
965 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x90);
966 break;
967 case 12:
968 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90);
969 break;
970 case 13:
971 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90);
972 break;
973 case 14:
974 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90);
975 break;
976 case 15:
977 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x90);
978 break;
979 case 16:
980 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0x60, 0x90);
981 break;
982 case 17:
983 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x90);
984 break;
985 case 18:
986 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90);
987 break;
988 case 19:
989 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90);
990 break;
991 case 20:
992 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90);
993 break;
994 case 21:
995 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90);
996 break;
997 case 71:
998 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
999 break;
1000 }
1001 } else {
1002
1003 switch (type) {
1004 case 0:
1005 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0);
1006 break;
1007 case 1:
1008 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0);
1009 break;
1010 default:
1011 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0);
1012 break;
1013 }
1014 }
1015
1016
1017 pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn;
1018 pCoexDm->prePsTdma = pCoexDm->curPsTdma;
1019}
1020
1021static void halbtc8723b2ant_CoexAllOff(struct btc_coexist *pBtCoexist)
1022{
1023
1024 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
1025 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1026 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1027
1028
1029 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1030 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1031
1032
1033
1034 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1035}
1036
1037static void halbtc8723b2ant_InitCoexDm(struct btc_coexist *pBtCoexist)
1038{
1039
1040
1041 halbtc8723b2ant_PsTdma(pBtCoexist, FORCE_EXEC, false, 1);
1042 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6);
1043 halbtc8723b2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0);
1044
1045 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1046 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1047}
1048
1049static void halbtc8723b2ant_ActionBtInquiry(struct btc_coexist *pBtCoexist)
1050{
1051 bool bWifiConnected = false;
1052 bool bLowPwrDisable = true;
1053
1054 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1055 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
1056
1057 if (bWifiConnected) {
1058 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
1059 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 3);
1060 } else {
1061 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1062 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
1063 }
1064
1065 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6);
1066 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1067
1068 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1069 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1070
1071 pCoexDm->bNeedRecover0x948 = true;
1072 pCoexDm->backup0x948 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948);
1073
1074 halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_AUX, false, false);
1075}
1076
1077static bool halbtc8723b2ant_IsCommonAction(struct btc_coexist *pBtCoexist)
1078{
1079 u8 btRssiState = BTC_RSSI_STATE_HIGH;
1080 bool bCommon = false, bWifiConnected = false, bWifiBusy = false;
1081 bool bBtHsOn = false, bLowPwrDisable = false;
1082
1083 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
1084 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
1085 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
1086
1087 if (!bWifiConnected) {
1088 bLowPwrDisable = false;
1089 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1090 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1091
1092 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1093 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1094 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
1095 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1096 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1097
1098 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1099 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1100
1101 bCommon = true;
1102 } else {
1103 if (BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) {
1104 bLowPwrDisable = false;
1105 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1106 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1107
1108 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1109 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1110 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
1111 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb);
1112 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1113
1114 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1115 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1116
1117 bCommon = true;
1118 } else if (BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) {
1119 bLowPwrDisable = true;
1120 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1121
1122 if (bBtHsOn)
1123 return false;
1124
1125 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1126
1127 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1128 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1129 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
1130 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb);
1131 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1132
1133 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
1134 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1135
1136 bCommon = true;
1137 } else {
1138 bLowPwrDisable = true;
1139 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
1140
1141 if (bWifiBusy) {
1142 bCommon = false;
1143 } else {
1144 if (bBtHsOn)
1145 return false;
1146
1147 btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
1148 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1149
1150 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1151 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
1152 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 21);
1153 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb);
1154
1155 if (BTC_RSSI_HIGH(btRssiState))
1156 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
1157 else
1158 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1159
1160 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1161 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1162 bCommon = true;
1163 }
1164 }
1165 }
1166
1167 return bCommon;
1168}
1169
1170static void halbtc8723b2ant_TdmaDurationAdjust(
1171 struct btc_coexist *pBtCoexist, bool bScoHid, bool bTxPause, u8 maxInterval
1172)
1173{
1174 static s32 up, dn, m, n, WaitCount;
1175 s32 result;
1176 u8 retryCount = 0;
1177
1178 if (!pCoexDm->bAutoTdmaAdjust) {
1179 pCoexDm->bAutoTdmaAdjust = true;
1180 {
1181 if (bScoHid) {
1182 if (bTxPause) {
1183 if (maxInterval == 1)
1184 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(13);
1185 else if (maxInterval == 2)
1186 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1187 else
1188 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1189 } else {
1190 if (maxInterval == 1)
1191 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(9);
1192 else if (maxInterval == 2)
1193 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1194 else
1195 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1196 }
1197 } else {
1198 if (bTxPause) {
1199 if (maxInterval == 1)
1200 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(5);
1201 else if (maxInterval == 2)
1202 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1203 else
1204 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1205 } else {
1206 if (maxInterval == 1)
1207 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(1);
1208 else if (maxInterval == 2)
1209 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1210 else
1211 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1212 }
1213 }
1214 }
1215
1216 up = 0;
1217 dn = 0;
1218 m = 1;
1219 n = 3;
1220 result = 0;
1221 WaitCount = 0;
1222 } else {
1223
1224 retryCount = pCoexSta->btRetryCnt;
1225 result = 0;
1226 WaitCount++;
1227
1228 if (retryCount == 0) {
1229 up++;
1230 dn--;
1231
1232 if (dn <= 0)
1233 dn = 0;
1234
1235 if (up >= n) {
1236 WaitCount = 0;
1237 n = 3;
1238 up = 0;
1239 dn = 0;
1240 result = 1;
1241 }
1242 } else if (retryCount <= 3) {
1243 up--;
1244 dn++;
1245
1246 if (up <= 0)
1247 up = 0;
1248
1249 if (dn == 2) {
1250 if (WaitCount <= 2)
1251 m++;
1252 else
1253 m = 1;
1254
1255 if (m >= 20)
1256 m = 20;
1257
1258 n = 3 * m;
1259 up = 0;
1260 dn = 0;
1261 WaitCount = 0;
1262 result = -1;
1263 }
1264 } else {
1265 if (WaitCount == 1)
1266 m++;
1267 else
1268 m = 1;
1269
1270 if (m >= 20)
1271 m = 20;
1272
1273 n = 3 * m;
1274 up = 0;
1275 dn = 0;
1276 WaitCount = 0;
1277 result = -1;
1278 }
1279
1280 if (maxInterval == 1) {
1281 if (bTxPause) {
1282 if (pCoexDm->curPsTdma == 71)
1283 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(5);
1284 else if (pCoexDm->curPsTdma == 1)
1285 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(5);
1286 else if (pCoexDm->curPsTdma == 2)
1287 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1288 else if (pCoexDm->curPsTdma == 3)
1289 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1290 else if (pCoexDm->curPsTdma == 4)
1291 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1292
1293 if (pCoexDm->curPsTdma == 9)
1294 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(13);
1295 else if (pCoexDm->curPsTdma == 10)
1296 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1297 else if (pCoexDm->curPsTdma == 11)
1298 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1299 else if (pCoexDm->curPsTdma == 12)
1300 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1301
1302 if (result == -1) {
1303 if (pCoexDm->curPsTdma == 5)
1304 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1305 else if (pCoexDm->curPsTdma == 6)
1306 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1307 else if (pCoexDm->curPsTdma == 7)
1308 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1309 else if (pCoexDm->curPsTdma == 13)
1310 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1311 else if (pCoexDm->curPsTdma == 14)
1312 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1313 else if (pCoexDm->curPsTdma == 15)
1314 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1315 } else if (result == 1) {
1316 if (pCoexDm->curPsTdma == 8)
1317 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1318 else if (pCoexDm->curPsTdma == 7)
1319 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1320 else if (pCoexDm->curPsTdma == 6)
1321 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(5);
1322 else if (pCoexDm->curPsTdma == 16)
1323 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1324 else if (pCoexDm->curPsTdma == 15)
1325 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1326 else if (pCoexDm->curPsTdma == 14)
1327 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(13);
1328 }
1329 } else {
1330 if (pCoexDm->curPsTdma == 5)
1331 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(71);
1332 else if (pCoexDm->curPsTdma == 6)
1333 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1334 else if (pCoexDm->curPsTdma == 7)
1335 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1336 else if (pCoexDm->curPsTdma == 8)
1337 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
1338
1339 if (pCoexDm->curPsTdma == 13)
1340 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(9);
1341 else if (pCoexDm->curPsTdma == 14)
1342 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1343 else if (pCoexDm->curPsTdma == 15)
1344 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1345 else if (pCoexDm->curPsTdma == 16)
1346 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
1347
1348 if (result == -1) {
1349 if (pCoexDm->curPsTdma == 71)
1350 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(1);
1351 else if (pCoexDm->curPsTdma == 1)
1352 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1353 else if (pCoexDm->curPsTdma == 2)
1354 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1355 else if (pCoexDm->curPsTdma == 3)
1356 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
1357 else if (pCoexDm->curPsTdma == 9)
1358 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1359 else if (pCoexDm->curPsTdma == 10)
1360 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1361 else if (pCoexDm->curPsTdma == 11)
1362 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
1363 } else if (result == 1) {
1364 if (pCoexDm->curPsTdma == 4)
1365 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1366 else if (pCoexDm->curPsTdma == 3)
1367 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1368 else if (pCoexDm->curPsTdma == 2)
1369 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(1);
1370 else if (pCoexDm->curPsTdma == 1)
1371 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(71);
1372 else if (pCoexDm->curPsTdma == 12)
1373 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1374 else if (pCoexDm->curPsTdma == 11)
1375 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1376 else if (pCoexDm->curPsTdma == 10)
1377 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(9);
1378 }
1379 }
1380 } else if (maxInterval == 2) {
1381 if (bTxPause) {
1382 if (pCoexDm->curPsTdma == 1)
1383 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1384 else if (pCoexDm->curPsTdma == 2)
1385 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1386 else if (pCoexDm->curPsTdma == 3)
1387 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1388 else if (pCoexDm->curPsTdma == 4)
1389 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1390
1391 if (pCoexDm->curPsTdma == 9)
1392 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1393 else if (pCoexDm->curPsTdma == 10)
1394 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1395 else if (pCoexDm->curPsTdma == 11)
1396 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1397 else if (pCoexDm->curPsTdma == 12)
1398 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1399
1400 if (result == -1) {
1401 if (pCoexDm->curPsTdma == 5)
1402 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1403 else if (pCoexDm->curPsTdma == 6)
1404 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1405 else if (pCoexDm->curPsTdma == 7)
1406 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1407 else if (pCoexDm->curPsTdma == 13)
1408 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1409 else if (pCoexDm->curPsTdma == 14)
1410 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1411 else if (pCoexDm->curPsTdma == 15)
1412 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1413 } else if (result == 1) {
1414 if (pCoexDm->curPsTdma == 8)
1415 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1416 else if (pCoexDm->curPsTdma == 7)
1417 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1418 else if (pCoexDm->curPsTdma == 6)
1419 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(6);
1420 else if (pCoexDm->curPsTdma == 16)
1421 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1422 else if (pCoexDm->curPsTdma == 15)
1423 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1424 else if (pCoexDm->curPsTdma == 14)
1425 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(14);
1426 }
1427 } else {
1428 if (pCoexDm->curPsTdma == 5)
1429 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1430 else if (pCoexDm->curPsTdma == 6)
1431 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1432 else if (pCoexDm->curPsTdma == 7)
1433 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1434 else if (pCoexDm->curPsTdma == 8)
1435 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
1436
1437 if (pCoexDm->curPsTdma == 13)
1438 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1439 else if (pCoexDm->curPsTdma == 14)
1440 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1441 else if (pCoexDm->curPsTdma == 15)
1442 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1443 else if (pCoexDm->curPsTdma == 16)
1444 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
1445
1446 if (result == -1) {
1447 if (pCoexDm->curPsTdma == 1)
1448 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1449 else if (pCoexDm->curPsTdma == 2)
1450 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1451 else if (pCoexDm->curPsTdma == 3)
1452 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
1453 else if (pCoexDm->curPsTdma == 9)
1454 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1455 else if (pCoexDm->curPsTdma == 10)
1456 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1457 else if (pCoexDm->curPsTdma == 11)
1458 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
1459 } else if (result == 1) {
1460 if (pCoexDm->curPsTdma == 4)
1461 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1462 else if (pCoexDm->curPsTdma == 3)
1463 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1464 else if (pCoexDm->curPsTdma == 2)
1465 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(2);
1466 else if (pCoexDm->curPsTdma == 12)
1467 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1468 else if (pCoexDm->curPsTdma == 11)
1469 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1470 else if (pCoexDm->curPsTdma == 10)
1471 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(10);
1472 }
1473 }
1474 } else if (maxInterval == 3) {
1475 if (bTxPause) {
1476 if (pCoexDm->curPsTdma == 1)
1477 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1478 else if (pCoexDm->curPsTdma == 2)
1479 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1480 else if (pCoexDm->curPsTdma == 3)
1481 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1482 else if (pCoexDm->curPsTdma == 4)
1483 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1484
1485 if (pCoexDm->curPsTdma == 9)
1486 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1487 else if (pCoexDm->curPsTdma == 10)
1488 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1489 else if (pCoexDm->curPsTdma == 11)
1490 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1491 else if (pCoexDm->curPsTdma == 12)
1492 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1493
1494 if (result == -1) {
1495 if (pCoexDm->curPsTdma == 5)
1496 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1497 else if (pCoexDm->curPsTdma == 6)
1498 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1499 else if (pCoexDm->curPsTdma == 7)
1500 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(8);
1501 else if (pCoexDm->curPsTdma == 13)
1502 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1503 else if (pCoexDm->curPsTdma == 14)
1504 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1505 else if (pCoexDm->curPsTdma == 15)
1506 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(16);
1507 } else if (result == 1) {
1508 if (pCoexDm->curPsTdma == 8)
1509 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1510 else if (pCoexDm->curPsTdma == 7)
1511 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1512 else if (pCoexDm->curPsTdma == 6)
1513 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(7);
1514 else if (pCoexDm->curPsTdma == 16)
1515 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1516 else if (pCoexDm->curPsTdma == 15)
1517 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1518 else if (pCoexDm->curPsTdma == 14)
1519 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(15);
1520 }
1521 } else {
1522 if (pCoexDm->curPsTdma == 5)
1523 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1524 else if (pCoexDm->curPsTdma == 6)
1525 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1526 else if (pCoexDm->curPsTdma == 7)
1527 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1528 else if (pCoexDm->curPsTdma == 8)
1529 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
1530
1531 if (pCoexDm->curPsTdma == 13)
1532 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1533 else if (pCoexDm->curPsTdma == 14)
1534 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1535 else if (pCoexDm->curPsTdma == 15)
1536 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1537 else if (pCoexDm->curPsTdma == 16)
1538 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
1539
1540 if (result == -1) {
1541 if (pCoexDm->curPsTdma == 1)
1542 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1543 else if (pCoexDm->curPsTdma == 2)
1544 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1545 else if (pCoexDm->curPsTdma == 3)
1546 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(4);
1547 else if (pCoexDm->curPsTdma == 9)
1548 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1549 else if (pCoexDm->curPsTdma == 10)
1550 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1551 else if (pCoexDm->curPsTdma == 11)
1552 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(12);
1553 } else if (result == 1) {
1554 if (pCoexDm->curPsTdma == 4)
1555 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1556 else if (pCoexDm->curPsTdma == 3)
1557 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1558 else if (pCoexDm->curPsTdma == 2)
1559 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(3);
1560 else if (pCoexDm->curPsTdma == 12)
1561 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1562 else if (pCoexDm->curPsTdma == 11)
1563 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1564 else if (pCoexDm->curPsTdma == 10)
1565 HAL_BTC8723B2ANT_DMA_DURATION_ADJUST(11);
1566 }
1567 }
1568 }
1569 }
1570
1571
1572
1573 if (pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) {
1574 bool bScan = false, bLink = false, bRoam = false;
1575
1576 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
1577 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
1578 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
1579
1580 if (!bScan && !bLink && !bRoam)
1581 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, pCoexDm->psTdmaDuAdjType);
1582
1583 }
1584}
1585
1586
1587static void halbtc8723b2ant_ActionSco(struct btc_coexist *pBtCoexist)
1588{
1589 u8 wifiRssiState, btRssiState;
1590 u32 wifiBw;
1591
1592 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
1593 btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
1594
1595 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1596
1597 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1598
1599 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 4);
1600
1601 if (BTC_RSSI_HIGH(btRssiState))
1602 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
1603 else
1604 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1605
1606 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
1607
1608 if (BTC_WIFI_BW_LEGACY == wifiBw)
1609 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2);
1610 else
1611 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8);
1612
1613 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 0);
1614
1615
1616 if (BTC_WIFI_BW_HT40 == wifiBw) {
1617 if (
1618 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1619 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
1620 ) {
1621 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
1622 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, true, 0x4);
1623 } else {
1624 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
1625 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, true, 0x4);
1626 }
1627 } else {
1628 if (
1629 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1630 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
1631 ) {
1632 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
1633 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, true, 0x4);
1634 } else {
1635 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
1636 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, true, 0x4);
1637 }
1638 }
1639}
1640
1641
1642static void halbtc8723b2ant_ActionHid(struct btc_coexist *pBtCoexist)
1643{
1644 u8 wifiRssiState, btRssiState;
1645 u32 wifiBw;
1646
1647 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
1648 btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
1649
1650 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1651
1652 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1653
1654 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1655
1656 if (BTC_RSSI_HIGH(btRssiState))
1657 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
1658 else
1659 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1660
1661 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
1662
1663 if (BTC_WIFI_BW_LEGACY == wifiBw)
1664 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
1665 else
1666 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 9);
1667
1668 if (
1669 (btRssiState == BTC_RSSI_STATE_HIGH) ||
1670 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
1671 )
1672 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 9);
1673 else
1674 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 13);
1675
1676
1677 if (BTC_WIFI_BW_HT40 == wifiBw) {
1678 if (
1679 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1680 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
1681 ) {
1682 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
1683 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
1684 } else {
1685 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
1686 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1687 }
1688 } else {
1689 if (
1690 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1691 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
1692 ) {
1693 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
1694 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
1695 } else {
1696 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
1697 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1698 }
1699 }
1700}
1701
1702
1703static void halbtc8723b2ant_ActionA2dp(struct btc_coexist *pBtCoexist)
1704{
1705 u8 wifiRssiState, wifiRssiState1, btRssiState;
1706 u32 wifiBw;
1707 u8 apNum = 0;
1708
1709 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
1710 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, 40, 0);
1711 btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
1712
1713 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
1714
1715
1716 if (apNum >= 10 && BTC_RSSI_HIGH(wifiRssiState1)) {
1717 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1718 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1719 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1720 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1721 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
1722 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
1723
1724
1725 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
1726 if (BTC_WIFI_BW_HT40 == wifiBw) {
1727 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
1728 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, true, 0x18);
1729 } else {
1730 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1731 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, true, 0x18);
1732 }
1733 return;
1734 }
1735
1736 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1737 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1738
1739 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1740
1741 if (BTC_RSSI_HIGH(btRssiState))
1742 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
1743 else
1744 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1745
1746 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
1747
1748 if (
1749 (btRssiState == BTC_RSSI_STATE_HIGH) ||
1750 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
1751 )
1752 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, false, 1);
1753 else
1754 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, true, 1);
1755
1756
1757 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
1758 if (BTC_WIFI_BW_HT40 == wifiBw) {
1759 if (
1760 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1761 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
1762 ) {
1763 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
1764 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
1765 } else {
1766 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
1767 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1768 }
1769 } else {
1770 if (
1771 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1772 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
1773 ) {
1774 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1775 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
1776 } else {
1777 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1778 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1779 }
1780 }
1781}
1782
1783static void halbtc8723b2ant_ActionA2dpPanHs(struct btc_coexist *pBtCoexist)
1784{
1785 u8 wifiRssiState, btRssiState;
1786 u32 wifiBw;
1787
1788 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
1789 btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
1790
1791 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1792
1793 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1794
1795 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1796
1797 if (BTC_RSSI_HIGH(btRssiState))
1798 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
1799 else
1800 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1801
1802 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
1803
1804 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, true, 2);
1805
1806
1807 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
1808 if (BTC_WIFI_BW_HT40 == wifiBw) {
1809 if (
1810 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1811 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
1812 ) {
1813 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
1814 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
1815 } else {
1816 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
1817 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1818 }
1819 } else {
1820 if (
1821 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1822 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
1823 ) {
1824 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1825 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
1826 } else {
1827 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1828 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1829 }
1830 }
1831}
1832
1833static void halbtc8723b2ant_ActionPanEdr(struct btc_coexist *pBtCoexist)
1834{
1835 u8 wifiRssiState, btRssiState;
1836 u32 wifiBw;
1837
1838 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
1839 btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
1840
1841 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1842
1843 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1844
1845 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1846
1847 if (BTC_RSSI_HIGH(btRssiState))
1848 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
1849 else
1850 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1851
1852 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 10);
1853
1854 if (
1855 (btRssiState == BTC_RSSI_STATE_HIGH) ||
1856 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
1857 )
1858 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 1);
1859 else
1860 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 5);
1861
1862
1863 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
1864 if (BTC_WIFI_BW_HT40 == wifiBw) {
1865 if (
1866 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1867 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
1868 ) {
1869 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
1870 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
1871 } else {
1872 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
1873 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1874 }
1875 } else {
1876 if (
1877 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1878 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
1879 ) {
1880 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1881 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
1882 } else {
1883 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1884 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1885 }
1886 }
1887}
1888
1889
1890
1891static void halbtc8723b2ant_ActionPanHs(struct btc_coexist *pBtCoexist)
1892{
1893 u8 wifiRssiState, btRssiState;
1894 u32 wifiBw;
1895
1896 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
1897 btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
1898
1899 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1900
1901 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1902
1903 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1904
1905 if (BTC_RSSI_HIGH(btRssiState))
1906 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
1907 else
1908 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1909
1910 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
1911
1912 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, false, 1);
1913
1914 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
1915 if (BTC_WIFI_BW_HT40 == wifiBw) {
1916 if (
1917 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1918 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
1919 ) {
1920 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
1921 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
1922 } else {
1923 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
1924 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1925 }
1926 } else {
1927 if (
1928 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1929 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
1930 ) {
1931 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1932 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
1933 } else {
1934 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1935 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1936 }
1937 }
1938}
1939
1940
1941static void halbtc8723b2ant_ActionPanEdrA2dp(struct btc_coexist *pBtCoexist)
1942{
1943 u8 wifiRssiState, btRssiState;
1944 u32 wifiBw;
1945
1946 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
1947 btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
1948
1949 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1950
1951 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
1952
1953 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
1954
1955 if (BTC_RSSI_HIGH(btRssiState))
1956 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
1957 else
1958 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
1959
1960 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
1961
1962 if (
1963 (btRssiState == BTC_RSSI_STATE_HIGH) ||
1964 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
1965 ) {
1966 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 12);
1967 if (BTC_WIFI_BW_HT40 == wifiBw)
1968 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, true, 3);
1969 else
1970 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, false, 3);
1971 } else {
1972 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
1973 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, false, true, 3);
1974 }
1975
1976
1977 if (BTC_WIFI_BW_HT40 == wifiBw) {
1978 if (
1979 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1980 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
1981 ) {
1982 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
1983 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
1984 } else {
1985 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, false, false, false);
1986 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1987 }
1988 } else {
1989 if (
1990 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
1991 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
1992 ) {
1993 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1994 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
1995 } else {
1996 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, false, false, false);
1997 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
1998 }
1999 }
2000}
2001
2002static void halbtc8723b2ant_ActionPanEdrHid(struct btc_coexist *pBtCoexist)
2003{
2004 u8 wifiRssiState, btRssiState;
2005 u32 wifiBw;
2006
2007 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2008 btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2009 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2010
2011 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2012
2013 if (BTC_RSSI_HIGH(btRssiState))
2014 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2015 else
2016 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2017
2018 if (
2019 (btRssiState == BTC_RSSI_STATE_HIGH) ||
2020 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
2021 ) {
2022 if (BTC_WIFI_BW_HT40 == wifiBw) {
2023 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 3);
2024 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 11);
2025 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780);
2026 } else {
2027 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2028 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2029 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2030 }
2031 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, false, 2);
2032 } else {
2033 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2034 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 11);
2035 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2036 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, true, 2);
2037 }
2038
2039
2040 if (BTC_WIFI_BW_HT40 == wifiBw) {
2041 if (
2042 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2043 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2044 ) {
2045 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2046 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2047 } else {
2048 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2049 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2050 }
2051 } else {
2052 if (
2053 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2054 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2055 ) {
2056 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2057 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2058 } else {
2059 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2060 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2061 }
2062 }
2063}
2064
2065
2066static void halbtc8723b2ant_ActionHidA2dpPanEdr(struct btc_coexist *pBtCoexist)
2067{
2068 u8 wifiRssiState, btRssiState;
2069 u32 wifiBw;
2070
2071 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2072 btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
2073
2074 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2075
2076 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, false, 0x8);
2077
2078 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2079
2080 if (BTC_RSSI_HIGH(btRssiState))
2081 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2082 else
2083 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2084
2085 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2086
2087 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2088
2089 if (
2090 (btRssiState == BTC_RSSI_STATE_HIGH) ||
2091 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
2092 ) {
2093 if (BTC_WIFI_BW_HT40 == wifiBw)
2094 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, true, 2);
2095 else
2096 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, false, 3);
2097 } else
2098 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, true, 3);
2099
2100
2101 if (BTC_WIFI_BW_HT40 == wifiBw) {
2102 if (
2103 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2104 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2105 ) {
2106 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2107 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2108 } else {
2109 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2110 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2111 }
2112 } else {
2113 if (
2114 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2115 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2116 ) {
2117 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2118 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2119 } else {
2120 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2121 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2122 }
2123 }
2124}
2125
2126static void halbtc8723b2ant_ActionHidA2dp(struct btc_coexist *pBtCoexist)
2127{
2128 u8 wifiRssiState, btRssiState;
2129 u32 wifiBw;
2130 u8 apNum = 0;
2131
2132 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
2133
2134 btRssiState = halbtc8723b2ant_BtRssiState(3, 29, 37);
2135
2136 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2137
2138 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, true, 0x5);
2139
2140 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
2141
2142 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2143 if (BTC_WIFI_BW_LEGACY == wifiBw) {
2144 if (BTC_RSSI_HIGH(btRssiState))
2145 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2146 else if (BTC_RSSI_MEDIUM(btRssiState))
2147 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2148 else
2149 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2150 } else {
2151
2152 if (BTC_RSSI_HIGH(btRssiState)) {
2153 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
2154
2155 if (apNum < 10)
2156 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4);
2157 else
2158 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2159 } else if (BTC_RSSI_MEDIUM(btRssiState))
2160 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
2161 else
2162 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
2163 }
2164
2165 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
2166
2167 if (
2168 (btRssiState == BTC_RSSI_STATE_HIGH) ||
2169 (btRssiState == BTC_RSSI_STATE_STAY_HIGH)
2170 )
2171 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, false, 2);
2172 else
2173 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, true, true, 2);
2174
2175
2176 if (BTC_WIFI_BW_HT40 == wifiBw) {
2177 if (
2178 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2179 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2180 ) {
2181 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2182 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2183 } else {
2184 halbtc8723b2ant_SwMechanism1(pBtCoexist, true, true, false, false);
2185 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2186 }
2187 } else {
2188 if (
2189 (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
2190 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH)
2191 ) {
2192 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2193 halbtc8723b2ant_SwMechanism2(pBtCoexist, true, false, false, 0x18);
2194 } else {
2195 halbtc8723b2ant_SwMechanism1(pBtCoexist, false, true, false, false);
2196 halbtc8723b2ant_SwMechanism2(pBtCoexist, false, false, false, 0x18);
2197 }
2198 }
2199}
2200
2201static void halbtc8723b2ant_RunCoexistMechanism(struct btc_coexist *pBtCoexist)
2202{
2203 u8 algorithm = 0;
2204
2205 if (pBtCoexist->bManualControl) {
2206 return;
2207 }
2208
2209 if (pCoexSta->bUnderIps) {
2210 return;
2211 }
2212
2213 algorithm = halbtc8723b2ant_ActionAlgorithm(pBtCoexist);
2214 if (pCoexSta->bC2hBtInquiryPage && (BT_8723B_2ANT_COEX_ALGO_PANHS != algorithm)) {
2215 halbtc8723b2ant_ActionBtInquiry(pBtCoexist);
2216 return;
2217 } else {
2218 if (pCoexDm->bNeedRecover0x948) {
2219 pCoexDm->bNeedRecover0x948 = false;
2220 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, pCoexDm->backup0x948);
2221 }
2222 }
2223
2224 pCoexDm->curAlgorithm = algorithm;
2225
2226 if (halbtc8723b2ant_IsCommonAction(pBtCoexist)) {
2227 pCoexDm->bAutoTdmaAdjust = false;
2228 } else {
2229 if (pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) {
2230 pCoexDm->bAutoTdmaAdjust = false;
2231 }
2232
2233
2234 switch (pCoexDm->curAlgorithm) {
2235 case BT_8723B_2ANT_COEX_ALGO_SCO:
2236 halbtc8723b2ant_ActionSco(pBtCoexist);
2237 break;
2238 case BT_8723B_2ANT_COEX_ALGO_HID:
2239 halbtc8723b2ant_ActionHid(pBtCoexist);
2240 break;
2241 case BT_8723B_2ANT_COEX_ALGO_A2DP:
2242 halbtc8723b2ant_ActionA2dp(pBtCoexist);
2243 break;
2244 case BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS:
2245 halbtc8723b2ant_ActionA2dpPanHs(pBtCoexist);
2246 break;
2247 case BT_8723B_2ANT_COEX_ALGO_PANEDR:
2248 halbtc8723b2ant_ActionPanEdr(pBtCoexist);
2249 break;
2250 case BT_8723B_2ANT_COEX_ALGO_PANHS:
2251 halbtc8723b2ant_ActionPanHs(pBtCoexist);
2252 break;
2253 case BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP:
2254 halbtc8723b2ant_ActionPanEdrA2dp(pBtCoexist);
2255 break;
2256 case BT_8723B_2ANT_COEX_ALGO_PANEDR_HID:
2257 halbtc8723b2ant_ActionPanEdrHid(pBtCoexist);
2258 break;
2259 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
2260 halbtc8723b2ant_ActionHidA2dpPanEdr(pBtCoexist);
2261 break;
2262 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP:
2263 halbtc8723b2ant_ActionHidA2dp(pBtCoexist);
2264 break;
2265 default:
2266 halbtc8723b2ant_CoexAllOff(pBtCoexist);
2267 break;
2268 }
2269 pCoexDm->preAlgorithm = pCoexDm->curAlgorithm;
2270 }
2271}
2272
2273static void halbtc8723b2ant_WifiOffHwCfg(struct btc_coexist *pBtCoexist)
2274{
2275 bool bIsInMpMode = false;
2276 u8 H2C_Parameter[2] = {0};
2277 u32 fwVer = 0;
2278
2279
2280 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4);
2281
2282 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780);
2283 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
2284 if (fwVer >= 0x180000) {
2285
2286 H2C_Parameter[0] = 1;
2287 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
2288 } else
2289 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18);
2290
2291 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode);
2292 if (!bIsInMpMode)
2293 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0);
2294 else
2295 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1);
2296}
2297
2298static void halbtc8723b2ant_InitHwConfig(struct btc_coexist *pBtCoexist, bool bBackUp)
2299{
2300 u8 u1Tmp = 0;
2301
2302
2303 pCoexDm->btRf0x1eBackup =
2304 pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff);
2305
2306
2307 u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790);
2308 u1Tmp &= 0xc0;
2309 u1Tmp |= 0x5;
2310 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp);
2311
2312
2313 halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, true, false);
2314
2315
2316 halbtc8723b2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0);
2317
2318
2319 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc);
2320 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3);
2321 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1);
2322}
2323
2324
2325
2326
2327
2328
2329
2330void EXhalbtc8723b2ant_PowerOnSetting(struct btc_coexist *pBtCoexist)
2331{
2332 struct btc_board_info *pBoardInfo = &pBtCoexist->boardInfo;
2333 u8 u1Tmp = 0x4;
2334 u16 u2Tmp = 0x0;
2335
2336 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20);
2337
2338
2339 u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2);
2340 pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp | BIT0 | BIT1);
2341
2342
2343 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18);
2344
2345 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4);
2346
2347
2348
2349
2350
2351
2352
2353
2354 if (pBtCoexist->chipInterface == BTC_INTF_USB) {
2355
2356 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
2357
2358 u1Tmp |= 0x1;
2359 pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp);
2360
2361 pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT;
2362 } else {
2363
2364 if (pBoardInfo->singleAntPath == 0) {
2365
2366 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280);
2367 pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT;
2368 } else if (pBoardInfo->singleAntPath == 1) {
2369
2370 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
2371 u1Tmp |= 0x1;
2372 pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT;
2373 }
2374
2375 if (pBtCoexist->chipInterface == BTC_INTF_PCI)
2376 pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp);
2377 else if (pBtCoexist->chipInterface == BTC_INTF_SDIO)
2378 pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp);
2379 }
2380}
2381
2382void EXhalbtc8723b2ant_InitHwConfig(struct btc_coexist *pBtCoexist, bool bWifiOnly)
2383{
2384 halbtc8723b2ant_InitHwConfig(pBtCoexist, true);
2385}
2386
2387void EXhalbtc8723b2ant_InitCoexDm(struct btc_coexist *pBtCoexist)
2388{
2389 halbtc8723b2ant_InitCoexDm(pBtCoexist);
2390}
2391
2392void EXhalbtc8723b2ant_IpsNotify(struct btc_coexist *pBtCoexist, u8 type)
2393{
2394 if (BTC_IPS_ENTER == type) {
2395 pCoexSta->bUnderIps = true;
2396 halbtc8723b2ant_WifiOffHwCfg(pBtCoexist);
2397 halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, true);
2398 halbtc8723b2ant_CoexAllOff(pBtCoexist);
2399 } else if (BTC_IPS_LEAVE == type) {
2400 pCoexSta->bUnderIps = false;
2401 halbtc8723b2ant_InitHwConfig(pBtCoexist, false);
2402 halbtc8723b2ant_InitCoexDm(pBtCoexist);
2403 halbtc8723b2ant_QueryBtInfo(pBtCoexist);
2404 }
2405}
2406
2407void EXhalbtc8723b2ant_LpsNotify(struct btc_coexist *pBtCoexist, u8 type)
2408{
2409 if (BTC_LPS_ENABLE == type) {
2410 pCoexSta->bUnderLps = true;
2411 } else if (BTC_LPS_DISABLE == type) {
2412 pCoexSta->bUnderLps = false;
2413 }
2414}
2415
2416void EXhalbtc8723b2ant_ScanNotify(struct btc_coexist *pBtCoexist, u8 type)
2417{
2418 if (BTC_SCAN_START == type) {
2419 } else if (BTC_SCAN_FINISH == type) {
2420 }
2421}
2422
2423void EXhalbtc8723b2ant_ConnectNotify(struct btc_coexist *pBtCoexist, u8 type)
2424{
2425 if (BTC_ASSOCIATE_START == type) {
2426 } else if (BTC_ASSOCIATE_FINISH == type) {
2427 }
2428}
2429
2430void EXhalbtc8723b2ant_MediaStatusNotify(struct btc_coexist *pBtCoexist, u8 type)
2431{
2432 u8 H2C_Parameter[3] = {0};
2433 u32 wifiBw;
2434 u8 wifiCentralChnl;
2435 u8 apNum = 0;
2436
2437
2438 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl);
2439 if ((BTC_MEDIA_CONNECT == type) && (wifiCentralChnl <= 14)) {
2440 H2C_Parameter[0] = 0x1;
2441 H2C_Parameter[1] = wifiCentralChnl;
2442 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
2443 if (BTC_WIFI_BW_HT40 == wifiBw)
2444 H2C_Parameter[2] = 0x30;
2445 else {
2446 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
2447 if (apNum < 10)
2448 H2C_Parameter[2] = 0x30;
2449 else
2450 H2C_Parameter[2] = 0x20;
2451 }
2452 }
2453
2454 pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0];
2455 pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1];
2456 pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2];
2457
2458 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter);
2459}
2460
2461void EXhalbtc8723b2ant_SpecialPacketNotify(struct btc_coexist *pBtCoexist, u8 type)
2462{
2463}
2464
2465void EXhalbtc8723b2ant_BtInfoNotify(
2466 struct btc_coexist *pBtCoexist, u8 *tmpBuf, u8 length
2467)
2468{
2469 u8 btInfo = 0;
2470 u8 i, rspSource = 0;
2471 bool bBtBusy = false, bLimitedDig = false;
2472 bool bWifiConnected = false;
2473
2474 pCoexSta->bC2hBtInfoReqSent = false;
2475
2476 rspSource = tmpBuf[0] & 0xf;
2477 if (rspSource >= BT_INFO_SRC_8723B_2ANT_MAX)
2478 rspSource = BT_INFO_SRC_8723B_2ANT_WIFI_FW;
2479
2480 pCoexSta->btInfoC2hCnt[rspSource]++;
2481
2482 for (i = 0; i < length; i++) {
2483 pCoexSta->btInfoC2h[rspSource][i] = tmpBuf[i];
2484 if (i == 1)
2485 btInfo = tmpBuf[i];
2486
2487 }
2488
2489 if (pBtCoexist->bManualControl) {
2490 return;
2491 }
2492
2493 if (BT_INFO_SRC_8723B_2ANT_WIFI_FW != rspSource) {
2494 pCoexSta->btRetryCnt = pCoexSta->btInfoC2h[rspSource][2] & 0xf;
2495
2496 pCoexSta->btRssi = pCoexSta->btInfoC2h[rspSource][3] * 2 + 10;
2497
2498 pCoexSta->btInfoExt = pCoexSta->btInfoC2h[rspSource][4];
2499
2500 pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2] & 0x40);
2501 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask);
2502 if (pCoexSta->bBtTxRxMask) {
2503
2504 pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01);
2505 }
2506
2507
2508
2509 if ((pCoexSta->btInfoExt & BIT1)) {
2510 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
2511
2512 if (bWifiConnected)
2513 EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT);
2514 else
2515 EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
2516 }
2517
2518 if ((pCoexSta->btInfoExt & BIT3)) {
2519 halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, false);
2520 } else {
2521
2522 }
2523 }
2524
2525
2526 if (btInfo & BT_INFO_8723B_2ANT_B_INQ_PAGE)
2527 pCoexSta->bC2hBtInquiryPage = true;
2528 else
2529 pCoexSta->bC2hBtInquiryPage = false;
2530
2531
2532 if (!(btInfo & BT_INFO_8723B_2ANT_B_CONNECTION)) {
2533 pCoexSta->bBtLinkExist = false;
2534 pCoexSta->bPanExist = false;
2535 pCoexSta->bA2dpExist = false;
2536 pCoexSta->bHidExist = false;
2537 pCoexSta->bScoExist = false;
2538 } else {
2539 pCoexSta->bBtLinkExist = true;
2540 if (btInfo & BT_INFO_8723B_2ANT_B_FTP)
2541 pCoexSta->bPanExist = true;
2542 else
2543 pCoexSta->bPanExist = false;
2544 if (btInfo & BT_INFO_8723B_2ANT_B_A2DP)
2545 pCoexSta->bA2dpExist = true;
2546 else
2547 pCoexSta->bA2dpExist = false;
2548 if (btInfo & BT_INFO_8723B_2ANT_B_HID)
2549 pCoexSta->bHidExist = true;
2550 else
2551 pCoexSta->bHidExist = false;
2552 if (btInfo & BT_INFO_8723B_2ANT_B_SCO_ESCO)
2553 pCoexSta->bScoExist = true;
2554 else
2555 pCoexSta->bScoExist = false;
2556 }
2557
2558 halbtc8723b2ant_UpdateBtLinkInfo(pBtCoexist);
2559
2560 if (!(btInfo & BT_INFO_8723B_2ANT_B_CONNECTION)) {
2561 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
2562 } else if (btInfo == BT_INFO_8723B_2ANT_B_CONNECTION) {
2563 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE;
2564 } else if (
2565 (btInfo & BT_INFO_8723B_2ANT_B_SCO_ESCO) ||
2566 (btInfo & BT_INFO_8723B_2ANT_B_SCO_BUSY)
2567 ) {
2568 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_SCO_BUSY;
2569 } else if (btInfo & BT_INFO_8723B_2ANT_B_ACL_BUSY) {
2570 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_ACL_BUSY;
2571 } else {
2572 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_MAX;
2573 }
2574
2575 if (
2576 (BT_8723B_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ||
2577 (BT_8723B_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) ||
2578 (BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus)
2579 ) {
2580 bBtBusy = true;
2581 bLimitedDig = true;
2582 } else {
2583 bBtBusy = false;
2584 bLimitedDig = false;
2585 }
2586
2587 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy);
2588
2589 pCoexDm->bLimitedDig = bLimitedDig;
2590 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig);
2591
2592 halbtc8723b2ant_RunCoexistMechanism(pBtCoexist);
2593}
2594
2595void EXhalbtc8723b2ant_HaltNotify(struct btc_coexist *pBtCoexist)
2596{
2597 halbtc8723b2ant_WifiOffHwCfg(pBtCoexist);
2598 pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15);
2599 halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, true);
2600
2601 EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
2602}
2603
2604void EXhalbtc8723b2ant_PnpNotify(struct btc_coexist *pBtCoexist, u8 pnpState)
2605{
2606 if (BTC_WIFI_PNP_SLEEP == pnpState) {
2607 } else if (BTC_WIFI_PNP_WAKE_UP == pnpState) {
2608 halbtc8723b2ant_InitHwConfig(pBtCoexist, false);
2609 halbtc8723b2ant_InitCoexDm(pBtCoexist);
2610 halbtc8723b2ant_QueryBtInfo(pBtCoexist);
2611 }
2612}
2613
2614void EXhalbtc8723b2ant_Periodical(struct btc_coexist *pBtCoexist)
2615{
2616 static u8 disVerInfoCnt;
2617 u32 fwVer = 0, btPatchVer = 0;
2618
2619 if (disVerInfoCnt <= 5) {
2620 disVerInfoCnt += 1;
2621 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer);
2622 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
2623 }
2624
2625 if (
2626 halbtc8723b2ant_IsWifiStatusChanged(pBtCoexist) ||
2627 pCoexDm->bAutoTdmaAdjust
2628 )
2629 halbtc8723b2ant_RunCoexistMechanism(pBtCoexist);
2630}
2631
