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27#include "tmacro.h"
28#include "card.h"
29#include "baseband.h"
30#include "mac.h"
31#include "desc.h"
32#include "rf.h"
33#include "power.h"
34
35
36
37#define C_SIFS_A 16
38#define C_SIFS_BG 10
39
40#define C_EIFS 80
41
42#define C_SLOT_SHORT 9
43#define C_SLOT_LONG 20
44
45#define C_CWMIN_A 15
46#define C_CWMIN_B 31
47
48#define C_CWMAX 1023
49
50#define WAIT_BEACON_TX_DOWN_TMO 3
51
52
53
54static const unsigned short cwRXBCNTSFOff[MAX_RATE] = {
55 17, 17, 17, 17, 34, 23, 17, 11, 8, 5, 4, 3};
56
57
58
59static void s_vCalculateOFDMRParameter(unsigned char byRate, u8 bb_type,
60 unsigned char *pbyTxRate,
61 unsigned char *pbyRsvTime);
62
63
64
65
66
67
68
69
70
71
72
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74
75
76
77
78static void s_vCalculateOFDMRParameter(unsigned char byRate,
79 u8 bb_type,
80 unsigned char *pbyTxRate,
81 unsigned char *pbyRsvTime)
82{
83 switch (byRate) {
84 case RATE_6M:
85 if (bb_type == BB_TYPE_11A) {
86 *pbyTxRate = 0x9B;
87 *pbyRsvTime = 44;
88 } else {
89 *pbyTxRate = 0x8B;
90 *pbyRsvTime = 50;
91 }
92 break;
93
94 case RATE_9M:
95 if (bb_type == BB_TYPE_11A) {
96 *pbyTxRate = 0x9F;
97 *pbyRsvTime = 36;
98 } else {
99 *pbyTxRate = 0x8F;
100 *pbyRsvTime = 42;
101 }
102 break;
103
104 case RATE_12M:
105 if (bb_type == BB_TYPE_11A) {
106 *pbyTxRate = 0x9A;
107 *pbyRsvTime = 32;
108 } else {
109 *pbyTxRate = 0x8A;
110 *pbyRsvTime = 38;
111 }
112 break;
113
114 case RATE_18M:
115 if (bb_type == BB_TYPE_11A) {
116 *pbyTxRate = 0x9E;
117 *pbyRsvTime = 28;
118 } else {
119 *pbyTxRate = 0x8E;
120 *pbyRsvTime = 34;
121 }
122 break;
123
124 case RATE_36M:
125 if (bb_type == BB_TYPE_11A) {
126 *pbyTxRate = 0x9D;
127 *pbyRsvTime = 24;
128 } else {
129 *pbyTxRate = 0x8D;
130 *pbyRsvTime = 30;
131 }
132 break;
133
134 case RATE_48M:
135 if (bb_type == BB_TYPE_11A) {
136 *pbyTxRate = 0x98;
137 *pbyRsvTime = 24;
138 } else {
139 *pbyTxRate = 0x88;
140 *pbyRsvTime = 30;
141 }
142 break;
143
144 case RATE_54M:
145 if (bb_type == BB_TYPE_11A) {
146 *pbyTxRate = 0x9C;
147 *pbyRsvTime = 24;
148 } else {
149 *pbyTxRate = 0x8C;
150 *pbyRsvTime = 30;
151 }
152 break;
153
154 case RATE_24M:
155 default:
156 if (bb_type == BB_TYPE_11A) {
157 *pbyTxRate = 0x99;
158 *pbyRsvTime = 28;
159 } else {
160 *pbyTxRate = 0x89;
161 *pbyRsvTime = 34;
162 }
163 break;
164 }
165}
166
167
168
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170
171
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178
179
180bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type)
181{
182 unsigned char byCWMaxMin = 0;
183 unsigned char bySlot = 0;
184 unsigned char bySIFS = 0;
185 unsigned char byDIFS = 0;
186 unsigned char byData;
187 int i;
188
189
190 if (bb_type == BB_TYPE_11A) {
191 if (priv->byRFType == RF_AIROHA7230) {
192
193 MACvSetBBType(priv->PortOffset, BB_TYPE_11G);
194 priv->abyBBVGA[0] = 0x20;
195 priv->abyBBVGA[2] = 0x10;
196 priv->abyBBVGA[3] = 0x10;
197 bb_read_embedded(priv, 0xE7, &byData);
198 if (byData == 0x1C)
199 bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);
200
201 } else if (priv->byRFType == RF_UW2452) {
202 MACvSetBBType(priv->PortOffset, BB_TYPE_11A);
203 priv->abyBBVGA[0] = 0x18;
204 bb_read_embedded(priv, 0xE7, &byData);
205 if (byData == 0x14) {
206 bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);
207 bb_write_embedded(priv, 0xE1, 0x57);
208 }
209 } else {
210 MACvSetBBType(priv->PortOffset, BB_TYPE_11A);
211 }
212 bb_write_embedded(priv, 0x88, 0x03);
213 bySlot = C_SLOT_SHORT;
214 bySIFS = C_SIFS_A;
215 byDIFS = C_SIFS_A + 2 * C_SLOT_SHORT;
216 byCWMaxMin = 0xA4;
217 } else if (bb_type == BB_TYPE_11B) {
218 MACvSetBBType(priv->PortOffset, BB_TYPE_11B);
219 if (priv->byRFType == RF_AIROHA7230) {
220 priv->abyBBVGA[0] = 0x1C;
221 priv->abyBBVGA[2] = 0x00;
222 priv->abyBBVGA[3] = 0x00;
223 bb_read_embedded(priv, 0xE7, &byData);
224 if (byData == 0x20)
225 bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);
226
227 } else if (priv->byRFType == RF_UW2452) {
228 priv->abyBBVGA[0] = 0x14;
229 bb_read_embedded(priv, 0xE7, &byData);
230 if (byData == 0x18) {
231 bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);
232 bb_write_embedded(priv, 0xE1, 0xD3);
233 }
234 }
235 bb_write_embedded(priv, 0x88, 0x02);
236 bySlot = C_SLOT_LONG;
237 bySIFS = C_SIFS_BG;
238 byDIFS = C_SIFS_BG + 2 * C_SLOT_LONG;
239 byCWMaxMin = 0xA5;
240 } else {
241 MACvSetBBType(priv->PortOffset, BB_TYPE_11G);
242 if (priv->byRFType == RF_AIROHA7230) {
243 priv->abyBBVGA[0] = 0x1C;
244 priv->abyBBVGA[2] = 0x00;
245 priv->abyBBVGA[3] = 0x00;
246 bb_read_embedded(priv, 0xE7, &byData);
247 if (byData == 0x20)
248 bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);
249
250 } else if (priv->byRFType == RF_UW2452) {
251 priv->abyBBVGA[0] = 0x14;
252 bb_read_embedded(priv, 0xE7, &byData);
253 if (byData == 0x18) {
254 bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);
255 bb_write_embedded(priv, 0xE1, 0xD3);
256 }
257 }
258 bb_write_embedded(priv, 0x88, 0x08);
259 bySIFS = C_SIFS_BG;
260
261 if (priv->bShortSlotTime) {
262 bySlot = C_SLOT_SHORT;
263 byDIFS = C_SIFS_BG + 2 * C_SLOT_SHORT;
264 } else {
265 bySlot = C_SLOT_LONG;
266 byDIFS = C_SIFS_BG + 2 * C_SLOT_LONG;
267 }
268
269 byCWMaxMin = 0xa4;
270
271 for (i = RATE_54M; i >= RATE_6M; i--) {
272 if (priv->basic_rates & ((u32)(0x1 << i))) {
273 byCWMaxMin |= 0x1;
274 break;
275 }
276 }
277 }
278
279 if (priv->byRFType == RF_RFMD2959) {
280
281
282
283
284 bySIFS -= 3;
285 byDIFS -= 3;
286
287
288
289
290
291 }
292
293 if (priv->bySIFS != bySIFS) {
294 priv->bySIFS = bySIFS;
295 VNSvOutPortB(priv->PortOffset + MAC_REG_SIFS, priv->bySIFS);
296 }
297 if (priv->byDIFS != byDIFS) {
298 priv->byDIFS = byDIFS;
299 VNSvOutPortB(priv->PortOffset + MAC_REG_DIFS, priv->byDIFS);
300 }
301 if (priv->byEIFS != C_EIFS) {
302 priv->byEIFS = C_EIFS;
303 VNSvOutPortB(priv->PortOffset + MAC_REG_EIFS, priv->byEIFS);
304 }
305 if (priv->bySlot != bySlot) {
306 priv->bySlot = bySlot;
307 VNSvOutPortB(priv->PortOffset + MAC_REG_SLOT, priv->bySlot);
308
309 bb_set_short_slot_time(priv);
310 }
311 if (priv->byCWMaxMin != byCWMaxMin) {
312 priv->byCWMaxMin = byCWMaxMin;
313 VNSvOutPortB(priv->PortOffset + MAC_REG_CWMAXMIN0,
314 priv->byCWMaxMin);
315 }
316
317 priv->byPacketType = CARDbyGetPktType(priv);
318
319 CARDvSetRSPINF(priv, bb_type);
320
321 return true;
322}
323
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338
339bool CARDbUpdateTSF(struct vnt_private *priv, unsigned char byRxRate,
340 u64 qwBSSTimestamp)
341{
342 u64 local_tsf;
343 u64 qwTSFOffset = 0;
344
345 CARDbGetCurrentTSF(priv, &local_tsf);
346
347 if (qwBSSTimestamp != local_tsf) {
348 qwTSFOffset = CARDqGetTSFOffset(byRxRate, qwBSSTimestamp,
349 local_tsf);
350
351 VNSvOutPortD(priv->PortOffset + MAC_REG_TSFOFST,
352 (u32)qwTSFOffset);
353 VNSvOutPortD(priv->PortOffset + MAC_REG_TSFOFST + 4,
354 (u32)(qwTSFOffset >> 32));
355 MACvRegBitsOn(priv->PortOffset, MAC_REG_TFTCTL,
356 TFTCTL_TSFSYNCEN);
357 }
358 return true;
359}
360
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373
374bool CARDbSetBeaconPeriod(struct vnt_private *priv,
375 unsigned short wBeaconInterval)
376{
377 u64 qwNextTBTT = 0;
378
379 CARDbGetCurrentTSF(priv, &qwNextTBTT);
380
381 qwNextTBTT = CARDqGetNextTBTT(qwNextTBTT, wBeaconInterval);
382
383
384 VNSvOutPortW(priv->PortOffset + MAC_REG_BI, wBeaconInterval);
385 priv->wBeaconInterval = wBeaconInterval;
386
387 VNSvOutPortD(priv->PortOffset + MAC_REG_NEXTTBTT, (u32)qwNextTBTT);
388 VNSvOutPortD(priv->PortOffset + MAC_REG_NEXTTBTT + 4,
389 (u32)(qwNextTBTT >> 32));
390 MACvRegBitsOn(priv->PortOffset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
391
392 return true;
393}
394
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402
403
404
405void CARDbRadioPowerOff(struct vnt_private *priv)
406{
407 if (priv->bRadioOff)
408 return;
409
410 switch (priv->byRFType) {
411 case RF_RFMD2959:
412 MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL,
413 SOFTPWRCTL_TXPEINV);
414 MACvWordRegBitsOn(priv->PortOffset, MAC_REG_SOFTPWRCTL,
415 SOFTPWRCTL_SWPE1);
416 break;
417
418 case RF_AIROHA:
419 case RF_AL2230S:
420 case RF_AIROHA7230:
421 MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL,
422 SOFTPWRCTL_SWPE2);
423 MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL,
424 SOFTPWRCTL_SWPE3);
425 break;
426 }
427
428 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_RXON);
429
430 bb_set_deep_sleep(priv, priv->byLocalID);
431
432 priv->bRadioOff = true;
433 pr_debug("chester power off\n");
434 MACvRegBitsOn(priv->PortOffset, MAC_REG_GPIOCTL0,
435 LED_ACTSET);
436}
437
438void CARDvSafeResetTx(struct vnt_private *priv)
439{
440 unsigned int uu;
441 struct vnt_tx_desc *pCurrTD;
442
443
444 priv->apTailTD[0] = &priv->apTD0Rings[0];
445 priv->apCurrTD[0] = &priv->apTD0Rings[0];
446
447 priv->apTailTD[1] = &priv->apTD1Rings[0];
448 priv->apCurrTD[1] = &priv->apTD1Rings[0];
449
450 for (uu = 0; uu < TYPE_MAXTD; uu++)
451 priv->iTDUsed[uu] = 0;
452
453 for (uu = 0; uu < priv->opts.tx_descs[0]; uu++) {
454 pCurrTD = &priv->apTD0Rings[uu];
455 pCurrTD->td0.owner = OWNED_BY_HOST;
456
457 }
458 for (uu = 0; uu < priv->opts.tx_descs[1]; uu++) {
459 pCurrTD = &priv->apTD1Rings[uu];
460 pCurrTD->td0.owner = OWNED_BY_HOST;
461
462 }
463
464
465 MACvSetCurrTXDescAddr(TYPE_TXDMA0, priv, priv->td0_pool_dma);
466
467 MACvSetCurrTXDescAddr(TYPE_AC0DMA, priv, priv->td1_pool_dma);
468
469
470 MACvSetCurrBCNTxDescAddr(priv->PortOffset,
471 (priv->tx_beacon_dma));
472}
473
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483
484
485
486void CARDvSafeResetRx(struct vnt_private *priv)
487{
488 unsigned int uu;
489 struct vnt_rx_desc *pDesc;
490
491
492 priv->pCurrRD[0] = &priv->aRD0Ring[0];
493 priv->pCurrRD[1] = &priv->aRD1Ring[0];
494
495
496 for (uu = 0; uu < priv->opts.rx_descs0; uu++) {
497 pDesc = &priv->aRD0Ring[uu];
498 pDesc->rd0.res_count = cpu_to_le16(priv->rx_buf_sz);
499 pDesc->rd0.owner = OWNED_BY_NIC;
500 pDesc->rd1.req_count = cpu_to_le16(priv->rx_buf_sz);
501 }
502
503
504 for (uu = 0; uu < priv->opts.rx_descs1; uu++) {
505 pDesc = &priv->aRD1Ring[uu];
506 pDesc->rd0.res_count = cpu_to_le16(priv->rx_buf_sz);
507 pDesc->rd0.owner = OWNED_BY_NIC;
508 pDesc->rd1.req_count = cpu_to_le16(priv->rx_buf_sz);
509 }
510
511
512 MACvRx0PerPktMode(priv->PortOffset);
513 MACvRx1PerPktMode(priv->PortOffset);
514
515 MACvSetCurrRx0DescAddr(priv, priv->rd0_pool_dma);
516
517 MACvSetCurrRx1DescAddr(priv, priv->rd1_pool_dma);
518}
519
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531
532static unsigned short CARDwGetCCKControlRate(struct vnt_private *priv,
533 unsigned short wRateIdx)
534{
535 unsigned int ui = (unsigned int)wRateIdx;
536
537 while (ui > RATE_1M) {
538 if (priv->basic_rates & ((u32)0x1 << ui))
539 return (unsigned short)ui;
540
541 ui--;
542 }
543 return (unsigned short)RATE_1M;
544}
545
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555
556
557
558static unsigned short CARDwGetOFDMControlRate(struct vnt_private *priv,
559 unsigned short wRateIdx)
560{
561 unsigned int ui = (unsigned int)wRateIdx;
562
563 pr_debug("BASIC RATE: %X\n", priv->basic_rates);
564
565 if (!CARDbIsOFDMinBasicRate((void *)priv)) {
566 pr_debug("%s:(NO OFDM) %d\n", __func__, wRateIdx);
567 if (wRateIdx > RATE_24M)
568 wRateIdx = RATE_24M;
569 return wRateIdx;
570 }
571 while (ui > RATE_11M) {
572 if (priv->basic_rates & ((u32)0x1 << ui)) {
573 pr_debug("%s : %d\n", __func__, ui);
574 return (unsigned short)ui;
575 }
576 ui--;
577 }
578 pr_debug("%s: 6M\n", __func__);
579 return (unsigned short)RATE_24M;
580}
581
582
583
584
585
586
587
588
589
590
591
592
593void CARDvSetRSPINF(struct vnt_private *priv, u8 bb_type)
594{
595 union vnt_phy_field_swap phy;
596 unsigned char byTxRate, byRsvTime;
597 unsigned long flags;
598
599 spin_lock_irqsave(&priv->lock, flags);
600
601
602 MACvSelectPage1(priv->PortOffset);
603
604
605 vnt_get_phy_field(priv, 14,
606 CARDwGetCCKControlRate(priv, RATE_1M),
607 PK_TYPE_11B, &phy.field_read);
608
609
610 swap(phy.swap[0], phy.swap[1]);
611
612 VNSvOutPortD(priv->PortOffset + MAC_REG_RSPINF_B_1, phy.field_write);
613
614
615 vnt_get_phy_field(priv, 14,
616 CARDwGetCCKControlRate(priv, RATE_2M),
617 PK_TYPE_11B, &phy.field_read);
618
619 swap(phy.swap[0], phy.swap[1]);
620
621 VNSvOutPortD(priv->PortOffset + MAC_REG_RSPINF_B_2, phy.field_write);
622
623
624 vnt_get_phy_field(priv, 14,
625 CARDwGetCCKControlRate(priv, RATE_5M),
626 PK_TYPE_11B, &phy.field_read);
627
628 swap(phy.swap[0], phy.swap[1]);
629
630 VNSvOutPortD(priv->PortOffset + MAC_REG_RSPINF_B_5, phy.field_write);
631
632
633 vnt_get_phy_field(priv, 14,
634 CARDwGetCCKControlRate(priv, RATE_11M),
635 PK_TYPE_11B, &phy.field_read);
636
637 swap(phy.swap[0], phy.swap[1]);
638
639 VNSvOutPortD(priv->PortOffset + MAC_REG_RSPINF_B_11, phy.field_write);
640
641
642 s_vCalculateOFDMRParameter(RATE_6M,
643 bb_type,
644 &byTxRate,
645 &byRsvTime);
646 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_6,
647 MAKEWORD(byTxRate, byRsvTime));
648
649 s_vCalculateOFDMRParameter(RATE_9M,
650 bb_type,
651 &byTxRate,
652 &byRsvTime);
653 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_9,
654 MAKEWORD(byTxRate, byRsvTime));
655
656 s_vCalculateOFDMRParameter(RATE_12M,
657 bb_type,
658 &byTxRate,
659 &byRsvTime);
660 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_12,
661 MAKEWORD(byTxRate, byRsvTime));
662
663 s_vCalculateOFDMRParameter(RATE_18M,
664 bb_type,
665 &byTxRate,
666 &byRsvTime);
667 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_18,
668 MAKEWORD(byTxRate, byRsvTime));
669
670 s_vCalculateOFDMRParameter(RATE_24M,
671 bb_type,
672 &byTxRate,
673 &byRsvTime);
674 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_24,
675 MAKEWORD(byTxRate, byRsvTime));
676
677 s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
678 RATE_36M),
679 bb_type,
680 &byTxRate,
681 &byRsvTime);
682 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_36,
683 MAKEWORD(byTxRate, byRsvTime));
684
685 s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
686 RATE_48M),
687 bb_type,
688 &byTxRate,
689 &byRsvTime);
690 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_48,
691 MAKEWORD(byTxRate, byRsvTime));
692
693 s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
694 RATE_54M),
695 bb_type,
696 &byTxRate,
697 &byRsvTime);
698 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_54,
699 MAKEWORD(byTxRate, byRsvTime));
700
701 s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
702 RATE_54M),
703 bb_type,
704 &byTxRate,
705 &byRsvTime);
706 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_72,
707 MAKEWORD(byTxRate, byRsvTime));
708
709 MACvSelectPage0(priv->PortOffset);
710
711 spin_unlock_irqrestore(&priv->lock, flags);
712}
713
714void CARDvUpdateBasicTopRate(struct vnt_private *priv)
715{
716 unsigned char byTopOFDM = RATE_24M, byTopCCK = RATE_1M;
717 unsigned char ii;
718
719
720 for (ii = RATE_54M; ii >= RATE_6M; ii--) {
721 if ((priv->basic_rates) & ((u32)(1 << ii))) {
722 byTopOFDM = ii;
723 break;
724 }
725 }
726 priv->byTopOFDMBasicRate = byTopOFDM;
727
728 for (ii = RATE_11M;; ii--) {
729 if ((priv->basic_rates) & ((u32)(1 << ii))) {
730 byTopCCK = ii;
731 break;
732 }
733 if (ii == RATE_1M)
734 break;
735 }
736 priv->byTopCCKBasicRate = byTopCCK;
737}
738
739bool CARDbIsOFDMinBasicRate(struct vnt_private *priv)
740{
741 int ii;
742
743 for (ii = RATE_54M; ii >= RATE_6M; ii--) {
744 if ((priv->basic_rates) & ((u32)BIT(ii)))
745 return true;
746 }
747 return false;
748}
749
750unsigned char CARDbyGetPktType(struct vnt_private *priv)
751{
752 if (priv->byBBType == BB_TYPE_11A || priv->byBBType == BB_TYPE_11B)
753 return (unsigned char)priv->byBBType;
754 else if (CARDbIsOFDMinBasicRate((void *)priv))
755 return PK_TYPE_11GA;
756 else
757 return PK_TYPE_11GB;
758}
759
760
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764
765
766
767
768
769
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771
772
773
774u64 CARDqGetTSFOffset(unsigned char byRxRate, u64 qwTSF1, u64 qwTSF2)
775{
776 unsigned short wRxBcnTSFOffst;
777
778 wRxBcnTSFOffst = cwRXBCNTSFOff[byRxRate % MAX_RATE];
779
780 qwTSF2 += (u64)wRxBcnTSFOffst;
781
782 return qwTSF1 - qwTSF2;
783}
784
785
786
787
788
789
790
791
792
793
794
795
796
797bool CARDbGetCurrentTSF(struct vnt_private *priv, u64 *pqwCurrTSF)
798{
799 void __iomem *iobase = priv->PortOffset;
800 unsigned short ww;
801 unsigned char byData;
802
803 MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TSFCNTRRD);
804 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
805 VNSvInPortB(iobase + MAC_REG_TFTCTL, &byData);
806 if (!(byData & TFTCTL_TSFCNTRRD))
807 break;
808 }
809 if (ww == W_MAX_TIMEOUT)
810 return false;
811 VNSvInPortD(iobase + MAC_REG_TSFCNTR, (u32 *)pqwCurrTSF);
812 VNSvInPortD(iobase + MAC_REG_TSFCNTR + 4, (u32 *)pqwCurrTSF + 1);
813
814 return true;
815}
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830u64 CARDqGetNextTBTT(u64 qwTSF, unsigned short wBeaconInterval)
831{
832 u32 beacon_int;
833
834 beacon_int = wBeaconInterval * 1024;
835 if (beacon_int) {
836 do_div(qwTSF, beacon_int);
837 qwTSF += 1;
838 qwTSF *= beacon_int;
839 }
840
841 return qwTSF;
842}
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857void CARDvSetFirstNextTBTT(struct vnt_private *priv,
858 unsigned short wBeaconInterval)
859{
860 void __iomem *iobase = priv->PortOffset;
861 u64 qwNextTBTT = 0;
862
863 CARDbGetCurrentTSF(priv, &qwNextTBTT);
864
865 qwNextTBTT = CARDqGetNextTBTT(qwNextTBTT, wBeaconInterval);
866
867 VNSvOutPortD(iobase + MAC_REG_NEXTTBTT, (u32)qwNextTBTT);
868 VNSvOutPortD(iobase + MAC_REG_NEXTTBTT + 4, (u32)(qwNextTBTT >> 32));
869 MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
870}
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886void CARDvUpdateNextTBTT(struct vnt_private *priv, u64 qwTSF,
887 unsigned short wBeaconInterval)
888{
889 void __iomem *iobase = priv->PortOffset;
890
891 qwTSF = CARDqGetNextTBTT(qwTSF, wBeaconInterval);
892
893 VNSvOutPortD(iobase + MAC_REG_NEXTTBTT, (u32)qwTSF);
894 VNSvOutPortD(iobase + MAC_REG_NEXTTBTT + 4, (u32)(qwTSF >> 32));
895 MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
896 pr_debug("Card:Update Next TBTT[%8llx]\n", qwTSF);
897}
898