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34#include <linux/file.h>
35#include "device.h"
36#include "card.h"
37#include "channel.h"
38#include "baseband.h"
39#include "mac.h"
40#include "power.h"
41#include "rxtx.h"
42#include "dpc.h"
43#include "rf.h"
44#include <linux/delay.h>
45#include <linux/kthread.h>
46#include <linux/slab.h>
47
48
49
50
51
52MODULE_AUTHOR("VIA Networking Technologies, Inc., <lyndonchen@vntek.com.tw>");
53MODULE_LICENSE("GPL");
54MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver");
55
56#define DEVICE_PARAM(N, D)
57
58#define RX_DESC_MIN0 16
59#define RX_DESC_MAX0 128
60#define RX_DESC_DEF0 32
61DEVICE_PARAM(RxDescriptors0, "Number of receive descriptors0");
62
63#define RX_DESC_MIN1 16
64#define RX_DESC_MAX1 128
65#define RX_DESC_DEF1 32
66DEVICE_PARAM(RxDescriptors1, "Number of receive descriptors1");
67
68#define TX_DESC_MIN0 16
69#define TX_DESC_MAX0 128
70#define TX_DESC_DEF0 32
71DEVICE_PARAM(TxDescriptors0, "Number of transmit descriptors0");
72
73#define TX_DESC_MIN1 16
74#define TX_DESC_MAX1 128
75#define TX_DESC_DEF1 64
76DEVICE_PARAM(TxDescriptors1, "Number of transmit descriptors1");
77
78#define INT_WORKS_DEF 20
79#define INT_WORKS_MIN 10
80#define INT_WORKS_MAX 64
81
82DEVICE_PARAM(int_works, "Number of packets per interrupt services");
83
84#define RTS_THRESH_DEF 2347
85
86#define FRAG_THRESH_DEF 2346
87
88#define SHORT_RETRY_MIN 0
89#define SHORT_RETRY_MAX 31
90#define SHORT_RETRY_DEF 8
91
92DEVICE_PARAM(ShortRetryLimit, "Short frame retry limits");
93
94#define LONG_RETRY_MIN 0
95#define LONG_RETRY_MAX 15
96#define LONG_RETRY_DEF 4
97
98DEVICE_PARAM(LongRetryLimit, "long frame retry limits");
99
100
101
102
103
104
105#define BBP_TYPE_MIN 0
106#define BBP_TYPE_MAX 2
107#define BBP_TYPE_DEF 2
108
109DEVICE_PARAM(BasebandType, "baseband type");
110
111
112
113
114static const struct pci_device_id vt6655_pci_id_table[] = {
115 { PCI_VDEVICE(VIA, 0x3253) },
116 { 0, }
117};
118
119
120
121static int vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent);
122static void device_free_info(struct vnt_private *priv);
123static void device_print_info(struct vnt_private *priv);
124
125static int device_init_rd0_ring(struct vnt_private *priv);
126static int device_init_rd1_ring(struct vnt_private *priv);
127static int device_init_td0_ring(struct vnt_private *priv);
128static int device_init_td1_ring(struct vnt_private *priv);
129
130static int device_rx_srv(struct vnt_private *priv, unsigned int idx);
131static int device_tx_srv(struct vnt_private *priv, unsigned int idx);
132static bool device_alloc_rx_buf(struct vnt_private *, struct vnt_rx_desc *);
133static void device_free_rx_buf(struct vnt_private *priv,
134 struct vnt_rx_desc *rd);
135static void device_init_registers(struct vnt_private *priv);
136static void device_free_tx_buf(struct vnt_private *, struct vnt_tx_desc *);
137static void device_free_td0_ring(struct vnt_private *priv);
138static void device_free_td1_ring(struct vnt_private *priv);
139static void device_free_rd0_ring(struct vnt_private *priv);
140static void device_free_rd1_ring(struct vnt_private *priv);
141static void device_free_rings(struct vnt_private *priv);
142
143
144
145
146
147static void vt6655_remove(struct pci_dev *pcid)
148{
149 struct vnt_private *priv = pci_get_drvdata(pcid);
150
151 if (!priv)
152 return;
153 device_free_info(priv);
154}
155
156static void device_get_options(struct vnt_private *priv)
157{
158 struct vnt_options *opts = &priv->opts;
159
160 opts->rx_descs0 = RX_DESC_DEF0;
161 opts->rx_descs1 = RX_DESC_DEF1;
162 opts->tx_descs[0] = TX_DESC_DEF0;
163 opts->tx_descs[1] = TX_DESC_DEF1;
164 opts->int_works = INT_WORKS_DEF;
165
166 opts->short_retry = SHORT_RETRY_DEF;
167 opts->long_retry = LONG_RETRY_DEF;
168 opts->bbp_type = BBP_TYPE_DEF;
169}
170
171static void
172device_set_options(struct vnt_private *priv)
173{
174 priv->byShortRetryLimit = priv->opts.short_retry;
175 priv->byLongRetryLimit = priv->opts.long_retry;
176 priv->byBBType = priv->opts.bbp_type;
177 priv->byPacketType = priv->byBBType;
178 priv->byAutoFBCtrl = AUTO_FB_0;
179 priv->bUpdateBBVGA = true;
180 priv->byPreambleType = 0;
181
182 pr_debug(" byShortRetryLimit= %d\n", (int)priv->byShortRetryLimit);
183 pr_debug(" byLongRetryLimit= %d\n", (int)priv->byLongRetryLimit);
184 pr_debug(" byPreambleType= %d\n", (int)priv->byPreambleType);
185 pr_debug(" byShortPreamble= %d\n", (int)priv->byShortPreamble);
186 pr_debug(" byBBType= %d\n", (int)priv->byBBType);
187}
188
189
190
191
192
193static void device_init_registers(struct vnt_private *priv)
194{
195 unsigned long flags;
196 unsigned int ii;
197 unsigned char byValue;
198 unsigned char byCCKPwrdBm = 0;
199 unsigned char byOFDMPwrdBm = 0;
200
201 MACbShutdown(priv);
202 bb_software_reset(priv);
203
204
205 MACbSoftwareReset(priv);
206
207 priv->bAES = false;
208
209
210 priv->bProtectMode = false;
211
212 priv->bNonERPPresent = false;
213 priv->bBarkerPreambleMd = false;
214 priv->wCurrentRate = RATE_1M;
215 priv->byTopOFDMBasicRate = RATE_24M;
216 priv->byTopCCKBasicRate = RATE_1M;
217
218
219 MACvInitialize(priv);
220
221
222 VNSvInPortB(priv->PortOffset + MAC_REG_LOCALID, &priv->byLocalID);
223
224 spin_lock_irqsave(&priv->lock, flags);
225
226 SROMvReadAllContents(priv->PortOffset, priv->abyEEPROM);
227
228 spin_unlock_irqrestore(&priv->lock, flags);
229
230
231 priv->byMinChannel = 1;
232 priv->byMaxChannel = CB_MAX_CHANNEL;
233
234
235 byValue = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_ANTENNA);
236 if (byValue & EEP_ANTINV)
237 priv->bTxRxAntInv = true;
238 else
239 priv->bTxRxAntInv = false;
240
241 byValue &= (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
242
243 if (byValue == 0)
244 byValue = (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
245
246 if (byValue == (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN)) {
247 priv->byAntennaCount = 2;
248 priv->byTxAntennaMode = ANT_B;
249 priv->dwTxAntennaSel = 1;
250 priv->dwRxAntennaSel = 1;
251
252 if (priv->bTxRxAntInv)
253 priv->byRxAntennaMode = ANT_A;
254 else
255 priv->byRxAntennaMode = ANT_B;
256 } else {
257 priv->byAntennaCount = 1;
258 priv->dwTxAntennaSel = 0;
259 priv->dwRxAntennaSel = 0;
260
261 if (byValue & EEP_ANTENNA_AUX) {
262 priv->byTxAntennaMode = ANT_A;
263
264 if (priv->bTxRxAntInv)
265 priv->byRxAntennaMode = ANT_B;
266 else
267 priv->byRxAntennaMode = ANT_A;
268 } else {
269 priv->byTxAntennaMode = ANT_B;
270
271 if (priv->bTxRxAntInv)
272 priv->byRxAntennaMode = ANT_A;
273 else
274 priv->byRxAntennaMode = ANT_B;
275 }
276 }
277
278
279 bb_set_tx_antenna_mode(priv, priv->byTxAntennaMode);
280 bb_set_rx_antenna_mode(priv, priv->byRxAntennaMode);
281
282
283 priv->byOriginalZonetype = priv->abyEEPROM[EEP_OFS_ZONETYPE];
284
285 if (!priv->bZoneRegExist)
286 priv->byZoneType = priv->abyEEPROM[EEP_OFS_ZONETYPE];
287
288 pr_debug("priv->byZoneType = %x\n", priv->byZoneType);
289
290
291 RFbInit(priv);
292
293
294 priv->byCurPwr = 0xFF;
295 priv->byCCKPwr = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_PWR_CCK);
296 priv->byOFDMPwrG = SROMbyReadEmbedded(priv->PortOffset,
297 EEP_OFS_PWR_OFDMG);
298
299
300 for (ii = 0; ii < CB_MAX_CHANNEL_24G; ii++) {
301 priv->abyCCKPwrTbl[ii + 1] =
302 SROMbyReadEmbedded(priv->PortOffset,
303 (unsigned char)(ii + EEP_OFS_CCK_PWR_TBL));
304 if (priv->abyCCKPwrTbl[ii + 1] == 0)
305 priv->abyCCKPwrTbl[ii + 1] = priv->byCCKPwr;
306
307 priv->abyOFDMPwrTbl[ii + 1] =
308 SROMbyReadEmbedded(priv->PortOffset,
309 (unsigned char)(ii + EEP_OFS_OFDM_PWR_TBL));
310 if (priv->abyOFDMPwrTbl[ii + 1] == 0)
311 priv->abyOFDMPwrTbl[ii + 1] = priv->byOFDMPwrG;
312
313 priv->abyCCKDefaultPwr[ii + 1] = byCCKPwrdBm;
314 priv->abyOFDMDefaultPwr[ii + 1] = byOFDMPwrdBm;
315 }
316
317
318 for (ii = 11; ii < 14; ii++) {
319 priv->abyCCKPwrTbl[ii] = priv->abyCCKPwrTbl[10];
320 priv->abyOFDMPwrTbl[ii] = priv->abyOFDMPwrTbl[10];
321 }
322
323
324 for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) {
325 priv->abyOFDMPwrTbl[ii + CB_MAX_CHANNEL_24G + 1] =
326 SROMbyReadEmbedded(priv->PortOffset,
327 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_TBL));
328
329 priv->abyOFDMDefaultPwr[ii + CB_MAX_CHANNEL_24G + 1] =
330 SROMbyReadEmbedded(priv->PortOffset,
331 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_dBm));
332 }
333
334 if (priv->byLocalID > REV_ID_VT3253_B1) {
335 MACvSelectPage1(priv->PortOffset);
336
337 VNSvOutPortB(priv->PortOffset + MAC_REG_MSRCTL + 1,
338 (MSRCTL1_TXPWR | MSRCTL1_CSAPAREN));
339
340 MACvSelectPage0(priv->PortOffset);
341 }
342
343
344 MACvWordRegBitsOn(priv->PortOffset,
345 MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT));
346
347
348 MACvSetShortRetryLimit(priv, priv->byShortRetryLimit);
349 MACvSetLongRetryLimit(priv, priv->byLongRetryLimit);
350
351
352 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
353
354 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
355
356
357 bb_vt3253_init(priv);
358
359 if (priv->bUpdateBBVGA) {
360 priv->byBBVGACurrent = priv->abyBBVGA[0];
361 priv->byBBVGANew = priv->byBBVGACurrent;
362 bb_set_vga_gain_offset(priv, priv->abyBBVGA[0]);
363 }
364
365 bb_set_rx_antenna_mode(priv, priv->byRxAntennaMode);
366 bb_set_tx_antenna_mode(priv, priv->byTxAntennaMode);
367
368
369
370 priv->wCurrentRate = RATE_54M;
371
372 priv->bRadioOff = false;
373
374 priv->byRadioCtl = SROMbyReadEmbedded(priv->PortOffset,
375 EEP_OFS_RADIOCTL);
376 priv->bHWRadioOff = false;
377
378 if (priv->byRadioCtl & EEP_RADIOCTL_ENABLE) {
379
380 MACvGPIOIn(priv->PortOffset, &priv->byGPIO);
381
382 if (((priv->byGPIO & GPIO0_DATA) &&
383 !(priv->byRadioCtl & EEP_RADIOCTL_INV)) ||
384 (!(priv->byGPIO & GPIO0_DATA) &&
385 (priv->byRadioCtl & EEP_RADIOCTL_INV)))
386 priv->bHWRadioOff = true;
387 }
388
389 if (priv->bHWRadioOff || priv->bRadioControlOff)
390 CARDbRadioPowerOff(priv);
391
392
393 SROMvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr);
394 pr_debug("Network address = %pM\n", priv->abyCurrentNetAddr);
395
396
397 CARDvSafeResetRx(priv);
398
399 CARDvSafeResetTx(priv);
400
401 if (priv->byLocalID <= REV_ID_VT3253_A1)
402 MACvRegBitsOn(priv->PortOffset, MAC_REG_RCR, RCR_WPAERR);
403
404
405 MACvReceive0(priv->PortOffset);
406 MACvReceive1(priv->PortOffset);
407
408
409 MACvStart(priv->PortOffset);
410}
411
412static void device_print_info(struct vnt_private *priv)
413{
414 dev_info(&priv->pcid->dev, "MAC=%pM IO=0x%lx Mem=0x%lx IRQ=%d\n",
415 priv->abyCurrentNetAddr, (unsigned long)priv->ioaddr,
416 (unsigned long)priv->PortOffset, priv->pcid->irq);
417}
418
419static void device_free_info(struct vnt_private *priv)
420{
421 if (!priv)
422 return;
423
424 if (priv->mac_hw)
425 ieee80211_unregister_hw(priv->hw);
426
427 if (priv->PortOffset)
428 iounmap(priv->PortOffset);
429
430 if (priv->pcid)
431 pci_release_regions(priv->pcid);
432
433 if (priv->hw)
434 ieee80211_free_hw(priv->hw);
435}
436
437static bool device_init_rings(struct vnt_private *priv)
438{
439 void *vir_pool;
440
441
442 vir_pool = dma_alloc_coherent(&priv->pcid->dev,
443 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
444 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
445 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
446 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
447 &priv->pool_dma, GFP_ATOMIC);
448 if (!vir_pool) {
449 dev_err(&priv->pcid->dev, "allocate desc dma memory failed\n");
450 return false;
451 }
452
453 priv->aRD0Ring = vir_pool;
454 priv->aRD1Ring = vir_pool +
455 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc);
456
457 priv->rd0_pool_dma = priv->pool_dma;
458 priv->rd1_pool_dma = priv->rd0_pool_dma +
459 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc);
460
461 priv->tx0_bufs = dma_alloc_coherent(&priv->pcid->dev,
462 priv->opts.tx_descs[0] * PKT_BUF_SZ +
463 priv->opts.tx_descs[1] * PKT_BUF_SZ +
464 CB_BEACON_BUF_SIZE +
465 CB_MAX_BUF_SIZE,
466 &priv->tx_bufs_dma0, GFP_ATOMIC);
467 if (!priv->tx0_bufs) {
468 dev_err(&priv->pcid->dev, "allocate buf dma memory failed\n");
469
470 dma_free_coherent(&priv->pcid->dev,
471 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
472 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
473 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
474 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
475 vir_pool, priv->pool_dma);
476 return false;
477 }
478
479 priv->td0_pool_dma = priv->rd1_pool_dma +
480 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc);
481
482 priv->td1_pool_dma = priv->td0_pool_dma +
483 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc);
484
485
486 priv->apTD0Rings = vir_pool
487 + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc)
488 + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc);
489
490 priv->apTD1Rings = vir_pool
491 + priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc)
492 + priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc)
493 + priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc);
494
495 priv->tx1_bufs = priv->tx0_bufs +
496 priv->opts.tx_descs[0] * PKT_BUF_SZ;
497
498 priv->tx_beacon_bufs = priv->tx1_bufs +
499 priv->opts.tx_descs[1] * PKT_BUF_SZ;
500
501 priv->pbyTmpBuff = priv->tx_beacon_bufs +
502 CB_BEACON_BUF_SIZE;
503
504 priv->tx_bufs_dma1 = priv->tx_bufs_dma0 +
505 priv->opts.tx_descs[0] * PKT_BUF_SZ;
506
507 priv->tx_beacon_dma = priv->tx_bufs_dma1 +
508 priv->opts.tx_descs[1] * PKT_BUF_SZ;
509
510 return true;
511}
512
513static void device_free_rings(struct vnt_private *priv)
514{
515 dma_free_coherent(&priv->pcid->dev,
516 priv->opts.rx_descs0 * sizeof(struct vnt_rx_desc) +
517 priv->opts.rx_descs1 * sizeof(struct vnt_rx_desc) +
518 priv->opts.tx_descs[0] * sizeof(struct vnt_tx_desc) +
519 priv->opts.tx_descs[1] * sizeof(struct vnt_tx_desc),
520 priv->aRD0Ring, priv->pool_dma);
521
522 if (priv->tx0_bufs)
523 dma_free_coherent(&priv->pcid->dev,
524 priv->opts.tx_descs[0] * PKT_BUF_SZ +
525 priv->opts.tx_descs[1] * PKT_BUF_SZ +
526 CB_BEACON_BUF_SIZE +
527 CB_MAX_BUF_SIZE,
528 priv->tx0_bufs, priv->tx_bufs_dma0);
529}
530
531static int device_init_rd0_ring(struct vnt_private *priv)
532{
533 int i;
534 dma_addr_t curr = priv->rd0_pool_dma;
535 struct vnt_rx_desc *desc;
536 int ret;
537
538
539 for (i = 0; i < priv->opts.rx_descs0;
540 i ++, curr += sizeof(struct vnt_rx_desc)) {
541 desc = &priv->aRD0Ring[i];
542 desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_KERNEL);
543 if (!desc->rd_info) {
544 ret = -ENOMEM;
545 goto err_free_desc;
546 }
547
548 if (!device_alloc_rx_buf(priv, desc)) {
549 dev_err(&priv->pcid->dev, "can not alloc rx bufs\n");
550 ret = -ENOMEM;
551 goto err_free_rd;
552 }
553
554 desc->next = &priv->aRD0Ring[(i + 1) % priv->opts.rx_descs0];
555 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc));
556 }
557
558 if (i > 0)
559 priv->aRD0Ring[i - 1].next_desc = cpu_to_le32(priv->rd0_pool_dma);
560 priv->pCurrRD[0] = &priv->aRD0Ring[0];
561
562 return 0;
563
564err_free_rd:
565 kfree(desc->rd_info);
566
567err_free_desc:
568 while (--i) {
569 desc = &priv->aRD0Ring[i];
570 device_free_rx_buf(priv, desc);
571 kfree(desc->rd_info);
572 }
573
574 return ret;
575}
576
577static int device_init_rd1_ring(struct vnt_private *priv)
578{
579 int i;
580 dma_addr_t curr = priv->rd1_pool_dma;
581 struct vnt_rx_desc *desc;
582 int ret;
583
584
585 for (i = 0; i < priv->opts.rx_descs1;
586 i ++, curr += sizeof(struct vnt_rx_desc)) {
587 desc = &priv->aRD1Ring[i];
588 desc->rd_info = kzalloc(sizeof(*desc->rd_info), GFP_KERNEL);
589 if (!desc->rd_info) {
590 ret = -ENOMEM;
591 goto err_free_desc;
592 }
593
594 if (!device_alloc_rx_buf(priv, desc)) {
595 dev_err(&priv->pcid->dev, "can not alloc rx bufs\n");
596 ret = -ENOMEM;
597 goto err_free_rd;
598 }
599
600 desc->next = &priv->aRD1Ring[(i + 1) % priv->opts.rx_descs1];
601 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_rx_desc));
602 }
603
604 if (i > 0)
605 priv->aRD1Ring[i - 1].next_desc = cpu_to_le32(priv->rd1_pool_dma);
606 priv->pCurrRD[1] = &priv->aRD1Ring[0];
607
608 return 0;
609
610err_free_rd:
611 kfree(desc->rd_info);
612
613err_free_desc:
614 while (--i) {
615 desc = &priv->aRD1Ring[i];
616 device_free_rx_buf(priv, desc);
617 kfree(desc->rd_info);
618 }
619
620 return ret;
621}
622
623static void device_free_rd0_ring(struct vnt_private *priv)
624{
625 int i;
626
627 for (i = 0; i < priv->opts.rx_descs0; i++) {
628 struct vnt_rx_desc *desc = &priv->aRD0Ring[i];
629
630 device_free_rx_buf(priv, desc);
631 kfree(desc->rd_info);
632 }
633}
634
635static void device_free_rd1_ring(struct vnt_private *priv)
636{
637 int i;
638
639 for (i = 0; i < priv->opts.rx_descs1; i++) {
640 struct vnt_rx_desc *desc = &priv->aRD1Ring[i];
641
642 device_free_rx_buf(priv, desc);
643 kfree(desc->rd_info);
644 }
645}
646
647static int device_init_td0_ring(struct vnt_private *priv)
648{
649 int i;
650 dma_addr_t curr;
651 struct vnt_tx_desc *desc;
652 int ret;
653
654 curr = priv->td0_pool_dma;
655 for (i = 0; i < priv->opts.tx_descs[0];
656 i++, curr += sizeof(struct vnt_tx_desc)) {
657 desc = &priv->apTD0Rings[i];
658 desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_KERNEL);
659 if (!desc->td_info) {
660 ret = -ENOMEM;
661 goto err_free_desc;
662 }
663
664 desc->td_info->buf = priv->tx0_bufs + i * PKT_BUF_SZ;
665 desc->td_info->buf_dma = priv->tx_bufs_dma0 + i * PKT_BUF_SZ;
666
667 desc->next = &(priv->apTD0Rings[(i + 1) % priv->opts.tx_descs[0]]);
668 desc->next_desc = cpu_to_le32(curr +
669 sizeof(struct vnt_tx_desc));
670 }
671
672 if (i > 0)
673 priv->apTD0Rings[i - 1].next_desc = cpu_to_le32(priv->td0_pool_dma);
674 priv->apTailTD[0] = priv->apCurrTD[0] = &priv->apTD0Rings[0];
675
676 return 0;
677
678err_free_desc:
679 while (--i) {
680 desc = &priv->apTD0Rings[i];
681 kfree(desc->td_info);
682 }
683
684 return ret;
685}
686
687static int device_init_td1_ring(struct vnt_private *priv)
688{
689 int i;
690 dma_addr_t curr;
691 struct vnt_tx_desc *desc;
692 int ret;
693
694
695 curr = priv->td1_pool_dma;
696 for (i = 0; i < priv->opts.tx_descs[1];
697 i++, curr += sizeof(struct vnt_tx_desc)) {
698 desc = &priv->apTD1Rings[i];
699 desc->td_info = kzalloc(sizeof(*desc->td_info), GFP_KERNEL);
700 if (!desc->td_info) {
701 ret = -ENOMEM;
702 goto err_free_desc;
703 }
704
705 desc->td_info->buf = priv->tx1_bufs + i * PKT_BUF_SZ;
706 desc->td_info->buf_dma = priv->tx_bufs_dma1 + i * PKT_BUF_SZ;
707
708 desc->next = &(priv->apTD1Rings[(i + 1) % priv->opts.tx_descs[1]]);
709 desc->next_desc = cpu_to_le32(curr + sizeof(struct vnt_tx_desc));
710 }
711
712 if (i > 0)
713 priv->apTD1Rings[i - 1].next_desc = cpu_to_le32(priv->td1_pool_dma);
714 priv->apTailTD[1] = priv->apCurrTD[1] = &priv->apTD1Rings[0];
715
716 return 0;
717
718err_free_desc:
719 while (--i) {
720 desc = &priv->apTD1Rings[i];
721 kfree(desc->td_info);
722 }
723
724 return ret;
725}
726
727static void device_free_td0_ring(struct vnt_private *priv)
728{
729 int i;
730
731 for (i = 0; i < priv->opts.tx_descs[0]; i++) {
732 struct vnt_tx_desc *desc = &priv->apTD0Rings[i];
733 struct vnt_td_info *td_info = desc->td_info;
734
735 dev_kfree_skb(td_info->skb);
736 kfree(desc->td_info);
737 }
738}
739
740static void device_free_td1_ring(struct vnt_private *priv)
741{
742 int i;
743
744 for (i = 0; i < priv->opts.tx_descs[1]; i++) {
745 struct vnt_tx_desc *desc = &priv->apTD1Rings[i];
746 struct vnt_td_info *td_info = desc->td_info;
747
748 dev_kfree_skb(td_info->skb);
749 kfree(desc->td_info);
750 }
751}
752
753
754
755static int device_rx_srv(struct vnt_private *priv, unsigned int idx)
756{
757 struct vnt_rx_desc *rd;
758 int works = 0;
759
760 for (rd = priv->pCurrRD[idx];
761 rd->rd0.owner == OWNED_BY_HOST;
762 rd = rd->next) {
763 if (works++ > 15)
764 break;
765
766 if (!rd->rd_info->skb)
767 break;
768
769 if (vnt_receive_frame(priv, rd)) {
770 if (!device_alloc_rx_buf(priv, rd)) {
771 dev_err(&priv->pcid->dev,
772 "can not allocate rx buf\n");
773 break;
774 }
775 }
776 rd->rd0.owner = OWNED_BY_NIC;
777 }
778
779 priv->pCurrRD[idx] = rd;
780
781 return works;
782}
783
784static bool device_alloc_rx_buf(struct vnt_private *priv,
785 struct vnt_rx_desc *rd)
786{
787 struct vnt_rd_info *rd_info = rd->rd_info;
788
789 rd_info->skb = dev_alloc_skb((int)priv->rx_buf_sz);
790 if (!rd_info->skb)
791 return false;
792
793 rd_info->skb_dma =
794 dma_map_single(&priv->pcid->dev,
795 skb_put(rd_info->skb, skb_tailroom(rd_info->skb)),
796 priv->rx_buf_sz, DMA_FROM_DEVICE);
797 if (dma_mapping_error(&priv->pcid->dev, rd_info->skb_dma)) {
798 dev_kfree_skb(rd_info->skb);
799 rd_info->skb = NULL;
800 return false;
801 }
802
803 *((unsigned int *)&rd->rd0) = 0;
804
805 rd->rd0.res_count = cpu_to_le16(priv->rx_buf_sz);
806 rd->rd0.owner = OWNED_BY_NIC;
807 rd->rd1.req_count = cpu_to_le16(priv->rx_buf_sz);
808 rd->buff_addr = cpu_to_le32(rd_info->skb_dma);
809
810 return true;
811}
812
813static void device_free_rx_buf(struct vnt_private *priv,
814 struct vnt_rx_desc *rd)
815{
816 struct vnt_rd_info *rd_info = rd->rd_info;
817
818 dma_unmap_single(&priv->pcid->dev, rd_info->skb_dma,
819 priv->rx_buf_sz, DMA_FROM_DEVICE);
820 dev_kfree_skb(rd_info->skb);
821}
822
823static const u8 fallback_rate0[5][5] = {
824 {RATE_18M, RATE_18M, RATE_12M, RATE_12M, RATE_12M},
825 {RATE_24M, RATE_24M, RATE_18M, RATE_12M, RATE_12M},
826 {RATE_36M, RATE_36M, RATE_24M, RATE_18M, RATE_18M},
827 {RATE_48M, RATE_48M, RATE_36M, RATE_24M, RATE_24M},
828 {RATE_54M, RATE_54M, RATE_48M, RATE_36M, RATE_36M}
829};
830
831static const u8 fallback_rate1[5][5] = {
832 {RATE_18M, RATE_18M, RATE_12M, RATE_6M, RATE_6M},
833 {RATE_24M, RATE_24M, RATE_18M, RATE_6M, RATE_6M},
834 {RATE_36M, RATE_36M, RATE_24M, RATE_12M, RATE_12M},
835 {RATE_48M, RATE_48M, RATE_24M, RATE_12M, RATE_12M},
836 {RATE_54M, RATE_54M, RATE_36M, RATE_18M, RATE_18M}
837};
838
839static int vnt_int_report_rate(struct vnt_private *priv,
840 struct vnt_td_info *context, u8 tsr0, u8 tsr1)
841{
842 struct vnt_tx_fifo_head *fifo_head;
843 struct ieee80211_tx_info *info;
844 struct ieee80211_rate *rate;
845 u16 fb_option;
846 u8 tx_retry = (tsr0 & TSR0_NCR);
847 s8 idx;
848
849 if (!context)
850 return -ENOMEM;
851
852 if (!context->skb)
853 return -EINVAL;
854
855 fifo_head = (struct vnt_tx_fifo_head *)context->buf;
856 fb_option = (le16_to_cpu(fifo_head->fifo_ctl) &
857 (FIFOCTL_AUTO_FB_0 | FIFOCTL_AUTO_FB_1));
858
859 info = IEEE80211_SKB_CB(context->skb);
860 idx = info->control.rates[0].idx;
861
862 if (fb_option && !(tsr1 & TSR1_TERR)) {
863 u8 tx_rate;
864 u8 retry = tx_retry;
865
866 rate = ieee80211_get_tx_rate(priv->hw, info);
867 tx_rate = rate->hw_value - RATE_18M;
868
869 if (retry > 4)
870 retry = 4;
871
872 if (fb_option & FIFOCTL_AUTO_FB_0)
873 tx_rate = fallback_rate0[tx_rate][retry];
874 else if (fb_option & FIFOCTL_AUTO_FB_1)
875 tx_rate = fallback_rate1[tx_rate][retry];
876
877 if (info->band == NL80211_BAND_5GHZ)
878 idx = tx_rate - RATE_6M;
879 else
880 idx = tx_rate;
881 }
882
883 ieee80211_tx_info_clear_status(info);
884
885 info->status.rates[0].count = tx_retry;
886
887 if (!(tsr1 & TSR1_TERR)) {
888 info->status.rates[0].idx = idx;
889
890 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
891 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
892 else
893 info->flags |= IEEE80211_TX_STAT_ACK;
894 }
895
896 return 0;
897}
898
899static int device_tx_srv(struct vnt_private *priv, unsigned int idx)
900{
901 struct vnt_tx_desc *desc;
902 int works = 0;
903 unsigned char byTsr0;
904 unsigned char byTsr1;
905
906 for (desc = priv->apTailTD[idx]; priv->iTDUsed[idx] > 0; desc = desc->next) {
907 if (desc->td0.owner == OWNED_BY_NIC)
908 break;
909 if (works++ > 15)
910 break;
911
912 byTsr0 = desc->td0.tsr0;
913 byTsr1 = desc->td0.tsr1;
914
915
916 if (desc->td1.tcr & TCR_STP) {
917 if ((desc->td_info->flags & TD_FLAGS_NETIF_SKB) != 0) {
918 if (!(byTsr1 & TSR1_TERR)) {
919 if (byTsr0 != 0) {
920 pr_debug(" Tx[%d] OK but has error. tsr1[%02X] tsr0[%02X]\n",
921 (int)idx, byTsr1,
922 byTsr0);
923 }
924 } else {
925 pr_debug(" Tx[%d] dropped & tsr1[%02X] tsr0[%02X]\n",
926 (int)idx, byTsr1, byTsr0);
927 }
928 }
929
930 if (byTsr1 & TSR1_TERR) {
931 if ((desc->td_info->flags & TD_FLAGS_PRIV_SKB) != 0) {
932 pr_debug(" Tx[%d] fail has error. tsr1[%02X] tsr0[%02X]\n",
933 (int)idx, byTsr1, byTsr0);
934 }
935 }
936
937 vnt_int_report_rate(priv, desc->td_info, byTsr0, byTsr1);
938
939 device_free_tx_buf(priv, desc);
940 priv->iTDUsed[idx]--;
941 }
942 }
943
944 priv->apTailTD[idx] = desc;
945
946 return works;
947}
948
949static void device_error(struct vnt_private *priv, unsigned short status)
950{
951 if (status & ISR_FETALERR) {
952 dev_err(&priv->pcid->dev, "Hardware fatal error\n");
953
954 MACbShutdown(priv);
955 return;
956 }
957}
958
959static void device_free_tx_buf(struct vnt_private *priv,
960 struct vnt_tx_desc *desc)
961{
962 struct vnt_td_info *td_info = desc->td_info;
963 struct sk_buff *skb = td_info->skb;
964
965 if (skb)
966 ieee80211_tx_status_irqsafe(priv->hw, skb);
967
968 td_info->skb = NULL;
969 td_info->flags = 0;
970}
971
972static void vnt_check_bb_vga(struct vnt_private *priv)
973{
974 long dbm;
975 int i;
976
977 if (!priv->bUpdateBBVGA)
978 return;
979
980 if (priv->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
981 return;
982
983 if (!(priv->vif->bss_conf.assoc && priv->uCurrRSSI))
984 return;
985
986 RFvRSSITodBm(priv, (u8)priv->uCurrRSSI, &dbm);
987
988 for (i = 0; i < BB_VGA_LEVEL; i++) {
989 if (dbm < priv->ldBmThreshold[i]) {
990 priv->byBBVGANew = priv->abyBBVGA[i];
991 break;
992 }
993 }
994
995 if (priv->byBBVGANew == priv->byBBVGACurrent) {
996 priv->uBBVGADiffCount = 1;
997 return;
998 }
999
1000 priv->uBBVGADiffCount++;
1001
1002 if (priv->uBBVGADiffCount == 1) {
1003
1004 bb_set_vga_gain_offset(priv, priv->byBBVGANew);
1005
1006 dev_dbg(&priv->pcid->dev,
1007 "First RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1008 (int)dbm, priv->byBBVGANew,
1009 priv->byBBVGACurrent,
1010 (int)priv->uBBVGADiffCount);
1011 }
1012
1013 if (priv->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) {
1014 dev_dbg(&priv->pcid->dev,
1015 "RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1016 (int)dbm, priv->byBBVGANew,
1017 priv->byBBVGACurrent,
1018 (int)priv->uBBVGADiffCount);
1019
1020 bb_set_vga_gain_offset(priv, priv->byBBVGANew);
1021 }
1022}
1023
1024static void vnt_interrupt_process(struct vnt_private *priv)
1025{
1026 struct ieee80211_low_level_stats *low_stats = &priv->low_stats;
1027 int max_count = 0;
1028 u32 mib_counter;
1029 u32 isr;
1030 unsigned long flags;
1031
1032 MACvReadISR(priv->PortOffset, &isr);
1033
1034 if (isr == 0)
1035 return;
1036
1037 if (isr == 0xffffffff) {
1038 pr_debug("isr = 0xffff\n");
1039 return;
1040 }
1041
1042 spin_lock_irqsave(&priv->lock, flags);
1043
1044
1045 MACvReadMIBCounter(priv->PortOffset, &mib_counter);
1046
1047 low_stats->dot11RTSSuccessCount += mib_counter & 0xff;
1048 low_stats->dot11RTSFailureCount += (mib_counter >> 8) & 0xff;
1049 low_stats->dot11ACKFailureCount += (mib_counter >> 16) & 0xff;
1050 low_stats->dot11FCSErrorCount += (mib_counter >> 24) & 0xff;
1051
1052
1053
1054
1055
1056
1057
1058 while (isr && priv->vif) {
1059 MACvWriteISR(priv->PortOffset, isr);
1060
1061 if (isr & ISR_FETALERR) {
1062 pr_debug(" ISR_FETALERR\n");
1063 VNSvOutPortB(priv->PortOffset + MAC_REG_SOFTPWRCTL, 0);
1064 VNSvOutPortW(priv->PortOffset +
1065 MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI);
1066 device_error(priv, isr);
1067 }
1068
1069 if (isr & ISR_TBTT) {
1070 if (priv->op_mode != NL80211_IFTYPE_ADHOC)
1071 vnt_check_bb_vga(priv);
1072
1073 priv->bBeaconSent = false;
1074 if (priv->bEnablePSMode)
1075 PSbIsNextTBTTWakeUp((void *)priv);
1076
1077 if ((priv->op_mode == NL80211_IFTYPE_AP ||
1078 priv->op_mode == NL80211_IFTYPE_ADHOC) &&
1079 priv->vif->bss_conf.enable_beacon)
1080 MACvOneShotTimer1MicroSec(priv,
1081 (priv->vif->bss_conf.beacon_int -
1082 MAKE_BEACON_RESERVED) << 10);
1083
1084
1085 }
1086
1087 if (isr & ISR_BNTX) {
1088 if (priv->op_mode == NL80211_IFTYPE_ADHOC) {
1089 priv->bIsBeaconBufReadySet = false;
1090 priv->cbBeaconBufReadySetCnt = 0;
1091 }
1092
1093 priv->bBeaconSent = true;
1094 }
1095
1096 if (isr & ISR_RXDMA0)
1097 max_count += device_rx_srv(priv, TYPE_RXDMA0);
1098
1099 if (isr & ISR_RXDMA1)
1100 max_count += device_rx_srv(priv, TYPE_RXDMA1);
1101
1102 if (isr & ISR_TXDMA0)
1103 max_count += device_tx_srv(priv, TYPE_TXDMA0);
1104
1105 if (isr & ISR_AC0DMA)
1106 max_count += device_tx_srv(priv, TYPE_AC0DMA);
1107
1108 if (isr & ISR_SOFTTIMER1) {
1109 if (priv->vif->bss_conf.enable_beacon)
1110 vnt_beacon_make(priv, priv->vif);
1111 }
1112
1113
1114 if (AVAIL_TD(priv, TYPE_TXDMA0) &&
1115 AVAIL_TD(priv, TYPE_AC0DMA) &&
1116 ieee80211_queue_stopped(priv->hw, 0))
1117 ieee80211_wake_queues(priv->hw);
1118
1119 MACvReadISR(priv->PortOffset, &isr);
1120
1121 MACvReceive0(priv->PortOffset);
1122 MACvReceive1(priv->PortOffset);
1123
1124 if (max_count > priv->opts.int_works)
1125 break;
1126 }
1127
1128 spin_unlock_irqrestore(&priv->lock, flags);
1129}
1130
1131static void vnt_interrupt_work(struct work_struct *work)
1132{
1133 struct vnt_private *priv =
1134 container_of(work, struct vnt_private, interrupt_work);
1135
1136 if (priv->vif)
1137 vnt_interrupt_process(priv);
1138
1139 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1140}
1141
1142static irqreturn_t vnt_interrupt(int irq, void *arg)
1143{
1144 struct vnt_private *priv = arg;
1145
1146 schedule_work(&priv->interrupt_work);
1147
1148 MACvIntDisable(priv->PortOffset);
1149
1150 return IRQ_HANDLED;
1151}
1152
1153static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb)
1154{
1155 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1156 struct vnt_tx_desc *head_td;
1157 u32 dma_idx;
1158 unsigned long flags;
1159
1160 spin_lock_irqsave(&priv->lock, flags);
1161
1162 if (ieee80211_is_data(hdr->frame_control))
1163 dma_idx = TYPE_AC0DMA;
1164 else
1165 dma_idx = TYPE_TXDMA0;
1166
1167 if (AVAIL_TD(priv, dma_idx) < 1) {
1168 spin_unlock_irqrestore(&priv->lock, flags);
1169 ieee80211_stop_queues(priv->hw);
1170 return -ENOMEM;
1171 }
1172
1173 head_td = priv->apCurrTD[dma_idx];
1174
1175 head_td->td1.tcr = 0;
1176
1177 head_td->td_info->skb = skb;
1178
1179 if (dma_idx == TYPE_AC0DMA)
1180 head_td->td_info->flags = TD_FLAGS_NETIF_SKB;
1181
1182 priv->apCurrTD[dma_idx] = head_td->next;
1183
1184 spin_unlock_irqrestore(&priv->lock, flags);
1185
1186 vnt_generate_fifo_header(priv, dma_idx, head_td, skb);
1187
1188 spin_lock_irqsave(&priv->lock, flags);
1189
1190 priv->bPWBitOn = false;
1191
1192
1193 head_td->td1.tcr |= (TCR_STP | TCR_EDP | EDMSDU);
1194 head_td->td1.req_count = cpu_to_le16(head_td->td_info->req_count);
1195
1196 head_td->buff_addr = cpu_to_le32(head_td->td_info->buf_dma);
1197
1198
1199 wmb();
1200 head_td->td0.owner = OWNED_BY_NIC;
1201 wmb();
1202
1203 if (head_td->td_info->flags & TD_FLAGS_NETIF_SKB)
1204 MACvTransmitAC0(priv->PortOffset);
1205 else
1206 MACvTransmit0(priv->PortOffset);
1207
1208 priv->iTDUsed[dma_idx]++;
1209
1210 spin_unlock_irqrestore(&priv->lock, flags);
1211
1212 return 0;
1213}
1214
1215static void vnt_tx_80211(struct ieee80211_hw *hw,
1216 struct ieee80211_tx_control *control,
1217 struct sk_buff *skb)
1218{
1219 struct vnt_private *priv = hw->priv;
1220
1221 if (vnt_tx_packet(priv, skb))
1222 ieee80211_free_txskb(hw, skb);
1223}
1224
1225static int vnt_start(struct ieee80211_hw *hw)
1226{
1227 struct vnt_private *priv = hw->priv;
1228 int ret;
1229
1230 priv->rx_buf_sz = PKT_BUF_SZ;
1231 if (!device_init_rings(priv))
1232 return -ENOMEM;
1233
1234 ret = request_irq(priv->pcid->irq, vnt_interrupt,
1235 IRQF_SHARED, "vt6655", priv);
1236 if (ret) {
1237 dev_dbg(&priv->pcid->dev, "failed to start irq\n");
1238 goto err_free_rings;
1239 }
1240
1241 dev_dbg(&priv->pcid->dev, "call device init rd0 ring\n");
1242 ret = device_init_rd0_ring(priv);
1243 if (ret)
1244 goto err_free_irq;
1245 ret = device_init_rd1_ring(priv);
1246 if (ret)
1247 goto err_free_rd0_ring;
1248 ret = device_init_td0_ring(priv);
1249 if (ret)
1250 goto err_free_rd1_ring;
1251 ret = device_init_td1_ring(priv);
1252 if (ret)
1253 goto err_free_td0_ring;
1254
1255 device_init_registers(priv);
1256
1257 dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n");
1258 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1259
1260 ieee80211_wake_queues(hw);
1261
1262 return 0;
1263
1264err_free_td0_ring:
1265 device_free_td0_ring(priv);
1266err_free_rd1_ring:
1267 device_free_rd1_ring(priv);
1268err_free_rd0_ring:
1269 device_free_rd0_ring(priv);
1270err_free_irq:
1271 free_irq(priv->pcid->irq, priv);
1272err_free_rings:
1273 device_free_rings(priv);
1274 return ret;
1275}
1276
1277static void vnt_stop(struct ieee80211_hw *hw)
1278{
1279 struct vnt_private *priv = hw->priv;
1280
1281 ieee80211_stop_queues(hw);
1282
1283 cancel_work_sync(&priv->interrupt_work);
1284
1285 MACbShutdown(priv);
1286 MACbSoftwareReset(priv);
1287 CARDbRadioPowerOff(priv);
1288
1289 device_free_td0_ring(priv);
1290 device_free_td1_ring(priv);
1291 device_free_rd0_ring(priv);
1292 device_free_rd1_ring(priv);
1293 device_free_rings(priv);
1294
1295 free_irq(priv->pcid->irq, priv);
1296}
1297
1298static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1299{
1300 struct vnt_private *priv = hw->priv;
1301
1302 priv->vif = vif;
1303
1304 switch (vif->type) {
1305 case NL80211_IFTYPE_STATION:
1306 break;
1307 case NL80211_IFTYPE_ADHOC:
1308 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1309
1310 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1311
1312 break;
1313 case NL80211_IFTYPE_AP:
1314 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1315
1316 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1317
1318 break;
1319 default:
1320 return -EOPNOTSUPP;
1321 }
1322
1323 priv->op_mode = vif->type;
1324
1325 return 0;
1326}
1327
1328static void vnt_remove_interface(struct ieee80211_hw *hw,
1329 struct ieee80211_vif *vif)
1330{
1331 struct vnt_private *priv = hw->priv;
1332
1333 switch (vif->type) {
1334 case NL80211_IFTYPE_STATION:
1335 break;
1336 case NL80211_IFTYPE_ADHOC:
1337 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1338 MACvRegBitsOff(priv->PortOffset,
1339 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1340 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1341 break;
1342 case NL80211_IFTYPE_AP:
1343 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1344 MACvRegBitsOff(priv->PortOffset,
1345 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1346 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1347 break;
1348 default:
1349 break;
1350 }
1351
1352 priv->op_mode = NL80211_IFTYPE_UNSPECIFIED;
1353}
1354
1355static int vnt_config(struct ieee80211_hw *hw, u32 changed)
1356{
1357 struct vnt_private *priv = hw->priv;
1358 struct ieee80211_conf *conf = &hw->conf;
1359 u8 bb_type;
1360
1361 if (changed & IEEE80211_CONF_CHANGE_PS) {
1362 if (conf->flags & IEEE80211_CONF_PS)
1363 PSvEnablePowerSaving(priv, conf->listen_interval);
1364 else
1365 PSvDisablePowerSaving(priv);
1366 }
1367
1368 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) ||
1369 (conf->flags & IEEE80211_CONF_OFFCHANNEL)) {
1370 set_channel(priv, conf->chandef.chan);
1371
1372 if (conf->chandef.chan->band == NL80211_BAND_5GHZ)
1373 bb_type = BB_TYPE_11A;
1374 else
1375 bb_type = BB_TYPE_11G;
1376
1377 if (priv->byBBType != bb_type) {
1378 priv->byBBType = bb_type;
1379
1380 CARDbSetPhyParameter(priv, priv->byBBType);
1381 }
1382 }
1383
1384 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1385 if (priv->byBBType == BB_TYPE_11B)
1386 priv->wCurrentRate = RATE_1M;
1387 else
1388 priv->wCurrentRate = RATE_54M;
1389
1390 RFbSetPower(priv, priv->wCurrentRate,
1391 conf->chandef.chan->hw_value);
1392 }
1393
1394 return 0;
1395}
1396
1397static void vnt_bss_info_changed(struct ieee80211_hw *hw,
1398 struct ieee80211_vif *vif,
1399 struct ieee80211_bss_conf *conf, u32 changed)
1400{
1401 struct vnt_private *priv = hw->priv;
1402
1403 priv->current_aid = conf->aid;
1404
1405 if (changed & BSS_CHANGED_BSSID && conf->bssid) {
1406 unsigned long flags;
1407
1408 spin_lock_irqsave(&priv->lock, flags);
1409
1410 MACvWriteBSSIDAddress(priv->PortOffset, (u8 *)conf->bssid);
1411
1412 spin_unlock_irqrestore(&priv->lock, flags);
1413 }
1414
1415 if (changed & BSS_CHANGED_BASIC_RATES) {
1416 priv->basic_rates = conf->basic_rates;
1417
1418 CARDvUpdateBasicTopRate(priv);
1419
1420 dev_dbg(&priv->pcid->dev,
1421 "basic rates %x\n", conf->basic_rates);
1422 }
1423
1424 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1425 if (conf->use_short_preamble) {
1426 MACvEnableBarkerPreambleMd(priv->PortOffset);
1427 priv->byPreambleType = true;
1428 } else {
1429 MACvDisableBarkerPreambleMd(priv->PortOffset);
1430 priv->byPreambleType = false;
1431 }
1432 }
1433
1434 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1435 if (conf->use_cts_prot)
1436 MACvEnableProtectMD(priv->PortOffset);
1437 else
1438 MACvDisableProtectMD(priv->PortOffset);
1439 }
1440
1441 if (changed & BSS_CHANGED_ERP_SLOT) {
1442 if (conf->use_short_slot)
1443 priv->bShortSlotTime = true;
1444 else
1445 priv->bShortSlotTime = false;
1446
1447 CARDbSetPhyParameter(priv, priv->byBBType);
1448 bb_set_vga_gain_offset(priv, priv->abyBBVGA[0]);
1449 }
1450
1451 if (changed & BSS_CHANGED_TXPOWER)
1452 RFbSetPower(priv, priv->wCurrentRate,
1453 conf->chandef.chan->hw_value);
1454
1455 if (changed & BSS_CHANGED_BEACON_ENABLED) {
1456 dev_dbg(&priv->pcid->dev,
1457 "Beacon enable %d\n", conf->enable_beacon);
1458
1459 if (conf->enable_beacon) {
1460 vnt_beacon_enable(priv, vif, conf);
1461
1462 MACvRegBitsOn(priv->PortOffset, MAC_REG_TCR,
1463 TCR_AUTOBCNTX);
1464 } else {
1465 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR,
1466 TCR_AUTOBCNTX);
1467 }
1468 }
1469
1470 if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INFO) &&
1471 priv->op_mode != NL80211_IFTYPE_AP) {
1472 if (conf->assoc && conf->beacon_rate) {
1473 CARDbUpdateTSF(priv, conf->beacon_rate->hw_value,
1474 conf->sync_tsf);
1475
1476 CARDbSetBeaconPeriod(priv, conf->beacon_int);
1477
1478 CARDvSetFirstNextTBTT(priv, conf->beacon_int);
1479 } else {
1480 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1481 TFTCTL_TSFCNTRST);
1482 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1483 TFTCTL_TSFCNTREN);
1484 }
1485 }
1486}
1487
1488static u64 vnt_prepare_multicast(struct ieee80211_hw *hw,
1489 struct netdev_hw_addr_list *mc_list)
1490{
1491 struct vnt_private *priv = hw->priv;
1492 struct netdev_hw_addr *ha;
1493 u64 mc_filter = 0;
1494 u32 bit_nr = 0;
1495
1496 netdev_hw_addr_list_for_each(ha, mc_list) {
1497 bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1498
1499 mc_filter |= 1ULL << (bit_nr & 0x3f);
1500 }
1501
1502 priv->mc_list_count = mc_list->count;
1503
1504 return mc_filter;
1505}
1506
1507static void vnt_configure(struct ieee80211_hw *hw,
1508 unsigned int changed_flags,
1509 unsigned int *total_flags, u64 multicast)
1510{
1511 struct vnt_private *priv = hw->priv;
1512 u8 rx_mode = 0;
1513
1514 *total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC;
1515
1516 VNSvInPortB(priv->PortOffset + MAC_REG_RCR, &rx_mode);
1517
1518 dev_dbg(&priv->pcid->dev, "rx mode in = %x\n", rx_mode);
1519
1520 if (changed_flags & FIF_ALLMULTI) {
1521 if (*total_flags & FIF_ALLMULTI) {
1522 unsigned long flags;
1523
1524 spin_lock_irqsave(&priv->lock, flags);
1525
1526 if (priv->mc_list_count > 2) {
1527 MACvSelectPage1(priv->PortOffset);
1528
1529 VNSvOutPortD(priv->PortOffset +
1530 MAC_REG_MAR0, 0xffffffff);
1531 VNSvOutPortD(priv->PortOffset +
1532 MAC_REG_MAR0 + 4, 0xffffffff);
1533
1534 MACvSelectPage0(priv->PortOffset);
1535 } else {
1536 MACvSelectPage1(priv->PortOffset);
1537
1538 VNSvOutPortD(priv->PortOffset +
1539 MAC_REG_MAR0, (u32)multicast);
1540 VNSvOutPortD(priv->PortOffset +
1541 MAC_REG_MAR0 + 4,
1542 (u32)(multicast >> 32));
1543
1544 MACvSelectPage0(priv->PortOffset);
1545 }
1546
1547 spin_unlock_irqrestore(&priv->lock, flags);
1548
1549 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1550 } else {
1551 rx_mode &= ~(RCR_MULTICAST | RCR_BROADCAST);
1552 }
1553 }
1554
1555 if (changed_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) {
1556 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1557
1558 if (*total_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC))
1559 rx_mode &= ~RCR_BSSID;
1560 else
1561 rx_mode |= RCR_BSSID;
1562 }
1563
1564 VNSvOutPortB(priv->PortOffset + MAC_REG_RCR, rx_mode);
1565
1566 dev_dbg(&priv->pcid->dev, "rx mode out= %x\n", rx_mode);
1567}
1568
1569static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1570 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
1571 struct ieee80211_key_conf *key)
1572{
1573 struct vnt_private *priv = hw->priv;
1574
1575 switch (cmd) {
1576 case SET_KEY:
1577 if (vnt_set_keys(hw, sta, vif, key))
1578 return -EOPNOTSUPP;
1579 break;
1580 case DISABLE_KEY:
1581 if (test_bit(key->hw_key_idx, &priv->key_entry_inuse))
1582 clear_bit(key->hw_key_idx, &priv->key_entry_inuse);
1583 break;
1584 default:
1585 break;
1586 }
1587
1588 return 0;
1589}
1590
1591static int vnt_get_stats(struct ieee80211_hw *hw,
1592 struct ieee80211_low_level_stats *stats)
1593{
1594 struct vnt_private *priv = hw->priv;
1595
1596 memcpy(stats, &priv->low_stats, sizeof(*stats));
1597
1598 return 0;
1599}
1600
1601static u64 vnt_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1602{
1603 struct vnt_private *priv = hw->priv;
1604 u64 tsf;
1605
1606 CARDbGetCurrentTSF(priv, &tsf);
1607
1608 return tsf;
1609}
1610
1611static void vnt_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1612 u64 tsf)
1613{
1614 struct vnt_private *priv = hw->priv;
1615
1616 CARDvUpdateNextTBTT(priv, tsf, vif->bss_conf.beacon_int);
1617}
1618
1619static void vnt_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1620{
1621 struct vnt_private *priv = hw->priv;
1622
1623
1624 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1625}
1626
1627static const struct ieee80211_ops vnt_mac_ops = {
1628 .tx = vnt_tx_80211,
1629 .start = vnt_start,
1630 .stop = vnt_stop,
1631 .add_interface = vnt_add_interface,
1632 .remove_interface = vnt_remove_interface,
1633 .config = vnt_config,
1634 .bss_info_changed = vnt_bss_info_changed,
1635 .prepare_multicast = vnt_prepare_multicast,
1636 .configure_filter = vnt_configure,
1637 .set_key = vnt_set_key,
1638 .get_stats = vnt_get_stats,
1639 .get_tsf = vnt_get_tsf,
1640 .set_tsf = vnt_set_tsf,
1641 .reset_tsf = vnt_reset_tsf,
1642};
1643
1644static int vnt_init(struct vnt_private *priv)
1645{
1646 SET_IEEE80211_PERM_ADDR(priv->hw, priv->abyCurrentNetAddr);
1647
1648 vnt_init_bands(priv);
1649
1650 if (ieee80211_register_hw(priv->hw))
1651 return -ENODEV;
1652
1653 priv->mac_hw = true;
1654
1655 CARDbRadioPowerOff(priv);
1656
1657 return 0;
1658}
1659
1660static int
1661vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent)
1662{
1663 struct vnt_private *priv;
1664 struct ieee80211_hw *hw;
1665 struct wiphy *wiphy;
1666 int rc;
1667
1668 dev_notice(&pcid->dev,
1669 "%s Ver. %s\n", DEVICE_FULL_DRV_NAM, DEVICE_VERSION);
1670
1671 dev_notice(&pcid->dev,
1672 "Copyright (c) 2003 VIA Networking Technologies, Inc.\n");
1673
1674 hw = ieee80211_alloc_hw(sizeof(*priv), &vnt_mac_ops);
1675 if (!hw) {
1676 dev_err(&pcid->dev, "could not register ieee80211_hw\n");
1677 return -ENOMEM;
1678 }
1679
1680 priv = hw->priv;
1681 priv->pcid = pcid;
1682
1683 spin_lock_init(&priv->lock);
1684
1685 priv->hw = hw;
1686
1687 SET_IEEE80211_DEV(priv->hw, &pcid->dev);
1688
1689 if (pci_enable_device(pcid)) {
1690 device_free_info(priv);
1691 return -ENODEV;
1692 }
1693
1694 dev_dbg(&pcid->dev,
1695 "Before get pci_info memaddr is %x\n", priv->memaddr);
1696
1697 pci_set_master(pcid);
1698
1699 priv->memaddr = pci_resource_start(pcid, 0);
1700 priv->ioaddr = pci_resource_start(pcid, 1);
1701 priv->PortOffset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK,
1702 256);
1703 if (!priv->PortOffset) {
1704 dev_err(&pcid->dev, ": Failed to IO remapping ..\n");
1705 device_free_info(priv);
1706 return -ENODEV;
1707 }
1708
1709 rc = pci_request_regions(pcid, DEVICE_NAME);
1710 if (rc) {
1711 dev_err(&pcid->dev, ": Failed to find PCI device\n");
1712 device_free_info(priv);
1713 return -ENODEV;
1714 }
1715
1716 if (dma_set_mask(&pcid->dev, DMA_BIT_MASK(32))) {
1717 dev_err(&pcid->dev, ": Failed to set dma 32 bit mask\n");
1718 device_free_info(priv);
1719 return -ENODEV;
1720 }
1721
1722 INIT_WORK(&priv->interrupt_work, vnt_interrupt_work);
1723
1724
1725 if (!MACbSoftwareReset(priv)) {
1726 dev_err(&pcid->dev, ": Failed to access MAC hardware..\n");
1727 device_free_info(priv);
1728 return -ENODEV;
1729 }
1730
1731 MACvInitialize(priv);
1732 MACvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr);
1733
1734
1735 priv->byRFType = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_RFTYPE);
1736 priv->byRFType &= RF_MASK;
1737
1738 dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType);
1739
1740 device_get_options(priv);
1741 device_set_options(priv);
1742
1743 wiphy = priv->hw->wiphy;
1744
1745 wiphy->frag_threshold = FRAG_THRESH_DEF;
1746 wiphy->rts_threshold = RTS_THRESH_DEF;
1747 wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1748 BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP);
1749
1750 ieee80211_hw_set(priv->hw, TIMING_BEACON_ONLY);
1751 ieee80211_hw_set(priv->hw, SIGNAL_DBM);
1752 ieee80211_hw_set(priv->hw, RX_INCLUDES_FCS);
1753 ieee80211_hw_set(priv->hw, REPORTS_TX_ACK_STATUS);
1754 ieee80211_hw_set(priv->hw, SUPPORTS_PS);
1755
1756 priv->hw->max_signal = 100;
1757
1758 if (vnt_init(priv)) {
1759 device_free_info(priv);
1760 return -ENODEV;
1761 }
1762
1763 device_print_info(priv);
1764 pci_set_drvdata(pcid, priv);
1765
1766 return 0;
1767}
1768
1769
1770
1771static int __maybe_unused vt6655_suspend(struct device *dev_d)
1772{
1773 struct vnt_private *priv = dev_get_drvdata(dev_d);
1774 unsigned long flags;
1775
1776 spin_lock_irqsave(&priv->lock, flags);
1777
1778 MACbShutdown(priv);
1779
1780 spin_unlock_irqrestore(&priv->lock, flags);
1781
1782 return 0;
1783}
1784
1785static int __maybe_unused vt6655_resume(struct device *dev_d)
1786{
1787 device_wakeup_disable(dev_d);
1788
1789 return 0;
1790}
1791
1792MODULE_DEVICE_TABLE(pci, vt6655_pci_id_table);
1793
1794static SIMPLE_DEV_PM_OPS(vt6655_pm_ops, vt6655_suspend, vt6655_resume);
1795
1796static struct pci_driver device_driver = {
1797 .name = DEVICE_NAME,
1798 .id_table = vt6655_pci_id_table,
1799 .probe = vt6655_probe,
1800 .remove = vt6655_remove,
1801 .driver.pm = &vt6655_pm_ops,
1802};
1803
1804module_pci_driver(device_driver);
1805
