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20#include <linux/module.h>
21#include <linux/types.h>
22#include <linux/mm.h>
23#include <linux/ioport.h>
24#include <linux/errno.h>
25#include <linux/firmware.h>
26#include <linux/signal.h>
27#include <linux/sched.h>
28#include <linux/timer.h>
29#include <linux/interrupt.h>
30#include <linux/tty.h>
31#include <linux/tty_flip.h>
32#include <linux/major.h>
33#include <linux/string.h>
34#include <linux/fcntl.h>
35#include <linux/ptrace.h>
36#include <linux/serial.h>
37#include <linux/tty_driver.h>
38#include <linux/delay.h>
39#include <linux/pci.h>
40#include <linux/init.h>
41#include <linux/bitops.h>
42#include <linux/slab.h>
43#include <linux/ratelimit.h>
44
45#include <asm/io.h>
46#include <linux/uaccess.h>
47
48#include "moxa.h"
49
50#define MOXA_VERSION "6.0k"
51
52#define MOXA_FW_HDRLEN 32
53
54#define MOXAMAJOR 172
55
56#define MAX_BOARDS 4
57#define MAX_PORTS_PER_BOARD 32
58#define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
59
60#define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_ISA || \
61 (brd)->boardType == MOXA_BOARD_C320_PCI)
62
63
64
65
66#define MOXA_BUS_TYPE_ISA 0
67#define MOXA_BUS_TYPE_PCI 1
68
69enum {
70 MOXA_BOARD_C218_PCI = 1,
71 MOXA_BOARD_C218_ISA,
72 MOXA_BOARD_C320_PCI,
73 MOXA_BOARD_C320_ISA,
74 MOXA_BOARD_CP204J,
75};
76
77static char *moxa_brdname[] =
78{
79 "C218 Turbo PCI series",
80 "C218 Turbo ISA series",
81 "C320 Turbo PCI series",
82 "C320 Turbo ISA series",
83 "CP-204J series",
84};
85
86#ifdef CONFIG_PCI
87static const struct pci_device_id moxa_pcibrds[] = {
88 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
89 .driver_data = MOXA_BOARD_C218_PCI },
90 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
91 .driver_data = MOXA_BOARD_C320_PCI },
92 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
93 .driver_data = MOXA_BOARD_CP204J },
94 { 0 }
95};
96MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
97#endif
98
99struct moxa_port;
100
101static struct moxa_board_conf {
102 int boardType;
103 int numPorts;
104 int busType;
105
106 unsigned int ready;
107
108 struct moxa_port *ports;
109
110 void __iomem *basemem;
111 void __iomem *intNdx;
112 void __iomem *intPend;
113 void __iomem *intTable;
114} moxa_boards[MAX_BOARDS];
115
116struct mxser_mstatus {
117 tcflag_t cflag;
118 int cts;
119 int dsr;
120 int ri;
121 int dcd;
122};
123
124struct moxaq_str {
125 int inq;
126 int outq;
127};
128
129struct moxa_port {
130 struct tty_port port;
131 struct moxa_board_conf *board;
132 void __iomem *tableAddr;
133
134 int type;
135 int cflag;
136 unsigned long statusflags;
137
138 u8 DCDState;
139 u8 lineCtrl;
140 u8 lowChkFlag;
141};
142
143struct mon_str {
144 int tick;
145 int rxcnt[MAX_PORTS];
146 int txcnt[MAX_PORTS];
147};
148
149
150#define TXSTOPPED 1
151#define LOWWAIT 2
152#define EMPTYWAIT 3
153
154
155#define WAKEUP_CHARS 256
156
157static int ttymajor = MOXAMAJOR;
158static struct mon_str moxaLog;
159static unsigned int moxaFuncTout = HZ / 2;
160static unsigned int moxaLowWaterChk;
161static DEFINE_MUTEX(moxa_openlock);
162static DEFINE_SPINLOCK(moxa_lock);
163
164static unsigned long baseaddr[MAX_BOARDS];
165static unsigned int type[MAX_BOARDS];
166static unsigned int numports[MAX_BOARDS];
167static struct tty_port moxa_service_port;
168
169MODULE_AUTHOR("William Chen");
170MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
171MODULE_LICENSE("GPL");
172MODULE_FIRMWARE("c218tunx.cod");
173MODULE_FIRMWARE("cp204unx.cod");
174MODULE_FIRMWARE("c320tunx.cod");
175
176module_param_array(type, uint, NULL, 0);
177MODULE_PARM_DESC(type, "card type: C218=2, C320=4");
178module_param_hw_array(baseaddr, ulong, ioport, NULL, 0);
179MODULE_PARM_DESC(baseaddr, "base address");
180module_param_array(numports, uint, NULL, 0);
181MODULE_PARM_DESC(numports, "numports (ignored for C218)");
182
183module_param(ttymajor, int, 0);
184
185
186
187
188static int moxa_open(struct tty_struct *, struct file *);
189static void moxa_close(struct tty_struct *, struct file *);
190static int moxa_write(struct tty_struct *, const unsigned char *, int);
191static unsigned int moxa_write_room(struct tty_struct *);
192static void moxa_flush_buffer(struct tty_struct *);
193static unsigned int moxa_chars_in_buffer(struct tty_struct *);
194static void moxa_set_termios(struct tty_struct *, struct ktermios *);
195static void moxa_stop(struct tty_struct *);
196static void moxa_start(struct tty_struct *);
197static void moxa_hangup(struct tty_struct *);
198static int moxa_tiocmget(struct tty_struct *tty);
199static int moxa_tiocmset(struct tty_struct *tty,
200 unsigned int set, unsigned int clear);
201static void moxa_poll(struct timer_list *);
202static void moxa_set_tty_param(struct tty_struct *, struct ktermios *);
203static void moxa_shutdown(struct tty_port *);
204static int moxa_carrier_raised(struct tty_port *);
205static void moxa_dtr_rts(struct tty_port *, int);
206
207
208
209static void MoxaPortEnable(struct moxa_port *);
210static void MoxaPortDisable(struct moxa_port *);
211static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t);
212static int MoxaPortGetLineOut(struct moxa_port *, int *, int *);
213static void MoxaPortLineCtrl(struct moxa_port *, int, int);
214static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int);
215static int MoxaPortLineStatus(struct moxa_port *);
216static void MoxaPortFlushData(struct moxa_port *, int);
217static int MoxaPortWriteData(struct tty_struct *, const unsigned char *, int);
218static int MoxaPortReadData(struct moxa_port *);
219static unsigned int MoxaPortTxQueue(struct moxa_port *);
220static int MoxaPortRxQueue(struct moxa_port *);
221static unsigned int MoxaPortTxFree(struct moxa_port *);
222static void MoxaPortTxDisable(struct moxa_port *);
223static void MoxaPortTxEnable(struct moxa_port *);
224static int moxa_get_serial_info(struct tty_struct *, struct serial_struct *);
225static int moxa_set_serial_info(struct tty_struct *, struct serial_struct *);
226static void MoxaSetFifo(struct moxa_port *port, int enable);
227
228
229
230
231
232static DEFINE_SPINLOCK(moxafunc_lock);
233
234static void moxa_wait_finish(void __iomem *ofsAddr)
235{
236 unsigned long end = jiffies + moxaFuncTout;
237
238 while (readw(ofsAddr + FuncCode) != 0)
239 if (time_after(jiffies, end))
240 return;
241 if (readw(ofsAddr + FuncCode) != 0)
242 printk_ratelimited(KERN_WARNING "moxa function expired\n");
243}
244
245static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg)
246{
247 unsigned long flags;
248 spin_lock_irqsave(&moxafunc_lock, flags);
249 writew(arg, ofsAddr + FuncArg);
250 writew(cmd, ofsAddr + FuncCode);
251 moxa_wait_finish(ofsAddr);
252 spin_unlock_irqrestore(&moxafunc_lock, flags);
253}
254
255static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg)
256{
257 unsigned long flags;
258 u16 ret;
259 spin_lock_irqsave(&moxafunc_lock, flags);
260 writew(arg, ofsAddr + FuncArg);
261 writew(cmd, ofsAddr + FuncCode);
262 moxa_wait_finish(ofsAddr);
263 ret = readw(ofsAddr + FuncArg);
264 spin_unlock_irqrestore(&moxafunc_lock, flags);
265 return ret;
266}
267
268static void moxa_low_water_check(void __iomem *ofsAddr)
269{
270 u16 rptr, wptr, mask, len;
271
272 if (readb(ofsAddr + FlagStat) & Xoff_state) {
273 rptr = readw(ofsAddr + RXrptr);
274 wptr = readw(ofsAddr + RXwptr);
275 mask = readw(ofsAddr + RX_mask);
276 len = (wptr - rptr) & mask;
277 if (len <= Low_water)
278 moxafunc(ofsAddr, FC_SendXon, 0);
279 }
280}
281
282
283
284
285
286static int moxa_ioctl(struct tty_struct *tty,
287 unsigned int cmd, unsigned long arg)
288{
289 struct moxa_port *ch = tty->driver_data;
290 void __user *argp = (void __user *)arg;
291 int status, ret = 0;
292
293 if (tty->index == MAX_PORTS) {
294 if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE &&
295 cmd != MOXA_GETMSTATUS)
296 return -EINVAL;
297 } else if (!ch)
298 return -ENODEV;
299
300 switch (cmd) {
301 case MOXA_GETDATACOUNT:
302 moxaLog.tick = jiffies;
303 if (copy_to_user(argp, &moxaLog, sizeof(moxaLog)))
304 ret = -EFAULT;
305 break;
306 case MOXA_FLUSH_QUEUE:
307 MoxaPortFlushData(ch, arg);
308 break;
309 case MOXA_GET_IOQUEUE: {
310 struct moxaq_str __user *argm = argp;
311 struct moxaq_str tmp;
312 struct moxa_port *p;
313 unsigned int i, j;
314
315 for (i = 0; i < MAX_BOARDS; i++) {
316 p = moxa_boards[i].ports;
317 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
318 memset(&tmp, 0, sizeof(tmp));
319 spin_lock_bh(&moxa_lock);
320 if (moxa_boards[i].ready) {
321 tmp.inq = MoxaPortRxQueue(p);
322 tmp.outq = MoxaPortTxQueue(p);
323 }
324 spin_unlock_bh(&moxa_lock);
325 if (copy_to_user(argm, &tmp, sizeof(tmp)))
326 return -EFAULT;
327 }
328 }
329 break;
330 } case MOXA_GET_OQUEUE:
331 status = MoxaPortTxQueue(ch);
332 ret = put_user(status, (unsigned long __user *)argp);
333 break;
334 case MOXA_GET_IQUEUE:
335 status = MoxaPortRxQueue(ch);
336 ret = put_user(status, (unsigned long __user *)argp);
337 break;
338 case MOXA_GETMSTATUS: {
339 struct mxser_mstatus __user *argm = argp;
340 struct mxser_mstatus tmp;
341 struct moxa_port *p;
342 unsigned int i, j;
343
344 for (i = 0; i < MAX_BOARDS; i++) {
345 p = moxa_boards[i].ports;
346 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
347 struct tty_struct *ttyp;
348 memset(&tmp, 0, sizeof(tmp));
349 spin_lock_bh(&moxa_lock);
350 if (!moxa_boards[i].ready) {
351 spin_unlock_bh(&moxa_lock);
352 goto copy;
353 }
354
355 status = MoxaPortLineStatus(p);
356 spin_unlock_bh(&moxa_lock);
357
358 if (status & 1)
359 tmp.cts = 1;
360 if (status & 2)
361 tmp.dsr = 1;
362 if (status & 4)
363 tmp.dcd = 1;
364
365 ttyp = tty_port_tty_get(&p->port);
366 if (!ttyp)
367 tmp.cflag = p->cflag;
368 else
369 tmp.cflag = ttyp->termios.c_cflag;
370 tty_kref_put(ttyp);
371copy:
372 if (copy_to_user(argm, &tmp, sizeof(tmp)))
373 return -EFAULT;
374 }
375 }
376 break;
377 }
378 default:
379 ret = -ENOIOCTLCMD;
380 }
381 return ret;
382}
383
384static int moxa_break_ctl(struct tty_struct *tty, int state)
385{
386 struct moxa_port *port = tty->driver_data;
387
388 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak,
389 Magic_code);
390 return 0;
391}
392
393static const struct tty_operations moxa_ops = {
394 .open = moxa_open,
395 .close = moxa_close,
396 .write = moxa_write,
397 .write_room = moxa_write_room,
398 .flush_buffer = moxa_flush_buffer,
399 .chars_in_buffer = moxa_chars_in_buffer,
400 .ioctl = moxa_ioctl,
401 .set_termios = moxa_set_termios,
402 .stop = moxa_stop,
403 .start = moxa_start,
404 .hangup = moxa_hangup,
405 .break_ctl = moxa_break_ctl,
406 .tiocmget = moxa_tiocmget,
407 .tiocmset = moxa_tiocmset,
408 .set_serial = moxa_set_serial_info,
409 .get_serial = moxa_get_serial_info,
410};
411
412static const struct tty_port_operations moxa_port_ops = {
413 .carrier_raised = moxa_carrier_raised,
414 .dtr_rts = moxa_dtr_rts,
415 .shutdown = moxa_shutdown,
416};
417
418static struct tty_driver *moxaDriver;
419static DEFINE_TIMER(moxaTimer, moxa_poll);
420
421
422
423
424
425static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model)
426{
427 switch (brd->boardType) {
428 case MOXA_BOARD_C218_ISA:
429 case MOXA_BOARD_C218_PCI:
430 if (model != 1)
431 goto err;
432 break;
433 case MOXA_BOARD_CP204J:
434 if (model != 3)
435 goto err;
436 break;
437 default:
438 if (model != 2)
439 goto err;
440 break;
441 }
442 return 0;
443err:
444 return -EINVAL;
445}
446
447static int moxa_check_fw(const void *ptr)
448{
449 const __le16 *lptr = ptr;
450
451 if (*lptr != cpu_to_le16(0x7980))
452 return -EINVAL;
453
454 return 0;
455}
456
457static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf,
458 size_t len)
459{
460 void __iomem *baseAddr = brd->basemem;
461 u16 tmp;
462
463 writeb(HW_reset, baseAddr + Control_reg);
464 msleep(10);
465 memset_io(baseAddr, 0, 4096);
466 memcpy_toio(baseAddr, buf, len);
467 writeb(0, baseAddr + Control_reg);
468
469 msleep(2000);
470
471 switch (brd->boardType) {
472 case MOXA_BOARD_C218_ISA:
473 case MOXA_BOARD_C218_PCI:
474 tmp = readw(baseAddr + C218_key);
475 if (tmp != C218_KeyCode)
476 goto err;
477 break;
478 case MOXA_BOARD_CP204J:
479 tmp = readw(baseAddr + C218_key);
480 if (tmp != CP204J_KeyCode)
481 goto err;
482 break;
483 default:
484 tmp = readw(baseAddr + C320_key);
485 if (tmp != C320_KeyCode)
486 goto err;
487 tmp = readw(baseAddr + C320_status);
488 if (tmp != STS_init) {
489 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic "
490 "module not found\n");
491 return -EIO;
492 }
493 break;
494 }
495
496 return 0;
497err:
498 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n");
499 return -EIO;
500}
501
502static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr,
503 size_t len)
504{
505 void __iomem *baseAddr = brd->basemem;
506
507 if (len < 7168) {
508 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n");
509 return -EINVAL;
510 }
511
512 writew(len - 7168 - 2, baseAddr + C320bapi_len);
513 writeb(1, baseAddr + Control_reg);
514 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168);
515 writeb(2, baseAddr + Control_reg);
516 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168);
517
518 return 0;
519}
520
521static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
522 size_t len)
523{
524 void __iomem *baseAddr = brd->basemem;
525 const __le16 *uptr = ptr;
526 size_t wlen, len2, j;
527 unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
528 unsigned int i, retry;
529 u16 usum, keycode;
530
531 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode :
532 C218_KeyCode;
533
534 switch (brd->boardType) {
535 case MOXA_BOARD_CP204J:
536 case MOXA_BOARD_C218_ISA:
537 case MOXA_BOARD_C218_PCI:
538 key = C218_key;
539 loadbuf = C218_LoadBuf;
540 loadlen = C218DLoad_len;
541 checksum = C218check_sum;
542 checksum_ok = C218chksum_ok;
543 break;
544 default:
545 key = C320_key;
546 keycode = C320_KeyCode;
547 loadbuf = C320_LoadBuf;
548 loadlen = C320DLoad_len;
549 checksum = C320check_sum;
550 checksum_ok = C320chksum_ok;
551 break;
552 }
553
554 usum = 0;
555 wlen = len >> 1;
556 for (i = 0; i < wlen; i++)
557 usum += le16_to_cpu(uptr[i]);
558 retry = 0;
559 do {
560 wlen = len >> 1;
561 j = 0;
562 while (wlen) {
563 len2 = (wlen > 2048) ? 2048 : wlen;
564 wlen -= len2;
565 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1);
566 j += len2 << 1;
567
568 writew(len2, baseAddr + loadlen);
569 writew(0, baseAddr + key);
570 for (i = 0; i < 100; i++) {
571 if (readw(baseAddr + key) == keycode)
572 break;
573 msleep(10);
574 }
575 if (readw(baseAddr + key) != keycode)
576 return -EIO;
577 }
578 writew(0, baseAddr + loadlen);
579 writew(usum, baseAddr + checksum);
580 writew(0, baseAddr + key);
581 for (i = 0; i < 100; i++) {
582 if (readw(baseAddr + key) == keycode)
583 break;
584 msleep(10);
585 }
586 retry++;
587 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3));
588 if (readb(baseAddr + checksum_ok) != 1)
589 return -EIO;
590
591 writew(0, baseAddr + key);
592 for (i = 0; i < 600; i++) {
593 if (readw(baseAddr + Magic_no) == Magic_code)
594 break;
595 msleep(10);
596 }
597 if (readw(baseAddr + Magic_no) != Magic_code)
598 return -EIO;
599
600 if (MOXA_IS_320(brd)) {
601 if (brd->busType == MOXA_BUS_TYPE_PCI) {
602 writew(0x3800, baseAddr + TMS320_PORT1);
603 writew(0x3900, baseAddr + TMS320_PORT2);
604 writew(28499, baseAddr + TMS320_CLOCK);
605 } else {
606 writew(0x3200, baseAddr + TMS320_PORT1);
607 writew(0x3400, baseAddr + TMS320_PORT2);
608 writew(19999, baseAddr + TMS320_CLOCK);
609 }
610 }
611 writew(1, baseAddr + Disable_IRQ);
612 writew(0, baseAddr + Magic_no);
613 for (i = 0; i < 500; i++) {
614 if (readw(baseAddr + Magic_no) == Magic_code)
615 break;
616 msleep(10);
617 }
618 if (readw(baseAddr + Magic_no) != Magic_code)
619 return -EIO;
620
621 if (MOXA_IS_320(brd)) {
622 j = readw(baseAddr + Module_cnt);
623 if (j <= 0)
624 return -EIO;
625 brd->numPorts = j * 8;
626 writew(j, baseAddr + Module_no);
627 writew(0, baseAddr + Magic_no);
628 for (i = 0; i < 600; i++) {
629 if (readw(baseAddr + Magic_no) == Magic_code)
630 break;
631 msleep(10);
632 }
633 if (readw(baseAddr + Magic_no) != Magic_code)
634 return -EIO;
635 }
636 brd->intNdx = baseAddr + IRQindex;
637 brd->intPend = baseAddr + IRQpending;
638 brd->intTable = baseAddr + IRQtable;
639
640 return 0;
641}
642
643static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr,
644 size_t len)
645{
646 void __iomem *ofsAddr, *baseAddr = brd->basemem;
647 struct moxa_port *port;
648 int retval, i;
649
650 if (len % 2) {
651 printk(KERN_ERR "MOXA: bios length is not even\n");
652 return -EINVAL;
653 }
654
655 retval = moxa_real_load_code(brd, ptr, len);
656 if (retval)
657 return retval;
658
659 switch (brd->boardType) {
660 case MOXA_BOARD_C218_ISA:
661 case MOXA_BOARD_C218_PCI:
662 case MOXA_BOARD_CP204J:
663 port = brd->ports;
664 for (i = 0; i < brd->numPorts; i++, port++) {
665 port->board = brd;
666 port->DCDState = 0;
667 port->tableAddr = baseAddr + Extern_table +
668 Extern_size * i;
669 ofsAddr = port->tableAddr;
670 writew(C218rx_mask, ofsAddr + RX_mask);
671 writew(C218tx_mask, ofsAddr + TX_mask);
672 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
673 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
674
675 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
676 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
677
678 }
679 break;
680 default:
681 port = brd->ports;
682 for (i = 0; i < brd->numPorts; i++, port++) {
683 port->board = brd;
684 port->DCDState = 0;
685 port->tableAddr = baseAddr + Extern_table +
686 Extern_size * i;
687 ofsAddr = port->tableAddr;
688 switch (brd->numPorts) {
689 case 8:
690 writew(C320p8rx_mask, ofsAddr + RX_mask);
691 writew(C320p8tx_mask, ofsAddr + TX_mask);
692 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
693 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
694 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
695 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
696
697 break;
698 case 16:
699 writew(C320p16rx_mask, ofsAddr + RX_mask);
700 writew(C320p16tx_mask, ofsAddr + TX_mask);
701 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
702 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
703 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
704 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
705 break;
706
707 case 24:
708 writew(C320p24rx_mask, ofsAddr + RX_mask);
709 writew(C320p24tx_mask, ofsAddr + TX_mask);
710 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
711 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
712 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
713 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
714 break;
715 case 32:
716 writew(C320p32rx_mask, ofsAddr + RX_mask);
717 writew(C320p32tx_mask, ofsAddr + TX_mask);
718 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
719 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
720 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
721 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
722 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
723 break;
724 }
725 }
726 break;
727 }
728 return 0;
729}
730
731static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw)
732{
733 const void *ptr = fw->data;
734 char rsn[64];
735 u16 lens[5];
736 size_t len;
737 unsigned int a, lenp, lencnt;
738 int ret = -EINVAL;
739 struct {
740 __le32 magic;
741 u8 reserved1[2];
742 u8 type;
743 u8 model;
744 u8 reserved2[8];
745 __le16 len[5];
746 } const *hdr = ptr;
747
748 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens));
749
750 if (fw->size < MOXA_FW_HDRLEN) {
751 strcpy(rsn, "too short (even header won't fit)");
752 goto err;
753 }
754 if (hdr->magic != cpu_to_le32(0x30343034)) {
755 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic));
756 goto err;
757 }
758 if (hdr->type != 3) {
759 sprintf(rsn, "not for linux, type is %u", hdr->type);
760 goto err;
761 }
762 if (moxa_check_fw_model(brd, hdr->model)) {
763 sprintf(rsn, "not for this card, model is %u", hdr->model);
764 goto err;
765 }
766
767 len = MOXA_FW_HDRLEN;
768 lencnt = hdr->model == 2 ? 5 : 3;
769 for (a = 0; a < ARRAY_SIZE(lens); a++) {
770 lens[a] = le16_to_cpu(hdr->len[a]);
771 if (lens[a] && len + lens[a] <= fw->size &&
772 moxa_check_fw(&fw->data[len]))
773 printk(KERN_WARNING "MOXA firmware: unexpected input "
774 "at offset %u, but going on\n", (u32)len);
775 if (!lens[a] && a < lencnt) {
776 sprintf(rsn, "too few entries in fw file");
777 goto err;
778 }
779 len += lens[a];
780 }
781
782 if (len != fw->size) {
783 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size,
784 (u32)len);
785 goto err;
786 }
787
788 ptr += MOXA_FW_HDRLEN;
789 lenp = 0;
790
791 strcpy(rsn, "read above");
792
793 ret = moxa_load_bios(brd, ptr, lens[lenp]);
794 if (ret)
795 goto err;
796
797
798 ptr += lens[lenp] + lens[lenp + 1];
799 lenp += 2;
800
801 if (hdr->model == 2) {
802 ret = moxa_load_320b(brd, ptr, lens[lenp]);
803 if (ret)
804 goto err;
805
806 ptr += lens[lenp] + lens[lenp + 1];
807 lenp += 2;
808 }
809
810 ret = moxa_load_code(brd, ptr, lens[lenp]);
811 if (ret)
812 goto err;
813
814 return 0;
815err:
816 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn);
817 return ret;
818}
819
820static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev)
821{
822 const struct firmware *fw;
823 const char *file;
824 struct moxa_port *p;
825 unsigned int i, first_idx;
826 int ret;
827
828 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports),
829 GFP_KERNEL);
830 if (brd->ports == NULL) {
831 printk(KERN_ERR "cannot allocate memory for ports\n");
832 ret = -ENOMEM;
833 goto err;
834 }
835
836 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) {
837 tty_port_init(&p->port);
838 p->port.ops = &moxa_port_ops;
839 p->type = PORT_16550A;
840 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
841 }
842
843 switch (brd->boardType) {
844 case MOXA_BOARD_C218_ISA:
845 case MOXA_BOARD_C218_PCI:
846 file = "c218tunx.cod";
847 break;
848 case MOXA_BOARD_CP204J:
849 file = "cp204unx.cod";
850 break;
851 default:
852 file = "c320tunx.cod";
853 break;
854 }
855
856 ret = request_firmware(&fw, file, dev);
857 if (ret) {
858 printk(KERN_ERR "MOXA: request_firmware failed. Make sure "
859 "you've placed '%s' file into your firmware "
860 "loader directory (e.g. /lib/firmware)\n",
861 file);
862 goto err_free;
863 }
864
865 ret = moxa_load_fw(brd, fw);
866
867 release_firmware(fw);
868
869 if (ret)
870 goto err_free;
871
872 spin_lock_bh(&moxa_lock);
873 brd->ready = 1;
874 if (!timer_pending(&moxaTimer))
875 mod_timer(&moxaTimer, jiffies + HZ / 50);
876 spin_unlock_bh(&moxa_lock);
877
878 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
879 for (i = 0; i < brd->numPorts; i++)
880 tty_port_register_device(&brd->ports[i].port, moxaDriver,
881 first_idx + i, dev);
882
883 return 0;
884err_free:
885 for (i = 0; i < MAX_PORTS_PER_BOARD; i++)
886 tty_port_destroy(&brd->ports[i].port);
887 kfree(brd->ports);
888err:
889 return ret;
890}
891
892static void moxa_board_deinit(struct moxa_board_conf *brd)
893{
894 unsigned int a, opened, first_idx;
895
896 mutex_lock(&moxa_openlock);
897 spin_lock_bh(&moxa_lock);
898 brd->ready = 0;
899 spin_unlock_bh(&moxa_lock);
900
901
902 for (a = 0; a < brd->numPorts; a++)
903 if (tty_port_initialized(&brd->ports[a].port))
904 tty_port_tty_hangup(&brd->ports[a].port, false);
905
906 for (a = 0; a < MAX_PORTS_PER_BOARD; a++)
907 tty_port_destroy(&brd->ports[a].port);
908
909 while (1) {
910 opened = 0;
911 for (a = 0; a < brd->numPorts; a++)
912 if (tty_port_initialized(&brd->ports[a].port))
913 opened++;
914 mutex_unlock(&moxa_openlock);
915 if (!opened)
916 break;
917 msleep(50);
918 mutex_lock(&moxa_openlock);
919 }
920
921 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
922 for (a = 0; a < brd->numPorts; a++)
923 tty_unregister_device(moxaDriver, first_idx + a);
924
925 iounmap(brd->basemem);
926 brd->basemem = NULL;
927 kfree(brd->ports);
928}
929
930#ifdef CONFIG_PCI
931static int moxa_pci_probe(struct pci_dev *pdev,
932 const struct pci_device_id *ent)
933{
934 struct moxa_board_conf *board;
935 unsigned int i;
936 int board_type = ent->driver_data;
937 int retval;
938
939 retval = pci_enable_device(pdev);
940 if (retval) {
941 dev_err(&pdev->dev, "can't enable pci device\n");
942 goto err;
943 }
944
945 for (i = 0; i < MAX_BOARDS; i++)
946 if (moxa_boards[i].basemem == NULL)
947 break;
948
949 retval = -ENODEV;
950 if (i >= MAX_BOARDS) {
951 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
952 "found. Board is ignored.\n", MAX_BOARDS);
953 goto err;
954 }
955
956 board = &moxa_boards[i];
957
958 retval = pci_request_region(pdev, 2, "moxa-base");
959 if (retval) {
960 dev_err(&pdev->dev, "can't request pci region 2\n");
961 goto err;
962 }
963
964 board->basemem = ioremap(pci_resource_start(pdev, 2), 0x4000);
965 if (board->basemem == NULL) {
966 dev_err(&pdev->dev, "can't remap io space 2\n");
967 retval = -ENOMEM;
968 goto err_reg;
969 }
970
971 board->boardType = board_type;
972 switch (board_type) {
973 case MOXA_BOARD_C218_ISA:
974 case MOXA_BOARD_C218_PCI:
975 board->numPorts = 8;
976 break;
977
978 case MOXA_BOARD_CP204J:
979 board->numPorts = 4;
980 break;
981 default:
982 board->numPorts = 0;
983 break;
984 }
985 board->busType = MOXA_BUS_TYPE_PCI;
986
987 retval = moxa_init_board(board, &pdev->dev);
988 if (retval)
989 goto err_base;
990
991 pci_set_drvdata(pdev, board);
992
993 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n",
994 moxa_brdname[board_type - 1], board->numPorts);
995
996 return 0;
997err_base:
998 iounmap(board->basemem);
999 board->basemem = NULL;
1000err_reg:
1001 pci_release_region(pdev, 2);
1002err:
1003 return retval;
1004}
1005
1006static void moxa_pci_remove(struct pci_dev *pdev)
1007{
1008 struct moxa_board_conf *brd = pci_get_drvdata(pdev);
1009
1010 moxa_board_deinit(brd);
1011
1012 pci_release_region(pdev, 2);
1013}
1014
1015static struct pci_driver moxa_pci_driver = {
1016 .name = "moxa",
1017 .id_table = moxa_pcibrds,
1018 .probe = moxa_pci_probe,
1019 .remove = moxa_pci_remove
1020};
1021#endif
1022
1023static int __init moxa_init(void)
1024{
1025 unsigned int isabrds = 0;
1026 int retval = 0;
1027 struct moxa_board_conf *brd = moxa_boards;
1028 unsigned int i;
1029
1030 printk(KERN_INFO "MOXA Intellio family driver version %s\n",
1031 MOXA_VERSION);
1032
1033 tty_port_init(&moxa_service_port);
1034
1035 moxaDriver = tty_alloc_driver(MAX_PORTS + 1,
1036 TTY_DRIVER_REAL_RAW |
1037 TTY_DRIVER_DYNAMIC_DEV);
1038 if (IS_ERR(moxaDriver))
1039 return PTR_ERR(moxaDriver);
1040
1041 moxaDriver->name = "ttyMX";
1042 moxaDriver->major = ttymajor;
1043 moxaDriver->minor_start = 0;
1044 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
1045 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
1046 moxaDriver->init_termios = tty_std_termios;
1047 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
1048 moxaDriver->init_termios.c_ispeed = 9600;
1049 moxaDriver->init_termios.c_ospeed = 9600;
1050 tty_set_operations(moxaDriver, &moxa_ops);
1051
1052 tty_port_link_device(&moxa_service_port, moxaDriver, MAX_PORTS);
1053
1054 if (tty_register_driver(moxaDriver)) {
1055 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n");
1056 tty_driver_kref_put(moxaDriver);
1057 return -1;
1058 }
1059
1060
1061
1062 for (i = 0; i < MAX_BOARDS; i++) {
1063 if (!baseaddr[i])
1064 break;
1065 if (type[i] == MOXA_BOARD_C218_ISA ||
1066 type[i] == MOXA_BOARD_C320_ISA) {
1067 pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
1068 isabrds + 1, moxa_brdname[type[i] - 1],
1069 baseaddr[i]);
1070 brd->boardType = type[i];
1071 brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 :
1072 numports[i];
1073 brd->busType = MOXA_BUS_TYPE_ISA;
1074 brd->basemem = ioremap(baseaddr[i], 0x4000);
1075 if (!brd->basemem) {
1076 printk(KERN_ERR "MOXA: can't remap %lx\n",
1077 baseaddr[i]);
1078 continue;
1079 }
1080 if (moxa_init_board(brd, NULL)) {
1081 iounmap(brd->basemem);
1082 brd->basemem = NULL;
1083 continue;
1084 }
1085
1086 printk(KERN_INFO "MOXA isa board found at 0x%.8lx and "
1087 "ready (%u ports, firmware loaded)\n",
1088 baseaddr[i], brd->numPorts);
1089
1090 brd++;
1091 isabrds++;
1092 }
1093 }
1094
1095#ifdef CONFIG_PCI
1096 retval = pci_register_driver(&moxa_pci_driver);
1097 if (retval) {
1098 printk(KERN_ERR "Can't register MOXA pci driver!\n");
1099 if (isabrds)
1100 retval = 0;
1101 }
1102#endif
1103
1104 return retval;
1105}
1106
1107static void __exit moxa_exit(void)
1108{
1109 unsigned int i;
1110
1111#ifdef CONFIG_PCI
1112 pci_unregister_driver(&moxa_pci_driver);
1113#endif
1114
1115 for (i = 0; i < MAX_BOARDS; i++)
1116 if (moxa_boards[i].ready)
1117 moxa_board_deinit(&moxa_boards[i]);
1118
1119 del_timer_sync(&moxaTimer);
1120
1121 tty_unregister_driver(moxaDriver);
1122 tty_driver_kref_put(moxaDriver);
1123}
1124
1125module_init(moxa_init);
1126module_exit(moxa_exit);
1127
1128static void moxa_shutdown(struct tty_port *port)
1129{
1130 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1131 MoxaPortDisable(ch);
1132 MoxaPortFlushData(ch, 2);
1133}
1134
1135static int moxa_carrier_raised(struct tty_port *port)
1136{
1137 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1138 int dcd;
1139
1140 spin_lock_irq(&port->lock);
1141 dcd = ch->DCDState;
1142 spin_unlock_irq(&port->lock);
1143 return dcd;
1144}
1145
1146static void moxa_dtr_rts(struct tty_port *port, int onoff)
1147{
1148 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1149 MoxaPortLineCtrl(ch, onoff, onoff);
1150}
1151
1152
1153static int moxa_open(struct tty_struct *tty, struct file *filp)
1154{
1155 struct moxa_board_conf *brd;
1156 struct moxa_port *ch;
1157 int port;
1158
1159 port = tty->index;
1160 if (port == MAX_PORTS) {
1161 return capable(CAP_SYS_ADMIN) ? 0 : -EPERM;
1162 }
1163 if (mutex_lock_interruptible(&moxa_openlock))
1164 return -ERESTARTSYS;
1165 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD];
1166 if (!brd->ready) {
1167 mutex_unlock(&moxa_openlock);
1168 return -ENODEV;
1169 }
1170
1171 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) {
1172 mutex_unlock(&moxa_openlock);
1173 return -ENODEV;
1174 }
1175
1176 ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
1177 ch->port.count++;
1178 tty->driver_data = ch;
1179 tty_port_tty_set(&ch->port, tty);
1180 mutex_lock(&ch->port.mutex);
1181 if (!tty_port_initialized(&ch->port)) {
1182 ch->statusflags = 0;
1183 moxa_set_tty_param(tty, &tty->termios);
1184 MoxaPortLineCtrl(ch, 1, 1);
1185 MoxaPortEnable(ch);
1186 MoxaSetFifo(ch, ch->type == PORT_16550A);
1187 tty_port_set_initialized(&ch->port, 1);
1188 }
1189 mutex_unlock(&ch->port.mutex);
1190 mutex_unlock(&moxa_openlock);
1191
1192 return tty_port_block_til_ready(&ch->port, tty, filp);
1193}
1194
1195static void moxa_close(struct tty_struct *tty, struct file *filp)
1196{
1197 struct moxa_port *ch = tty->driver_data;
1198 ch->cflag = tty->termios.c_cflag;
1199 tty_port_close(&ch->port, tty, filp);
1200}
1201
1202static int moxa_write(struct tty_struct *tty,
1203 const unsigned char *buf, int count)
1204{
1205 struct moxa_port *ch = tty->driver_data;
1206 unsigned long flags;
1207 int len;
1208
1209 if (ch == NULL)
1210 return 0;
1211
1212 spin_lock_irqsave(&moxa_lock, flags);
1213 len = MoxaPortWriteData(tty, buf, count);
1214 spin_unlock_irqrestore(&moxa_lock, flags);
1215
1216 set_bit(LOWWAIT, &ch->statusflags);
1217 return len;
1218}
1219
1220static unsigned int moxa_write_room(struct tty_struct *tty)
1221{
1222 struct moxa_port *ch;
1223
1224 if (tty->flow.stopped)
1225 return 0;
1226 ch = tty->driver_data;
1227 if (ch == NULL)
1228 return 0;
1229 return MoxaPortTxFree(ch);
1230}
1231
1232static void moxa_flush_buffer(struct tty_struct *tty)
1233{
1234 struct moxa_port *ch = tty->driver_data;
1235
1236 if (ch == NULL)
1237 return;
1238 MoxaPortFlushData(ch, 1);
1239 tty_wakeup(tty);
1240}
1241
1242static unsigned int moxa_chars_in_buffer(struct tty_struct *tty)
1243{
1244 struct moxa_port *ch = tty->driver_data;
1245 unsigned int chars;
1246
1247 chars = MoxaPortTxQueue(ch);
1248 if (chars)
1249
1250
1251
1252
1253 set_bit(EMPTYWAIT, &ch->statusflags);
1254 return chars;
1255}
1256
1257static int moxa_tiocmget(struct tty_struct *tty)
1258{
1259 struct moxa_port *ch = tty->driver_data;
1260 int flag = 0, dtr, rts;
1261
1262 MoxaPortGetLineOut(ch, &dtr, &rts);
1263 if (dtr)
1264 flag |= TIOCM_DTR;
1265 if (rts)
1266 flag |= TIOCM_RTS;
1267 dtr = MoxaPortLineStatus(ch);
1268 if (dtr & 1)
1269 flag |= TIOCM_CTS;
1270 if (dtr & 2)
1271 flag |= TIOCM_DSR;
1272 if (dtr & 4)
1273 flag |= TIOCM_CD;
1274 return flag;
1275}
1276
1277static int moxa_tiocmset(struct tty_struct *tty,
1278 unsigned int set, unsigned int clear)
1279{
1280 struct moxa_port *ch;
1281 int dtr, rts;
1282
1283 mutex_lock(&moxa_openlock);
1284 ch = tty->driver_data;
1285 if (!ch) {
1286 mutex_unlock(&moxa_openlock);
1287 return -EINVAL;
1288 }
1289
1290 MoxaPortGetLineOut(ch, &dtr, &rts);
1291 if (set & TIOCM_RTS)
1292 rts = 1;
1293 if (set & TIOCM_DTR)
1294 dtr = 1;
1295 if (clear & TIOCM_RTS)
1296 rts = 0;
1297 if (clear & TIOCM_DTR)
1298 dtr = 0;
1299 MoxaPortLineCtrl(ch, dtr, rts);
1300 mutex_unlock(&moxa_openlock);
1301 return 0;
1302}
1303
1304static void moxa_set_termios(struct tty_struct *tty,
1305 struct ktermios *old_termios)
1306{
1307 struct moxa_port *ch = tty->driver_data;
1308
1309 if (ch == NULL)
1310 return;
1311 moxa_set_tty_param(tty, old_termios);
1312 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty))
1313 wake_up_interruptible(&ch->port.open_wait);
1314}
1315
1316static void moxa_stop(struct tty_struct *tty)
1317{
1318 struct moxa_port *ch = tty->driver_data;
1319
1320 if (ch == NULL)
1321 return;
1322 MoxaPortTxDisable(ch);
1323 set_bit(TXSTOPPED, &ch->statusflags);
1324}
1325
1326
1327static void moxa_start(struct tty_struct *tty)
1328{
1329 struct moxa_port *ch = tty->driver_data;
1330
1331 if (ch == NULL)
1332 return;
1333
1334 if (!test_bit(TXSTOPPED, &ch->statusflags))
1335 return;
1336
1337 MoxaPortTxEnable(ch);
1338 clear_bit(TXSTOPPED, &ch->statusflags);
1339}
1340
1341static void moxa_hangup(struct tty_struct *tty)
1342{
1343 struct moxa_port *ch = tty->driver_data;
1344 tty_port_hangup(&ch->port);
1345}
1346
1347static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd)
1348{
1349 unsigned long flags;
1350 dcd = !!dcd;
1351
1352 spin_lock_irqsave(&p->port.lock, flags);
1353 if (dcd != p->DCDState) {
1354 p->DCDState = dcd;
1355 spin_unlock_irqrestore(&p->port.lock, flags);
1356 if (!dcd)
1357 tty_port_tty_hangup(&p->port, true);
1358 }
1359 else
1360 spin_unlock_irqrestore(&p->port.lock, flags);
1361}
1362
1363static int moxa_poll_port(struct moxa_port *p, unsigned int handle,
1364 u16 __iomem *ip)
1365{
1366 struct tty_struct *tty = tty_port_tty_get(&p->port);
1367 void __iomem *ofsAddr;
1368 unsigned int inited = tty_port_initialized(&p->port);
1369 u16 intr;
1370
1371 if (tty) {
1372 if (test_bit(EMPTYWAIT, &p->statusflags) &&
1373 MoxaPortTxQueue(p) == 0) {
1374 clear_bit(EMPTYWAIT, &p->statusflags);
1375 tty_wakeup(tty);
1376 }
1377 if (test_bit(LOWWAIT, &p->statusflags) && !tty->flow.stopped &&
1378 MoxaPortTxQueue(p) <= WAKEUP_CHARS) {
1379 clear_bit(LOWWAIT, &p->statusflags);
1380 tty_wakeup(tty);
1381 }
1382
1383 if (inited && !tty_throttled(tty) &&
1384 MoxaPortRxQueue(p) > 0) {
1385 MoxaPortReadData(p);
1386 tty_schedule_flip(&p->port);
1387 }
1388 } else {
1389 clear_bit(EMPTYWAIT, &p->statusflags);
1390 MoxaPortFlushData(p, 0);
1391 }
1392
1393 if (!handle)
1394 goto put;
1395
1396 intr = readw(ip);
1397 if (intr == 0)
1398 goto put;
1399
1400 writew(0, ip);
1401 ofsAddr = p->tableAddr;
1402 if (intr & IntrTx)
1403 writew(readw(ofsAddr + HostStat) & ~WakeupTx,
1404 ofsAddr + HostStat);
1405
1406 if (!inited)
1407 goto put;
1408
1409 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) {
1410 tty_insert_flip_char(&p->port, 0, TTY_BREAK);
1411 tty_schedule_flip(&p->port);
1412 }
1413
1414 if (intr & IntrLine)
1415 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state);
1416put:
1417 tty_kref_put(tty);
1418
1419 return 0;
1420}
1421
1422static void moxa_poll(struct timer_list *unused)
1423{
1424 struct moxa_board_conf *brd;
1425 u16 __iomem *ip;
1426 unsigned int card, port, served = 0;
1427
1428 spin_lock(&moxa_lock);
1429 for (card = 0; card < MAX_BOARDS; card++) {
1430 brd = &moxa_boards[card];
1431 if (!brd->ready)
1432 continue;
1433
1434 served++;
1435
1436 ip = NULL;
1437 if (readb(brd->intPend) == 0xff)
1438 ip = brd->intTable + readb(brd->intNdx);
1439
1440 for (port = 0; port < brd->numPorts; port++)
1441 moxa_poll_port(&brd->ports[port], !!ip, ip + port);
1442
1443 if (ip)
1444 writeb(0, brd->intPend);
1445
1446 if (moxaLowWaterChk) {
1447 struct moxa_port *p = brd->ports;
1448 for (port = 0; port < brd->numPorts; port++, p++)
1449 if (p->lowChkFlag) {
1450 p->lowChkFlag = 0;
1451 moxa_low_water_check(p->tableAddr);
1452 }
1453 }
1454 }
1455 moxaLowWaterChk = 0;
1456
1457 if (served)
1458 mod_timer(&moxaTimer, jiffies + HZ / 50);
1459 spin_unlock(&moxa_lock);
1460}
1461
1462
1463
1464static void moxa_set_tty_param(struct tty_struct *tty, struct ktermios *old_termios)
1465{
1466 register struct ktermios *ts = &tty->termios;
1467 struct moxa_port *ch = tty->driver_data;
1468 int rts, cts, txflow, rxflow, xany, baud;
1469
1470 rts = cts = txflow = rxflow = xany = 0;
1471 if (ts->c_cflag & CRTSCTS)
1472 rts = cts = 1;
1473 if (ts->c_iflag & IXON)
1474 txflow = 1;
1475 if (ts->c_iflag & IXOFF)
1476 rxflow = 1;
1477 if (ts->c_iflag & IXANY)
1478 xany = 1;
1479
1480 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany);
1481 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty));
1482 if (baud == -1)
1483 baud = tty_termios_baud_rate(old_termios);
1484
1485 tty_encode_baud_rate(tty, baud, baud);
1486}
1487
1488
1489
1490
1491
1492static void MoxaPortFlushData(struct moxa_port *port, int mode)
1493{
1494 void __iomem *ofsAddr;
1495 if (mode < 0 || mode > 2)
1496 return;
1497 ofsAddr = port->tableAddr;
1498 moxafunc(ofsAddr, FC_FlushQueue, mode);
1499 if (mode != 1) {
1500 port->lowChkFlag = 0;
1501 moxa_low_water_check(ofsAddr);
1502 }
1503}
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1697static void MoxaPortEnable(struct moxa_port *port)
1698{
1699 void __iomem *ofsAddr;
1700 u16 lowwater = 512;
1701
1702 ofsAddr = port->tableAddr;
1703 writew(lowwater, ofsAddr + Low_water);
1704 if (MOXA_IS_320(port->board))
1705 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
1706 else
1707 writew(readw(ofsAddr + HostStat) | WakeupBreak,
1708 ofsAddr + HostStat);
1709
1710 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1711 moxafunc(ofsAddr, FC_FlushQueue, 2);
1712
1713 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1714 MoxaPortLineStatus(port);
1715}
1716
1717static void MoxaPortDisable(struct moxa_port *port)
1718{
1719 void __iomem *ofsAddr = port->tableAddr;
1720
1721 moxafunc(ofsAddr, FC_SetFlowCtl, 0);
1722 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1723 writew(0, ofsAddr + HostStat);
1724 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1725}
1726
1727static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud)
1728{
1729 void __iomem *ofsAddr = port->tableAddr;
1730 unsigned int clock, val;
1731 speed_t max;
1732
1733 max = MOXA_IS_320(port->board) ? 460800 : 921600;
1734 if (baud < 50)
1735 return 0;
1736 if (baud > max)
1737 baud = max;
1738 clock = 921600;
1739 val = clock / baud;
1740 moxafunc(ofsAddr, FC_SetBaud, val);
1741 baud = clock / val;
1742 return baud;
1743}
1744
1745static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio,
1746 speed_t baud)
1747{
1748 void __iomem *ofsAddr;
1749 tcflag_t mode = 0;
1750
1751 ofsAddr = port->tableAddr;
1752
1753 mode = termio->c_cflag & CSIZE;
1754 if (mode == CS5)
1755 mode = MX_CS5;
1756 else if (mode == CS6)
1757 mode = MX_CS6;
1758 else if (mode == CS7)
1759 mode = MX_CS7;
1760 else if (mode == CS8)
1761 mode = MX_CS8;
1762
1763 if (termio->c_cflag & CSTOPB) {
1764 if (mode == MX_CS5)
1765 mode |= MX_STOP15;
1766 else
1767 mode |= MX_STOP2;
1768 } else
1769 mode |= MX_STOP1;
1770
1771 if (termio->c_cflag & PARENB) {
1772 if (termio->c_cflag & PARODD) {
1773 if (termio->c_cflag & CMSPAR)
1774 mode |= MX_PARMARK;
1775 else
1776 mode |= MX_PARODD;
1777 } else {
1778 if (termio->c_cflag & CMSPAR)
1779 mode |= MX_PARSPACE;
1780 else
1781 mode |= MX_PAREVEN;
1782 }
1783 } else
1784 mode |= MX_PARNONE;
1785
1786 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode);
1787
1788 if (MOXA_IS_320(port->board) && baud >= 921600)
1789 return -1;
1790
1791 baud = MoxaPortSetBaud(port, baud);
1792
1793 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
1794 spin_lock_irq(&moxafunc_lock);
1795 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
1796 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
1797 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
1798 moxa_wait_finish(ofsAddr);
1799 spin_unlock_irq(&moxafunc_lock);
1800
1801 }
1802 return baud;
1803}
1804
1805static int MoxaPortGetLineOut(struct moxa_port *port, int *dtrState,
1806 int *rtsState)
1807{
1808 if (dtrState)
1809 *dtrState = !!(port->lineCtrl & DTR_ON);
1810 if (rtsState)
1811 *rtsState = !!(port->lineCtrl & RTS_ON);
1812
1813 return 0;
1814}
1815
1816static void MoxaPortLineCtrl(struct moxa_port *port, int dtr, int rts)
1817{
1818 u8 mode = 0;
1819
1820 if (dtr)
1821 mode |= DTR_ON;
1822 if (rts)
1823 mode |= RTS_ON;
1824 port->lineCtrl = mode;
1825 moxafunc(port->tableAddr, FC_LineControl, mode);
1826}
1827
1828static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts,
1829 int txflow, int rxflow, int txany)
1830{
1831 int mode = 0;
1832
1833 if (rts)
1834 mode |= RTS_FlowCtl;
1835 if (cts)
1836 mode |= CTS_FlowCtl;
1837 if (txflow)
1838 mode |= Tx_FlowCtl;
1839 if (rxflow)
1840 mode |= Rx_FlowCtl;
1841 if (txany)
1842 mode |= IXM_IXANY;
1843 moxafunc(port->tableAddr, FC_SetFlowCtl, mode);
1844}
1845
1846static int MoxaPortLineStatus(struct moxa_port *port)
1847{
1848 void __iomem *ofsAddr;
1849 int val;
1850
1851 ofsAddr = port->tableAddr;
1852 if (MOXA_IS_320(port->board))
1853 val = moxafuncret(ofsAddr, FC_LineStatus, 0);
1854 else
1855 val = readw(ofsAddr + FlagStat) >> 4;
1856 val &= 0x0B;
1857 if (val & 8)
1858 val |= 4;
1859 moxa_new_dcdstate(port, val & 8);
1860 val &= 7;
1861 return val;
1862}
1863
1864static int MoxaPortWriteData(struct tty_struct *tty,
1865 const unsigned char *buffer, int len)
1866{
1867 struct moxa_port *port = tty->driver_data;
1868 void __iomem *baseAddr, *ofsAddr, *ofs;
1869 unsigned int c, total;
1870 u16 head, tail, tx_mask, spage, epage;
1871 u16 pageno, pageofs, bufhead;
1872
1873 ofsAddr = port->tableAddr;
1874 baseAddr = port->board->basemem;
1875 tx_mask = readw(ofsAddr + TX_mask);
1876 spage = readw(ofsAddr + Page_txb);
1877 epage = readw(ofsAddr + EndPage_txb);
1878 tail = readw(ofsAddr + TXwptr);
1879 head = readw(ofsAddr + TXrptr);
1880 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask);
1881 if (c > len)
1882 c = len;
1883 moxaLog.txcnt[port->port.tty->index] += c;
1884 total = c;
1885 if (spage == epage) {
1886 bufhead = readw(ofsAddr + Ofs_txb);
1887 writew(spage, baseAddr + Control_reg);
1888 while (c > 0) {
1889 if (head > tail)
1890 len = head - tail - 1;
1891 else
1892 len = tx_mask + 1 - tail;
1893 len = (c > len) ? len : c;
1894 ofs = baseAddr + DynPage_addr + bufhead + tail;
1895 memcpy_toio(ofs, buffer, len);
1896 buffer += len;
1897 tail = (tail + len) & tx_mask;
1898 c -= len;
1899 }
1900 } else {
1901 pageno = spage + (tail >> 13);
1902 pageofs = tail & Page_mask;
1903 while (c > 0) {
1904 len = Page_size - pageofs;
1905 if (len > c)
1906 len = c;
1907 writeb(pageno, baseAddr + Control_reg);
1908 ofs = baseAddr + DynPage_addr + pageofs;
1909 memcpy_toio(ofs, buffer, len);
1910 buffer += len;
1911 if (++pageno == epage)
1912 pageno = spage;
1913 pageofs = 0;
1914 c -= len;
1915 }
1916 tail = (tail + total) & tx_mask;
1917 }
1918 writew(tail, ofsAddr + TXwptr);
1919 writeb(1, ofsAddr + CD180TXirq);
1920 return total;
1921}
1922
1923static int MoxaPortReadData(struct moxa_port *port)
1924{
1925 struct tty_struct *tty = port->port.tty;
1926 unsigned char *dst;
1927 void __iomem *baseAddr, *ofsAddr, *ofs;
1928 unsigned int count, len, total;
1929 u16 tail, rx_mask, spage, epage;
1930 u16 pageno, pageofs, bufhead, head;
1931
1932 ofsAddr = port->tableAddr;
1933 baseAddr = port->board->basemem;
1934 head = readw(ofsAddr + RXrptr);
1935 tail = readw(ofsAddr + RXwptr);
1936 rx_mask = readw(ofsAddr + RX_mask);
1937 spage = readw(ofsAddr + Page_rxb);
1938 epage = readw(ofsAddr + EndPage_rxb);
1939 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1);
1940 if (count == 0)
1941 return 0;
1942
1943 total = count;
1944 moxaLog.rxcnt[tty->index] += total;
1945 if (spage == epage) {
1946 bufhead = readw(ofsAddr + Ofs_rxb);
1947 writew(spage, baseAddr + Control_reg);
1948 while (count > 0) {
1949 ofs = baseAddr + DynPage_addr + bufhead + head;
1950 len = (tail >= head) ? (tail - head) :
1951 (rx_mask + 1 - head);
1952 len = tty_prepare_flip_string(&port->port, &dst,
1953 min(len, count));
1954 memcpy_fromio(dst, ofs, len);
1955 head = (head + len) & rx_mask;
1956 count -= len;
1957 }
1958 } else {
1959 pageno = spage + (head >> 13);
1960 pageofs = head & Page_mask;
1961 while (count > 0) {
1962 writew(pageno, baseAddr + Control_reg);
1963 ofs = baseAddr + DynPage_addr + pageofs;
1964 len = tty_prepare_flip_string(&port->port, &dst,
1965 min(Page_size - pageofs, count));
1966 memcpy_fromio(dst, ofs, len);
1967
1968 count -= len;
1969 pageofs = (pageofs + len) & Page_mask;
1970 if (pageofs == 0 && ++pageno == epage)
1971 pageno = spage;
1972 }
1973 head = (head + total) & rx_mask;
1974 }
1975 writew(head, ofsAddr + RXrptr);
1976 if (readb(ofsAddr + FlagStat) & Xoff_state) {
1977 moxaLowWaterChk = 1;
1978 port->lowChkFlag = 1;
1979 }
1980 return total;
1981}
1982
1983
1984static unsigned int MoxaPortTxQueue(struct moxa_port *port)
1985{
1986 void __iomem *ofsAddr = port->tableAddr;
1987 u16 rptr, wptr, mask;
1988
1989 rptr = readw(ofsAddr + TXrptr);
1990 wptr = readw(ofsAddr + TXwptr);
1991 mask = readw(ofsAddr + TX_mask);
1992 return (wptr - rptr) & mask;
1993}
1994
1995static unsigned int MoxaPortTxFree(struct moxa_port *port)
1996{
1997 void __iomem *ofsAddr = port->tableAddr;
1998 u16 rptr, wptr, mask;
1999
2000 rptr = readw(ofsAddr + TXrptr);
2001 wptr = readw(ofsAddr + TXwptr);
2002 mask = readw(ofsAddr + TX_mask);
2003 return mask - ((wptr - rptr) & mask);
2004}
2005
2006static int MoxaPortRxQueue(struct moxa_port *port)
2007{
2008 void __iomem *ofsAddr = port->tableAddr;
2009 u16 rptr, wptr, mask;
2010
2011 rptr = readw(ofsAddr + RXrptr);
2012 wptr = readw(ofsAddr + RXwptr);
2013 mask = readw(ofsAddr + RX_mask);
2014 return (wptr - rptr) & mask;
2015}
2016
2017static void MoxaPortTxDisable(struct moxa_port *port)
2018{
2019 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code);
2020}
2021
2022static void MoxaPortTxEnable(struct moxa_port *port)
2023{
2024 moxafunc(port->tableAddr, FC_SetXonState, Magic_code);
2025}
2026
2027static int moxa_get_serial_info(struct tty_struct *tty,
2028 struct serial_struct *ss)
2029{
2030 struct moxa_port *info = tty->driver_data;
2031
2032 if (tty->index == MAX_PORTS)
2033 return -EINVAL;
2034 if (!info)
2035 return -ENODEV;
2036 mutex_lock(&info->port.mutex);
2037 ss->type = info->type;
2038 ss->line = info->port.tty->index;
2039 ss->flags = info->port.flags;
2040 ss->baud_base = 921600;
2041 ss->close_delay = jiffies_to_msecs(info->port.close_delay) / 10;
2042 mutex_unlock(&info->port.mutex);
2043 return 0;
2044}
2045
2046
2047static int moxa_set_serial_info(struct tty_struct *tty,
2048 struct serial_struct *ss)
2049{
2050 struct moxa_port *info = tty->driver_data;
2051 unsigned int close_delay;
2052
2053 if (tty->index == MAX_PORTS)
2054 return -EINVAL;
2055 if (!info)
2056 return -ENODEV;
2057
2058 close_delay = msecs_to_jiffies(ss->close_delay * 10);
2059
2060 mutex_lock(&info->port.mutex);
2061 if (!capable(CAP_SYS_ADMIN)) {
2062 if (close_delay != info->port.close_delay ||
2063 ss->type != info->type ||
2064 ((ss->flags & ~ASYNC_USR_MASK) !=
2065 (info->port.flags & ~ASYNC_USR_MASK))) {
2066 mutex_unlock(&info->port.mutex);
2067 return -EPERM;
2068 }
2069 } else {
2070 info->port.close_delay = close_delay;
2071
2072 MoxaSetFifo(info, ss->type == PORT_16550A);
2073
2074 info->type = ss->type;
2075 }
2076 mutex_unlock(&info->port.mutex);
2077 return 0;
2078}
2079
2080
2081
2082
2083
2084
2085
2086static void MoxaSetFifo(struct moxa_port *port, int enable)
2087{
2088 void __iomem *ofsAddr = port->tableAddr;
2089
2090 if (!enable) {
2091 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2092 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2093 } else {
2094 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2095 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2096 }
2097}
2098
