linux/drivers/tty/serial/8250/8250_mtk.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Mediatek 8250 driver.
   4 *
   5 * Copyright (c) 2014 MundoReader S.L.
   6 * Author: Matthias Brugger <matthias.bgg@gmail.com>
   7 */
   8#include <linux/clk.h>
   9#include <linux/io.h>
  10#include <linux/module.h>
  11#include <linux/of_irq.h>
  12#include <linux/of_platform.h>
  13#include <linux/pinctrl/consumer.h>
  14#include <linux/platform_device.h>
  15#include <linux/pm_runtime.h>
  16#include <linux/serial_8250.h>
  17#include <linux/serial_reg.h>
  18#include <linux/console.h>
  19#include <linux/dma-mapping.h>
  20#include <linux/tty.h>
  21#include <linux/tty_flip.h>
  22
  23#include "8250.h"
  24
  25#define MTK_UART_HIGHS          0x09    /* Highspeed register */
  26#define MTK_UART_SAMPLE_COUNT   0x0a    /* Sample count register */
  27#define MTK_UART_SAMPLE_POINT   0x0b    /* Sample point register */
  28#define MTK_UART_RATE_FIX       0x0d    /* UART Rate Fix Register */
  29#define MTK_UART_ESCAPE_DAT     0x10    /* Escape Character register */
  30#define MTK_UART_ESCAPE_EN      0x11    /* Escape Enable register */
  31#define MTK_UART_DMA_EN         0x13    /* DMA Enable register */
  32#define MTK_UART_RXTRI_AD       0x14    /* RX Trigger address */
  33#define MTK_UART_FRACDIV_L      0x15    /* Fractional divider LSB address */
  34#define MTK_UART_FRACDIV_M      0x16    /* Fractional divider MSB address */
  35#define MTK_UART_DEBUG0 0x18
  36#define MTK_UART_IER_XOFFI      0x20    /* Enable XOFF character interrupt */
  37#define MTK_UART_IER_RTSI       0x40    /* Enable RTS Modem status interrupt */
  38#define MTK_UART_IER_CTSI       0x80    /* Enable CTS Modem status interrupt */
  39
  40#define MTK_UART_EFR_EN         0x10    /* Enable enhancement feature */
  41#define MTK_UART_EFR_RTS        0x40    /* Enable hardware rx flow control */
  42#define MTK_UART_EFR_CTS        0x80    /* Enable hardware tx flow control */
  43#define MTK_UART_EFR_NO_SW_FC   0x0     /* no sw flow control */
  44#define MTK_UART_EFR_XON1_XOFF1 0xa     /* XON1/XOFF1 as sw flow control */
  45#define MTK_UART_EFR_XON2_XOFF2 0x5     /* XON2/XOFF2 as sw flow control */
  46#define MTK_UART_EFR_SW_FC_MASK 0xf     /* Enable CTS Modem status interrupt */
  47#define MTK_UART_EFR_HW_FC      (MTK_UART_EFR_RTS | MTK_UART_EFR_CTS)
  48#define MTK_UART_DMA_EN_TX      0x2
  49#define MTK_UART_DMA_EN_RX      0x5
  50
  51#define MTK_UART_ESCAPE_CHAR    0x77    /* Escape char added under sw fc */
  52#define MTK_UART_RX_SIZE        0x8000
  53#define MTK_UART_TX_TRIGGER     1
  54#define MTK_UART_RX_TRIGGER     MTK_UART_RX_SIZE
  55
  56#ifdef CONFIG_SERIAL_8250_DMA
  57enum dma_rx_status {
  58        DMA_RX_START = 0,
  59        DMA_RX_RUNNING = 1,
  60        DMA_RX_SHUTDOWN = 2,
  61};
  62#endif
  63
  64struct mtk8250_data {
  65        int                     line;
  66        unsigned int            rx_pos;
  67        unsigned int            clk_count;
  68        struct clk              *uart_clk;
  69        struct clk              *bus_clk;
  70        struct uart_8250_dma    *dma;
  71#ifdef CONFIG_SERIAL_8250_DMA
  72        enum dma_rx_status      rx_status;
  73#endif
  74        int                     rx_wakeup_irq;
  75};
  76
  77/* flow control mode */
  78enum {
  79        MTK_UART_FC_NONE,
  80        MTK_UART_FC_SW,
  81        MTK_UART_FC_HW,
  82};
  83
  84#ifdef CONFIG_SERIAL_8250_DMA
  85static void mtk8250_rx_dma(struct uart_8250_port *up);
  86
  87static void mtk8250_dma_rx_complete(void *param)
  88{
  89        struct uart_8250_port *up = param;
  90        struct uart_8250_dma *dma = up->dma;
  91        struct mtk8250_data *data = up->port.private_data;
  92        struct tty_port *tty_port = &up->port.state->port;
  93        struct dma_tx_state state;
  94        int copied, total, cnt;
  95        unsigned char *ptr;
  96        unsigned long flags;
  97
  98        if (data->rx_status == DMA_RX_SHUTDOWN)
  99                return;
 100
 101        spin_lock_irqsave(&up->port.lock, flags);
 102
 103        dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
 104        total = dma->rx_size - state.residue;
 105        cnt = total;
 106
 107        if ((data->rx_pos + cnt) > dma->rx_size)
 108                cnt = dma->rx_size - data->rx_pos;
 109
 110        ptr = (unsigned char *)(data->rx_pos + dma->rx_buf);
 111        copied = tty_insert_flip_string(tty_port, ptr, cnt);
 112        data->rx_pos += cnt;
 113
 114        if (total > cnt) {
 115                ptr = (unsigned char *)(dma->rx_buf);
 116                cnt = total - cnt;
 117                copied += tty_insert_flip_string(tty_port, ptr, cnt);
 118                data->rx_pos = cnt;
 119        }
 120
 121        up->port.icount.rx += copied;
 122
 123        tty_flip_buffer_push(tty_port);
 124
 125        mtk8250_rx_dma(up);
 126
 127        spin_unlock_irqrestore(&up->port.lock, flags);
 128}
 129
 130static void mtk8250_rx_dma(struct uart_8250_port *up)
 131{
 132        struct uart_8250_dma *dma = up->dma;
 133        struct dma_async_tx_descriptor  *desc;
 134
 135        desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
 136                                           dma->rx_size, DMA_DEV_TO_MEM,
 137                                           DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 138        if (!desc) {
 139                pr_err("failed to prepare rx slave single\n");
 140                return;
 141        }
 142
 143        desc->callback = mtk8250_dma_rx_complete;
 144        desc->callback_param = up;
 145
 146        dma->rx_cookie = dmaengine_submit(desc);
 147
 148        dma_async_issue_pending(dma->rxchan);
 149}
 150
 151static void mtk8250_dma_enable(struct uart_8250_port *up)
 152{
 153        struct uart_8250_dma *dma = up->dma;
 154        struct mtk8250_data *data = up->port.private_data;
 155        int lcr = serial_in(up, UART_LCR);
 156
 157        if (data->rx_status != DMA_RX_START)
 158                return;
 159
 160        dma->rxconf.src_port_window_size        = dma->rx_size;
 161        dma->rxconf.src_addr                            = dma->rx_addr;
 162
 163        dma->txconf.dst_port_window_size        = UART_XMIT_SIZE;
 164        dma->txconf.dst_addr                            = dma->tx_addr;
 165
 166        serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
 167                UART_FCR_CLEAR_XMIT);
 168        serial_out(up, MTK_UART_DMA_EN,
 169                   MTK_UART_DMA_EN_RX | MTK_UART_DMA_EN_TX);
 170
 171        serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 172        serial_out(up, UART_EFR, UART_EFR_ECB);
 173        serial_out(up, UART_LCR, lcr);
 174
 175        if (dmaengine_slave_config(dma->rxchan, &dma->rxconf) != 0)
 176                pr_err("failed to configure rx dma channel\n");
 177        if (dmaengine_slave_config(dma->txchan, &dma->txconf) != 0)
 178                pr_err("failed to configure tx dma channel\n");
 179
 180        data->rx_status = DMA_RX_RUNNING;
 181        data->rx_pos = 0;
 182        mtk8250_rx_dma(up);
 183}
 184#endif
 185
 186static int mtk8250_startup(struct uart_port *port)
 187{
 188#ifdef CONFIG_SERIAL_8250_DMA
 189        struct uart_8250_port *up = up_to_u8250p(port);
 190        struct mtk8250_data *data = port->private_data;
 191
 192        /* disable DMA for console */
 193        if (uart_console(port))
 194                up->dma = NULL;
 195
 196        if (up->dma) {
 197                data->rx_status = DMA_RX_START;
 198                uart_circ_clear(&port->state->xmit);
 199        }
 200#endif
 201        memset(&port->icount, 0, sizeof(port->icount));
 202
 203        return serial8250_do_startup(port);
 204}
 205
 206static void mtk8250_shutdown(struct uart_port *port)
 207{
 208#ifdef CONFIG_SERIAL_8250_DMA
 209        struct uart_8250_port *up = up_to_u8250p(port);
 210        struct mtk8250_data *data = port->private_data;
 211
 212        if (up->dma)
 213                data->rx_status = DMA_RX_SHUTDOWN;
 214#endif
 215
 216        return serial8250_do_shutdown(port);
 217}
 218
 219static void mtk8250_disable_intrs(struct uart_8250_port *up, int mask)
 220{
 221        serial_out(up, UART_IER, serial_in(up, UART_IER) & (~mask));
 222}
 223
 224static void mtk8250_enable_intrs(struct uart_8250_port *up, int mask)
 225{
 226        serial_out(up, UART_IER, serial_in(up, UART_IER) | mask);
 227}
 228
 229static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode)
 230{
 231        struct uart_port *port = &up->port;
 232        int lcr = serial_in(up, UART_LCR);
 233
 234        serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 235        serial_out(up, UART_EFR, UART_EFR_ECB);
 236        serial_out(up, UART_LCR, lcr);
 237        lcr = serial_in(up, UART_LCR);
 238
 239        switch (mode) {
 240        case MTK_UART_FC_NONE:
 241                serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
 242                serial_out(up, MTK_UART_ESCAPE_EN, 0x00);
 243                serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 244                serial_out(up, UART_EFR, serial_in(up, UART_EFR) &
 245                        (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK)));
 246                serial_out(up, UART_LCR, lcr);
 247                mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI |
 248                        MTK_UART_IER_RTSI | MTK_UART_IER_CTSI);
 249                break;
 250
 251        case MTK_UART_FC_HW:
 252                serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
 253                serial_out(up, MTK_UART_ESCAPE_EN, 0x00);
 254                serial_out(up, UART_MCR, UART_MCR_RTS);
 255                serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 256
 257                /*enable hw flow control*/
 258                serial_out(up, UART_EFR, MTK_UART_EFR_HW_FC |
 259                        (serial_in(up, UART_EFR) &
 260                        (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
 261
 262                serial_out(up, UART_LCR, lcr);
 263                mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI);
 264                mtk8250_enable_intrs(up, MTK_UART_IER_CTSI | MTK_UART_IER_RTSI);
 265                break;
 266
 267        case MTK_UART_FC_SW:    /*MTK software flow control */
 268                serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
 269                serial_out(up, MTK_UART_ESCAPE_EN, 0x01);
 270                serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
 271
 272                /*enable sw flow control */
 273                serial_out(up, UART_EFR, MTK_UART_EFR_XON1_XOFF1 |
 274                        (serial_in(up, UART_EFR) &
 275                        (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
 276
 277                serial_out(up, UART_XON1, START_CHAR(port->state->port.tty));
 278                serial_out(up, UART_XOFF1, STOP_CHAR(port->state->port.tty));
 279                serial_out(up, UART_LCR, lcr);
 280                mtk8250_disable_intrs(up, MTK_UART_IER_CTSI|MTK_UART_IER_RTSI);
 281                mtk8250_enable_intrs(up, MTK_UART_IER_XOFFI);
 282                break;
 283        default:
 284                break;
 285        }
 286}
 287
 288static void
 289mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
 290                        struct ktermios *old)
 291{
 292        unsigned short fraction_L_mapping[] = {
 293                0, 1, 0x5, 0x15, 0x55, 0x57, 0x57, 0x77, 0x7F, 0xFF, 0xFF
 294        };
 295        unsigned short fraction_M_mapping[] = {
 296                0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 3
 297        };
 298        struct uart_8250_port *up = up_to_u8250p(port);
 299        unsigned int baud, quot, fraction;
 300        unsigned long flags;
 301        int mode;
 302
 303#ifdef CONFIG_SERIAL_8250_DMA
 304        if (up->dma) {
 305                if (uart_console(port)) {
 306                        devm_kfree(up->port.dev, up->dma);
 307                        up->dma = NULL;
 308                } else {
 309                        mtk8250_dma_enable(up);
 310                }
 311        }
 312#endif
 313
 314        /*
 315         * Store the requested baud rate before calling the generic 8250
 316         * set_termios method. Standard 8250 port expects bauds to be
 317         * no higher than (uartclk / 16) so the baud will be clamped if it
 318         * gets out of that bound. Mediatek 8250 port supports speed
 319         * higher than that, therefore we'll get original baud rate back
 320         * after calling the generic set_termios method and recalculate
 321         * the speed later in this method.
 322         */
 323        baud = tty_termios_baud_rate(termios);
 324
 325        serial8250_do_set_termios(port, termios, NULL);
 326
 327        tty_termios_encode_baud_rate(termios, baud, baud);
 328
 329        /*
 330         * Mediatek UARTs use an extra highspeed register (MTK_UART_HIGHS)
 331         *
 332         * We need to recalcualte the quot register, as the claculation depends
 333         * on the vaule in the highspeed register.
 334         *
 335         * Some baudrates are not supported by the chip, so we use the next
 336         * lower rate supported and update termios c_flag.
 337         *
 338         * If highspeed register is set to 3, we need to specify sample count
 339         * and sample point to increase accuracy. If not, we reset the
 340         * registers to their default values.
 341         */
 342        baud = uart_get_baud_rate(port, termios, old,
 343                                  port->uartclk / 16 / UART_DIV_MAX,
 344                                  port->uartclk);
 345
 346        if (baud < 115200) {
 347                serial_port_out(port, MTK_UART_HIGHS, 0x0);
 348                quot = uart_get_divisor(port, baud);
 349        } else {
 350                serial_port_out(port, MTK_UART_HIGHS, 0x3);
 351                quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
 352        }
 353
 354        /*
 355         * Ok, we're now changing the port state.  Do it with
 356         * interrupts disabled.
 357         */
 358        spin_lock_irqsave(&port->lock, flags);
 359
 360        /*
 361         * Update the per-port timeout.
 362         */
 363        uart_update_timeout(port, termios->c_cflag, baud);
 364
 365        /* set DLAB we have cval saved in up->lcr from the call to the core */
 366        serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
 367        serial_dl_write(up, quot);
 368
 369        /* reset DLAB */
 370        serial_port_out(port, UART_LCR, up->lcr);
 371
 372        if (baud >= 115200) {
 373                unsigned int tmp;
 374
 375                tmp = (port->uartclk / (baud *  quot)) - 1;
 376                serial_port_out(port, MTK_UART_SAMPLE_COUNT, tmp);
 377                serial_port_out(port, MTK_UART_SAMPLE_POINT,
 378                                        (tmp >> 1) - 1);
 379
 380                /*count fraction to set fractoin register */
 381                fraction = ((port->uartclk  * 100) / baud / quot) % 100;
 382                fraction = DIV_ROUND_CLOSEST(fraction, 10);
 383                serial_port_out(port, MTK_UART_FRACDIV_L,
 384                                                fraction_L_mapping[fraction]);
 385                serial_port_out(port, MTK_UART_FRACDIV_M,
 386                                                fraction_M_mapping[fraction]);
 387        } else {
 388                serial_port_out(port, MTK_UART_SAMPLE_COUNT, 0x00);
 389                serial_port_out(port, MTK_UART_SAMPLE_POINT, 0xff);
 390                serial_port_out(port, MTK_UART_FRACDIV_L, 0x00);
 391                serial_port_out(port, MTK_UART_FRACDIV_M, 0x00);
 392        }
 393
 394        if ((termios->c_cflag & CRTSCTS) && (!(termios->c_iflag & CRTSCTS)))
 395                mode = MTK_UART_FC_HW;
 396        else if (termios->c_iflag & CRTSCTS)
 397                mode = MTK_UART_FC_SW;
 398        else
 399                mode = MTK_UART_FC_NONE;
 400
 401        mtk8250_set_flow_ctrl(up, mode);
 402
 403        if (uart_console(port))
 404                up->port.cons->cflag = termios->c_cflag;
 405
 406        spin_unlock_irqrestore(&port->lock, flags);
 407        /* Don't rewrite B0 */
 408        if (tty_termios_baud_rate(termios))
 409                tty_termios_encode_baud_rate(termios, baud, baud);
 410}
 411
 412static int __maybe_unused mtk8250_runtime_suspend(struct device *dev)
 413{
 414        struct mtk8250_data *data = dev_get_drvdata(dev);
 415        struct uart_8250_port *up = serial8250_get_port(data->line);
 416
 417        /* wait until UART in idle status */
 418        while
 419                (serial_in(up, MTK_UART_DEBUG0));
 420
 421        if (data->clk_count == 0U) {
 422                dev_dbg(dev, "%s clock count is 0\n", __func__);
 423        } else {
 424                clk_disable_unprepare(data->bus_clk);
 425                data->clk_count--;
 426        }
 427
 428        return 0;
 429}
 430
 431static int __maybe_unused mtk8250_runtime_resume(struct device *dev)
 432{
 433        struct mtk8250_data *data = dev_get_drvdata(dev);
 434        int err;
 435
 436        if (data->clk_count > 0U) {
 437                dev_dbg(dev, "%s clock count is %d\n", __func__,
 438                        data->clk_count);
 439        } else {
 440                err = clk_prepare_enable(data->bus_clk);
 441                if (err) {
 442                        dev_warn(dev, "Can't enable bus clock\n");
 443                        return err;
 444                }
 445                data->clk_count++;
 446        }
 447
 448        return 0;
 449}
 450
 451static void
 452mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
 453{
 454        if (!state)
 455                if (!mtk8250_runtime_resume(port->dev))
 456                        pm_runtime_get_sync(port->dev);
 457
 458        serial8250_do_pm(port, state, old);
 459
 460        if (state)
 461                if (!pm_runtime_put_sync_suspend(port->dev))
 462                        mtk8250_runtime_suspend(port->dev);
 463}
 464
 465#ifdef CONFIG_SERIAL_8250_DMA
 466static bool mtk8250_dma_filter(struct dma_chan *chan, void *param)
 467{
 468        return false;
 469}
 470#endif
 471
 472static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p,
 473                           struct mtk8250_data *data)
 474{
 475#ifdef CONFIG_SERIAL_8250_DMA
 476        int dmacnt;
 477#endif
 478
 479        data->uart_clk = devm_clk_get(&pdev->dev, "baud");
 480        if (IS_ERR(data->uart_clk)) {
 481                /*
 482                 * For compatibility with older device trees try unnamed
 483                 * clk when no baud clk can be found.
 484                 */
 485                data->uart_clk = devm_clk_get(&pdev->dev, NULL);
 486                if (IS_ERR(data->uart_clk)) {
 487                        dev_warn(&pdev->dev, "Can't get uart clock\n");
 488                        return PTR_ERR(data->uart_clk);
 489                }
 490
 491                return 0;
 492        }
 493
 494        data->bus_clk = devm_clk_get(&pdev->dev, "bus");
 495        if (IS_ERR(data->bus_clk))
 496                return PTR_ERR(data->bus_clk);
 497
 498        data->dma = NULL;
 499#ifdef CONFIG_SERIAL_8250_DMA
 500        dmacnt = of_property_count_strings(pdev->dev.of_node, "dma-names");
 501        if (dmacnt == 2) {
 502                data->dma = devm_kzalloc(&pdev->dev, sizeof(*data->dma),
 503                                         GFP_KERNEL);
 504                if (!data->dma)
 505                        return -ENOMEM;
 506
 507                data->dma->fn = mtk8250_dma_filter;
 508                data->dma->rx_size = MTK_UART_RX_SIZE;
 509                data->dma->rxconf.src_maxburst = MTK_UART_RX_TRIGGER;
 510                data->dma->txconf.dst_maxburst = MTK_UART_TX_TRIGGER;
 511        }
 512#endif
 513
 514        return 0;
 515}
 516
 517static int mtk8250_probe(struct platform_device *pdev)
 518{
 519        struct uart_8250_port uart = {};
 520        struct mtk8250_data *data;
 521        struct resource *regs;
 522        int irq, err;
 523
 524        irq = platform_get_irq(pdev, 0);
 525        if (irq < 0)
 526                return irq;
 527
 528        regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 529        if (!regs) {
 530                dev_err(&pdev->dev, "no registers defined\n");
 531                return -EINVAL;
 532        }
 533
 534        uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
 535                                         resource_size(regs));
 536        if (!uart.port.membase)
 537                return -ENOMEM;
 538
 539        data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
 540        if (!data)
 541                return -ENOMEM;
 542
 543        data->clk_count = 0;
 544
 545        if (pdev->dev.of_node) {
 546                err = mtk8250_probe_of(pdev, &uart.port, data);
 547                if (err)
 548                        return err;
 549        } else
 550                return -ENODEV;
 551
 552        spin_lock_init(&uart.port.lock);
 553        uart.port.mapbase = regs->start;
 554        uart.port.irq = irq;
 555        uart.port.pm = mtk8250_do_pm;
 556        uart.port.type = PORT_16550;
 557        uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
 558        uart.port.dev = &pdev->dev;
 559        uart.port.iotype = UPIO_MEM32;
 560        uart.port.regshift = 2;
 561        uart.port.private_data = data;
 562        uart.port.shutdown = mtk8250_shutdown;
 563        uart.port.startup = mtk8250_startup;
 564        uart.port.set_termios = mtk8250_set_termios;
 565        uart.port.uartclk = clk_get_rate(data->uart_clk);
 566#ifdef CONFIG_SERIAL_8250_DMA
 567        if (data->dma)
 568                uart.dma = data->dma;
 569#endif
 570
 571        /* Disable Rate Fix function */
 572        writel(0x0, uart.port.membase +
 573                        (MTK_UART_RATE_FIX << uart.port.regshift));
 574
 575        platform_set_drvdata(pdev, data);
 576
 577        pm_runtime_enable(&pdev->dev);
 578        err = mtk8250_runtime_resume(&pdev->dev);
 579        if (err)
 580                goto err_pm_disable;
 581
 582        data->line = serial8250_register_8250_port(&uart);
 583        if (data->line < 0) {
 584                err = data->line;
 585                goto err_pm_disable;
 586        }
 587
 588        data->rx_wakeup_irq = platform_get_irq_optional(pdev, 1);
 589
 590        return 0;
 591
 592err_pm_disable:
 593        pm_runtime_disable(&pdev->dev);
 594
 595        return err;
 596}
 597
 598static int mtk8250_remove(struct platform_device *pdev)
 599{
 600        struct mtk8250_data *data = platform_get_drvdata(pdev);
 601
 602        pm_runtime_get_sync(&pdev->dev);
 603
 604        serial8250_unregister_port(data->line);
 605
 606        pm_runtime_disable(&pdev->dev);
 607        pm_runtime_put_noidle(&pdev->dev);
 608
 609        if (!pm_runtime_status_suspended(&pdev->dev))
 610                mtk8250_runtime_suspend(&pdev->dev);
 611
 612        return 0;
 613}
 614
 615static int __maybe_unused mtk8250_suspend(struct device *dev)
 616{
 617        struct mtk8250_data *data = dev_get_drvdata(dev);
 618        int irq = data->rx_wakeup_irq;
 619        int err;
 620
 621        serial8250_suspend_port(data->line);
 622
 623        pinctrl_pm_select_sleep_state(dev);
 624        if (irq >= 0) {
 625                err = enable_irq_wake(irq);
 626                if (err) {
 627                        dev_err(dev,
 628                                "failed to enable irq wake on IRQ %d: %d\n",
 629                                irq, err);
 630                        pinctrl_pm_select_default_state(dev);
 631                        serial8250_resume_port(data->line);
 632                        return err;
 633                }
 634        }
 635
 636        return 0;
 637}
 638
 639static int __maybe_unused mtk8250_resume(struct device *dev)
 640{
 641        struct mtk8250_data *data = dev_get_drvdata(dev);
 642        int irq = data->rx_wakeup_irq;
 643
 644        if (irq >= 0)
 645                disable_irq_wake(irq);
 646        pinctrl_pm_select_default_state(dev);
 647
 648        serial8250_resume_port(data->line);
 649
 650        return 0;
 651}
 652
 653static const struct dev_pm_ops mtk8250_pm_ops = {
 654        SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume)
 655        SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume,
 656                                NULL)
 657};
 658
 659static const struct of_device_id mtk8250_of_match[] = {
 660        { .compatible = "mediatek,mt6577-uart" },
 661        { /* Sentinel */ }
 662};
 663MODULE_DEVICE_TABLE(of, mtk8250_of_match);
 664
 665static struct platform_driver mtk8250_platform_driver = {
 666        .driver = {
 667                .name           = "mt6577-uart",
 668                .pm             = &mtk8250_pm_ops,
 669                .of_match_table = mtk8250_of_match,
 670        },
 671        .probe                  = mtk8250_probe,
 672        .remove                 = mtk8250_remove,
 673};
 674module_platform_driver(mtk8250_platform_driver);
 675
 676#ifdef CONFIG_SERIAL_8250_CONSOLE
 677static int __init early_mtk8250_setup(struct earlycon_device *device,
 678                                        const char *options)
 679{
 680        if (!device->port.membase)
 681                return -ENODEV;
 682
 683        device->port.iotype = UPIO_MEM32;
 684        device->port.regshift = 2;
 685
 686        return early_serial8250_setup(device, NULL);
 687}
 688
 689OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup);
 690#endif
 691
 692MODULE_AUTHOR("Matthias Brugger");
 693MODULE_LICENSE("GPL");
 694MODULE_DESCRIPTION("Mediatek 8250 serial port driver");
 695