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6
7#include <linux/console.h>
8#include <linux/module.h>
9#include <linux/slab.h>
10#include <linux/serial_core.h>
11#include <linux/serial_reg.h>
12#include <linux/of_address.h>
13#include <linux/of_irq.h>
14#include <linux/of_platform.h>
15#include <linux/pm_runtime.h>
16#include <linux/clk.h>
17#include <linux/reset.h>
18
19#include "8250.h"
20
21struct of_serial_info {
22 struct clk *clk;
23 struct reset_control *rst;
24 int type;
25 int line;
26};
27
28
29
30
31static int of_platform_serial_setup(struct platform_device *ofdev,
32 int type, struct uart_8250_port *up,
33 struct of_serial_info *info)
34{
35 struct resource resource;
36 struct device_node *np = ofdev->dev.of_node;
37 struct uart_port *port = &up->port;
38 u32 clk, spd, prop;
39 int ret, irq;
40
41 memset(port, 0, sizeof *port);
42
43 pm_runtime_enable(&ofdev->dev);
44 pm_runtime_get_sync(&ofdev->dev);
45
46 if (of_property_read_u32(np, "clock-frequency", &clk)) {
47
48
49 info->clk = devm_clk_get(&ofdev->dev, NULL);
50 if (IS_ERR(info->clk)) {
51 ret = PTR_ERR(info->clk);
52 if (ret != -EPROBE_DEFER)
53 dev_warn(&ofdev->dev,
54 "failed to get clock: %d\n", ret);
55 goto err_pmruntime;
56 }
57
58 ret = clk_prepare_enable(info->clk);
59 if (ret < 0)
60 goto err_pmruntime;
61
62 clk = clk_get_rate(info->clk);
63 }
64
65 if (of_property_read_u32(np, "current-speed", &spd) == 0)
66 port->custom_divisor = clk / (16 * spd);
67
68 ret = of_address_to_resource(np, 0, &resource);
69 if (ret) {
70 dev_warn(&ofdev->dev, "invalid address\n");
71 goto err_unprepare;
72 }
73
74 port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT |
75 UPF_FIXED_TYPE;
76 spin_lock_init(&port->lock);
77
78 if (resource_type(&resource) == IORESOURCE_IO) {
79 port->iotype = UPIO_PORT;
80 port->iobase = resource.start;
81 } else {
82 port->mapbase = resource.start;
83 port->mapsize = resource_size(&resource);
84
85
86 if (of_property_read_u32(np, "reg-offset", &prop) == 0)
87 port->mapbase += prop;
88
89 port->iotype = UPIO_MEM;
90 if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
91 switch (prop) {
92 case 1:
93 port->iotype = UPIO_MEM;
94 break;
95 case 2:
96 port->iotype = UPIO_MEM16;
97 break;
98 case 4:
99 port->iotype = of_device_is_big_endian(np) ?
100 UPIO_MEM32BE : UPIO_MEM32;
101 break;
102 default:
103 dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
104 prop);
105 ret = -EINVAL;
106 goto err_unprepare;
107 }
108 }
109 port->flags |= UPF_IOREMAP;
110 }
111
112
113 if (of_device_is_compatible(np, "mrvl,mmp-uart"))
114 port->regshift = 2;
115
116
117 if (of_property_read_u32(np, "reg-shift", &prop) == 0)
118 port->regshift = prop;
119
120
121 if (of_property_read_u32(np, "fifo-size", &prop) == 0)
122 port->fifosize = prop;
123
124
125 ret = of_alias_get_id(np, "serial");
126 if (ret >= 0)
127 port->line = ret;
128
129 irq = of_irq_get(np, 0);
130 if (irq < 0) {
131 if (irq == -EPROBE_DEFER) {
132 ret = -EPROBE_DEFER;
133 goto err_unprepare;
134 }
135
136 irq = 0;
137 }
138
139 port->irq = irq;
140
141 info->rst = devm_reset_control_get_optional_shared(&ofdev->dev, NULL);
142 if (IS_ERR(info->rst)) {
143 ret = PTR_ERR(info->rst);
144 goto err_unprepare;
145 }
146
147 ret = reset_control_deassert(info->rst);
148 if (ret)
149 goto err_unprepare;
150
151 port->type = type;
152 port->uartclk = clk;
153
154 if (of_property_read_bool(np, "no-loopback-test"))
155 port->flags |= UPF_SKIP_TEST;
156
157 port->dev = &ofdev->dev;
158 port->rs485_config = serial8250_em485_config;
159 up->rs485_start_tx = serial8250_em485_start_tx;
160 up->rs485_stop_tx = serial8250_em485_stop_tx;
161
162 switch (type) {
163 case PORT_RT2880:
164 port->iotype = UPIO_AU;
165 break;
166 }
167
168 if (IS_ENABLED(CONFIG_SERIAL_8250_FSL) &&
169 (of_device_is_compatible(np, "fsl,ns16550") ||
170 of_device_is_compatible(np, "fsl,16550-FIFO64"))) {
171 port->handle_irq = fsl8250_handle_irq;
172 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE);
173 }
174
175 return 0;
176err_unprepare:
177 clk_disable_unprepare(info->clk);
178err_pmruntime:
179 pm_runtime_put_sync(&ofdev->dev);
180 pm_runtime_disable(&ofdev->dev);
181 return ret;
182}
183
184
185
186
187static int of_platform_serial_probe(struct platform_device *ofdev)
188{
189 struct of_serial_info *info;
190 struct uart_8250_port port8250;
191 unsigned int port_type;
192 u32 tx_threshold;
193 int ret;
194
195 if (IS_ENABLED(CONFIG_SERIAL_8250_BCM7271) &&
196 of_device_is_compatible(ofdev->dev.of_node, "brcm,bcm7271-uart"))
197 return -ENODEV;
198
199 port_type = (unsigned long)of_device_get_match_data(&ofdev->dev);
200 if (port_type == PORT_UNKNOWN)
201 return -EINVAL;
202
203 if (of_property_read_bool(ofdev->dev.of_node, "used-by-rtas"))
204 return -EBUSY;
205
206 info = kzalloc(sizeof(*info), GFP_KERNEL);
207 if (info == NULL)
208 return -ENOMEM;
209
210 memset(&port8250, 0, sizeof(port8250));
211 ret = of_platform_serial_setup(ofdev, port_type, &port8250, info);
212 if (ret)
213 goto err_free;
214
215 if (port8250.port.fifosize)
216 port8250.capabilities = UART_CAP_FIFO;
217
218
219 if ((of_property_read_u32(ofdev->dev.of_node, "tx-threshold",
220 &tx_threshold) == 0) &&
221 (tx_threshold < port8250.port.fifosize))
222 port8250.tx_loadsz = port8250.port.fifosize - tx_threshold;
223
224 if (of_property_read_bool(ofdev->dev.of_node, "auto-flow-control"))
225 port8250.capabilities |= UART_CAP_AFE;
226
227 if (of_property_read_u32(ofdev->dev.of_node,
228 "overrun-throttle-ms",
229 &port8250.overrun_backoff_time_ms) != 0)
230 port8250.overrun_backoff_time_ms = 0;
231
232 ret = serial8250_register_8250_port(&port8250);
233 if (ret < 0)
234 goto err_dispose;
235
236 info->type = port_type;
237 info->line = ret;
238 platform_set_drvdata(ofdev, info);
239 return 0;
240err_dispose:
241 irq_dispose_mapping(port8250.port.irq);
242 pm_runtime_put_sync(&ofdev->dev);
243 pm_runtime_disable(&ofdev->dev);
244 clk_disable_unprepare(info->clk);
245err_free:
246 kfree(info);
247 return ret;
248}
249
250
251
252
253static int of_platform_serial_remove(struct platform_device *ofdev)
254{
255 struct of_serial_info *info = platform_get_drvdata(ofdev);
256
257 serial8250_unregister_port(info->line);
258
259 reset_control_assert(info->rst);
260 pm_runtime_put_sync(&ofdev->dev);
261 pm_runtime_disable(&ofdev->dev);
262 clk_disable_unprepare(info->clk);
263 kfree(info);
264 return 0;
265}
266
267#ifdef CONFIG_PM_SLEEP
268static int of_serial_suspend(struct device *dev)
269{
270 struct of_serial_info *info = dev_get_drvdata(dev);
271 struct uart_8250_port *port8250 = serial8250_get_port(info->line);
272 struct uart_port *port = &port8250->port;
273
274 serial8250_suspend_port(info->line);
275
276 if (!uart_console(port) || console_suspend_enabled) {
277 pm_runtime_put_sync(dev);
278 clk_disable_unprepare(info->clk);
279 }
280 return 0;
281}
282
283static int of_serial_resume(struct device *dev)
284{
285 struct of_serial_info *info = dev_get_drvdata(dev);
286 struct uart_8250_port *port8250 = serial8250_get_port(info->line);
287 struct uart_port *port = &port8250->port;
288
289 if (!uart_console(port) || console_suspend_enabled) {
290 pm_runtime_get_sync(dev);
291 clk_prepare_enable(info->clk);
292 }
293
294 serial8250_resume_port(info->line);
295
296 return 0;
297}
298#endif
299static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
300
301
302
303
304static const struct of_device_id of_platform_serial_table[] = {
305 { .compatible = "ns8250", .data = (void *)PORT_8250, },
306 { .compatible = "ns16450", .data = (void *)PORT_16450, },
307 { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
308 { .compatible = "ns16550", .data = (void *)PORT_16550, },
309 { .compatible = "ns16750", .data = (void *)PORT_16750, },
310 { .compatible = "ns16850", .data = (void *)PORT_16850, },
311 { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
312 { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
313 { .compatible = "intel,xscale-uart", .data = (void *)PORT_XSCALE, },
314 { .compatible = "altr,16550-FIFO32",
315 .data = (void *)PORT_ALTR_16550_F32, },
316 { .compatible = "altr,16550-FIFO64",
317 .data = (void *)PORT_ALTR_16550_F64, },
318 { .compatible = "altr,16550-FIFO128",
319 .data = (void *)PORT_ALTR_16550_F128, },
320 { .compatible = "mediatek,mtk-btif",
321 .data = (void *)PORT_MTK_BTIF, },
322 { .compatible = "mrvl,mmp-uart",
323 .data = (void *)PORT_XSCALE, },
324 { .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, },
325 { .compatible = "nuvoton,wpcm450-uart", .data = (void *)PORT_NPCM, },
326 { .compatible = "nuvoton,npcm750-uart", .data = (void *)PORT_NPCM, },
327 { },
328};
329MODULE_DEVICE_TABLE(of, of_platform_serial_table);
330
331static struct platform_driver of_platform_serial_driver = {
332 .driver = {
333 .name = "of_serial",
334 .of_match_table = of_platform_serial_table,
335 .pm = &of_serial_pm_ops,
336 },
337 .probe = of_platform_serial_probe,
338 .remove = of_platform_serial_remove,
339};
340
341module_platform_driver(of_platform_serial_driver);
342
343MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
344MODULE_LICENSE("GPL");
345MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");
346
