1
2
3
4
5
6
7
8
9
10#include <linux/module.h>
11#include <linux/ioport.h>
12#include <linux/init.h>
13#include <linux/console.h>
14#include <linux/sysrq.h>
15#include <linux/delay.h>
16#include <linux/gpio/consumer.h>
17#include <linux/platform_device.h>
18#include <linux/of.h>
19#include <linux/of_platform.h>
20#include <linux/tty.h>
21#include <linux/tty_flip.h>
22#include <linux/serial_core.h>
23#include <linux/serial.h>
24#include <linux/slab.h>
25#include <linux/io.h>
26#include <linux/irq.h>
27#include <linux/clk.h>
28
29#include <asm/div64.h>
30
31#include <asm/mach-ath79/ar933x_uart.h>
32
33#include "serial_mctrl_gpio.h"
34
35#define DRIVER_NAME "ar933x-uart"
36
37#define AR933X_UART_MAX_SCALE 0xff
38#define AR933X_UART_MAX_STEP 0xffff
39
40#define AR933X_UART_MIN_BAUD 300
41#define AR933X_UART_MAX_BAUD 3000000
42
43#define AR933X_DUMMY_STATUS_RD 0x01
44
45static struct uart_driver ar933x_uart_driver;
46
47struct ar933x_uart_port {
48 struct uart_port port;
49 unsigned int ier;
50 unsigned int min_baud;
51 unsigned int max_baud;
52 struct clk *clk;
53 struct mctrl_gpios *gpios;
54 struct gpio_desc *rts_gpiod;
55};
56
57static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
58 int offset)
59{
60 return readl(up->port.membase + offset);
61}
62
63static inline void ar933x_uart_write(struct ar933x_uart_port *up,
64 int offset, unsigned int value)
65{
66 writel(value, up->port.membase + offset);
67}
68
69static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
70 unsigned int offset,
71 unsigned int mask,
72 unsigned int val)
73{
74 unsigned int t;
75
76 t = ar933x_uart_read(up, offset);
77 t &= ~mask;
78 t |= val;
79 ar933x_uart_write(up, offset, t);
80}
81
82static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
83 unsigned int offset,
84 unsigned int val)
85{
86 ar933x_uart_rmw(up, offset, 0, val);
87}
88
89static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
90 unsigned int offset,
91 unsigned int val)
92{
93 ar933x_uart_rmw(up, offset, val, 0);
94}
95
96static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
97{
98 up->ier |= AR933X_UART_INT_TX_EMPTY;
99 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
100}
101
102static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
103{
104 up->ier &= ~AR933X_UART_INT_TX_EMPTY;
105 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
106}
107
108static inline void ar933x_uart_start_rx_interrupt(struct ar933x_uart_port *up)
109{
110 up->ier |= AR933X_UART_INT_RX_VALID;
111 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
112}
113
114static inline void ar933x_uart_stop_rx_interrupt(struct ar933x_uart_port *up)
115{
116 up->ier &= ~AR933X_UART_INT_RX_VALID;
117 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
118}
119
120static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
121{
122 unsigned int rdata;
123
124 rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
125 rdata |= AR933X_UART_DATA_TX_CSR;
126 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
127}
128
129static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
130{
131 struct ar933x_uart_port *up =
132 container_of(port, struct ar933x_uart_port, port);
133 unsigned long flags;
134 unsigned int rdata;
135
136 spin_lock_irqsave(&up->port.lock, flags);
137 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
138 spin_unlock_irqrestore(&up->port.lock, flags);
139
140 return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
141}
142
143static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
144{
145 struct ar933x_uart_port *up =
146 container_of(port, struct ar933x_uart_port, port);
147 int ret = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
148
149 mctrl_gpio_get(up->gpios, &ret);
150
151 return ret;
152}
153
154static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
155{
156 struct ar933x_uart_port *up =
157 container_of(port, struct ar933x_uart_port, port);
158
159 mctrl_gpio_set(up->gpios, mctrl);
160}
161
162static void ar933x_uart_start_tx(struct uart_port *port)
163{
164 struct ar933x_uart_port *up =
165 container_of(port, struct ar933x_uart_port, port);
166
167 ar933x_uart_start_tx_interrupt(up);
168}
169
170static void ar933x_uart_wait_tx_complete(struct ar933x_uart_port *up)
171{
172 unsigned int status;
173 unsigned int timeout = 60000;
174
175
176 do {
177 status = ar933x_uart_read(up, AR933X_UART_CS_REG);
178 if (--timeout == 0)
179 break;
180 udelay(1);
181 } while (status & AR933X_UART_CS_TX_BUSY);
182
183 if (timeout == 0)
184 dev_err(up->port.dev, "waiting for TX timed out\n");
185}
186
187static void ar933x_uart_rx_flush(struct ar933x_uart_port *up)
188{
189 unsigned int status;
190
191
192 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_RX_VALID);
193
194
195 do {
196 ar933x_uart_write(up, AR933X_UART_DATA_REG, AR933X_UART_DATA_RX_CSR);
197 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
198 } while (status & AR933X_UART_DATA_RX_CSR);
199}
200
201static void ar933x_uart_stop_tx(struct uart_port *port)
202{
203 struct ar933x_uart_port *up =
204 container_of(port, struct ar933x_uart_port, port);
205
206 ar933x_uart_stop_tx_interrupt(up);
207}
208
209static void ar933x_uart_stop_rx(struct uart_port *port)
210{
211 struct ar933x_uart_port *up =
212 container_of(port, struct ar933x_uart_port, port);
213
214 ar933x_uart_stop_rx_interrupt(up);
215}
216
217static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
218{
219 struct ar933x_uart_port *up =
220 container_of(port, struct ar933x_uart_port, port);
221 unsigned long flags;
222
223 spin_lock_irqsave(&up->port.lock, flags);
224 if (break_state == -1)
225 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
226 AR933X_UART_CS_TX_BREAK);
227 else
228 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
229 AR933X_UART_CS_TX_BREAK);
230 spin_unlock_irqrestore(&up->port.lock, flags);
231}
232
233
234
235
236static unsigned long ar933x_uart_get_baud(unsigned int clk,
237 unsigned int scale,
238 unsigned int step)
239{
240 u64 t;
241 u32 div;
242
243 div = (2 << 16) * (scale + 1);
244 t = clk;
245 t *= step;
246 t += (div / 2);
247 do_div(t, div);
248
249 return t;
250}
251
252static void ar933x_uart_get_scale_step(unsigned int clk,
253 unsigned int baud,
254 unsigned int *scale,
255 unsigned int *step)
256{
257 unsigned int tscale;
258 long min_diff;
259
260 *scale = 0;
261 *step = 0;
262
263 min_diff = baud;
264 for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
265 u64 tstep;
266 int diff;
267
268 tstep = baud * (tscale + 1);
269 tstep *= (2 << 16);
270 do_div(tstep, clk);
271
272 if (tstep > AR933X_UART_MAX_STEP)
273 break;
274
275 diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
276 if (diff < min_diff) {
277 min_diff = diff;
278 *scale = tscale;
279 *step = tstep;
280 }
281 }
282}
283
284static void ar933x_uart_set_termios(struct uart_port *port,
285 struct ktermios *new,
286 struct ktermios *old)
287{
288 struct ar933x_uart_port *up =
289 container_of(port, struct ar933x_uart_port, port);
290 unsigned int cs;
291 unsigned long flags;
292 unsigned int baud, scale, step;
293
294
295 new->c_cflag &= ~CSIZE;
296 new->c_cflag |= CS8;
297
298
299 new->c_cflag &= ~CSTOPB;
300
301 cs = 0;
302 if (new->c_cflag & PARENB) {
303 if (!(new->c_cflag & PARODD))
304 cs |= AR933X_UART_CS_PARITY_EVEN;
305 else
306 cs |= AR933X_UART_CS_PARITY_ODD;
307 } else {
308 cs |= AR933X_UART_CS_PARITY_NONE;
309 }
310
311
312 new->c_cflag &= ~CMSPAR;
313
314 baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
315 ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
316
317
318
319
320
321 spin_lock_irqsave(&up->port.lock, flags);
322
323
324 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
325 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
326
327
328 uart_update_timeout(port, new->c_cflag, baud);
329
330 up->port.ignore_status_mask = 0;
331
332
333 if ((new->c_cflag & CREAD) == 0)
334 up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
335
336 ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
337 scale << AR933X_UART_CLOCK_SCALE_S | step);
338
339
340 ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
341
342
343 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
344 AR933X_UART_CS_HOST_INT_EN);
345
346
347 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
348 AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
349
350
351 ar933x_uart_rmw(up, AR933X_UART_CS_REG,
352 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
353 AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
354
355 spin_unlock_irqrestore(&up->port.lock, flags);
356
357 if (tty_termios_baud_rate(new))
358 tty_termios_encode_baud_rate(new, baud, baud);
359}
360
361static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
362{
363 struct tty_port *port = &up->port.state->port;
364 int max_count = 256;
365
366 do {
367 unsigned int rdata;
368 unsigned char ch;
369
370 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
371 if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
372 break;
373
374
375 ar933x_uart_write(up, AR933X_UART_DATA_REG,
376 AR933X_UART_DATA_RX_CSR);
377
378 up->port.icount.rx++;
379 ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
380
381 if (uart_handle_sysrq_char(&up->port, ch))
382 continue;
383
384 if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
385 tty_insert_flip_char(port, ch, TTY_NORMAL);
386 } while (max_count-- > 0);
387
388 tty_flip_buffer_push(port);
389}
390
391static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
392{
393 struct circ_buf *xmit = &up->port.state->xmit;
394 struct serial_rs485 *rs485conf = &up->port.rs485;
395 int count;
396 bool half_duplex_send = false;
397
398 if (uart_tx_stopped(&up->port))
399 return;
400
401 if ((rs485conf->flags & SER_RS485_ENABLED) &&
402 (up->port.x_char || !uart_circ_empty(xmit))) {
403 ar933x_uart_stop_rx_interrupt(up);
404 gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_ON_SEND));
405 half_duplex_send = true;
406 }
407
408 count = up->port.fifosize;
409 do {
410 unsigned int rdata;
411
412 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
413 if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
414 break;
415
416 if (up->port.x_char) {
417 ar933x_uart_putc(up, up->port.x_char);
418 up->port.icount.tx++;
419 up->port.x_char = 0;
420 continue;
421 }
422
423 if (uart_circ_empty(xmit))
424 break;
425
426 ar933x_uart_putc(up, xmit->buf[xmit->tail]);
427
428 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
429 up->port.icount.tx++;
430 } while (--count > 0);
431
432 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
433 uart_write_wakeup(&up->port);
434
435 if (!uart_circ_empty(xmit)) {
436 ar933x_uart_start_tx_interrupt(up);
437 } else if (half_duplex_send) {
438 ar933x_uart_wait_tx_complete(up);
439 ar933x_uart_rx_flush(up);
440 ar933x_uart_start_rx_interrupt(up);
441 gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_AFTER_SEND));
442 }
443}
444
445static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
446{
447 struct ar933x_uart_port *up = dev_id;
448 unsigned int status;
449
450 status = ar933x_uart_read(up, AR933X_UART_CS_REG);
451 if ((status & AR933X_UART_CS_HOST_INT) == 0)
452 return IRQ_NONE;
453
454 spin_lock(&up->port.lock);
455
456 status = ar933x_uart_read(up, AR933X_UART_INT_REG);
457 status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
458
459 if (status & AR933X_UART_INT_RX_VALID) {
460 ar933x_uart_write(up, AR933X_UART_INT_REG,
461 AR933X_UART_INT_RX_VALID);
462 ar933x_uart_rx_chars(up);
463 }
464
465 if (status & AR933X_UART_INT_TX_EMPTY) {
466 ar933x_uart_write(up, AR933X_UART_INT_REG,
467 AR933X_UART_INT_TX_EMPTY);
468 ar933x_uart_stop_tx_interrupt(up);
469 ar933x_uart_tx_chars(up);
470 }
471
472 spin_unlock(&up->port.lock);
473
474 return IRQ_HANDLED;
475}
476
477static int ar933x_uart_startup(struct uart_port *port)
478{
479 struct ar933x_uart_port *up =
480 container_of(port, struct ar933x_uart_port, port);
481 unsigned long flags;
482 int ret;
483
484 ret = request_irq(up->port.irq, ar933x_uart_interrupt,
485 up->port.irqflags, dev_name(up->port.dev), up);
486 if (ret)
487 return ret;
488
489 spin_lock_irqsave(&up->port.lock, flags);
490
491
492 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
493 AR933X_UART_CS_HOST_INT_EN);
494
495
496 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
497 AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
498
499
500 ar933x_uart_start_rx_interrupt(up);
501
502 spin_unlock_irqrestore(&up->port.lock, flags);
503
504 return 0;
505}
506
507static void ar933x_uart_shutdown(struct uart_port *port)
508{
509 struct ar933x_uart_port *up =
510 container_of(port, struct ar933x_uart_port, port);
511
512
513 up->ier = 0;
514 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
515
516
517 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
518 AR933X_UART_CS_TX_BREAK);
519
520 free_irq(up->port.irq, up);
521}
522
523static const char *ar933x_uart_type(struct uart_port *port)
524{
525 return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
526}
527
528static void ar933x_uart_release_port(struct uart_port *port)
529{
530
531}
532
533static int ar933x_uart_request_port(struct uart_port *port)
534{
535
536 return 0;
537}
538
539static void ar933x_uart_config_port(struct uart_port *port, int flags)
540{
541 if (flags & UART_CONFIG_TYPE)
542 port->type = PORT_AR933X;
543}
544
545static int ar933x_uart_verify_port(struct uart_port *port,
546 struct serial_struct *ser)
547{
548 struct ar933x_uart_port *up =
549 container_of(port, struct ar933x_uart_port, port);
550
551 if (ser->type != PORT_UNKNOWN &&
552 ser->type != PORT_AR933X)
553 return -EINVAL;
554
555 if (ser->irq < 0 || ser->irq >= NR_IRQS)
556 return -EINVAL;
557
558 if (ser->baud_base < up->min_baud ||
559 ser->baud_base > up->max_baud)
560 return -EINVAL;
561
562 return 0;
563}
564
565static const struct uart_ops ar933x_uart_ops = {
566 .tx_empty = ar933x_uart_tx_empty,
567 .set_mctrl = ar933x_uart_set_mctrl,
568 .get_mctrl = ar933x_uart_get_mctrl,
569 .stop_tx = ar933x_uart_stop_tx,
570 .start_tx = ar933x_uart_start_tx,
571 .stop_rx = ar933x_uart_stop_rx,
572 .break_ctl = ar933x_uart_break_ctl,
573 .startup = ar933x_uart_startup,
574 .shutdown = ar933x_uart_shutdown,
575 .set_termios = ar933x_uart_set_termios,
576 .type = ar933x_uart_type,
577 .release_port = ar933x_uart_release_port,
578 .request_port = ar933x_uart_request_port,
579 .config_port = ar933x_uart_config_port,
580 .verify_port = ar933x_uart_verify_port,
581};
582
583static int ar933x_config_rs485(struct uart_port *port,
584 struct serial_rs485 *rs485conf)
585{
586 struct ar933x_uart_port *up =
587 container_of(port, struct ar933x_uart_port, port);
588
589 if ((rs485conf->flags & SER_RS485_ENABLED) &&
590 !up->rts_gpiod) {
591 dev_err(port->dev, "RS485 needs rts-gpio\n");
592 return 1;
593 }
594 port->rs485 = *rs485conf;
595 return 0;
596}
597
598#ifdef CONFIG_SERIAL_AR933X_CONSOLE
599static struct ar933x_uart_port *
600ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
601
602static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
603{
604 unsigned int status;
605 unsigned int timeout = 60000;
606
607
608 do {
609 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
610 if (--timeout == 0)
611 break;
612 udelay(1);
613 } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
614}
615
616static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
617{
618 struct ar933x_uart_port *up =
619 container_of(port, struct ar933x_uart_port, port);
620
621 ar933x_uart_wait_xmitr(up);
622 ar933x_uart_putc(up, ch);
623}
624
625static void ar933x_uart_console_write(struct console *co, const char *s,
626 unsigned int count)
627{
628 struct ar933x_uart_port *up = ar933x_console_ports[co->index];
629 unsigned long flags;
630 unsigned int int_en;
631 int locked = 1;
632
633 local_irq_save(flags);
634
635 if (up->port.sysrq)
636 locked = 0;
637 else if (oops_in_progress)
638 locked = spin_trylock(&up->port.lock);
639 else
640 spin_lock(&up->port.lock);
641
642
643
644
645 int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
646 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
647
648 uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
649
650
651
652
653
654 ar933x_uart_wait_xmitr(up);
655 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
656
657 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
658
659 if (locked)
660 spin_unlock(&up->port.lock);
661
662 local_irq_restore(flags);
663}
664
665static int ar933x_uart_console_setup(struct console *co, char *options)
666{
667 struct ar933x_uart_port *up;
668 int baud = 115200;
669 int bits = 8;
670 int parity = 'n';
671 int flow = 'n';
672
673 if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
674 return -EINVAL;
675
676 up = ar933x_console_ports[co->index];
677 if (!up)
678 return -ENODEV;
679
680 if (options)
681 uart_parse_options(options, &baud, &parity, &bits, &flow);
682
683 return uart_set_options(&up->port, co, baud, parity, bits, flow);
684}
685
686static struct console ar933x_uart_console = {
687 .name = "ttyATH",
688 .write = ar933x_uart_console_write,
689 .device = uart_console_device,
690 .setup = ar933x_uart_console_setup,
691 .flags = CON_PRINTBUFFER,
692 .index = -1,
693 .data = &ar933x_uart_driver,
694};
695#endif
696
697static struct uart_driver ar933x_uart_driver = {
698 .owner = THIS_MODULE,
699 .driver_name = DRIVER_NAME,
700 .dev_name = "ttyATH",
701 .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
702 .cons = NULL,
703};
704
705static int ar933x_uart_probe(struct platform_device *pdev)
706{
707 struct ar933x_uart_port *up;
708 struct uart_port *port;
709 struct resource *mem_res;
710 struct resource *irq_res;
711 struct device_node *np;
712 unsigned int baud;
713 int id;
714 int ret;
715
716 np = pdev->dev.of_node;
717 if (IS_ENABLED(CONFIG_OF) && np) {
718 id = of_alias_get_id(np, "serial");
719 if (id < 0) {
720 dev_err(&pdev->dev, "unable to get alias id, err=%d\n",
721 id);
722 return id;
723 }
724 } else {
725 id = pdev->id;
726 if (id == -1)
727 id = 0;
728 }
729
730 if (id >= CONFIG_SERIAL_AR933X_NR_UARTS)
731 return -EINVAL;
732
733 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
734 if (!irq_res) {
735 dev_err(&pdev->dev, "no IRQ resource\n");
736 return -EINVAL;
737 }
738
739 up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
740 GFP_KERNEL);
741 if (!up)
742 return -ENOMEM;
743
744 up->clk = devm_clk_get(&pdev->dev, "uart");
745 if (IS_ERR(up->clk)) {
746 dev_err(&pdev->dev, "unable to get UART clock\n");
747 return PTR_ERR(up->clk);
748 }
749
750 port = &up->port;
751
752 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
753 port->membase = devm_ioremap_resource(&pdev->dev, mem_res);
754 if (IS_ERR(port->membase))
755 return PTR_ERR(port->membase);
756
757 ret = clk_prepare_enable(up->clk);
758 if (ret)
759 return ret;
760
761 port->uartclk = clk_get_rate(up->clk);
762 if (!port->uartclk) {
763 ret = -EINVAL;
764 goto err_disable_clk;
765 }
766
767 port->mapbase = mem_res->start;
768 port->line = id;
769 port->irq = irq_res->start;
770 port->dev = &pdev->dev;
771 port->type = PORT_AR933X;
772 port->iotype = UPIO_MEM32;
773
774 port->regshift = 2;
775 port->fifosize = AR933X_UART_FIFO_SIZE;
776 port->ops = &ar933x_uart_ops;
777 port->rs485_config = ar933x_config_rs485;
778
779 baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
780 up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
781
782 baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
783 up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
784
785 ret = uart_get_rs485_mode(port);
786 if (ret)
787 goto err_disable_clk;
788
789 up->gpios = mctrl_gpio_init(port, 0);
790 if (IS_ERR(up->gpios) && PTR_ERR(up->gpios) != -ENOSYS) {
791 ret = PTR_ERR(up->gpios);
792 goto err_disable_clk;
793 }
794
795 up->rts_gpiod = mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS);
796
797 if ((port->rs485.flags & SER_RS485_ENABLED) &&
798 !up->rts_gpiod) {
799 dev_err(&pdev->dev, "lacking rts-gpio, disabling RS485\n");
800 port->rs485.flags &= ~SER_RS485_ENABLED;
801 }
802
803#ifdef CONFIG_SERIAL_AR933X_CONSOLE
804 ar933x_console_ports[up->port.line] = up;
805#endif
806
807 ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
808 if (ret)
809 goto err_disable_clk;
810
811 platform_set_drvdata(pdev, up);
812 return 0;
813
814err_disable_clk:
815 clk_disable_unprepare(up->clk);
816 return ret;
817}
818
819static int ar933x_uart_remove(struct platform_device *pdev)
820{
821 struct ar933x_uart_port *up;
822
823 up = platform_get_drvdata(pdev);
824
825 if (up) {
826 uart_remove_one_port(&ar933x_uart_driver, &up->port);
827 clk_disable_unprepare(up->clk);
828 }
829
830 return 0;
831}
832
833#ifdef CONFIG_OF
834static const struct of_device_id ar933x_uart_of_ids[] = {
835 { .compatible = "qca,ar9330-uart" },
836 {},
837};
838MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids);
839#endif
840
841static struct platform_driver ar933x_uart_platform_driver = {
842 .probe = ar933x_uart_probe,
843 .remove = ar933x_uart_remove,
844 .driver = {
845 .name = DRIVER_NAME,
846 .of_match_table = of_match_ptr(ar933x_uart_of_ids),
847 },
848};
849
850static int __init ar933x_uart_init(void)
851{
852 int ret;
853
854#ifdef CONFIG_SERIAL_AR933X_CONSOLE
855 ar933x_uart_driver.cons = &ar933x_uart_console;
856#endif
857
858 ret = uart_register_driver(&ar933x_uart_driver);
859 if (ret)
860 goto err_out;
861
862 ret = platform_driver_register(&ar933x_uart_platform_driver);
863 if (ret)
864 goto err_unregister_uart_driver;
865
866 return 0;
867
868err_unregister_uart_driver:
869 uart_unregister_driver(&ar933x_uart_driver);
870err_out:
871 return ret;
872}
873
874static void __exit ar933x_uart_exit(void)
875{
876 platform_driver_unregister(&ar933x_uart_platform_driver);
877 uart_unregister_driver(&ar933x_uart_driver);
878}
879
880module_init(ar933x_uart_init);
881module_exit(ar933x_uart_exit);
882
883MODULE_DESCRIPTION("Atheros AR933X UART driver");
884MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
885MODULE_LICENSE("GPL v2");
886MODULE_ALIAS("platform:" DRIVER_NAME);
887
