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41#include <linux/clk.h>
42#include <linux/console.h>
43#include <linux/delay.h>
44#include <linux/init.h>
45#include <linux/io.h>
46#include <linux/irq.h>
47#include <linux/module.h>
48#include <linux/of.h>
49#include <linux/of_irq.h>
50#include <linux/platform_device.h>
51#include <linux/serial_core.h>
52#include <linux/serial_reg.h>
53#include <linux/slab.h>
54#include <linux/tty.h>
55#include <linux/tty_flip.h>
56
57
58
59
60
61
62#define SIFIVE_SERIAL_TXDATA_OFFS 0x0
63#define SIFIVE_SERIAL_TXDATA_FULL_SHIFT 31
64#define SIFIVE_SERIAL_TXDATA_FULL_MASK (1 << SIFIVE_SERIAL_TXDATA_FULL_SHIFT)
65#define SIFIVE_SERIAL_TXDATA_DATA_SHIFT 0
66#define SIFIVE_SERIAL_TXDATA_DATA_MASK (0xff << SIFIVE_SERIAL_TXDATA_DATA_SHIFT)
67
68
69#define SIFIVE_SERIAL_RXDATA_OFFS 0x4
70#define SIFIVE_SERIAL_RXDATA_EMPTY_SHIFT 31
71#define SIFIVE_SERIAL_RXDATA_EMPTY_MASK (1 << SIFIVE_SERIAL_RXDATA_EMPTY_SHIFT)
72#define SIFIVE_SERIAL_RXDATA_DATA_SHIFT 0
73#define SIFIVE_SERIAL_RXDATA_DATA_MASK (0xff << SIFIVE_SERIAL_RXDATA_DATA_SHIFT)
74
75
76#define SIFIVE_SERIAL_TXCTRL_OFFS 0x8
77#define SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT 16
78#define SIFIVE_SERIAL_TXCTRL_TXCNT_MASK (0x7 << SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT)
79#define SIFIVE_SERIAL_TXCTRL_NSTOP_SHIFT 1
80#define SIFIVE_SERIAL_TXCTRL_NSTOP_MASK (1 << SIFIVE_SERIAL_TXCTRL_NSTOP_SHIFT)
81#define SIFIVE_SERIAL_TXCTRL_TXEN_SHIFT 0
82#define SIFIVE_SERIAL_TXCTRL_TXEN_MASK (1 << SIFIVE_SERIAL_TXCTRL_TXEN_SHIFT)
83
84
85#define SIFIVE_SERIAL_RXCTRL_OFFS 0xC
86#define SIFIVE_SERIAL_RXCTRL_RXCNT_SHIFT 16
87#define SIFIVE_SERIAL_RXCTRL_RXCNT_MASK (0x7 << SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT)
88#define SIFIVE_SERIAL_RXCTRL_RXEN_SHIFT 0
89#define SIFIVE_SERIAL_RXCTRL_RXEN_MASK (1 << SIFIVE_SERIAL_RXCTRL_RXEN_SHIFT)
90
91
92#define SIFIVE_SERIAL_IE_OFFS 0x10
93#define SIFIVE_SERIAL_IE_RXWM_SHIFT 1
94#define SIFIVE_SERIAL_IE_RXWM_MASK (1 << SIFIVE_SERIAL_IE_RXWM_SHIFT)
95#define SIFIVE_SERIAL_IE_TXWM_SHIFT 0
96#define SIFIVE_SERIAL_IE_TXWM_MASK (1 << SIFIVE_SERIAL_IE_TXWM_SHIFT)
97
98
99#define SIFIVE_SERIAL_IP_OFFS 0x14
100#define SIFIVE_SERIAL_IP_RXWM_SHIFT 1
101#define SIFIVE_SERIAL_IP_RXWM_MASK (1 << SIFIVE_SERIAL_IP_RXWM_SHIFT)
102#define SIFIVE_SERIAL_IP_TXWM_SHIFT 0
103#define SIFIVE_SERIAL_IP_TXWM_MASK (1 << SIFIVE_SERIAL_IP_TXWM_SHIFT)
104
105
106#define SIFIVE_SERIAL_DIV_OFFS 0x18
107#define SIFIVE_SERIAL_DIV_DIV_SHIFT 0
108#define SIFIVE_SERIAL_DIV_DIV_MASK (0xffff << SIFIVE_SERIAL_IP_DIV_SHIFT)
109
110
111
112
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114
115
116
117
118#define SIFIVE_SERIAL_MAX_PORTS 8
119
120
121
122
123
124#define SIFIVE_DEFAULT_BAUD_RATE 115200
125
126
127#define SIFIVE_SERIAL_NAME "sifive-serial"
128
129
130#define SIFIVE_TTY_PREFIX "ttySIF"
131
132
133#define SIFIVE_TX_FIFO_DEPTH 8
134
135
136#define SIFIVE_RX_FIFO_DEPTH 8
137
138#if (SIFIVE_TX_FIFO_DEPTH != SIFIVE_RX_FIFO_DEPTH)
139#error Driver does not support configurations with different TX, RX FIFO sizes
140#endif
141
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157
158struct sifive_serial_port {
159 struct uart_port port;
160 struct device *dev;
161 unsigned char ier;
162 unsigned long clkin_rate;
163 unsigned long baud_rate;
164 struct clk *clk;
165 struct notifier_block clk_notifier;
166};
167
168
169
170
171
172#define port_to_sifive_serial_port(p) (container_of((p), \
173 struct sifive_serial_port, \
174 port))
175
176#define notifier_to_sifive_serial_port(nb) (container_of((nb), \
177 struct sifive_serial_port, \
178 clk_notifier))
179
180
181
182
183static void sifive_serial_stop_tx(struct uart_port *port);
184
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200
201static void __ssp_early_writel(u32 v, u16 offs, struct uart_port *port)
202{
203 writel_relaxed(v, port->membase + offs);
204}
205
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220
221static u32 __ssp_early_readl(struct uart_port *port, u16 offs)
222{
223 return readl_relaxed(port->membase + offs);
224}
225
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235
236
237static void __ssp_writel(u32 v, u16 offs, struct sifive_serial_port *ssp)
238{
239 __ssp_early_writel(v, offs, &ssp->port);
240}
241
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252
253
254static u32 __ssp_readl(struct sifive_serial_port *ssp, u16 offs)
255{
256 return __ssp_early_readl(&ssp->port, offs);
257}
258
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268
269
270static int sifive_serial_is_txfifo_full(struct sifive_serial_port *ssp)
271{
272 return __ssp_readl(ssp, SIFIVE_SERIAL_TXDATA_OFFS) &
273 SIFIVE_SERIAL_TXDATA_FULL_MASK;
274}
275
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285
286
287static void __ssp_transmit_char(struct sifive_serial_port *ssp, int ch)
288{
289 __ssp_writel(ch, SIFIVE_SERIAL_TXDATA_OFFS, ssp);
290}
291
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298
299
300
301static void __ssp_transmit_chars(struct sifive_serial_port *ssp)
302{
303 struct circ_buf *xmit = &ssp->port.state->xmit;
304 int count;
305
306 if (ssp->port.x_char) {
307 __ssp_transmit_char(ssp, ssp->port.x_char);
308 ssp->port.icount.tx++;
309 ssp->port.x_char = 0;
310 return;
311 }
312 if (uart_circ_empty(xmit) || uart_tx_stopped(&ssp->port)) {
313 sifive_serial_stop_tx(&ssp->port);
314 return;
315 }
316 count = SIFIVE_TX_FIFO_DEPTH;
317 do {
318 __ssp_transmit_char(ssp, xmit->buf[xmit->tail]);
319 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
320 ssp->port.icount.tx++;
321 if (uart_circ_empty(xmit))
322 break;
323 } while (--count > 0);
324
325 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
326 uart_write_wakeup(&ssp->port);
327
328 if (uart_circ_empty(xmit))
329 sifive_serial_stop_tx(&ssp->port);
330}
331
332
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335
336
337
338
339static void __ssp_enable_txwm(struct sifive_serial_port *ssp)
340{
341 if (ssp->ier & SIFIVE_SERIAL_IE_TXWM_MASK)
342 return;
343
344 ssp->ier |= SIFIVE_SERIAL_IE_TXWM_MASK;
345 __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
346}
347
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353
354
355static void __ssp_enable_rxwm(struct sifive_serial_port *ssp)
356{
357 if (ssp->ier & SIFIVE_SERIAL_IE_RXWM_MASK)
358 return;
359
360 ssp->ier |= SIFIVE_SERIAL_IE_RXWM_MASK;
361 __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
362}
363
364
365
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367
368
369
370
371static void __ssp_disable_txwm(struct sifive_serial_port *ssp)
372{
373 if (!(ssp->ier & SIFIVE_SERIAL_IE_TXWM_MASK))
374 return;
375
376 ssp->ier &= ~SIFIVE_SERIAL_IE_TXWM_MASK;
377 __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
378}
379
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385
386
387static void __ssp_disable_rxwm(struct sifive_serial_port *ssp)
388{
389 if (!(ssp->ier & SIFIVE_SERIAL_IE_RXWM_MASK))
390 return;
391
392 ssp->ier &= ~SIFIVE_SERIAL_IE_RXWM_MASK;
393 __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
394}
395
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406
407
408static char __ssp_receive_char(struct sifive_serial_port *ssp, char *is_empty)
409{
410 u32 v;
411 u8 ch;
412
413 v = __ssp_readl(ssp, SIFIVE_SERIAL_RXDATA_OFFS);
414
415 if (!is_empty)
416 WARN_ON(1);
417 else
418 *is_empty = (v & SIFIVE_SERIAL_RXDATA_EMPTY_MASK) >>
419 SIFIVE_SERIAL_RXDATA_EMPTY_SHIFT;
420
421 ch = (v & SIFIVE_SERIAL_RXDATA_DATA_MASK) >>
422 SIFIVE_SERIAL_RXDATA_DATA_SHIFT;
423
424 return ch;
425}
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431
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433
434
435
436static void __ssp_receive_chars(struct sifive_serial_port *ssp)
437{
438 unsigned char ch;
439 char is_empty;
440 int c;
441
442 for (c = SIFIVE_RX_FIFO_DEPTH; c > 0; --c) {
443 ch = __ssp_receive_char(ssp, &is_empty);
444 if (is_empty)
445 break;
446
447 ssp->port.icount.rx++;
448 uart_insert_char(&ssp->port, 0, 0, ch, TTY_NORMAL);
449 }
450
451 tty_flip_buffer_push(&ssp->port.state->port);
452}
453
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457
458
459
460
461
462static void __ssp_update_div(struct sifive_serial_port *ssp)
463{
464 u16 div;
465
466 div = DIV_ROUND_UP(ssp->clkin_rate, ssp->baud_rate) - 1;
467
468 __ssp_writel(div, SIFIVE_SERIAL_DIV_OFFS, ssp);
469}
470
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479
480
481static void __ssp_update_baud_rate(struct sifive_serial_port *ssp,
482 unsigned int rate)
483{
484 if (ssp->baud_rate == rate)
485 return;
486
487 ssp->baud_rate = rate;
488 __ssp_update_div(ssp);
489}
490
491
492
493
494
495
496
497
498static void __ssp_set_stop_bits(struct sifive_serial_port *ssp, char nstop)
499{
500 u32 v;
501
502 if (nstop < 1 || nstop > 2) {
503 WARN_ON(1);
504 return;
505 }
506
507 v = __ssp_readl(ssp, SIFIVE_SERIAL_TXCTRL_OFFS);
508 v &= ~SIFIVE_SERIAL_TXCTRL_NSTOP_MASK;
509 v |= (nstop - 1) << SIFIVE_SERIAL_TXCTRL_NSTOP_SHIFT;
510 __ssp_writel(v, SIFIVE_SERIAL_TXCTRL_OFFS, ssp);
511}
512
513
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517
518
519
520
521static void __maybe_unused __ssp_wait_for_xmitr(struct sifive_serial_port *ssp)
522{
523 while (sifive_serial_is_txfifo_full(ssp))
524 udelay(1);
525}
526
527
528
529
530
531static void sifive_serial_stop_tx(struct uart_port *port)
532{
533 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
534
535 __ssp_disable_txwm(ssp);
536}
537
538static void sifive_serial_stop_rx(struct uart_port *port)
539{
540 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
541
542 __ssp_disable_rxwm(ssp);
543}
544
545static void sifive_serial_start_tx(struct uart_port *port)
546{
547 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
548
549 __ssp_enable_txwm(ssp);
550}
551
552static irqreturn_t sifive_serial_irq(int irq, void *dev_id)
553{
554 struct sifive_serial_port *ssp = dev_id;
555 u32 ip;
556
557 spin_lock(&ssp->port.lock);
558
559 ip = __ssp_readl(ssp, SIFIVE_SERIAL_IP_OFFS);
560 if (!ip) {
561 spin_unlock(&ssp->port.lock);
562 return IRQ_NONE;
563 }
564
565 if (ip & SIFIVE_SERIAL_IP_RXWM_MASK)
566 __ssp_receive_chars(ssp);
567 if (ip & SIFIVE_SERIAL_IP_TXWM_MASK)
568 __ssp_transmit_chars(ssp);
569
570 spin_unlock(&ssp->port.lock);
571
572 return IRQ_HANDLED;
573}
574
575static unsigned int sifive_serial_tx_empty(struct uart_port *port)
576{
577 return TIOCSER_TEMT;
578}
579
580static unsigned int sifive_serial_get_mctrl(struct uart_port *port)
581{
582 return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR;
583}
584
585static void sifive_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
586{
587
588}
589
590static void sifive_serial_break_ctl(struct uart_port *port, int break_state)
591{
592
593}
594
595static int sifive_serial_startup(struct uart_port *port)
596{
597 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
598
599 __ssp_enable_rxwm(ssp);
600
601 return 0;
602}
603
604static void sifive_serial_shutdown(struct uart_port *port)
605{
606 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
607
608 __ssp_disable_rxwm(ssp);
609 __ssp_disable_txwm(ssp);
610}
611
612
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617
618
619
620
621
622
623
624
625static int sifive_serial_clk_notifier(struct notifier_block *nb,
626 unsigned long event, void *data)
627{
628 struct clk_notifier_data *cnd = data;
629 struct sifive_serial_port *ssp = notifier_to_sifive_serial_port(nb);
630
631 if (event == PRE_RATE_CHANGE) {
632
633
634
635
636
637
638 __ssp_wait_for_xmitr(ssp);
639
640
641
642
643
644
645
646
647
648 udelay(DIV_ROUND_UP(12 * 1000 * 1000, ssp->baud_rate));
649 }
650
651 if (event == POST_RATE_CHANGE && ssp->clkin_rate != cnd->new_rate) {
652 ssp->clkin_rate = cnd->new_rate;
653 __ssp_update_div(ssp);
654 }
655
656 return NOTIFY_OK;
657}
658
659static void sifive_serial_set_termios(struct uart_port *port,
660 struct ktermios *termios,
661 struct ktermios *old)
662{
663 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
664 unsigned long flags;
665 u32 v, old_v;
666 int rate;
667 char nstop;
668
669 if ((termios->c_cflag & CSIZE) != CS8)
670 dev_err_once(ssp->port.dev, "only 8-bit words supported\n");
671 if (termios->c_iflag & (INPCK | PARMRK))
672 dev_err_once(ssp->port.dev, "parity checking not supported\n");
673 if (termios->c_iflag & BRKINT)
674 dev_err_once(ssp->port.dev, "BREAK detection not supported\n");
675
676
677 nstop = (termios->c_cflag & CSTOPB) ? 2 : 1;
678 __ssp_set_stop_bits(ssp, nstop);
679
680
681 rate = uart_get_baud_rate(port, termios, old, 0, ssp->clkin_rate / 16);
682 __ssp_update_baud_rate(ssp, rate);
683
684 spin_lock_irqsave(&ssp->port.lock, flags);
685
686
687 uart_update_timeout(port, termios->c_cflag, rate);
688
689 ssp->port.read_status_mask = 0;
690
691
692 v = __ssp_readl(ssp, SIFIVE_SERIAL_RXCTRL_OFFS);
693 old_v = v;
694 if ((termios->c_cflag & CREAD) == 0)
695 v &= SIFIVE_SERIAL_RXCTRL_RXEN_MASK;
696 else
697 v |= SIFIVE_SERIAL_RXCTRL_RXEN_MASK;
698 if (v != old_v)
699 __ssp_writel(v, SIFIVE_SERIAL_RXCTRL_OFFS, ssp);
700
701 spin_unlock_irqrestore(&ssp->port.lock, flags);
702}
703
704static void sifive_serial_release_port(struct uart_port *port)
705{
706}
707
708static int sifive_serial_request_port(struct uart_port *port)
709{
710 return 0;
711}
712
713static void sifive_serial_config_port(struct uart_port *port, int flags)
714{
715 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
716
717 ssp->port.type = PORT_SIFIVE_V0;
718}
719
720static int sifive_serial_verify_port(struct uart_port *port,
721 struct serial_struct *ser)
722{
723 return -EINVAL;
724}
725
726static const char *sifive_serial_type(struct uart_port *port)
727{
728 return port->type == PORT_SIFIVE_V0 ? "SiFive UART v0" : NULL;
729}
730
731#ifdef CONFIG_CONSOLE_POLL
732static int sifive_serial_poll_get_char(struct uart_port *port)
733{
734 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
735 char is_empty, ch;
736
737 ch = __ssp_receive_char(ssp, &is_empty);
738 if (is_empty)
739 return NO_POLL_CHAR;
740
741 return ch;
742}
743
744static void sifive_serial_poll_put_char(struct uart_port *port,
745 unsigned char c)
746{
747 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
748
749 __ssp_wait_for_xmitr(ssp);
750 __ssp_transmit_char(ssp, c);
751}
752#endif
753
754
755
756
757
758#ifdef CONFIG_SERIAL_EARLYCON
759static void early_sifive_serial_putc(struct uart_port *port, int c)
760{
761 while (__ssp_early_readl(port, SIFIVE_SERIAL_TXDATA_OFFS) &
762 SIFIVE_SERIAL_TXDATA_FULL_MASK)
763 cpu_relax();
764
765 __ssp_early_writel(c, SIFIVE_SERIAL_TXDATA_OFFS, port);
766}
767
768static void early_sifive_serial_write(struct console *con, const char *s,
769 unsigned int n)
770{
771 struct earlycon_device *dev = con->data;
772 struct uart_port *port = &dev->port;
773
774 uart_console_write(port, s, n, early_sifive_serial_putc);
775}
776
777static int __init early_sifive_serial_setup(struct earlycon_device *dev,
778 const char *options)
779{
780 struct uart_port *port = &dev->port;
781
782 if (!port->membase)
783 return -ENODEV;
784
785 dev->con->write = early_sifive_serial_write;
786
787 return 0;
788}
789
790OF_EARLYCON_DECLARE(sifive, "sifive,uart0", early_sifive_serial_setup);
791OF_EARLYCON_DECLARE(sifive, "sifive,fu540-c000-uart0",
792 early_sifive_serial_setup);
793#endif
794
795
796
797
798
799#ifdef CONFIG_SERIAL_SIFIVE_CONSOLE
800
801static struct sifive_serial_port *sifive_serial_console_ports[SIFIVE_SERIAL_MAX_PORTS];
802
803static void sifive_serial_console_putchar(struct uart_port *port, int ch)
804{
805 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
806
807 __ssp_wait_for_xmitr(ssp);
808 __ssp_transmit_char(ssp, ch);
809}
810
811static void sifive_serial_console_write(struct console *co, const char *s,
812 unsigned int count)
813{
814 struct sifive_serial_port *ssp = sifive_serial_console_ports[co->index];
815 unsigned long flags;
816 unsigned int ier;
817 int locked = 1;
818
819 if (!ssp)
820 return;
821
822 local_irq_save(flags);
823 if (ssp->port.sysrq)
824 locked = 0;
825 else if (oops_in_progress)
826 locked = spin_trylock(&ssp->port.lock);
827 else
828 spin_lock(&ssp->port.lock);
829
830 ier = __ssp_readl(ssp, SIFIVE_SERIAL_IE_OFFS);
831 __ssp_writel(0, SIFIVE_SERIAL_IE_OFFS, ssp);
832
833 uart_console_write(&ssp->port, s, count, sifive_serial_console_putchar);
834
835 __ssp_writel(ier, SIFIVE_SERIAL_IE_OFFS, ssp);
836
837 if (locked)
838 spin_unlock(&ssp->port.lock);
839 local_irq_restore(flags);
840}
841
842static int __init sifive_serial_console_setup(struct console *co, char *options)
843{
844 struct sifive_serial_port *ssp;
845 int baud = SIFIVE_DEFAULT_BAUD_RATE;
846 int bits = 8;
847 int parity = 'n';
848 int flow = 'n';
849
850 if (co->index < 0 || co->index >= SIFIVE_SERIAL_MAX_PORTS)
851 return -ENODEV;
852
853 ssp = sifive_serial_console_ports[co->index];
854 if (!ssp)
855 return -ENODEV;
856
857 if (options)
858 uart_parse_options(options, &baud, &parity, &bits, &flow);
859
860 return uart_set_options(&ssp->port, co, baud, parity, bits, flow);
861}
862
863static struct uart_driver sifive_serial_uart_driver;
864
865static struct console sifive_serial_console = {
866 .name = SIFIVE_TTY_PREFIX,
867 .write = sifive_serial_console_write,
868 .device = uart_console_device,
869 .setup = sifive_serial_console_setup,
870 .flags = CON_PRINTBUFFER,
871 .index = -1,
872 .data = &sifive_serial_uart_driver,
873};
874
875static int __init sifive_console_init(void)
876{
877 register_console(&sifive_serial_console);
878 return 0;
879}
880
881console_initcall(sifive_console_init);
882
883static void __ssp_add_console_port(struct sifive_serial_port *ssp)
884{
885 sifive_serial_console_ports[ssp->port.line] = ssp;
886}
887
888static void __ssp_remove_console_port(struct sifive_serial_port *ssp)
889{
890 sifive_serial_console_ports[ssp->port.line] = 0;
891}
892
893#define SIFIVE_SERIAL_CONSOLE (&sifive_serial_console)
894
895#else
896
897#define SIFIVE_SERIAL_CONSOLE NULL
898
899static void __ssp_add_console_port(struct sifive_serial_port *ssp)
900{}
901static void __ssp_remove_console_port(struct sifive_serial_port *ssp)
902{}
903
904#endif
905
906static const struct uart_ops sifive_serial_uops = {
907 .tx_empty = sifive_serial_tx_empty,
908 .set_mctrl = sifive_serial_set_mctrl,
909 .get_mctrl = sifive_serial_get_mctrl,
910 .stop_tx = sifive_serial_stop_tx,
911 .start_tx = sifive_serial_start_tx,
912 .stop_rx = sifive_serial_stop_rx,
913 .break_ctl = sifive_serial_break_ctl,
914 .startup = sifive_serial_startup,
915 .shutdown = sifive_serial_shutdown,
916 .set_termios = sifive_serial_set_termios,
917 .type = sifive_serial_type,
918 .release_port = sifive_serial_release_port,
919 .request_port = sifive_serial_request_port,
920 .config_port = sifive_serial_config_port,
921 .verify_port = sifive_serial_verify_port,
922#ifdef CONFIG_CONSOLE_POLL
923 .poll_get_char = sifive_serial_poll_get_char,
924 .poll_put_char = sifive_serial_poll_put_char,
925#endif
926};
927
928static struct uart_driver sifive_serial_uart_driver = {
929 .owner = THIS_MODULE,
930 .driver_name = SIFIVE_SERIAL_NAME,
931 .dev_name = SIFIVE_TTY_PREFIX,
932 .nr = SIFIVE_SERIAL_MAX_PORTS,
933 .cons = SIFIVE_SERIAL_CONSOLE,
934};
935
936static int sifive_serial_probe(struct platform_device *pdev)
937{
938 struct sifive_serial_port *ssp;
939 struct resource *mem;
940 struct clk *clk;
941 void __iomem *base;
942 int irq, id, r;
943
944 irq = platform_get_irq(pdev, 0);
945 if (irq < 0)
946 return -EPROBE_DEFER;
947
948 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
949 base = devm_ioremap_resource(&pdev->dev, mem);
950 if (IS_ERR(base)) {
951 dev_err(&pdev->dev, "could not acquire device memory\n");
952 return PTR_ERR(base);
953 }
954
955 clk = devm_clk_get(&pdev->dev, NULL);
956 if (IS_ERR(clk)) {
957 dev_err(&pdev->dev, "unable to find controller clock\n");
958 return PTR_ERR(clk);
959 }
960
961 id = of_alias_get_id(pdev->dev.of_node, "serial");
962 if (id < 0) {
963 dev_err(&pdev->dev, "missing aliases entry\n");
964 return id;
965 }
966
967#ifdef CONFIG_SERIAL_SIFIVE_CONSOLE
968 if (id > SIFIVE_SERIAL_MAX_PORTS) {
969 dev_err(&pdev->dev, "too many UARTs (%d)\n", id);
970 return -EINVAL;
971 }
972#endif
973
974 ssp = devm_kzalloc(&pdev->dev, sizeof(*ssp), GFP_KERNEL);
975 if (!ssp)
976 return -ENOMEM;
977
978 ssp->port.dev = &pdev->dev;
979 ssp->port.type = PORT_SIFIVE_V0;
980 ssp->port.iotype = UPIO_MEM;
981 ssp->port.irq = irq;
982 ssp->port.fifosize = SIFIVE_TX_FIFO_DEPTH;
983 ssp->port.ops = &sifive_serial_uops;
984 ssp->port.line = id;
985 ssp->port.mapbase = mem->start;
986 ssp->port.membase = base;
987 ssp->dev = &pdev->dev;
988 ssp->clk = clk;
989 ssp->clk_notifier.notifier_call = sifive_serial_clk_notifier;
990
991 r = clk_notifier_register(ssp->clk, &ssp->clk_notifier);
992 if (r) {
993 dev_err(&pdev->dev, "could not register clock notifier: %d\n",
994 r);
995 goto probe_out1;
996 }
997
998
999 ssp->clkin_rate = clk_get_rate(ssp->clk);
1000 ssp->baud_rate = SIFIVE_DEFAULT_BAUD_RATE;
1001 ssp->port.uartclk = ssp->baud_rate * 16;
1002 __ssp_update_div(ssp);
1003
1004 platform_set_drvdata(pdev, ssp);
1005
1006
1007 __ssp_writel((1 << SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT) |
1008 SIFIVE_SERIAL_TXCTRL_TXEN_MASK,
1009 SIFIVE_SERIAL_TXCTRL_OFFS, ssp);
1010
1011
1012 __ssp_writel((0 << SIFIVE_SERIAL_RXCTRL_RXCNT_SHIFT) |
1013 SIFIVE_SERIAL_RXCTRL_RXEN_MASK,
1014 SIFIVE_SERIAL_RXCTRL_OFFS, ssp);
1015
1016 r = request_irq(ssp->port.irq, sifive_serial_irq, ssp->port.irqflags,
1017 dev_name(&pdev->dev), ssp);
1018 if (r) {
1019 dev_err(&pdev->dev, "could not attach interrupt: %d\n", r);
1020 goto probe_out2;
1021 }
1022
1023 __ssp_add_console_port(ssp);
1024
1025 r = uart_add_one_port(&sifive_serial_uart_driver, &ssp->port);
1026 if (r != 0) {
1027 dev_err(&pdev->dev, "could not add uart: %d\n", r);
1028 goto probe_out3;
1029 }
1030
1031 return 0;
1032
1033probe_out3:
1034 __ssp_remove_console_port(ssp);
1035 free_irq(ssp->port.irq, ssp);
1036probe_out2:
1037 clk_notifier_unregister(ssp->clk, &ssp->clk_notifier);
1038probe_out1:
1039 return r;
1040}
1041
1042static int sifive_serial_remove(struct platform_device *dev)
1043{
1044 struct sifive_serial_port *ssp = platform_get_drvdata(dev);
1045
1046 __ssp_remove_console_port(ssp);
1047 uart_remove_one_port(&sifive_serial_uart_driver, &ssp->port);
1048 free_irq(ssp->port.irq, ssp);
1049 clk_notifier_unregister(ssp->clk, &ssp->clk_notifier);
1050
1051 return 0;
1052}
1053
1054static const struct of_device_id sifive_serial_of_match[] = {
1055 { .compatible = "sifive,fu540-c000-uart0" },
1056 { .compatible = "sifive,uart0" },
1057 {},
1058};
1059MODULE_DEVICE_TABLE(of, sifive_serial_of_match);
1060
1061static struct platform_driver sifive_serial_platform_driver = {
1062 .probe = sifive_serial_probe,
1063 .remove = sifive_serial_remove,
1064 .driver = {
1065 .name = SIFIVE_SERIAL_NAME,
1066 .of_match_table = of_match_ptr(sifive_serial_of_match),
1067 },
1068};
1069
1070static int __init sifive_serial_init(void)
1071{
1072 int r;
1073
1074 r = uart_register_driver(&sifive_serial_uart_driver);
1075 if (r)
1076 goto init_out1;
1077
1078 r = platform_driver_register(&sifive_serial_platform_driver);
1079 if (r)
1080 goto init_out2;
1081
1082 return 0;
1083
1084init_out2:
1085 uart_unregister_driver(&sifive_serial_uart_driver);
1086init_out1:
1087 return r;
1088}
1089
1090static void __exit sifive_serial_exit(void)
1091{
1092 platform_driver_unregister(&sifive_serial_platform_driver);
1093 uart_unregister_driver(&sifive_serial_uart_driver);
1094}
1095
1096module_init(sifive_serial_init);
1097module_exit(sifive_serial_exit);
1098
1099MODULE_DESCRIPTION("SiFive UART serial driver");
1100MODULE_LICENSE("GPL");
1101MODULE_AUTHOR("Paul Walmsley <paul@pwsan.com>");
1102