linux/drivers/usb/host/ehci-sched.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (c) 2001-2004 by David Brownell
   4 * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
   5 */
   6
   7/* this file is part of ehci-hcd.c */
   8
   9/*-------------------------------------------------------------------------*/
  10
  11/*
  12 * EHCI scheduled transaction support:  interrupt, iso, split iso
  13 * These are called "periodic" transactions in the EHCI spec.
  14 *
  15 * Note that for interrupt transfers, the QH/QTD manipulation is shared
  16 * with the "asynchronous" transaction support (control/bulk transfers).
  17 * The only real difference is in how interrupt transfers are scheduled.
  18 *
  19 * For ISO, we make an "iso_stream" head to serve the same role as a QH.
  20 * It keeps track of every ITD (or SITD) that's linked, and holds enough
  21 * pre-calculated schedule data to make appending to the queue be quick.
  22 */
  23
  24static int ehci_get_frame(struct usb_hcd *hcd);
  25
  26/*
  27 * periodic_next_shadow - return "next" pointer on shadow list
  28 * @periodic: host pointer to qh/itd/sitd
  29 * @tag: hardware tag for type of this record
  30 */
  31static union ehci_shadow *
  32periodic_next_shadow(struct ehci_hcd *ehci, union ehci_shadow *periodic,
  33                __hc32 tag)
  34{
  35        switch (hc32_to_cpu(ehci, tag)) {
  36        case Q_TYPE_QH:
  37                return &periodic->qh->qh_next;
  38        case Q_TYPE_FSTN:
  39                return &periodic->fstn->fstn_next;
  40        case Q_TYPE_ITD:
  41                return &periodic->itd->itd_next;
  42        /* case Q_TYPE_SITD: */
  43        default:
  44                return &periodic->sitd->sitd_next;
  45        }
  46}
  47
  48static __hc32 *
  49shadow_next_periodic(struct ehci_hcd *ehci, union ehci_shadow *periodic,
  50                __hc32 tag)
  51{
  52        switch (hc32_to_cpu(ehci, tag)) {
  53        /* our ehci_shadow.qh is actually software part */
  54        case Q_TYPE_QH:
  55                return &periodic->qh->hw->hw_next;
  56        /* others are hw parts */
  57        default:
  58                return periodic->hw_next;
  59        }
  60}
  61
  62/* caller must hold ehci->lock */
  63static void periodic_unlink(struct ehci_hcd *ehci, unsigned frame, void *ptr)
  64{
  65        union ehci_shadow       *prev_p = &ehci->pshadow[frame];
  66        __hc32                  *hw_p = &ehci->periodic[frame];
  67        union ehci_shadow       here = *prev_p;
  68
  69        /* find predecessor of "ptr"; hw and shadow lists are in sync */
  70        while (here.ptr && here.ptr != ptr) {
  71                prev_p = periodic_next_shadow(ehci, prev_p,
  72                                Q_NEXT_TYPE(ehci, *hw_p));
  73                hw_p = shadow_next_periodic(ehci, &here,
  74                                Q_NEXT_TYPE(ehci, *hw_p));
  75                here = *prev_p;
  76        }
  77        /* an interrupt entry (at list end) could have been shared */
  78        if (!here.ptr)
  79                return;
  80
  81        /* update shadow and hardware lists ... the old "next" pointers
  82         * from ptr may still be in use, the caller updates them.
  83         */
  84        *prev_p = *periodic_next_shadow(ehci, &here,
  85                        Q_NEXT_TYPE(ehci, *hw_p));
  86
  87        if (!ehci->use_dummy_qh ||
  88            *shadow_next_periodic(ehci, &here, Q_NEXT_TYPE(ehci, *hw_p))
  89                        != EHCI_LIST_END(ehci))
  90                *hw_p = *shadow_next_periodic(ehci, &here,
  91                                Q_NEXT_TYPE(ehci, *hw_p));
  92        else
  93                *hw_p = cpu_to_hc32(ehci, ehci->dummy->qh_dma);
  94}
  95
  96/*-------------------------------------------------------------------------*/
  97
  98/* Bandwidth and TT management */
  99
 100/* Find the TT data structure for this device; create it if necessary */
 101static struct ehci_tt *find_tt(struct usb_device *udev)
 102{
 103        struct usb_tt           *utt = udev->tt;
 104        struct ehci_tt          *tt, **tt_index, **ptt;
 105        unsigned                port;
 106        bool                    allocated_index = false;
 107
 108        if (!utt)
 109                return NULL;            /* Not below a TT */
 110
 111        /*
 112         * Find/create our data structure.
 113         * For hubs with a single TT, we get it directly.
 114         * For hubs with multiple TTs, there's an extra level of pointers.
 115         */
 116        tt_index = NULL;
 117        if (utt->multi) {
 118                tt_index = utt->hcpriv;
 119                if (!tt_index) {                /* Create the index array */
 120                        tt_index = kcalloc(utt->hub->maxchild,
 121                                           sizeof(*tt_index),
 122                                           GFP_ATOMIC);
 123                        if (!tt_index)
 124                                return ERR_PTR(-ENOMEM);
 125                        utt->hcpriv = tt_index;
 126                        allocated_index = true;
 127                }
 128                port = udev->ttport - 1;
 129                ptt = &tt_index[port];
 130        } else {
 131                port = 0;
 132                ptt = (struct ehci_tt **) &utt->hcpriv;
 133        }
 134
 135        tt = *ptt;
 136        if (!tt) {                              /* Create the ehci_tt */
 137                struct ehci_hcd         *ehci =
 138                                hcd_to_ehci(bus_to_hcd(udev->bus));
 139
 140                tt = kzalloc(sizeof(*tt), GFP_ATOMIC);
 141                if (!tt) {
 142                        if (allocated_index) {
 143                                utt->hcpriv = NULL;
 144                                kfree(tt_index);
 145                        }
 146                        return ERR_PTR(-ENOMEM);
 147                }
 148                list_add_tail(&tt->tt_list, &ehci->tt_list);
 149                INIT_LIST_HEAD(&tt->ps_list);
 150                tt->usb_tt = utt;
 151                tt->tt_port = port;
 152                *ptt = tt;
 153        }
 154
 155        return tt;
 156}
 157
 158/* Release the TT above udev, if it's not in use */
 159static void drop_tt(struct usb_device *udev)
 160{
 161        struct usb_tt           *utt = udev->tt;
 162        struct ehci_tt          *tt, **tt_index, **ptt;
 163        int                     cnt, i;
 164
 165        if (!utt || !utt->hcpriv)
 166                return;         /* Not below a TT, or never allocated */
 167
 168        cnt = 0;
 169        if (utt->multi) {
 170                tt_index = utt->hcpriv;
 171                ptt = &tt_index[udev->ttport - 1];
 172
 173                /* How many entries are left in tt_index? */
 174                for (i = 0; i < utt->hub->maxchild; ++i)
 175                        cnt += !!tt_index[i];
 176        } else {
 177                tt_index = NULL;
 178                ptt = (struct ehci_tt **) &utt->hcpriv;
 179        }
 180
 181        tt = *ptt;
 182        if (!tt || !list_empty(&tt->ps_list))
 183                return;         /* never allocated, or still in use */
 184
 185        list_del(&tt->tt_list);
 186        *ptt = NULL;
 187        kfree(tt);
 188        if (cnt == 1) {
 189                utt->hcpriv = NULL;
 190                kfree(tt_index);
 191        }
 192}
 193
 194static void bandwidth_dbg(struct ehci_hcd *ehci, int sign, char *type,
 195                struct ehci_per_sched *ps)
 196{
 197        dev_dbg(&ps->udev->dev,
 198                        "ep %02x: %s %s @ %u+%u (%u.%u+%u) [%u/%u us] mask %04x\n",
 199                        ps->ep->desc.bEndpointAddress,
 200                        (sign >= 0 ? "reserve" : "release"), type,
 201                        (ps->bw_phase << 3) + ps->phase_uf, ps->bw_uperiod,
 202                        ps->phase, ps->phase_uf, ps->period,
 203                        ps->usecs, ps->c_usecs, ps->cs_mask);
 204}
 205
 206static void reserve_release_intr_bandwidth(struct ehci_hcd *ehci,
 207                struct ehci_qh *qh, int sign)
 208{
 209        unsigned                start_uf;
 210        unsigned                i, j, m;
 211        int                     usecs = qh->ps.usecs;
 212        int                     c_usecs = qh->ps.c_usecs;
 213        int                     tt_usecs = qh->ps.tt_usecs;
 214        struct ehci_tt          *tt;
 215
 216        if (qh->ps.phase == NO_FRAME)   /* Bandwidth wasn't reserved */
 217                return;
 218        start_uf = qh->ps.bw_phase << 3;
 219
 220        bandwidth_dbg(ehci, sign, "intr", &qh->ps);
 221
 222        if (sign < 0) {         /* Release bandwidth */
 223                usecs = -usecs;
 224                c_usecs = -c_usecs;
 225                tt_usecs = -tt_usecs;
 226        }
 227
 228        /* Entire transaction (high speed) or start-split (full/low speed) */
 229        for (i = start_uf + qh->ps.phase_uf; i < EHCI_BANDWIDTH_SIZE;
 230                        i += qh->ps.bw_uperiod)
 231                ehci->bandwidth[i] += usecs;
 232
 233        /* Complete-split (full/low speed) */
 234        if (qh->ps.c_usecs) {
 235                /* NOTE: adjustments needed for FSTN */
 236                for (i = start_uf; i < EHCI_BANDWIDTH_SIZE;
 237                                i += qh->ps.bw_uperiod) {
 238                        for ((j = 2, m = 1 << (j+8)); j < 8; (++j, m <<= 1)) {
 239                                if (qh->ps.cs_mask & m)
 240                                        ehci->bandwidth[i+j] += c_usecs;
 241                        }
 242                }
 243        }
 244
 245        /* FS/LS bus bandwidth */
 246        if (tt_usecs) {
 247                /*
 248                 * find_tt() will not return any error here as we have
 249                 * already called find_tt() before calling this function
 250                 * and checked for any error return. The previous call
 251                 * would have created the data structure.
 252                 */
 253                tt = find_tt(qh->ps.udev);
 254                if (sign > 0)
 255                        list_add_tail(&qh->ps.ps_list, &tt->ps_list);
 256                else
 257                        list_del(&qh->ps.ps_list);
 258
 259                for (i = start_uf >> 3; i < EHCI_BANDWIDTH_FRAMES;
 260                                i += qh->ps.bw_period)
 261                        tt->bandwidth[i] += tt_usecs;
 262        }
 263}
 264
 265/*-------------------------------------------------------------------------*/
 266
 267static void compute_tt_budget(u8 budget_table[EHCI_BANDWIDTH_SIZE],
 268                struct ehci_tt *tt)
 269{
 270        struct ehci_per_sched   *ps;
 271        unsigned                uframe, uf, x;
 272        u8                      *budget_line;
 273
 274        if (!tt)
 275                return;
 276        memset(budget_table, 0, EHCI_BANDWIDTH_SIZE);
 277
 278        /* Add up the contributions from all the endpoints using this TT */
 279        list_for_each_entry(ps, &tt->ps_list, ps_list) {
 280                for (uframe = ps->bw_phase << 3; uframe < EHCI_BANDWIDTH_SIZE;
 281                                uframe += ps->bw_uperiod) {
 282                        budget_line = &budget_table[uframe];
 283                        x = ps->tt_usecs;
 284
 285                        /* propagate the time forward */
 286                        for (uf = ps->phase_uf; uf < 8; ++uf) {
 287                                x += budget_line[uf];
 288
 289                                /* Each microframe lasts 125 us */
 290                                if (x <= 125) {
 291                                        budget_line[uf] = x;
 292                                        break;
 293                                }
 294                                budget_line[uf] = 125;
 295                                x -= 125;
 296                        }
 297                }
 298        }
 299}
 300
 301static int __maybe_unused same_tt(struct usb_device *dev1,
 302                struct usb_device *dev2)
 303{
 304        if (!dev1->tt || !dev2->tt)
 305                return 0;
 306        if (dev1->tt != dev2->tt)
 307                return 0;
 308        if (dev1->tt->multi)
 309                return dev1->ttport == dev2->ttport;
 310        else
 311                return 1;
 312}
 313
 314#ifdef CONFIG_USB_EHCI_TT_NEWSCHED
 315
 316static const unsigned char
 317max_tt_usecs[] = { 125, 125, 125, 125, 125, 125, 30, 0 };
 318
 319/* carryover low/fullspeed bandwidth that crosses uframe boundries */
 320static inline void carryover_tt_bandwidth(unsigned short tt_usecs[8])
 321{
 322        int i;
 323
 324        for (i = 0; i < 7; i++) {
 325                if (max_tt_usecs[i] < tt_usecs[i]) {
 326                        tt_usecs[i+1] += tt_usecs[i] - max_tt_usecs[i];
 327                        tt_usecs[i] = max_tt_usecs[i];
 328                }
 329        }
 330}
 331
 332/*
 333 * Return true if the device's tt's downstream bus is available for a
 334 * periodic transfer of the specified length (usecs), starting at the
 335 * specified frame/uframe.  Note that (as summarized in section 11.19
 336 * of the usb 2.0 spec) TTs can buffer multiple transactions for each
 337 * uframe.
 338 *
 339 * The uframe parameter is when the fullspeed/lowspeed transfer
 340 * should be executed in "B-frame" terms, which is the same as the
 341 * highspeed ssplit's uframe (which is in "H-frame" terms).  For example
 342 * a ssplit in "H-frame" 0 causes a transfer in "B-frame" 0.
 343 * See the EHCI spec sec 4.5 and fig 4.7.
 344 *
 345 * This checks if the full/lowspeed bus, at the specified starting uframe,
 346 * has the specified bandwidth available, according to rules listed
 347 * in USB 2.0 spec section 11.18.1 fig 11-60.
 348 *
 349 * This does not check if the transfer would exceed the max ssplit
 350 * limit of 16, specified in USB 2.0 spec section 11.18.4 requirement #4,
 351 * since proper scheduling limits ssplits to less than 16 per uframe.
 352 */
 353static int tt_available(
 354        struct ehci_hcd         *ehci,
 355        struct ehci_per_sched   *ps,
 356        struct ehci_tt          *tt,
 357        unsigned                frame,
 358        unsigned                uframe
 359)
 360{
 361        unsigned                period = ps->bw_period;
 362        unsigned                usecs = ps->tt_usecs;
 363
 364        if ((period == 0) || (uframe >= 7))     /* error */
 365                return 0;
 366
 367        for (frame &= period - 1; frame < EHCI_BANDWIDTH_FRAMES;
 368                        frame += period) {
 369                unsigned        i, uf;
 370                unsigned short  tt_usecs[8];
 371
 372                if (tt->bandwidth[frame] + usecs > 900)
 373                        return 0;
 374
 375                uf = frame << 3;
 376                for (i = 0; i < 8; (++i, ++uf))
 377                        tt_usecs[i] = ehci->tt_budget[uf];
 378
 379                if (max_tt_usecs[uframe] <= tt_usecs[uframe])
 380                        return 0;
 381
 382                /* special case for isoc transfers larger than 125us:
 383                 * the first and each subsequent fully used uframe
 384                 * must be empty, so as to not illegally delay
 385                 * already scheduled transactions
 386                 */
 387                if (usecs > 125) {
 388                        int ufs = (usecs / 125);
 389
 390                        for (i = uframe; i < (uframe + ufs) && i < 8; i++)
 391                                if (tt_usecs[i] > 0)
 392                                        return 0;
 393                }
 394
 395                tt_usecs[uframe] += usecs;
 396
 397                carryover_tt_bandwidth(tt_usecs);
 398
 399                /* fail if the carryover pushed bw past the last uframe's limit */
 400                if (max_tt_usecs[7] < tt_usecs[7])
 401                        return 0;
 402        }
 403
 404        return 1;
 405}
 406
 407#else
 408
 409/* return true iff the device's transaction translator is available
 410 * for a periodic transfer starting at the specified frame, using
 411 * all the uframes in the mask.
 412 */
 413static int tt_no_collision(
 414        struct ehci_hcd         *ehci,
 415        unsigned                period,
 416        struct usb_device       *dev,
 417        unsigned                frame,
 418        u32                     uf_mask
 419)
 420{
 421        if (period == 0)        /* error */
 422                return 0;
 423
 424        /* note bandwidth wastage:  split never follows csplit
 425         * (different dev or endpoint) until the next uframe.
 426         * calling convention doesn't make that distinction.
 427         */
 428        for (; frame < ehci->periodic_size; frame += period) {
 429                union ehci_shadow       here;
 430                __hc32                  type;
 431                struct ehci_qh_hw       *hw;
 432
 433                here = ehci->pshadow[frame];
 434                type = Q_NEXT_TYPE(ehci, ehci->periodic[frame]);
 435                while (here.ptr) {
 436                        switch (hc32_to_cpu(ehci, type)) {
 437                        case Q_TYPE_ITD:
 438                                type = Q_NEXT_TYPE(ehci, here.itd->hw_next);
 439                                here = here.itd->itd_next;
 440                                continue;
 441                        case Q_TYPE_QH:
 442                                hw = here.qh->hw;
 443                                if (same_tt(dev, here.qh->ps.udev)) {
 444                                        u32             mask;
 445
 446                                        mask = hc32_to_cpu(ehci,
 447                                                        hw->hw_info2);
 448                                        /* "knows" no gap is needed */
 449                                        mask |= mask >> 8;
 450                                        if (mask & uf_mask)
 451                                                break;
 452                                }
 453                                type = Q_NEXT_TYPE(ehci, hw->hw_next);
 454                                here = here.qh->qh_next;
 455                                continue;
 456                        case Q_TYPE_SITD:
 457                                if (same_tt(dev, here.sitd->urb->dev)) {
 458                                        u16             mask;
 459
 460                                        mask = hc32_to_cpu(ehci, here.sitd
 461                                                                ->hw_uframe);
 462                                        /* FIXME assumes no gap for IN! */
 463                                        mask |= mask >> 8;
 464                                        if (mask & uf_mask)
 465                                                break;
 466                                }
 467                                type = Q_NEXT_TYPE(ehci, here.sitd->hw_next);
 468                                here = here.sitd->sitd_next;
 469                                continue;
 470                        /* case Q_TYPE_FSTN: */
 471                        default:
 472                                ehci_dbg(ehci,
 473                                        "periodic frame %d bogus type %d\n",
 474                                        frame, type);
 475                        }
 476
 477                        /* collision or error */
 478                        return 0;
 479                }
 480        }
 481
 482        /* no collision */
 483        return 1;
 484}
 485
 486#endif /* CONFIG_USB_EHCI_TT_NEWSCHED */
 487
 488/*-------------------------------------------------------------------------*/
 489
 490static void enable_periodic(struct ehci_hcd *ehci)
 491{
 492        if (ehci->periodic_count++)
 493                return;
 494
 495        /* Stop waiting to turn off the periodic schedule */
 496        ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_DISABLE_PERIODIC);
 497
 498        /* Don't start the schedule until PSS is 0 */
 499        ehci_poll_PSS(ehci);
 500        turn_on_io_watchdog(ehci);
 501}
 502
 503static void disable_periodic(struct ehci_hcd *ehci)
 504{
 505        if (--ehci->periodic_count)
 506                return;
 507
 508        /* Don't turn off the schedule until PSS is 1 */
 509        ehci_poll_PSS(ehci);
 510}
 511
 512/*-------------------------------------------------------------------------*/
 513
 514/* periodic schedule slots have iso tds (normal or split) first, then a
 515 * sparse tree for active interrupt transfers.
 516 *
 517 * this just links in a qh; caller guarantees uframe masks are set right.
 518 * no FSTN support (yet; ehci 0.96+)
 519 */
 520static void qh_link_periodic(struct ehci_hcd *ehci, struct ehci_qh *qh)
 521{
 522        unsigned        i;
 523        unsigned        period = qh->ps.period;
 524
 525        dev_dbg(&qh->ps.udev->dev,
 526                "link qh%d-%04x/%p start %d [%d/%d us]\n",
 527                period, hc32_to_cpup(ehci, &qh->hw->hw_info2)
 528                        & (QH_CMASK | QH_SMASK),
 529                qh, qh->ps.phase, qh->ps.usecs, qh->ps.c_usecs);
 530
 531        /* high bandwidth, or otherwise every microframe */
 532        if (period == 0)
 533                period = 1;
 534
 535        for (i = qh->ps.phase; i < ehci->periodic_size; i += period) {
 536                union ehci_shadow       *prev = &ehci->pshadow[i];
 537                __hc32                  *hw_p = &ehci->periodic[i];
 538                union ehci_shadow       here = *prev;
 539                __hc32                  type = 0;
 540
 541                /* skip the iso nodes at list head */
 542                while (here.ptr) {
 543                        type = Q_NEXT_TYPE(ehci, *hw_p);
 544                        if (type == cpu_to_hc32(ehci, Q_TYPE_QH))
 545                                break;
 546                        prev = periodic_next_shadow(ehci, prev, type);
 547                        hw_p = shadow_next_periodic(ehci, &here, type);
 548                        here = *prev;
 549                }
 550
 551                /* sorting each branch by period (slow-->fast)
 552                 * enables sharing interior tree nodes
 553                 */
 554                while (here.ptr && qh != here.qh) {
 555                        if (qh->ps.period > here.qh->ps.period)
 556                                break;
 557                        prev = &here.qh->qh_next;
 558                        hw_p = &here.qh->hw->hw_next;
 559                        here = *prev;
 560                }
 561                /* link in this qh, unless some earlier pass did that */
 562                if (qh != here.qh) {
 563                        qh->qh_next = here;
 564                        if (here.qh)
 565                                qh->hw->hw_next = *hw_p;
 566                        wmb();
 567                        prev->qh = qh;
 568                        *hw_p = QH_NEXT(ehci, qh->qh_dma);
 569                }
 570        }
 571        qh->qh_state = QH_STATE_LINKED;
 572        qh->xacterrs = 0;
 573        qh->unlink_reason = 0;
 574
 575        /* update per-qh bandwidth for debugfs */
 576        ehci_to_hcd(ehci)->self.bandwidth_allocated += qh->ps.bw_period
 577                ? ((qh->ps.usecs + qh->ps.c_usecs) / qh->ps.bw_period)
 578                : (qh->ps.usecs * 8);
 579
 580        list_add(&qh->intr_node, &ehci->intr_qh_list);
 581
 582        /* maybe enable periodic schedule processing */
 583        ++ehci->intr_count;
 584        enable_periodic(ehci);
 585}
 586
 587static void qh_unlink_periodic(struct ehci_hcd *ehci, struct ehci_qh *qh)
 588{
 589        unsigned        i;
 590        unsigned        period;
 591
 592        /*
 593         * If qh is for a low/full-speed device, simply unlinking it
 594         * could interfere with an ongoing split transaction.  To unlink
 595         * it safely would require setting the QH_INACTIVATE bit and
 596         * waiting at least one frame, as described in EHCI 4.12.2.5.
 597         *
 598         * We won't bother with any of this.  Instead, we assume that the
 599         * only reason for unlinking an interrupt QH while the current URB
 600         * is still active is to dequeue all the URBs (flush the whole
 601         * endpoint queue).
 602         *
 603         * If rebalancing the periodic schedule is ever implemented, this
 604         * approach will no longer be valid.
 605         */
 606
 607        /* high bandwidth, or otherwise part of every microframe */
 608        period = qh->ps.period ? : 1;
 609
 610        for (i = qh->ps.phase; i < ehci->periodic_size; i += period)
 611                periodic_unlink(ehci, i, qh);
 612
 613        /* update per-qh bandwidth for debugfs */
 614        ehci_to_hcd(ehci)->self.bandwidth_allocated -= qh->ps.bw_period
 615                ? ((qh->ps.usecs + qh->ps.c_usecs) / qh->ps.bw_period)
 616                : (qh->ps.usecs * 8);
 617
 618        dev_dbg(&qh->ps.udev->dev,
 619                "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
 620                qh->ps.period,
 621                hc32_to_cpup(ehci, &qh->hw->hw_info2) & (QH_CMASK | QH_SMASK),
 622                qh, qh->ps.phase, qh->ps.usecs, qh->ps.c_usecs);
 623
 624        /* qh->qh_next still "live" to HC */
 625        qh->qh_state = QH_STATE_UNLINK;
 626        qh->qh_next.ptr = NULL;
 627
 628        if (ehci->qh_scan_next == qh)
 629                ehci->qh_scan_next = list_entry(qh->intr_node.next,
 630                                struct ehci_qh, intr_node);
 631        list_del(&qh->intr_node);
 632}
 633
 634static void cancel_unlink_wait_intr(struct ehci_hcd *ehci, struct ehci_qh *qh)
 635{
 636        if (qh->qh_state != QH_STATE_LINKED ||
 637                        list_empty(&qh->unlink_node))
 638                return;
 639
 640        list_del_init(&qh->unlink_node);
 641
 642        /*
 643         * TODO: disable the event of EHCI_HRTIMER_START_UNLINK_INTR for
 644         * avoiding unnecessary CPU wakeup
 645         */
 646}
 647
 648static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh)
 649{
 650        /* If the QH isn't linked then there's nothing we can do. */
 651        if (qh->qh_state != QH_STATE_LINKED)
 652                return;
 653
 654        /* if the qh is waiting for unlink, cancel it now */
 655        cancel_unlink_wait_intr(ehci, qh);
 656
 657        qh_unlink_periodic(ehci, qh);
 658
 659        /* Make sure the unlinks are visible before starting the timer */
 660        wmb();
 661
 662        /*
 663         * The EHCI spec doesn't say how long it takes the controller to
 664         * stop accessing an unlinked interrupt QH.  The timer delay is
 665         * 9 uframes; presumably that will be long enough.
 666         */
 667        qh->unlink_cycle = ehci->intr_unlink_cycle;
 668
 669        /* New entries go at the end of the intr_unlink list */
 670        list_add_tail(&qh->unlink_node, &ehci->intr_unlink);
 671
 672        if (ehci->intr_unlinking)
 673                ;       /* Avoid recursive calls */
 674        else if (ehci->rh_state < EHCI_RH_RUNNING)
 675                ehci_handle_intr_unlinks(ehci);
 676        else if (ehci->intr_unlink.next == &qh->unlink_node) {
 677                ehci_enable_event(ehci, EHCI_HRTIMER_UNLINK_INTR, true);
 678                ++ehci->intr_unlink_cycle;
 679        }
 680}
 681
 682/*
 683 * It is common only one intr URB is scheduled on one qh, and
 684 * given complete() is run in tasklet context, introduce a bit
 685 * delay to avoid unlink qh too early.
 686 */
 687static void start_unlink_intr_wait(struct ehci_hcd *ehci,
 688                                   struct ehci_qh *qh)
 689{
 690        qh->unlink_cycle = ehci->intr_unlink_wait_cycle;
 691
 692        /* New entries go at the end of the intr_unlink_wait list */
 693        list_add_tail(&qh->unlink_node, &ehci->intr_unlink_wait);
 694
 695        if (ehci->rh_state < EHCI_RH_RUNNING)
 696                ehci_handle_start_intr_unlinks(ehci);
 697        else if (ehci->intr_unlink_wait.next == &qh->unlink_node) {
 698                ehci_enable_event(ehci, EHCI_HRTIMER_START_UNLINK_INTR, true);
 699                ++ehci->intr_unlink_wait_cycle;
 700        }
 701}
 702
 703static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh)
 704{
 705        struct ehci_qh_hw       *hw = qh->hw;
 706        int                     rc;
 707
 708        qh->qh_state = QH_STATE_IDLE;
 709        hw->hw_next = EHCI_LIST_END(ehci);
 710
 711        if (!list_empty(&qh->qtd_list))
 712                qh_completions(ehci, qh);
 713
 714        /* reschedule QH iff another request is queued */
 715        if (!list_empty(&qh->qtd_list) && ehci->rh_state == EHCI_RH_RUNNING) {
 716                rc = qh_schedule(ehci, qh);
 717                if (rc == 0) {
 718                        qh_refresh(ehci, qh);
 719                        qh_link_periodic(ehci, qh);
 720                }
 721
 722                /* An error here likely indicates handshake failure
 723                 * or no space left in the schedule.  Neither fault
 724                 * should happen often ...
 725                 *
 726                 * FIXME kill the now-dysfunctional queued urbs
 727                 */
 728                else {
 729                        ehci_err(ehci, "can't reschedule qh %p, err %d\n",
 730                                        qh, rc);
 731                }
 732        }
 733
 734        /* maybe turn off periodic schedule */
 735        --ehci->intr_count;
 736        disable_periodic(ehci);
 737}
 738
 739/*-------------------------------------------------------------------------*/
 740
 741static int check_period(
 742        struct ehci_hcd *ehci,
 743        unsigned        frame,
 744        unsigned        uframe,
 745        unsigned        uperiod,
 746        unsigned        usecs
 747) {
 748        /* complete split running into next frame?
 749         * given FSTN support, we could sometimes check...
 750         */
 751        if (uframe >= 8)
 752                return 0;
 753
 754        /* convert "usecs we need" to "max already claimed" */
 755        usecs = ehci->uframe_periodic_max - usecs;
 756
 757        for (uframe += frame << 3; uframe < EHCI_BANDWIDTH_SIZE;
 758                        uframe += uperiod) {
 759                if (ehci->bandwidth[uframe] > usecs)
 760                        return 0;
 761        }
 762
 763        /* success! */
 764        return 1;
 765}
 766
 767static int check_intr_schedule(
 768        struct ehci_hcd         *ehci,
 769        unsigned                frame,
 770        unsigned                uframe,
 771        struct ehci_qh          *qh,
 772        unsigned                *c_maskp,
 773        struct ehci_tt          *tt
 774)
 775{
 776        int             retval = -ENOSPC;
 777        u8              mask = 0;
 778
 779        if (qh->ps.c_usecs && uframe >= 6)      /* FSTN territory? */
 780                goto done;
 781
 782        if (!check_period(ehci, frame, uframe, qh->ps.bw_uperiod, qh->ps.usecs))
 783                goto done;
 784        if (!qh->ps.c_usecs) {
 785                retval = 0;
 786                *c_maskp = 0;
 787                goto done;
 788        }
 789
 790#ifdef CONFIG_USB_EHCI_TT_NEWSCHED
 791        if (tt_available(ehci, &qh->ps, tt, frame, uframe)) {
 792                unsigned i;
 793
 794                /* TODO : this may need FSTN for SSPLIT in uframe 5. */
 795                for (i = uframe+2; i < 8 && i <= uframe+4; i++)
 796                        if (!check_period(ehci, frame, i,
 797                                        qh->ps.bw_uperiod, qh->ps.c_usecs))
 798                                goto done;
 799                        else
 800                                mask |= 1 << i;
 801
 802                retval = 0;
 803
 804                *c_maskp = mask;
 805        }
 806#else
 807        /* Make sure this tt's buffer is also available for CSPLITs.
 808         * We pessimize a bit; probably the typical full speed case
 809         * doesn't need the second CSPLIT.
 810         *
 811         * NOTE:  both SPLIT and CSPLIT could be checked in just
 812         * one smart pass...
 813         */
 814        mask = 0x03 << (uframe + qh->gap_uf);
 815        *c_maskp = mask;
 816
 817        mask |= 1 << uframe;
 818        if (tt_no_collision(ehci, qh->ps.bw_period, qh->ps.udev, frame, mask)) {
 819                if (!check_period(ehci, frame, uframe + qh->gap_uf + 1,
 820                                qh->ps.bw_uperiod, qh->ps.c_usecs))
 821                        goto done;
 822                if (!check_period(ehci, frame, uframe + qh->gap_uf,
 823                                qh->ps.bw_uperiod, qh->ps.c_usecs))
 824                        goto done;
 825                retval = 0;
 826        }
 827#endif
 828done:
 829        return retval;
 830}
 831
 832/* "first fit" scheduling policy used the first time through,
 833 * or when the previous schedule slot can't be re-used.
 834 */
 835static int qh_schedule(struct ehci_hcd *ehci, struct ehci_qh *qh)
 836{
 837        int             status = 0;
 838        unsigned        uframe;
 839        unsigned        c_mask;
 840        struct ehci_qh_hw       *hw = qh->hw;
 841        struct ehci_tt          *tt;
 842
 843        hw->hw_next = EHCI_LIST_END(ehci);
 844
 845        /* reuse the previous schedule slots, if we can */
 846        if (qh->ps.phase != NO_FRAME) {
 847                ehci_dbg(ehci, "reused qh %p schedule\n", qh);
 848                return 0;
 849        }
 850
 851        uframe = 0;
 852        c_mask = 0;
 853        tt = find_tt(qh->ps.udev);
 854        if (IS_ERR(tt)) {
 855                status = PTR_ERR(tt);
 856                goto done;
 857        }
 858        compute_tt_budget(ehci->tt_budget, tt);
 859
 860        /* else scan the schedule to find a group of slots such that all
 861         * uframes have enough periodic bandwidth available.
 862         */
 863        /* "normal" case, uframing flexible except with splits */
 864        if (qh->ps.bw_period) {
 865                int             i;
 866                unsigned        frame;
 867
 868                for (i = qh->ps.bw_period; i > 0; --i) {
 869                        frame = ++ehci->random_frame & (qh->ps.bw_period - 1);
 870                        for (uframe = 0; uframe < 8; uframe++) {
 871                                status = check_intr_schedule(ehci,
 872                                                frame, uframe, qh, &c_mask, tt);
 873                                if (status == 0)
 874                                        goto got_it;
 875                        }
 876                }
 877
 878        /* qh->ps.bw_period == 0 means every uframe */
 879        } else {
 880                status = check_intr_schedule(ehci, 0, 0, qh, &c_mask, tt);
 881        }
 882        if (status)
 883                goto done;
 884
 885 got_it:
 886        qh->ps.phase = (qh->ps.period ? ehci->random_frame &
 887                        (qh->ps.period - 1) : 0);
 888        qh->ps.bw_phase = qh->ps.phase & (qh->ps.bw_period - 1);
 889        qh->ps.phase_uf = uframe;
 890        qh->ps.cs_mask = qh->ps.period ?
 891                        (c_mask << 8) | (1 << uframe) :
 892                        QH_SMASK;
 893
 894        /* reset S-frame and (maybe) C-frame masks */
 895        hw->hw_info2 &= cpu_to_hc32(ehci, ~(QH_CMASK | QH_SMASK));
 896        hw->hw_info2 |= cpu_to_hc32(ehci, qh->ps.cs_mask);
 897        reserve_release_intr_bandwidth(ehci, qh, 1);
 898
 899done:
 900        return status;
 901}
 902
 903static int intr_submit(
 904        struct ehci_hcd         *ehci,
 905        struct urb              *urb,
 906        struct list_head        *qtd_list,
 907        gfp_t                   mem_flags
 908) {
 909        unsigned                epnum;
 910        unsigned long           flags;
 911        struct ehci_qh          *qh;
 912        int                     status;
 913        struct list_head        empty;
 914
 915        /* get endpoint and transfer/schedule data */
 916        epnum = urb->ep->desc.bEndpointAddress;
 917
 918        spin_lock_irqsave(&ehci->lock, flags);
 919
 920        if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
 921                status = -ESHUTDOWN;
 922                goto done_not_linked;
 923        }
 924        status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
 925        if (unlikely(status))
 926                goto done_not_linked;
 927
 928        /* get qh and force any scheduling errors */
 929        INIT_LIST_HEAD(&empty);
 930        qh = qh_append_tds(ehci, urb, &empty, epnum, &urb->ep->hcpriv);
 931        if (qh == NULL) {
 932                status = -ENOMEM;
 933                goto done;
 934        }
 935        if (qh->qh_state == QH_STATE_IDLE) {
 936                status = qh_schedule(ehci, qh);
 937                if (status)
 938                        goto done;
 939        }
 940
 941        /* then queue the urb's tds to the qh */
 942        qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
 943        BUG_ON(qh == NULL);
 944
 945        /* stuff into the periodic schedule */
 946        if (qh->qh_state == QH_STATE_IDLE) {
 947                qh_refresh(ehci, qh);
 948                qh_link_periodic(ehci, qh);
 949        } else {
 950                /* cancel unlink wait for the qh */
 951                cancel_unlink_wait_intr(ehci, qh);
 952        }
 953
 954        /* ... update usbfs periodic stats */
 955        ehci_to_hcd(ehci)->self.bandwidth_int_reqs++;
 956
 957done:
 958        if (unlikely(status))
 959                usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
 960done_not_linked:
 961        spin_unlock_irqrestore(&ehci->lock, flags);
 962        if (status)
 963                qtd_list_free(ehci, urb, qtd_list);
 964
 965        return status;
 966}
 967
 968static void scan_intr(struct ehci_hcd *ehci)
 969{
 970        struct ehci_qh          *qh;
 971
 972        list_for_each_entry_safe(qh, ehci->qh_scan_next, &ehci->intr_qh_list,
 973                        intr_node) {
 974
 975                /* clean any finished work for this qh */
 976                if (!list_empty(&qh->qtd_list)) {
 977                        int temp;
 978
 979                        /*
 980                         * Unlinks could happen here; completion reporting
 981                         * drops the lock.  That's why ehci->qh_scan_next
 982                         * always holds the next qh to scan; if the next qh
 983                         * gets unlinked then ehci->qh_scan_next is adjusted
 984                         * in qh_unlink_periodic().
 985                         */
 986                        temp = qh_completions(ehci, qh);
 987                        if (unlikely(temp))
 988                                start_unlink_intr(ehci, qh);
 989                        else if (unlikely(list_empty(&qh->qtd_list) &&
 990                                        qh->qh_state == QH_STATE_LINKED))
 991                                start_unlink_intr_wait(ehci, qh);
 992                }
 993        }
 994}
 995
 996/*-------------------------------------------------------------------------*/
 997
 998/* ehci_iso_stream ops work with both ITD and SITD */
 999
1000static struct ehci_iso_stream *
1001iso_stream_alloc(gfp_t mem_flags)
1002{
1003        struct ehci_iso_stream *stream;
1004
1005        stream = kzalloc(sizeof(*stream), mem_flags);
1006        if (likely(stream != NULL)) {
1007                INIT_LIST_HEAD(&stream->td_list);
1008                INIT_LIST_HEAD(&stream->free_list);
1009                stream->next_uframe = NO_FRAME;
1010                stream->ps.phase = NO_FRAME;
1011        }
1012        return stream;
1013}
1014
1015static void
1016iso_stream_init(
1017        struct ehci_hcd         *ehci,
1018        struct ehci_iso_stream  *stream,
1019        struct urb              *urb
1020)
1021{
1022        static const u8 smask_out[] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f };
1023
1024        struct usb_device       *dev = urb->dev;
1025        u32                     buf1;
1026        unsigned                epnum, maxp;
1027        int                     is_input;
1028        unsigned                tmp;
1029
1030        /*
1031         * this might be a "high bandwidth" highspeed endpoint,
1032         * as encoded in the ep descriptor's wMaxPacket field
1033         */
1034        epnum = usb_pipeendpoint(urb->pipe);
1035        is_input = usb_pipein(urb->pipe) ? USB_DIR_IN : 0;
1036        maxp = usb_endpoint_maxp(&urb->ep->desc);
1037        buf1 = is_input ? 1 << 11 : 0;
1038
1039        /* knows about ITD vs SITD */
1040        if (dev->speed == USB_SPEED_HIGH) {
1041                unsigned multi = usb_endpoint_maxp_mult(&urb->ep->desc);
1042
1043                stream->highspeed = 1;
1044
1045                buf1 |= maxp;
1046                maxp *= multi;
1047
1048                stream->buf0 = cpu_to_hc32(ehci, (epnum << 8) | dev->devnum);
1049                stream->buf1 = cpu_to_hc32(ehci, buf1);
1050                stream->buf2 = cpu_to_hc32(ehci, multi);
1051
1052                /* usbfs wants to report the average usecs per frame tied up
1053                 * when transfers on this endpoint are scheduled ...
1054                 */
1055                stream->ps.usecs = HS_USECS_ISO(maxp);
1056
1057                /* period for bandwidth allocation */
1058                tmp = min_t(unsigned, EHCI_BANDWIDTH_SIZE,
1059                                1 << (urb->ep->desc.bInterval - 1));
1060
1061                /* Allow urb->interval to override */
1062                stream->ps.bw_uperiod = min_t(unsigned, tmp, urb->interval);
1063
1064                stream->uperiod = urb->interval;
1065                stream->ps.period = urb->interval >> 3;
1066                stream->bandwidth = stream->ps.usecs * 8 /
1067                                stream->ps.bw_uperiod;
1068
1069        } else {
1070                u32             addr;
1071                int             think_time;
1072                int             hs_transfers;
1073
1074                addr = dev->ttport << 24;
1075                if (!ehci_is_TDI(ehci)
1076                                || (dev->tt->hub !=
1077                                        ehci_to_hcd(ehci)->self.root_hub))
1078                        addr |= dev->tt->hub->devnum << 16;
1079                addr |= epnum << 8;
1080                addr |= dev->devnum;
1081                stream->ps.usecs = HS_USECS_ISO(maxp);
1082                think_time = dev->tt->think_time;
1083                stream->ps.tt_usecs = NS_TO_US(think_time + usb_calc_bus_time(
1084                                dev->speed, is_input, 1, maxp));
1085                hs_transfers = max(1u, (maxp + 187) / 188);
1086                if (is_input) {
1087                        u32     tmp;
1088
1089                        addr |= 1 << 31;
1090                        stream->ps.c_usecs = stream->ps.usecs;
1091                        stream->ps.usecs = HS_USECS_ISO(1);
1092                        stream->ps.cs_mask = 1;
1093
1094                        /* c-mask as specified in USB 2.0 11.18.4 3.c */
1095                        tmp = (1 << (hs_transfers + 2)) - 1;
1096                        stream->ps.cs_mask |= tmp << (8 + 2);
1097                } else
1098                        stream->ps.cs_mask = smask_out[hs_transfers - 1];
1099
1100                /* period for bandwidth allocation */
1101                tmp = min_t(unsigned, EHCI_BANDWIDTH_FRAMES,
1102                                1 << (urb->ep->desc.bInterval - 1));
1103
1104                /* Allow urb->interval to override */
1105                stream->ps.bw_period = min_t(unsigned, tmp, urb->interval);
1106                stream->ps.bw_uperiod = stream->ps.bw_period << 3;
1107
1108                stream->ps.period = urb->interval;
1109                stream->uperiod = urb->interval << 3;
1110                stream->bandwidth = (stream->ps.usecs + stream->ps.c_usecs) /
1111                                stream->ps.bw_period;
1112
1113                /* stream->splits gets created from cs_mask later */
1114                stream->address = cpu_to_hc32(ehci, addr);
1115        }
1116
1117        stream->ps.udev = dev;
1118        stream->ps.ep = urb->ep;
1119
1120        stream->bEndpointAddress = is_input | epnum;
1121        stream->maxp = maxp;
1122}
1123
1124static struct ehci_iso_stream *
1125iso_stream_find(struct ehci_hcd *ehci, struct urb *urb)
1126{
1127        unsigned                epnum;
1128        struct ehci_iso_stream  *stream;
1129        struct usb_host_endpoint *ep;
1130        unsigned long           flags;
1131
1132        epnum = usb_pipeendpoint (urb->pipe);
1133        if (usb_pipein(urb->pipe))
1134                ep = urb->dev->ep_in[epnum];
1135        else
1136                ep = urb->dev->ep_out[epnum];
1137
1138        spin_lock_irqsave(&ehci->lock, flags);
1139        stream = ep->hcpriv;
1140
1141        if (unlikely(stream == NULL)) {
1142                stream = iso_stream_alloc(GFP_ATOMIC);
1143                if (likely(stream != NULL)) {
1144                        ep->hcpriv = stream;
1145                        iso_stream_init(ehci, stream, urb);
1146                }
1147
1148        /* if dev->ep [epnum] is a QH, hw is set */
1149        } else if (unlikely(stream->hw != NULL)) {
1150                ehci_dbg(ehci, "dev %s ep%d%s, not iso??\n",
1151                        urb->dev->devpath, epnum,
1152                        usb_pipein(urb->pipe) ? "in" : "out");
1153                stream = NULL;
1154        }
1155
1156        spin_unlock_irqrestore(&ehci->lock, flags);
1157        return stream;
1158}
1159
1160/*-------------------------------------------------------------------------*/
1161
1162/* ehci_iso_sched ops can be ITD-only or SITD-only */
1163
1164static struct ehci_iso_sched *
1165iso_sched_alloc(unsigned packets, gfp_t mem_flags)
1166{
1167        struct ehci_iso_sched   *iso_sched;
1168        int                     size = sizeof(*iso_sched);
1169
1170        size += packets * sizeof(struct ehci_iso_packet);
1171        iso_sched = kzalloc(size, mem_flags);
1172        if (likely(iso_sched != NULL))
1173                INIT_LIST_HEAD(&iso_sched->td_list);
1174
1175        return iso_sched;
1176}
1177
1178static inline void
1179itd_sched_init(
1180        struct ehci_hcd         *ehci,
1181        struct ehci_iso_sched   *iso_sched,
1182        struct ehci_iso_stream  *stream,
1183        struct urb              *urb
1184)
1185{
1186        unsigned        i;
1187        dma_addr_t      dma = urb->transfer_dma;
1188
1189        /* how many uframes are needed for these transfers */
1190        iso_sched->span = urb->number_of_packets * stream->uperiod;
1191
1192        /* figure out per-uframe itd fields that we'll need later
1193         * when we fit new itds into the schedule.
1194         */
1195        for (i = 0; i < urb->number_of_packets; i++) {
1196                struct ehci_iso_packet  *uframe = &iso_sched->packet[i];
1197                unsigned                length;
1198                dma_addr_t              buf;
1199                u32                     trans;
1200
1201                length = urb->iso_frame_desc[i].length;
1202                buf = dma + urb->iso_frame_desc[i].offset;
1203
1204                trans = EHCI_ISOC_ACTIVE;
1205                trans |= buf & 0x0fff;
1206                if (unlikely(((i + 1) == urb->number_of_packets))
1207                                && !(urb->transfer_flags & URB_NO_INTERRUPT))
1208                        trans |= EHCI_ITD_IOC;
1209                trans |= length << 16;
1210                uframe->transaction = cpu_to_hc32(ehci, trans);
1211
1212                /* might need to cross a buffer page within a uframe */
1213                uframe->bufp = (buf & ~(u64)0x0fff);
1214                buf += length;
1215                if (unlikely((uframe->bufp != (buf & ~(u64)0x0fff))))
1216                        uframe->cross = 1;
1217        }
1218}
1219
1220static void
1221iso_sched_free(
1222        struct ehci_iso_stream  *stream,
1223        struct ehci_iso_sched   *iso_sched
1224)
1225{
1226        if (!iso_sched)
1227                return;
1228        /* caller must hold ehci->lock! */
1229        list_splice(&iso_sched->td_list, &stream->free_list);
1230        kfree(iso_sched);
1231}
1232
1233static int
1234itd_urb_transaction(
1235        struct ehci_iso_stream  *stream,
1236        struct ehci_hcd         *ehci,
1237        struct urb              *urb,
1238        gfp_t                   mem_flags
1239)
1240{
1241        struct ehci_itd         *itd;
1242        dma_addr_t              itd_dma;
1243        int                     i;
1244        unsigned                num_itds;
1245        struct ehci_iso_sched   *sched;
1246        unsigned long           flags;
1247
1248        sched = iso_sched_alloc(urb->number_of_packets, mem_flags);
1249        if (unlikely(sched == NULL))
1250                return -ENOMEM;
1251
1252        itd_sched_init(ehci, sched, stream, urb);
1253
1254        if (urb->interval < 8)
1255                num_itds = 1 + (sched->span + 7) / 8;
1256        else
1257                num_itds = urb->number_of_packets;
1258
1259        /* allocate/init ITDs */
1260        spin_lock_irqsave(&ehci->lock, flags);
1261        for (i = 0; i < num_itds; i++) {
1262
1263                /*
1264                 * Use iTDs from the free list, but not iTDs that may
1265                 * still be in use by the hardware.
1266                 */
1267                if (likely(!list_empty(&stream->free_list))) {
1268                        itd = list_first_entry(&stream->free_list,
1269                                        struct ehci_itd, itd_list);
1270                        if (itd->frame == ehci->now_frame)
1271                                goto alloc_itd;
1272                        list_del(&itd->itd_list);
1273                        itd_dma = itd->itd_dma;
1274                } else {
1275 alloc_itd:
1276                        spin_unlock_irqrestore(&ehci->lock, flags);
1277                        itd = dma_pool_alloc(ehci->itd_pool, mem_flags,
1278                                        &itd_dma);
1279                        spin_lock_irqsave(&ehci->lock, flags);
1280                        if (!itd) {
1281                                iso_sched_free(stream, sched);
1282                                spin_unlock_irqrestore(&ehci->lock, flags);
1283                                return -ENOMEM;
1284                        }
1285                }
1286
1287                memset(itd, 0, sizeof(*itd));
1288                itd->itd_dma = itd_dma;
1289                itd->frame = NO_FRAME;
1290                list_add(&itd->itd_list, &sched->td_list);
1291        }
1292        spin_unlock_irqrestore(&ehci->lock, flags);
1293
1294        /* temporarily store schedule info in hcpriv */
1295        urb->hcpriv = sched;
1296        urb->error_count = 0;
1297        return 0;
1298}
1299
1300/*-------------------------------------------------------------------------*/
1301
1302static void reserve_release_iso_bandwidth(struct ehci_hcd *ehci,
1303                struct ehci_iso_stream *stream, int sign)
1304{
1305        unsigned                uframe;
1306        unsigned                i, j;
1307        unsigned                s_mask, c_mask, m;
1308        int                     usecs = stream->ps.usecs;
1309        int                     c_usecs = stream->ps.c_usecs;
1310        int                     tt_usecs = stream->ps.tt_usecs;
1311        struct ehci_tt          *tt;
1312
1313        if (stream->ps.phase == NO_FRAME)       /* Bandwidth wasn't reserved */
1314                return;
1315        uframe = stream->ps.bw_phase << 3;
1316
1317        bandwidth_dbg(ehci, sign, "iso", &stream->ps);
1318
1319        if (sign < 0) {         /* Release bandwidth */
1320                usecs = -usecs;
1321                c_usecs = -c_usecs;
1322                tt_usecs = -tt_usecs;
1323        }
1324
1325        if (!stream->splits) {          /* High speed */
1326                for (i = uframe + stream->ps.phase_uf; i < EHCI_BANDWIDTH_SIZE;
1327                                i += stream->ps.bw_uperiod)
1328                        ehci->bandwidth[i] += usecs;
1329
1330        } else {                        /* Full speed */
1331                s_mask = stream->ps.cs_mask;
1332                c_mask = s_mask >> 8;
1333
1334                /* NOTE: adjustment needed for frame overflow */
1335                for (i = uframe; i < EHCI_BANDWIDTH_SIZE;
1336                                i += stream->ps.bw_uperiod) {
1337                        for ((j = stream->ps.phase_uf, m = 1 << j); j < 8;
1338                                        (++j, m <<= 1)) {
1339                                if (s_mask & m)
1340                                        ehci->bandwidth[i+j] += usecs;
1341                                else if (c_mask & m)
1342                                        ehci->bandwidth[i+j] += c_usecs;
1343                        }
1344                }
1345
1346                /*
1347                 * find_tt() will not return any error here as we have
1348                 * already called find_tt() before calling this function
1349                 * and checked for any error return. The previous call
1350                 * would have created the data structure.
1351                 */
1352                tt = find_tt(stream->ps.udev);
1353                if (sign > 0)
1354                        list_add_tail(&stream->ps.ps_list, &tt->ps_list);
1355                else
1356                        list_del(&stream->ps.ps_list);
1357
1358                for (i = uframe >> 3; i < EHCI_BANDWIDTH_FRAMES;
1359                                i += stream->ps.bw_period)
1360                        tt->bandwidth[i] += tt_usecs;
1361        }
1362}
1363
1364static inline int
1365itd_slot_ok(
1366        struct ehci_hcd         *ehci,
1367        struct ehci_iso_stream  *stream,
1368        unsigned                uframe
1369)
1370{
1371        unsigned                usecs;
1372
1373        /* convert "usecs we need" to "max already claimed" */
1374        usecs = ehci->uframe_periodic_max - stream->ps.usecs;
1375
1376        for (uframe &= stream->ps.bw_uperiod - 1; uframe < EHCI_BANDWIDTH_SIZE;
1377                        uframe += stream->ps.bw_uperiod) {
1378                if (ehci->bandwidth[uframe] > usecs)
1379                        return 0;
1380        }
1381        return 1;
1382}
1383
1384static inline int
1385sitd_slot_ok(
1386        struct ehci_hcd         *ehci,
1387        struct ehci_iso_stream  *stream,
1388        unsigned                uframe,
1389        struct ehci_iso_sched   *sched,
1390        struct ehci_tt          *tt
1391)
1392{
1393        unsigned                mask, tmp;
1394        unsigned                frame, uf;
1395
1396        mask = stream->ps.cs_mask << (uframe & 7);
1397
1398        /* for OUT, don't wrap SSPLIT into H-microframe 7 */
1399        if (((stream->ps.cs_mask & 0xff) << (uframe & 7)) >= (1 << 7))
1400                return 0;
1401
1402        /* for IN, don't wrap CSPLIT into the next frame */
1403        if (mask & ~0xffff)
1404                return 0;
1405
1406        /* check bandwidth */
1407        uframe &= stream->ps.bw_uperiod - 1;
1408        frame = uframe >> 3;
1409
1410#ifdef CONFIG_USB_EHCI_TT_NEWSCHED
1411        /* The tt's fullspeed bus bandwidth must be available.
1412         * tt_available scheduling guarantees 10+% for control/bulk.
1413         */
1414        uf = uframe & 7;
1415        if (!tt_available(ehci, &stream->ps, tt, frame, uf))
1416                return 0;
1417#else
1418        /* tt must be idle for start(s), any gap, and csplit.
1419         * assume scheduling slop leaves 10+% for control/bulk.
1420         */
1421        if (!tt_no_collision(ehci, stream->ps.bw_period,
1422                        stream->ps.udev, frame, mask))
1423                return 0;
1424#endif
1425
1426        do {
1427                unsigned        max_used;
1428                unsigned        i;
1429
1430                /* check starts (OUT uses more than one) */
1431                uf = uframe;
1432                max_used = ehci->uframe_periodic_max - stream->ps.usecs;
1433                for (tmp = stream->ps.cs_mask & 0xff; tmp; tmp >>= 1, uf++) {
1434                        if (ehci->bandwidth[uf] > max_used)
1435                                return 0;
1436                }
1437
1438                /* for IN, check CSPLIT */
1439                if (stream->ps.c_usecs) {
1440                        max_used = ehci->uframe_periodic_max -
1441                                        stream->ps.c_usecs;
1442                        uf = uframe & ~7;
1443                        tmp = 1 << (2+8);
1444                        for (i = (uframe & 7) + 2; i < 8; (++i, tmp <<= 1)) {
1445                                if ((stream->ps.cs_mask & tmp) == 0)
1446                                        continue;
1447                                if (ehci->bandwidth[uf+i] > max_used)
1448                                        return 0;
1449                        }
1450                }
1451
1452                uframe += stream->ps.bw_uperiod;
1453        } while (uframe < EHCI_BANDWIDTH_SIZE);
1454
1455        stream->ps.cs_mask <<= uframe & 7;
1456        stream->splits = cpu_to_hc32(ehci, stream->ps.cs_mask);
1457        return 1;
1458}
1459
1460/*
1461 * This scheduler plans almost as far into the future as it has actual
1462 * periodic schedule slots.  (Affected by TUNE_FLS, which defaults to
1463 * "as small as possible" to be cache-friendlier.)  That limits the size
1464 * transfers you can stream reliably; avoid more than 64 msec per urb.
1465 * Also avoid queue depths of less than ehci's worst irq latency (affected
1466 * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
1467 * and other factors); or more than about 230 msec total (for portability,
1468 * given EHCI_TUNE_FLS and the slop).  Or, write a smarter scheduler!
1469 */
1470
1471static int
1472iso_stream_schedule(
1473        struct ehci_hcd         *ehci,
1474        struct urb              *urb,
1475        struct ehci_iso_stream  *stream
1476)
1477{
1478        u32                     now, base, next, start, period, span, now2;
1479        u32                     wrap = 0, skip = 0;
1480        int                     status = 0;
1481        unsigned                mod = ehci->periodic_size << 3;
1482        struct ehci_iso_sched   *sched = urb->hcpriv;
1483        bool                    empty = list_empty(&stream->td_list);
1484        bool                    new_stream = false;
1485
1486        period = stream->uperiod;
1487        span = sched->span;
1488        if (!stream->highspeed)
1489                span <<= 3;
1490
1491        /* Start a new isochronous stream? */
1492        if (unlikely(empty && !hcd_periodic_completion_in_progress(
1493                        ehci_to_hcd(ehci), urb->ep))) {
1494
1495                /* Schedule the endpoint */
1496                if (stream->ps.phase == NO_FRAME) {
1497                        int             done = 0;
1498                        struct ehci_tt  *tt = find_tt(stream->ps.udev);
1499
1500                        if (IS_ERR(tt)) {
1501                                status = PTR_ERR(tt);
1502                                goto fail;
1503                        }
1504                        compute_tt_budget(ehci->tt_budget, tt);
1505
1506                        start = ((-(++ehci->random_frame)) << 3) & (period - 1);
1507
1508                        /* find a uframe slot with enough bandwidth.
1509                         * Early uframes are more precious because full-speed
1510                         * iso IN transfers can't use late uframes,
1511                         * and therefore they should be allocated last.
1512                         */
1513                        next = start;
1514                        start += period;
1515                        do {
1516                                start--;
1517                                /* check schedule: enough space? */
1518                                if (stream->highspeed) {
1519                                        if (itd_slot_ok(ehci, stream, start))
1520                                                done = 1;
1521                                } else {
1522                                        if ((start % 8) >= 6)
1523                                                continue;
1524                                        if (sitd_slot_ok(ehci, stream, start,
1525                                                        sched, tt))
1526                                                done = 1;
1527                                }
1528                        } while (start > next && !done);
1529
1530                        /* no room in the schedule */
1531                        if (!done) {
1532                                ehci_dbg(ehci, "iso sched full %p", urb);
1533                                status = -ENOSPC;
1534                                goto fail;
1535                        }
1536                        stream->ps.phase = (start >> 3) &
1537                                        (stream->ps.period - 1);
1538                        stream->ps.bw_phase = stream->ps.phase &
1539                                        (stream->ps.bw_period - 1);
1540                        stream->ps.phase_uf = start & 7;
1541                        reserve_release_iso_bandwidth(ehci, stream, 1);
1542                }
1543
1544                /* New stream is already scheduled; use the upcoming slot */
1545                else {
1546                        start = (stream->ps.phase << 3) + stream->ps.phase_uf;
1547                }
1548
1549                stream->next_uframe = start;
1550                new_stream = true;
1551        }
1552
1553        now = ehci_read_frame_index(ehci) & (mod - 1);
1554
1555        /* Take the isochronous scheduling threshold into account */
1556        if (ehci->i_thresh)
1557                next = now + ehci->i_thresh;    /* uframe cache */
1558        else
1559                next = (now + 2 + 7) & ~0x07;   /* full frame cache */
1560
1561        /* If needed, initialize last_iso_frame so that this URB will be seen */
1562        if (ehci->isoc_count == 0)
1563                ehci->last_iso_frame = now >> 3;
1564
1565        /*
1566         * Use ehci->last_iso_frame as the base.  There can't be any
1567         * TDs scheduled for earlier than that.
1568         */
1569        base = ehci->last_iso_frame << 3;
1570        next = (next - base) & (mod - 1);
1571        start = (stream->next_uframe - base) & (mod - 1);
1572
1573        if (unlikely(new_stream))
1574                goto do_ASAP;
1575
1576        /*
1577         * Typical case: reuse current schedule, stream may still be active.
1578         * Hopefully there are no gaps from the host falling behind
1579         * (irq delays etc).  If there are, the behavior depends on
1580         * whether URB_ISO_ASAP is set.
1581         */
1582        now2 = (now - base) & (mod - 1);
1583
1584        /* Is the schedule about to wrap around? */
1585        if (unlikely(!empty && start < period)) {
1586                ehci_dbg(ehci, "request %p would overflow (%u-%u < %u mod %u)\n",
1587                                urb, stream->next_uframe, base, period, mod);
1588                status = -EFBIG;
1589                goto fail;
1590        }
1591
1592        /* Is the next packet scheduled after the base time? */
1593        if (likely(!empty || start <= now2 + period)) {
1594
1595                /* URB_ISO_ASAP: make sure that start >= next */
1596                if (unlikely(start < next &&
1597                                (urb->transfer_flags & URB_ISO_ASAP)))
1598                        goto do_ASAP;
1599
1600                /* Otherwise use start, if it's not in the past */
1601                if (likely(start >= now2))
1602                        goto use_start;
1603
1604        /* Otherwise we got an underrun while the queue was empty */
1605        } else {
1606                if (urb->transfer_flags & URB_ISO_ASAP)
1607                        goto do_ASAP;
1608                wrap = mod;
1609                now2 += mod;
1610        }
1611
1612        /* How many uframes and packets do we need to skip? */
1613        skip = (now2 - start + period - 1) & -period;
1614        if (skip >= span) {             /* Entirely in the past? */
1615                ehci_dbg(ehci, "iso underrun %p (%u+%u < %u) [%u]\n",
1616                                urb, start + base, span - period, now2 + base,
1617                                base);
1618
1619                /* Try to keep the last TD intact for scanning later */
1620                skip = span - period;
1621
1622                /* Will it come before the current scan position? */
1623                if (empty) {
1624                        skip = span;    /* Skip the entire URB */
1625                        status = 1;     /* and give it back immediately */
1626                        iso_sched_free(stream, sched);
1627                        sched = NULL;
1628                }
1629        }
1630        urb->error_count = skip / period;
1631        if (sched)
1632                sched->first_packet = urb->error_count;
1633        goto use_start;
1634
1635 do_ASAP:
1636        /* Use the first slot after "next" */
1637        start = next + ((start - next) & (period - 1));
1638
1639 use_start:
1640        /* Tried to schedule too far into the future? */
1641        if (unlikely(start + span - period >= mod + wrap)) {
1642                ehci_dbg(ehci, "request %p would overflow (%u+%u >= %u)\n",
1643                                urb, start, span - period, mod + wrap);
1644                status = -EFBIG;
1645                goto fail;
1646        }
1647
1648        start += base;
1649        stream->next_uframe = (start + skip) & (mod - 1);
1650
1651        /* report high speed start in uframes; full speed, in frames */
1652        urb->start_frame = start & (mod - 1);
1653        if (!stream->highspeed)
1654                urb->start_frame >>= 3;
1655        return status;
1656
1657 fail:
1658        iso_sched_free(stream, sched);
1659        urb->hcpriv = NULL;
1660        return status;
1661}
1662
1663/*-------------------------------------------------------------------------*/
1664
1665static inline void
1666itd_init(struct ehci_hcd *ehci, struct ehci_iso_stream *stream,
1667                struct ehci_itd *itd)
1668{
1669        int i;
1670
1671        /* it's been recently zeroed */
1672        itd->hw_next = EHCI_LIST_END(ehci);
1673        itd->hw_bufp[0] = stream->buf0;
1674        itd->hw_bufp[1] = stream->buf1;
1675        itd->hw_bufp[2] = stream->buf2;
1676
1677        for (i = 0; i < 8; i++)
1678                itd->index[i] = -1;
1679
1680        /* All other fields are filled when scheduling */
1681}
1682
1683static inline void
1684itd_patch(
1685        struct ehci_hcd         *ehci,
1686        struct ehci_itd         *itd,
1687        struct ehci_iso_sched   *iso_sched,
1688        unsigned                index,
1689        u16                     uframe
1690)
1691{
1692        struct ehci_iso_packet  *uf = &iso_sched->packet[index];
1693        unsigned                pg = itd->pg;
1694
1695        /* BUG_ON(pg == 6 && uf->cross); */
1696
1697        uframe &= 0x07;
1698        itd->index[uframe] = index;
1699
1700        itd->hw_transaction[uframe] = uf->transaction;
1701        itd->hw_transaction[uframe] |= cpu_to_hc32(ehci, pg << 12);
1702        itd->hw_bufp[pg] |= cpu_to_hc32(ehci, uf->bufp & ~(u32)0);
1703        itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(uf->bufp >> 32));
1704
1705        /* iso_frame_desc[].offset must be strictly increasing */
1706        if (unlikely(uf->cross)) {
1707                u64     bufp = uf->bufp + 4096;
1708
1709                itd->pg = ++pg;
1710                itd->hw_bufp[pg] |= cpu_to_hc32(ehci, bufp & ~(u32)0);
1711                itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(bufp >> 32));
1712        }
1713}
1714
1715static inline void
1716itd_link(struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd)
1717{
1718        union ehci_shadow       *prev = &ehci->pshadow[frame];
1719        __hc32                  *hw_p = &ehci->periodic[frame];
1720        union ehci_shadow       here = *prev;
1721        __hc32                  type = 0;
1722
1723        /* skip any iso nodes which might belong to previous microframes */
1724        while (here.ptr) {
1725                type = Q_NEXT_TYPE(ehci, *hw_p);
1726                if (type == cpu_to_hc32(ehci, Q_TYPE_QH))
1727                        break;
1728                prev = periodic_next_shadow(ehci, prev, type);
1729                hw_p = shadow_next_periodic(ehci, &here, type);
1730                here = *prev;
1731        }
1732
1733        itd->itd_next = here;
1734        itd->hw_next = *hw_p;
1735        prev->itd = itd;
1736        itd->frame = frame;
1737        wmb();
1738        *hw_p = cpu_to_hc32(ehci, itd->itd_dma | Q_TYPE_ITD);
1739}
1740
1741/* fit urb's itds into the selected schedule slot; activate as needed */
1742static void itd_link_urb(
1743        struct ehci_hcd         *ehci,
1744        struct urb              *urb,
1745        unsigned                mod,
1746        struct ehci_iso_stream  *stream
1747)
1748{
1749        int                     packet;
1750        unsigned                next_uframe, uframe, frame;
1751        struct ehci_iso_sched   *iso_sched = urb->hcpriv;
1752        struct ehci_itd         *itd;
1753
1754        next_uframe = stream->next_uframe & (mod - 1);
1755
1756        if (unlikely(list_empty(&stream->td_list)))
1757                ehci_to_hcd(ehci)->self.bandwidth_allocated
1758                                += stream->bandwidth;
1759
1760        if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
1761                if (ehci->amd_pll_fix == 1)
1762                        usb_amd_quirk_pll_disable();
1763        }
1764
1765        ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
1766
1767        /* fill iTDs uframe by uframe */
1768        for (packet = iso_sched->first_packet, itd = NULL;
1769                        packet < urb->number_of_packets;) {
1770                if (itd == NULL) {
1771                        /* ASSERT:  we have all necessary itds */
1772                        /* BUG_ON(list_empty(&iso_sched->td_list)); */
1773
1774                        /* ASSERT:  no itds for this endpoint in this uframe */
1775
1776                        itd = list_entry(iso_sched->td_list.next,
1777                                        struct ehci_itd, itd_list);
1778                        list_move_tail(&itd->itd_list, &stream->td_list);
1779                        itd->stream = stream;
1780                        itd->urb = urb;
1781                        itd_init(ehci, stream, itd);
1782                }
1783
1784                uframe = next_uframe & 0x07;
1785                frame = next_uframe >> 3;
1786
1787                itd_patch(ehci, itd, iso_sched, packet, uframe);
1788
1789                next_uframe += stream->uperiod;
1790                next_uframe &= mod - 1;
1791                packet++;
1792
1793                /* link completed itds into the schedule */
1794                if (((next_uframe >> 3) != frame)
1795                                || packet == urb->number_of_packets) {
1796                        itd_link(ehci, frame & (ehci->periodic_size - 1), itd);
1797                        itd = NULL;
1798                }
1799        }
1800        stream->next_uframe = next_uframe;
1801
1802        /* don't need that schedule data any more */
1803        iso_sched_free(stream, iso_sched);
1804        urb->hcpriv = stream;
1805
1806        ++ehci->isoc_count;
1807        enable_periodic(ehci);
1808}
1809
1810#define ISO_ERRS (EHCI_ISOC_BUF_ERR | EHCI_ISOC_BABBLE | EHCI_ISOC_XACTERR)
1811
1812/* Process and recycle a completed ITD.  Return true iff its urb completed,
1813 * and hence its completion callback probably added things to the hardware
1814 * schedule.
1815 *
1816 * Note that we carefully avoid recycling this descriptor until after any
1817 * completion callback runs, so that it won't be reused quickly.  That is,
1818 * assuming (a) no more than two urbs per frame on this endpoint, and also
1819 * (b) only this endpoint's completions submit URBs.  It seems some silicon
1820 * corrupts things if you reuse completed descriptors very quickly...
1821 */
1822static bool itd_complete(struct ehci_hcd *ehci, struct ehci_itd *itd)
1823{
1824        struct urb                              *urb = itd->urb;
1825        struct usb_iso_packet_descriptor        *desc;
1826        u32                                     t;
1827        unsigned                                uframe;
1828        int                                     urb_index = -1;
1829        struct ehci_iso_stream                  *stream = itd->stream;
1830        bool                                    retval = false;
1831
1832        /* for each uframe with a packet */
1833        for (uframe = 0; uframe < 8; uframe++) {
1834                if (likely(itd->index[uframe] == -1))
1835                        continue;
1836                urb_index = itd->index[uframe];
1837                desc = &urb->iso_frame_desc[urb_index];
1838
1839                t = hc32_to_cpup(ehci, &itd->hw_transaction[uframe]);
1840                itd->hw_transaction[uframe] = 0;
1841
1842                /* report transfer status */
1843                if (unlikely(t & ISO_ERRS)) {
1844                        urb->error_count++;
1845                        if (t & EHCI_ISOC_BUF_ERR)
1846                                desc->status = usb_pipein(urb->pipe)
1847                                        ? -ENOSR  /* hc couldn't read */
1848                                        : -ECOMM; /* hc couldn't write */
1849                        else if (t & EHCI_ISOC_BABBLE)
1850                                desc->status = -EOVERFLOW;
1851                        else /* (t & EHCI_ISOC_XACTERR) */
1852                                desc->status = -EPROTO;
1853
1854                        /* HC need not update length with this error */
1855                        if (!(t & EHCI_ISOC_BABBLE)) {
1856                                desc->actual_length = EHCI_ITD_LENGTH(t);
1857                                urb->actual_length += desc->actual_length;
1858                        }
1859                } else if (likely((t & EHCI_ISOC_ACTIVE) == 0)) {
1860                        desc->status = 0;
1861                        desc->actual_length = EHCI_ITD_LENGTH(t);
1862                        urb->actual_length += desc->actual_length;
1863                } else {
1864                        /* URB was too late */
1865                        urb->error_count++;
1866                }
1867        }
1868
1869        /* handle completion now? */
1870        if (likely((urb_index + 1) != urb->number_of_packets))
1871                goto done;
1872
1873        /*
1874         * ASSERT: it's really the last itd for this urb
1875         * list_for_each_entry (itd, &stream->td_list, itd_list)
1876         *       BUG_ON(itd->urb == urb);
1877         */
1878
1879        /* give urb back to the driver; completion often (re)submits */
1880        ehci_urb_done(ehci, urb, 0);
1881        retval = true;
1882        urb = NULL;
1883
1884        --ehci->isoc_count;
1885        disable_periodic(ehci);
1886
1887        ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
1888        if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
1889                if (ehci->amd_pll_fix == 1)
1890                        usb_amd_quirk_pll_enable();
1891        }
1892
1893        if (unlikely(list_is_singular(&stream->td_list)))
1894                ehci_to_hcd(ehci)->self.bandwidth_allocated
1895                                -= stream->bandwidth;
1896
1897done:
1898        itd->urb = NULL;
1899
1900        /* Add to the end of the free list for later reuse */
1901        list_move_tail(&itd->itd_list, &stream->free_list);
1902
1903        /* Recycle the iTDs when the pipeline is empty (ep no longer in use) */
1904        if (list_empty(&stream->td_list)) {
1905                list_splice_tail_init(&stream->free_list,
1906                                &ehci->cached_itd_list);
1907                start_free_itds(ehci);
1908        }
1909
1910        return retval;
1911}
1912
1913/*-------------------------------------------------------------------------*/
1914
1915static int itd_submit(struct ehci_hcd *ehci, struct urb *urb,
1916        gfp_t mem_flags)
1917{
1918        int                     status = -EINVAL;
1919        unsigned long           flags;
1920        struct ehci_iso_stream  *stream;
1921
1922        /* Get iso_stream head */
1923        stream = iso_stream_find(ehci, urb);
1924        if (unlikely(stream == NULL)) {
1925                ehci_dbg(ehci, "can't get iso stream\n");
1926                return -ENOMEM;
1927        }
1928        if (unlikely(urb->interval != stream->uperiod)) {
1929                ehci_dbg(ehci, "can't change iso interval %d --> %d\n",
1930                        stream->uperiod, urb->interval);
1931                goto done;
1932        }
1933
1934#ifdef EHCI_URB_TRACE
1935        ehci_dbg(ehci,
1936                "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n",
1937                __func__, urb->dev->devpath, urb,
1938                usb_pipeendpoint(urb->pipe),
1939                usb_pipein(urb->pipe) ? "in" : "out",
1940                urb->transfer_buffer_length,
1941                urb->number_of_packets, urb->interval,
1942                stream);
1943#endif
1944
1945        /* allocate ITDs w/o locking anything */
1946        status = itd_urb_transaction(stream, ehci, urb, mem_flags);
1947        if (unlikely(status < 0)) {
1948                ehci_dbg(ehci, "can't init itds\n");
1949                goto done;
1950        }
1951
1952        /* schedule ... need to lock */
1953        spin_lock_irqsave(&ehci->lock, flags);
1954        if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
1955                status = -ESHUTDOWN;
1956                goto done_not_linked;
1957        }
1958        status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1959        if (unlikely(status))
1960                goto done_not_linked;
1961        status = iso_stream_schedule(ehci, urb, stream);
1962        if (likely(status == 0)) {
1963                itd_link_urb(ehci, urb, ehci->periodic_size << 3, stream);
1964        } else if (status > 0) {
1965                status = 0;
1966                ehci_urb_done(ehci, urb, 0);
1967        } else {
1968                usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1969        }
1970 done_not_linked:
1971        spin_unlock_irqrestore(&ehci->lock, flags);
1972 done:
1973        return status;
1974}
1975
1976/*-------------------------------------------------------------------------*/
1977
1978/*
1979 * "Split ISO TDs" ... used for USB 1.1 devices going through the
1980 * TTs in USB 2.0 hubs.  These need microframe scheduling.
1981 */
1982
1983static inline void
1984sitd_sched_init(
1985        struct ehci_hcd         *ehci,
1986        struct ehci_iso_sched   *iso_sched,
1987        struct ehci_iso_stream  *stream,
1988        struct urb              *urb
1989)
1990{
1991        unsigned        i;
1992        dma_addr_t      dma = urb->transfer_dma;
1993
1994        /* how many frames are needed for these transfers */
1995        iso_sched->span = urb->number_of_packets * stream->ps.period;
1996
1997        /* figure out per-frame sitd fields that we'll need later
1998         * when we fit new sitds into the schedule.
1999         */
2000        for (i = 0; i < urb->number_of_packets; i++) {
2001                struct ehci_iso_packet  *packet = &iso_sched->packet[i];
2002                unsigned                length;
2003                dma_addr_t              buf;
2004                u32                     trans;
2005
2006                length = urb->iso_frame_desc[i].length & 0x03ff;
2007                buf = dma + urb->iso_frame_desc[i].offset;
2008
2009                trans = SITD_STS_ACTIVE;
2010                if (((i + 1) == urb->number_of_packets)
2011                                && !(urb->transfer_flags & URB_NO_INTERRUPT))
2012                        trans |= SITD_IOC;
2013                trans |= length << 16;
2014                packet->transaction = cpu_to_hc32(ehci, trans);
2015
2016                /* might need to cross a buffer page within a td */
2017                packet->bufp = buf;
2018                packet->buf1 = (buf + length) & ~0x0fff;
2019                if (packet->buf1 != (buf & ~(u64)0x0fff))
2020                        packet->cross = 1;
2021
2022                /* OUT uses multiple start-splits */
2023                if (stream->bEndpointAddress & USB_DIR_IN)
2024                        continue;
2025                length = (length + 187) / 188;
2026                if (length > 1) /* BEGIN vs ALL */
2027                        length |= 1 << 3;
2028                packet->buf1 |= length;
2029        }
2030}
2031
2032static int
2033sitd_urb_transaction(
2034        struct ehci_iso_stream  *stream,
2035        struct ehci_hcd         *ehci,
2036        struct urb              *urb,
2037        gfp_t                   mem_flags
2038)
2039{
2040        struct ehci_sitd        *sitd;
2041        dma_addr_t              sitd_dma;
2042        int                     i;
2043        struct ehci_iso_sched   *iso_sched;
2044        unsigned long           flags;
2045
2046        iso_sched = iso_sched_alloc(urb->number_of_packets, mem_flags);
2047        if (iso_sched == NULL)
2048                return -ENOMEM;
2049
2050        sitd_sched_init(ehci, iso_sched, stream, urb);
2051
2052        /* allocate/init sITDs */
2053        spin_lock_irqsave(&ehci->lock, flags);
2054        for (i = 0; i < urb->number_of_packets; i++) {
2055
2056                /* NOTE:  for now, we don't try to handle wraparound cases
2057                 * for IN (using sitd->hw_backpointer, like a FSTN), which
2058                 * means we never need two sitds for full speed packets.
2059                 */
2060
2061                /*
2062                 * Use siTDs from the free list, but not siTDs that may
2063                 * still be in use by the hardware.
2064                 */
2065                if (likely(!list_empty(&stream->free_list))) {
2066                        sitd = list_first_entry(&stream->free_list,
2067                                         struct ehci_sitd, sitd_list);
2068                        if (sitd->frame == ehci->now_frame)
2069                                goto alloc_sitd;
2070                        list_del(&sitd->sitd_list);
2071                        sitd_dma = sitd->sitd_dma;
2072                } else {
2073 alloc_sitd:
2074                        spin_unlock_irqrestore(&ehci->lock, flags);
2075                        sitd = dma_pool_alloc(ehci->sitd_pool, mem_flags,
2076                                        &sitd_dma);
2077                        spin_lock_irqsave(&ehci->lock, flags);
2078                        if (!sitd) {
2079                                iso_sched_free(stream, iso_sched);
2080                                spin_unlock_irqrestore(&ehci->lock, flags);
2081                                return -ENOMEM;
2082                        }
2083                }
2084
2085                memset(sitd, 0, sizeof(*sitd));
2086                sitd->sitd_dma = sitd_dma;
2087                sitd->frame = NO_FRAME;
2088                list_add(&sitd->sitd_list, &iso_sched->td_list);
2089        }
2090
2091        /* temporarily store schedule info in hcpriv */
2092        urb->hcpriv = iso_sched;
2093        urb->error_count = 0;
2094
2095        spin_unlock_irqrestore(&ehci->lock, flags);
2096        return 0;
2097}
2098
2099/*-------------------------------------------------------------------------*/
2100
2101static inline void
2102sitd_patch(
2103        struct ehci_hcd         *ehci,
2104        struct ehci_iso_stream  *stream,
2105        struct ehci_sitd        *sitd,
2106        struct ehci_iso_sched   *iso_sched,
2107        unsigned                index
2108)
2109{
2110        struct ehci_iso_packet  *uf = &iso_sched->packet[index];
2111        u64                     bufp;
2112
2113        sitd->hw_next = EHCI_LIST_END(ehci);
2114        sitd->hw_fullspeed_ep = stream->address;
2115        sitd->hw_uframe = stream->splits;
2116        sitd->hw_results = uf->transaction;
2117        sitd->hw_backpointer = EHCI_LIST_END(ehci);
2118
2119        bufp = uf->bufp;
2120        sitd->hw_buf[0] = cpu_to_hc32(ehci, bufp);
2121        sitd->hw_buf_hi[0] = cpu_to_hc32(ehci, bufp >> 32);
2122
2123        sitd->hw_buf[1] = cpu_to_hc32(ehci, uf->buf1);
2124        if (uf->cross)
2125                bufp += 4096;
2126        sitd->hw_buf_hi[1] = cpu_to_hc32(ehci, bufp >> 32);
2127        sitd->index = index;
2128}
2129
2130static inline void
2131sitd_link(struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd)
2132{
2133        /* note: sitd ordering could matter (CSPLIT then SSPLIT) */
2134        sitd->sitd_next = ehci->pshadow[frame];
2135        sitd->hw_next = ehci->periodic[frame];
2136        ehci->pshadow[frame].sitd = sitd;
2137        sitd->frame = frame;
2138        wmb();
2139        ehci->periodic[frame] = cpu_to_hc32(ehci, sitd->sitd_dma | Q_TYPE_SITD);
2140}
2141
2142/* fit urb's sitds into the selected schedule slot; activate as needed */
2143static void sitd_link_urb(
2144        struct ehci_hcd         *ehci,
2145        struct urb              *urb,
2146        unsigned                mod,
2147        struct ehci_iso_stream  *stream
2148)
2149{
2150        int                     packet;
2151        unsigned                next_uframe;
2152        struct ehci_iso_sched   *sched = urb->hcpriv;
2153        struct ehci_sitd        *sitd;
2154
2155        next_uframe = stream->next_uframe;
2156
2157        if (list_empty(&stream->td_list))
2158                /* usbfs ignores TT bandwidth */
2159                ehci_to_hcd(ehci)->self.bandwidth_allocated
2160                                += stream->bandwidth;
2161
2162        if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
2163                if (ehci->amd_pll_fix == 1)
2164                        usb_amd_quirk_pll_disable();
2165        }
2166
2167        ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
2168
2169        /* fill sITDs frame by frame */
2170        for (packet = sched->first_packet, sitd = NULL;
2171                        packet < urb->number_of_packets;
2172                        packet++) {
2173
2174                /* ASSERT:  we have all necessary sitds */
2175                BUG_ON(list_empty(&sched->td_list));
2176
2177                /* ASSERT:  no itds for this endpoint in this frame */
2178
2179                sitd = list_entry(sched->td_list.next,
2180                                struct ehci_sitd, sitd_list);
2181                list_move_tail(&sitd->sitd_list, &stream->td_list);
2182                sitd->stream = stream;
2183                sitd->urb = urb;
2184
2185                sitd_patch(ehci, stream, sitd, sched, packet);
2186                sitd_link(ehci, (next_uframe >> 3) & (ehci->periodic_size - 1),
2187                                sitd);
2188
2189                next_uframe += stream->uperiod;
2190        }
2191        stream->next_uframe = next_uframe & (mod - 1);
2192
2193        /* don't need that schedule data any more */
2194        iso_sched_free(stream, sched);
2195        urb->hcpriv = stream;
2196
2197        ++ehci->isoc_count;
2198        enable_periodic(ehci);
2199}
2200
2201/*-------------------------------------------------------------------------*/
2202
2203#define SITD_ERRS (SITD_STS_ERR | SITD_STS_DBE | SITD_STS_BABBLE \
2204                                | SITD_STS_XACT | SITD_STS_MMF)
2205
2206/* Process and recycle a completed SITD.  Return true iff its urb completed,
2207 * and hence its completion callback probably added things to the hardware
2208 * schedule.
2209 *
2210 * Note that we carefully avoid recycling this descriptor until after any
2211 * completion callback runs, so that it won't be reused quickly.  That is,
2212 * assuming (a) no more than two urbs per frame on this endpoint, and also
2213 * (b) only this endpoint's completions submit URBs.  It seems some silicon
2214 * corrupts things if you reuse completed descriptors very quickly...
2215 */
2216static bool sitd_complete(struct ehci_hcd *ehci, struct ehci_sitd *sitd)
2217{
2218        struct urb                              *urb = sitd->urb;
2219        struct usb_iso_packet_descriptor        *desc;
2220        u32                                     t;
2221        int                                     urb_index;
2222        struct ehci_iso_stream                  *stream = sitd->stream;
2223        bool                                    retval = false;
2224
2225        urb_index = sitd->index;
2226        desc = &urb->iso_frame_desc[urb_index];
2227        t = hc32_to_cpup(ehci, &sitd->hw_results);
2228
2229        /* report transfer status */
2230        if (unlikely(t & SITD_ERRS)) {
2231                urb->error_count++;
2232                if (t & SITD_STS_DBE)
2233                        desc->status = usb_pipein(urb->pipe)
2234                                ? -ENOSR  /* hc couldn't read */
2235                                : -ECOMM; /* hc couldn't write */
2236                else if (t & SITD_STS_BABBLE)
2237                        desc->status = -EOVERFLOW;
2238                else /* XACT, MMF, etc */
2239                        desc->status = -EPROTO;
2240        } else if (unlikely(t & SITD_STS_ACTIVE)) {
2241                /* URB was too late */
2242                urb->error_count++;
2243        } else {
2244                desc->status = 0;
2245                desc->actual_length = desc->length - SITD_LENGTH(t);
2246                urb->actual_length += desc->actual_length;
2247        }
2248
2249        /* handle completion now? */
2250        if ((urb_index + 1) != urb->number_of_packets)
2251                goto done;
2252
2253        /*
2254         * ASSERT: it's really the last sitd for this urb
2255         * list_for_each_entry (sitd, &stream->td_list, sitd_list)
2256         *       BUG_ON(sitd->urb == urb);
2257         */
2258
2259        /* give urb back to the driver; completion often (re)submits */
2260        ehci_urb_done(ehci, urb, 0);
2261        retval = true;
2262        urb = NULL;
2263
2264        --ehci->isoc_count;
2265        disable_periodic(ehci);
2266
2267        ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
2268        if (ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs == 0) {
2269                if (ehci->amd_pll_fix == 1)
2270                        usb_amd_quirk_pll_enable();
2271        }
2272
2273        if (list_is_singular(&stream->td_list))
2274                ehci_to_hcd(ehci)->self.bandwidth_allocated
2275                                -= stream->bandwidth;
2276
2277done:
2278        sitd->urb = NULL;
2279
2280        /* Add to the end of the free list for later reuse */
2281        list_move_tail(&sitd->sitd_list, &stream->free_list);
2282
2283        /* Recycle the siTDs when the pipeline is empty (ep no longer in use) */
2284        if (list_empty(&stream->td_list)) {
2285                list_splice_tail_init(&stream->free_list,
2286                                &ehci->cached_sitd_list);
2287                start_free_itds(ehci);
2288        }
2289
2290        return retval;
2291}
2292
2293
2294static int sitd_submit(struct ehci_hcd *ehci, struct urb *urb,
2295        gfp_t mem_flags)
2296{
2297        int                     status = -EINVAL;
2298        unsigned long           flags;
2299        struct ehci_iso_stream  *stream;
2300
2301        /* Get iso_stream head */
2302        stream = iso_stream_find(ehci, urb);
2303        if (stream == NULL) {
2304                ehci_dbg(ehci, "can't get iso stream\n");
2305                return -ENOMEM;
2306        }
2307        if (urb->interval != stream->ps.period) {
2308                ehci_dbg(ehci, "can't change iso interval %d --> %d\n",
2309                        stream->ps.period, urb->interval);
2310                goto done;
2311        }
2312
2313#ifdef EHCI_URB_TRACE
2314        ehci_dbg(ehci,
2315                "submit %p dev%s ep%d%s-iso len %d\n",
2316                urb, urb->dev->devpath,
2317                usb_pipeendpoint(urb->pipe),
2318                usb_pipein(urb->pipe) ? "in" : "out",
2319                urb->transfer_buffer_length);
2320#endif
2321
2322        /* allocate SITDs */
2323        status = sitd_urb_transaction(stream, ehci, urb, mem_flags);
2324        if (status < 0) {
2325                ehci_dbg(ehci, "can't init sitds\n");
2326                goto done;
2327        }
2328
2329        /* schedule ... need to lock */
2330        spin_lock_irqsave(&ehci->lock, flags);
2331        if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
2332                status = -ESHUTDOWN;
2333                goto done_not_linked;
2334        }
2335        status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
2336        if (unlikely(status))
2337                goto done_not_linked;
2338        status = iso_stream_schedule(ehci, urb, stream);
2339        if (likely(status == 0)) {
2340                sitd_link_urb(ehci, urb, ehci->periodic_size << 3, stream);
2341        } else if (status > 0) {
2342                status = 0;
2343                ehci_urb_done(ehci, urb, 0);
2344        } else {
2345                usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
2346        }
2347 done_not_linked:
2348        spin_unlock_irqrestore(&ehci->lock, flags);
2349 done:
2350        return status;
2351}
2352
2353/*-------------------------------------------------------------------------*/
2354
2355static void scan_isoc(struct ehci_hcd *ehci)
2356{
2357        unsigned                uf, now_frame, frame;
2358        unsigned                fmask = ehci->periodic_size - 1;
2359        bool                    modified, live;
2360        union ehci_shadow       q, *q_p;
2361        __hc32                  type, *hw_p;
2362
2363        /*
2364         * When running, scan from last scan point up to "now"
2365         * else clean up by scanning everything that's left.
2366         * Touches as few pages as possible:  cache-friendly.
2367         */
2368        if (ehci->rh_state >= EHCI_RH_RUNNING) {
2369                uf = ehci_read_frame_index(ehci);
2370                now_frame = (uf >> 3) & fmask;
2371                live = true;
2372        } else  {
2373                now_frame = (ehci->last_iso_frame - 1) & fmask;
2374                live = false;
2375        }
2376        ehci->now_frame = now_frame;
2377
2378        frame = ehci->last_iso_frame;
2379
2380restart:
2381        /* Scan each element in frame's queue for completions */
2382        q_p = &ehci->pshadow[frame];
2383        hw_p = &ehci->periodic[frame];
2384        q.ptr = q_p->ptr;
2385        type = Q_NEXT_TYPE(ehci, *hw_p);
2386        modified = false;
2387
2388        while (q.ptr != NULL) {
2389                switch (hc32_to_cpu(ehci, type)) {
2390                case Q_TYPE_ITD:
2391                        /*
2392                         * If this ITD is still active, leave it for
2393                         * later processing ... check the next entry.
2394                         * No need to check for activity unless the
2395                         * frame is current.
2396                         */
2397                        if (frame == now_frame && live) {
2398                                rmb();
2399                                for (uf = 0; uf < 8; uf++) {
2400                                        if (q.itd->hw_transaction[uf] &
2401                                                        ITD_ACTIVE(ehci))
2402                                                break;
2403                                }
2404                                if (uf < 8) {
2405                                        q_p = &q.itd->itd_next;
2406                                        hw_p = &q.itd->hw_next;
2407                                        type = Q_NEXT_TYPE(ehci,
2408                                                        q.itd->hw_next);
2409                                        q = *q_p;
2410                                        break;
2411                                }
2412                        }
2413
2414                        /*
2415                         * Take finished ITDs out of the schedule
2416                         * and process them:  recycle, maybe report
2417                         * URB completion.  HC won't cache the
2418                         * pointer for much longer, if at all.
2419                         */
2420                        *q_p = q.itd->itd_next;
2421                        if (!ehci->use_dummy_qh ||
2422                                        q.itd->hw_next != EHCI_LIST_END(ehci))
2423                                *hw_p = q.itd->hw_next;
2424                        else
2425                                *hw_p = cpu_to_hc32(ehci, ehci->dummy->qh_dma);
2426                        type = Q_NEXT_TYPE(ehci, q.itd->hw_next);
2427                        wmb();
2428                        modified = itd_complete(ehci, q.itd);
2429                        q = *q_p;
2430                        break;
2431                case Q_TYPE_SITD:
2432                        /*
2433                         * If this SITD is still active, leave it for
2434                         * later processing ... check the next entry.
2435                         * No need to check for activity unless the
2436                         * frame is current.
2437                         */
2438                        if (((frame == now_frame) ||
2439                                        (((frame + 1) & fmask) == now_frame))
2440                                && live
2441                                && (q.sitd->hw_results & SITD_ACTIVE(ehci))) {
2442
2443                                q_p = &q.sitd->sitd_next;
2444                                hw_p = &q.sitd->hw_next;
2445                                type = Q_NEXT_TYPE(ehci, q.sitd->hw_next);
2446                                q = *q_p;
2447                                break;
2448                        }
2449
2450                        /*
2451                         * Take finished SITDs out of the schedule
2452                         * and process them:  recycle, maybe report
2453                         * URB completion.
2454                         */
2455                        *q_p = q.sitd->sitd_next;
2456                        if (!ehci->use_dummy_qh ||
2457                                        q.sitd->hw_next != EHCI_LIST_END(ehci))
2458                                *hw_p = q.sitd->hw_next;
2459                        else
2460                                *hw_p = cpu_to_hc32(ehci, ehci->dummy->qh_dma);
2461                        type = Q_NEXT_TYPE(ehci, q.sitd->hw_next);
2462                        wmb();
2463                        modified = sitd_complete(ehci, q.sitd);
2464                        q = *q_p;
2465                        break;
2466                default:
2467                        ehci_dbg(ehci, "corrupt type %d frame %d shadow %p\n",
2468                                        type, frame, q.ptr);
2469                        /* BUG(); */
2470                        fallthrough;
2471                case Q_TYPE_QH:
2472                case Q_TYPE_FSTN:
2473                        /* End of the iTDs and siTDs */
2474                        q.ptr = NULL;
2475                        break;
2476                }
2477
2478                /* Assume completion callbacks modify the queue */
2479                if (unlikely(modified && ehci->isoc_count > 0))
2480                        goto restart;
2481        }
2482
2483        /* Stop when we have reached the current frame */
2484        if (frame == now_frame)
2485                return;
2486
2487        /* The last frame may still have active siTDs */
2488        ehci->last_iso_frame = frame;
2489        frame = (frame + 1) & fmask;
2490
2491        goto restart;
2492}
2493