linux/drivers/usb/host/ohci-hcd.c
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   1// SPDX-License-Identifier: GPL-1.0+
   2/*
   3 * Open Host Controller Interface (OHCI) driver for USB.
   4 *
   5 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   6 *
   7 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   8 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   9 *
  10 * [ Initialisation is based on Linus'  ]
  11 * [ uhci code and gregs ohci fragments ]
  12 * [ (C) Copyright 1999 Linus Torvalds  ]
  13 * [ (C) Copyright 1999 Gregory P. Smith]
  14 *
  15 *
  16 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  17 * interfaces (though some non-x86 Intel chips use it).  It supports
  18 * smarter hardware than UHCI.  A download link for the spec available
  19 * through the https://www.usb.org website.
  20 *
  21 * This file is licenced under the GPL.
  22 */
  23
  24#include <linux/module.h>
  25#include <linux/moduleparam.h>
  26#include <linux/pci.h>
  27#include <linux/kernel.h>
  28#include <linux/delay.h>
  29#include <linux/ioport.h>
  30#include <linux/sched.h>
  31#include <linux/slab.h>
  32#include <linux/errno.h>
  33#include <linux/init.h>
  34#include <linux/timer.h>
  35#include <linux/list.h>
  36#include <linux/usb.h>
  37#include <linux/usb/otg.h>
  38#include <linux/usb/hcd.h>
  39#include <linux/dma-mapping.h>
  40#include <linux/dmapool.h>
  41#include <linux/workqueue.h>
  42#include <linux/debugfs.h>
  43#include <linux/genalloc.h>
  44
  45#include <asm/io.h>
  46#include <asm/irq.h>
  47#include <asm/unaligned.h>
  48#include <asm/byteorder.h>
  49
  50
  51#define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
  52#define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
  53
  54/*-------------------------------------------------------------------------*/
  55
  56/* For initializing controller (mask in an HCFS mode too) */
  57#define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
  58#define OHCI_INTR_INIT \
  59                (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
  60                | OHCI_INTR_RD | OHCI_INTR_WDH)
  61
  62#ifdef __hppa__
  63/* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
  64#define IR_DISABLE
  65#endif
  66
  67#ifdef CONFIG_ARCH_OMAP
  68/* OMAP doesn't support IR (no SMM; not needed) */
  69#define IR_DISABLE
  70#endif
  71
  72/*-------------------------------------------------------------------------*/
  73
  74static const char       hcd_name [] = "ohci_hcd";
  75
  76#define STATECHANGE_DELAY       msecs_to_jiffies(300)
  77#define IO_WATCHDOG_DELAY       msecs_to_jiffies(275)
  78#define IO_WATCHDOG_OFF         0xffffff00
  79
  80#include "ohci.h"
  81#include "pci-quirks.h"
  82
  83static void ohci_dump(struct ohci_hcd *ohci);
  84static void ohci_stop(struct usb_hcd *hcd);
  85static void io_watchdog_func(struct timer_list *t);
  86
  87#include "ohci-hub.c"
  88#include "ohci-dbg.c"
  89#include "ohci-mem.c"
  90#include "ohci-q.c"
  91
  92
  93/*
  94 * On architectures with edge-triggered interrupts we must never return
  95 * IRQ_NONE.
  96 */
  97#if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
  98#define IRQ_NOTMINE     IRQ_HANDLED
  99#else
 100#define IRQ_NOTMINE     IRQ_NONE
 101#endif
 102
 103
 104/* Some boards misreport power switching/overcurrent */
 105static bool distrust_firmware;
 106module_param (distrust_firmware, bool, 0);
 107MODULE_PARM_DESC (distrust_firmware,
 108        "true to distrust firmware power/overcurrent setup");
 109
 110/* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
 111static bool no_handshake;
 112module_param (no_handshake, bool, 0);
 113MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
 114
 115/*-------------------------------------------------------------------------*/
 116
 117static int number_of_tds(struct urb *urb)
 118{
 119        int                     len, i, num, this_sg_len;
 120        struct scatterlist      *sg;
 121
 122        len = urb->transfer_buffer_length;
 123        i = urb->num_mapped_sgs;
 124
 125        if (len > 0 && i > 0) {         /* Scatter-gather transfer */
 126                num = 0;
 127                sg = urb->sg;
 128                for (;;) {
 129                        this_sg_len = min_t(int, sg_dma_len(sg), len);
 130                        num += DIV_ROUND_UP(this_sg_len, 4096);
 131                        len -= this_sg_len;
 132                        if (--i <= 0 || len <= 0)
 133                                break;
 134                        sg = sg_next(sg);
 135                }
 136
 137        } else {                        /* Non-SG transfer */
 138                /* one TD for every 4096 Bytes (could be up to 8K) */
 139                num = DIV_ROUND_UP(len, 4096);
 140        }
 141        return num;
 142}
 143
 144/*
 145 * queue up an urb for anything except the root hub
 146 */
 147static int ohci_urb_enqueue (
 148        struct usb_hcd  *hcd,
 149        struct urb      *urb,
 150        gfp_t           mem_flags
 151) {
 152        struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 153        struct ed       *ed;
 154        urb_priv_t      *urb_priv;
 155        unsigned int    pipe = urb->pipe;
 156        int             i, size = 0;
 157        unsigned long   flags;
 158        int             retval = 0;
 159
 160        /* every endpoint has a ed, locate and maybe (re)initialize it */
 161        ed = ed_get(ohci, urb->ep, urb->dev, pipe, urb->interval);
 162        if (! ed)
 163                return -ENOMEM;
 164
 165        /* for the private part of the URB we need the number of TDs (size) */
 166        switch (ed->type) {
 167                case PIPE_CONTROL:
 168                        /* td_submit_urb() doesn't yet handle these */
 169                        if (urb->transfer_buffer_length > 4096)
 170                                return -EMSGSIZE;
 171
 172                        /* 1 TD for setup, 1 for ACK, plus ... */
 173                        size = 2;
 174                        fallthrough;
 175                // case PIPE_INTERRUPT:
 176                // case PIPE_BULK:
 177                default:
 178                        size += number_of_tds(urb);
 179                        /* maybe a zero-length packet to wrap it up */
 180                        if (size == 0)
 181                                size++;
 182                        else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 183                                && (urb->transfer_buffer_length
 184                                        % usb_maxpacket (urb->dev, pipe,
 185                                                usb_pipeout (pipe))) == 0)
 186                                size++;
 187                        break;
 188                case PIPE_ISOCHRONOUS: /* number of packets from URB */
 189                        size = urb->number_of_packets;
 190                        break;
 191        }
 192
 193        /* allocate the private part of the URB */
 194        urb_priv = kzalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
 195                        mem_flags);
 196        if (!urb_priv)
 197                return -ENOMEM;
 198        INIT_LIST_HEAD (&urb_priv->pending);
 199        urb_priv->length = size;
 200        urb_priv->ed = ed;
 201
 202        /* allocate the TDs (deferring hash chain updates) */
 203        for (i = 0; i < size; i++) {
 204                urb_priv->td [i] = td_alloc (ohci, mem_flags);
 205                if (!urb_priv->td [i]) {
 206                        urb_priv->length = i;
 207                        urb_free_priv (ohci, urb_priv);
 208                        return -ENOMEM;
 209                }
 210        }
 211
 212        spin_lock_irqsave (&ohci->lock, flags);
 213
 214        /* don't submit to a dead HC */
 215        if (!HCD_HW_ACCESSIBLE(hcd)) {
 216                retval = -ENODEV;
 217                goto fail;
 218        }
 219        if (ohci->rh_state != OHCI_RH_RUNNING) {
 220                retval = -ENODEV;
 221                goto fail;
 222        }
 223        retval = usb_hcd_link_urb_to_ep(hcd, urb);
 224        if (retval)
 225                goto fail;
 226
 227        /* schedule the ed if needed */
 228        if (ed->state == ED_IDLE) {
 229                retval = ed_schedule (ohci, ed);
 230                if (retval < 0) {
 231                        usb_hcd_unlink_urb_from_ep(hcd, urb);
 232                        goto fail;
 233                }
 234
 235                /* Start up the I/O watchdog timer, if it's not running */
 236                if (ohci->prev_frame_no == IO_WATCHDOG_OFF &&
 237                                list_empty(&ohci->eds_in_use) &&
 238                                !(ohci->flags & OHCI_QUIRK_QEMU)) {
 239                        ohci->prev_frame_no = ohci_frame_no(ohci);
 240                        mod_timer(&ohci->io_watchdog,
 241                                        jiffies + IO_WATCHDOG_DELAY);
 242                }
 243                list_add(&ed->in_use_list, &ohci->eds_in_use);
 244
 245                if (ed->type == PIPE_ISOCHRONOUS) {
 246                        u16     frame = ohci_frame_no(ohci);
 247
 248                        /* delay a few frames before the first TD */
 249                        frame += max_t (u16, 8, ed->interval);
 250                        frame &= ~(ed->interval - 1);
 251                        frame |= ed->branch;
 252                        urb->start_frame = frame;
 253                        ed->last_iso = frame + ed->interval * (size - 1);
 254                }
 255        } else if (ed->type == PIPE_ISOCHRONOUS) {
 256                u16     next = ohci_frame_no(ohci) + 1;
 257                u16     frame = ed->last_iso + ed->interval;
 258                u16     length = ed->interval * (size - 1);
 259
 260                /* Behind the scheduling threshold? */
 261                if (unlikely(tick_before(frame, next))) {
 262
 263                        /* URB_ISO_ASAP: Round up to the first available slot */
 264                        if (urb->transfer_flags & URB_ISO_ASAP) {
 265                                frame += (next - frame + ed->interval - 1) &
 266                                                -ed->interval;
 267
 268                        /*
 269                         * Not ASAP: Use the next slot in the stream,
 270                         * no matter what.
 271                         */
 272                        } else {
 273                                /*
 274                                 * Some OHCI hardware doesn't handle late TDs
 275                                 * correctly.  After retiring them it proceeds
 276                                 * to the next ED instead of the next TD.
 277                                 * Therefore we have to omit the late TDs
 278                                 * entirely.
 279                                 */
 280                                urb_priv->td_cnt = DIV_ROUND_UP(
 281                                                (u16) (next - frame),
 282                                                ed->interval);
 283                                if (urb_priv->td_cnt >= urb_priv->length) {
 284                                        ++urb_priv->td_cnt;     /* Mark it */
 285                                        ohci_dbg(ohci, "iso underrun %p (%u+%u < %u)\n",
 286                                                        urb, frame, length,
 287                                                        next);
 288                                }
 289                        }
 290                }
 291                urb->start_frame = frame;
 292                ed->last_iso = frame + length;
 293        }
 294
 295        /* fill the TDs and link them to the ed; and
 296         * enable that part of the schedule, if needed
 297         * and update count of queued periodic urbs
 298         */
 299        urb->hcpriv = urb_priv;
 300        td_submit_urb (ohci, urb);
 301
 302fail:
 303        if (retval)
 304                urb_free_priv (ohci, urb_priv);
 305        spin_unlock_irqrestore (&ohci->lock, flags);
 306        return retval;
 307}
 308
 309/*
 310 * decouple the URB from the HC queues (TDs, urb_priv).
 311 * reporting is always done
 312 * asynchronously, and we might be dealing with an urb that's
 313 * partially transferred, or an ED with other urbs being unlinked.
 314 */
 315static int ohci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 316{
 317        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 318        unsigned long           flags;
 319        int                     rc;
 320        urb_priv_t              *urb_priv;
 321
 322        spin_lock_irqsave (&ohci->lock, flags);
 323        rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 324        if (rc == 0) {
 325
 326                /* Unless an IRQ completed the unlink while it was being
 327                 * handed to us, flag it for unlink and giveback, and force
 328                 * some upcoming INTR_SF to call finish_unlinks()
 329                 */
 330                urb_priv = urb->hcpriv;
 331                if (urb_priv->ed->state == ED_OPER)
 332                        start_ed_unlink(ohci, urb_priv->ed);
 333
 334                if (ohci->rh_state != OHCI_RH_RUNNING) {
 335                        /* With HC dead, we can clean up right away */
 336                        ohci_work(ohci);
 337                }
 338        }
 339        spin_unlock_irqrestore (&ohci->lock, flags);
 340        return rc;
 341}
 342
 343/*-------------------------------------------------------------------------*/
 344
 345/* frees config/altsetting state for endpoints,
 346 * including ED memory, dummy TD, and bulk/intr data toggle
 347 */
 348
 349static void
 350ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 351{
 352        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 353        unsigned long           flags;
 354        struct ed               *ed = ep->hcpriv;
 355        unsigned                limit = 1000;
 356
 357        /* ASSERT:  any requests/urbs are being unlinked */
 358        /* ASSERT:  nobody can be submitting urbs for this any more */
 359
 360        if (!ed)
 361                return;
 362
 363rescan:
 364        spin_lock_irqsave (&ohci->lock, flags);
 365
 366        if (ohci->rh_state != OHCI_RH_RUNNING) {
 367sanitize:
 368                ed->state = ED_IDLE;
 369                ohci_work(ohci);
 370        }
 371
 372        switch (ed->state) {
 373        case ED_UNLINK:         /* wait for hw to finish? */
 374                /* major IRQ delivery trouble loses INTR_SF too... */
 375                if (limit-- == 0) {
 376                        ohci_warn(ohci, "ED unlink timeout\n");
 377                        goto sanitize;
 378                }
 379                spin_unlock_irqrestore (&ohci->lock, flags);
 380                schedule_timeout_uninterruptible(1);
 381                goto rescan;
 382        case ED_IDLE:           /* fully unlinked */
 383                if (list_empty (&ed->td_list)) {
 384                        td_free (ohci, ed->dummy);
 385                        ed_free (ohci, ed);
 386                        break;
 387                }
 388                fallthrough;
 389        default:
 390                /* caller was supposed to have unlinked any requests;
 391                 * that's not our job.  can't recover; must leak ed.
 392                 */
 393                ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
 394                        ed, ep->desc.bEndpointAddress, ed->state,
 395                        list_empty (&ed->td_list) ? "" : " (has tds)");
 396                td_free (ohci, ed->dummy);
 397                break;
 398        }
 399        ep->hcpriv = NULL;
 400        spin_unlock_irqrestore (&ohci->lock, flags);
 401}
 402
 403static int ohci_get_frame (struct usb_hcd *hcd)
 404{
 405        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 406
 407        return ohci_frame_no(ohci);
 408}
 409
 410static void ohci_usb_reset (struct ohci_hcd *ohci)
 411{
 412        ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
 413        ohci->hc_control &= OHCI_CTRL_RWC;
 414        ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 415        ohci->rh_state = OHCI_RH_HALTED;
 416}
 417
 418/* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
 419 * other cases where the next software may expect clean state from the
 420 * "firmware".  this is bus-neutral, unlike shutdown() methods.
 421 */
 422static void _ohci_shutdown(struct usb_hcd *hcd)
 423{
 424        struct ohci_hcd *ohci;
 425
 426        ohci = hcd_to_ohci (hcd);
 427        ohci_writel(ohci, (u32) ~0, &ohci->regs->intrdisable);
 428
 429        /* Software reset, after which the controller goes into SUSPEND */
 430        ohci_writel(ohci, OHCI_HCR, &ohci->regs->cmdstatus);
 431        ohci_readl(ohci, &ohci->regs->cmdstatus);       /* flush the writes */
 432        udelay(10);
 433
 434        ohci_writel(ohci, ohci->fminterval, &ohci->regs->fminterval);
 435        ohci->rh_state = OHCI_RH_HALTED;
 436}
 437
 438static void ohci_shutdown(struct usb_hcd *hcd)
 439{
 440        struct ohci_hcd *ohci = hcd_to_ohci(hcd);
 441        unsigned long flags;
 442
 443        spin_lock_irqsave(&ohci->lock, flags);
 444        _ohci_shutdown(hcd);
 445        spin_unlock_irqrestore(&ohci->lock, flags);
 446}
 447
 448/*-------------------------------------------------------------------------*
 449 * HC functions
 450 *-------------------------------------------------------------------------*/
 451
 452/* init memory, and kick BIOS/SMM off */
 453
 454static int ohci_init (struct ohci_hcd *ohci)
 455{
 456        int ret;
 457        struct usb_hcd *hcd = ohci_to_hcd(ohci);
 458
 459        /* Accept arbitrarily long scatter-gather lists */
 460        if (!hcd->localmem_pool)
 461                hcd->self.sg_tablesize = ~0;
 462
 463        if (distrust_firmware)
 464                ohci->flags |= OHCI_QUIRK_HUB_POWER;
 465
 466        ohci->rh_state = OHCI_RH_HALTED;
 467        ohci->regs = hcd->regs;
 468
 469        /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
 470         * was never needed for most non-PCI systems ... remove the code?
 471         */
 472
 473#ifndef IR_DISABLE
 474        /* SMM owns the HC?  not for long! */
 475        if (!no_handshake && ohci_readl (ohci,
 476                                        &ohci->regs->control) & OHCI_CTRL_IR) {
 477                u32 temp;
 478
 479                ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
 480
 481                /* this timeout is arbitrary.  we make it long, so systems
 482                 * depending on usb keyboards may be usable even if the
 483                 * BIOS/SMM code seems pretty broken.
 484                 */
 485                temp = 500;     /* arbitrary: five seconds */
 486
 487                ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
 488                ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
 489                while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
 490                        msleep (10);
 491                        if (--temp == 0) {
 492                                ohci_err (ohci, "USB HC takeover failed!"
 493                                        "  (BIOS/SMM bug)\n");
 494                                return -EBUSY;
 495                        }
 496                }
 497                ohci_usb_reset (ohci);
 498        }
 499#endif
 500
 501        /* Disable HC interrupts */
 502        ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 503
 504        /* flush the writes, and save key bits like RWC */
 505        if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
 506                ohci->hc_control |= OHCI_CTRL_RWC;
 507
 508        /* Read the number of ports unless overridden */
 509        if (ohci->num_ports == 0)
 510                ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
 511
 512        if (ohci->hcca)
 513                return 0;
 514
 515        timer_setup(&ohci->io_watchdog, io_watchdog_func, 0);
 516        ohci->prev_frame_no = IO_WATCHDOG_OFF;
 517
 518        if (hcd->localmem_pool)
 519                ohci->hcca = gen_pool_dma_alloc_align(hcd->localmem_pool,
 520                                                sizeof(*ohci->hcca),
 521                                                &ohci->hcca_dma, 256);
 522        else
 523                ohci->hcca = dma_alloc_coherent(hcd->self.controller,
 524                                                sizeof(*ohci->hcca),
 525                                                &ohci->hcca_dma,
 526                                                GFP_KERNEL);
 527        if (!ohci->hcca)
 528                return -ENOMEM;
 529
 530        if ((ret = ohci_mem_init (ohci)) < 0)
 531                ohci_stop (hcd);
 532        else {
 533                create_debug_files (ohci);
 534        }
 535
 536        return ret;
 537}
 538
 539/*-------------------------------------------------------------------------*/
 540
 541/* Start an OHCI controller, set the BUS operational
 542 * resets USB and controller
 543 * enable interrupts
 544 */
 545static int ohci_run (struct ohci_hcd *ohci)
 546{
 547        u32                     mask, val;
 548        int                     first = ohci->fminterval == 0;
 549        struct usb_hcd          *hcd = ohci_to_hcd(ohci);
 550
 551        ohci->rh_state = OHCI_RH_HALTED;
 552
 553        /* boot firmware should have set this up (5.1.1.3.1) */
 554        if (first) {
 555
 556                val = ohci_readl (ohci, &ohci->regs->fminterval);
 557                ohci->fminterval = val & 0x3fff;
 558                if (ohci->fminterval != FI)
 559                        ohci_dbg (ohci, "fminterval delta %d\n",
 560                                ohci->fminterval - FI);
 561                ohci->fminterval |= FSMP (ohci->fminterval) << 16;
 562                /* also: power/overcurrent flags in roothub.a */
 563        }
 564
 565        /* Reset USB nearly "by the book".  RemoteWakeupConnected has
 566         * to be checked in case boot firmware (BIOS/SMM/...) has set up
 567         * wakeup in a way the bus isn't aware of (e.g., legacy PCI PM).
 568         * If the bus glue detected wakeup capability then it should
 569         * already be enabled; if so we'll just enable it again.
 570         */
 571        if ((ohci->hc_control & OHCI_CTRL_RWC) != 0)
 572                device_set_wakeup_capable(hcd->self.controller, 1);
 573
 574        switch (ohci->hc_control & OHCI_CTRL_HCFS) {
 575        case OHCI_USB_OPER:
 576                val = 0;
 577                break;
 578        case OHCI_USB_SUSPEND:
 579        case OHCI_USB_RESUME:
 580                ohci->hc_control &= OHCI_CTRL_RWC;
 581                ohci->hc_control |= OHCI_USB_RESUME;
 582                val = 10 /* msec wait */;
 583                break;
 584        // case OHCI_USB_RESET:
 585        default:
 586                ohci->hc_control &= OHCI_CTRL_RWC;
 587                ohci->hc_control |= OHCI_USB_RESET;
 588                val = 50 /* msec wait */;
 589                break;
 590        }
 591        ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 592        // flush the writes
 593        (void) ohci_readl (ohci, &ohci->regs->control);
 594        msleep(val);
 595
 596        memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
 597
 598        /* 2msec timelimit here means no irqs/preempt */
 599        spin_lock_irq (&ohci->lock);
 600
 601retry:
 602        /* HC Reset requires max 10 us delay */
 603        ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
 604        val = 30;       /* ... allow extra time */
 605        while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
 606                if (--val == 0) {
 607                        spin_unlock_irq (&ohci->lock);
 608                        ohci_err (ohci, "USB HC reset timed out!\n");
 609                        return -1;
 610                }
 611                udelay (1);
 612        }
 613
 614        /* now we're in the SUSPEND state ... must go OPERATIONAL
 615         * within 2msec else HC enters RESUME
 616         *
 617         * ... but some hardware won't init fmInterval "by the book"
 618         * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
 619         * this if we write fmInterval after we're OPERATIONAL.
 620         * Unclear about ALi, ServerWorks, and others ... this could
 621         * easily be a longstanding bug in chip init on Linux.
 622         */
 623        if (ohci->flags & OHCI_QUIRK_INITRESET) {
 624                ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 625                // flush those writes
 626                (void) ohci_readl (ohci, &ohci->regs->control);
 627        }
 628
 629        /* Tell the controller where the control and bulk lists are
 630         * The lists are empty now. */
 631        ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
 632        ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
 633
 634        /* a reset clears this */
 635        ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
 636
 637        periodic_reinit (ohci);
 638
 639        /* some OHCI implementations are finicky about how they init.
 640         * bogus values here mean not even enumeration could work.
 641         */
 642        if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
 643                        || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
 644                if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
 645                        ohci->flags |= OHCI_QUIRK_INITRESET;
 646                        ohci_dbg (ohci, "enabling initreset quirk\n");
 647                        goto retry;
 648                }
 649                spin_unlock_irq (&ohci->lock);
 650                ohci_err (ohci, "init err (%08x %04x)\n",
 651                        ohci_readl (ohci, &ohci->regs->fminterval),
 652                        ohci_readl (ohci, &ohci->regs->periodicstart));
 653                return -EOVERFLOW;
 654        }
 655
 656        /* use rhsc irqs after hub_wq is allocated */
 657        set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 658        hcd->uses_new_polling = 1;
 659
 660        /* start controller operations */
 661        ohci->hc_control &= OHCI_CTRL_RWC;
 662        ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
 663        ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 664        ohci->rh_state = OHCI_RH_RUNNING;
 665
 666        /* wake on ConnectStatusChange, matching external hubs */
 667        ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
 668
 669        /* Choose the interrupts we care about now, others later on demand */
 670        mask = OHCI_INTR_INIT;
 671        ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
 672        ohci_writel (ohci, mask, &ohci->regs->intrenable);
 673
 674        /* handle root hub init quirks ... */
 675        val = roothub_a (ohci);
 676        /* Configure for per-port over-current protection by default */
 677        val &= ~RH_A_NOCP;
 678        val |= RH_A_OCPM;
 679        if (ohci->flags & OHCI_QUIRK_SUPERIO) {
 680                /* NSC 87560 and maybe others.
 681                 * Ganged power switching, no over-current protection.
 682                 */
 683                val |= RH_A_NOCP;
 684                val &= ~(RH_A_POTPGT | RH_A_NPS | RH_A_PSM | RH_A_OCPM);
 685        } else if ((ohci->flags & OHCI_QUIRK_AMD756) ||
 686                        (ohci->flags & OHCI_QUIRK_HUB_POWER)) {
 687                /* hub power always on; required for AMD-756 and some
 688                 * Mac platforms.
 689                 */
 690                val |= RH_A_NPS;
 691        }
 692        ohci_writel(ohci, val, &ohci->regs->roothub.a);
 693
 694        ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
 695        ohci_writel (ohci, (val & RH_A_NPS) ? 0 : RH_B_PPCM,
 696                                                &ohci->regs->roothub.b);
 697        // flush those writes
 698        (void) ohci_readl (ohci, &ohci->regs->control);
 699
 700        ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 701        spin_unlock_irq (&ohci->lock);
 702
 703        // POTPGT delay is bits 24-31, in 2 ms units.
 704        mdelay ((val >> 23) & 0x1fe);
 705
 706        ohci_dump(ohci);
 707
 708        return 0;
 709}
 710
 711/* ohci_setup routine for generic controller initialization */
 712
 713int ohci_setup(struct usb_hcd *hcd)
 714{
 715        struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 716
 717        ohci_hcd_init(ohci);
 718        
 719        return ohci_init(ohci);
 720}
 721EXPORT_SYMBOL_GPL(ohci_setup);
 722
 723/* ohci_start routine for generic controller start of all OHCI bus glue */
 724static int ohci_start(struct usb_hcd *hcd)
 725{
 726        struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 727        int     ret;
 728
 729        ret = ohci_run(ohci);
 730        if (ret < 0) {
 731                ohci_err(ohci, "can't start\n");
 732                ohci_stop(hcd);
 733        }
 734        return ret;
 735}
 736
 737/*-------------------------------------------------------------------------*/
 738
 739/*
 740 * Some OHCI controllers are known to lose track of completed TDs.  They
 741 * don't add the TDs to the hardware done queue, which means we never see
 742 * them as being completed.
 743 *
 744 * This watchdog routine checks for such problems.  Without some way to
 745 * tell when those TDs have completed, we would never take their EDs off
 746 * the unlink list.  As a result, URBs could never be dequeued and
 747 * endpoints could never be released.
 748 */
 749static void io_watchdog_func(struct timer_list *t)
 750{
 751        struct ohci_hcd *ohci = from_timer(ohci, t, io_watchdog);
 752        bool            takeback_all_pending = false;
 753        u32             status;
 754        u32             head;
 755        struct ed       *ed;
 756        struct td       *td, *td_start, *td_next;
 757        unsigned        frame_no, prev_frame_no = IO_WATCHDOG_OFF;
 758        unsigned long   flags;
 759
 760        spin_lock_irqsave(&ohci->lock, flags);
 761
 762        /*
 763         * One way to lose track of completed TDs is if the controller
 764         * never writes back the done queue head.  If it hasn't been
 765         * written back since the last time this function ran and if it
 766         * was non-empty at that time, something is badly wrong with the
 767         * hardware.
 768         */
 769        status = ohci_readl(ohci, &ohci->regs->intrstatus);
 770        if (!(status & OHCI_INTR_WDH) && ohci->wdh_cnt == ohci->prev_wdh_cnt) {
 771                if (ohci->prev_donehead) {
 772                        ohci_err(ohci, "HcDoneHead not written back; disabled\n");
 773 died:
 774                        usb_hc_died(ohci_to_hcd(ohci));
 775                        ohci_dump(ohci);
 776                        _ohci_shutdown(ohci_to_hcd(ohci));
 777                        goto done;
 778                } else {
 779                        /* No write back because the done queue was empty */
 780                        takeback_all_pending = true;
 781                }
 782        }
 783
 784        /* Check every ED which might have pending TDs */
 785        list_for_each_entry(ed, &ohci->eds_in_use, in_use_list) {
 786                if (ed->pending_td) {
 787                        if (takeback_all_pending ||
 788                                        OKAY_TO_TAKEBACK(ohci, ed)) {
 789                                unsigned tmp = hc32_to_cpu(ohci, ed->hwINFO);
 790
 791                                ohci_dbg(ohci, "takeback pending TD for dev %d ep 0x%x\n",
 792                                                0x007f & tmp,
 793                                                (0x000f & (tmp >> 7)) +
 794                                                        ((tmp & ED_IN) >> 5));
 795                                add_to_done_list(ohci, ed->pending_td);
 796                        }
 797                }
 798
 799                /* Starting from the latest pending TD, */
 800                td = ed->pending_td;
 801
 802                /* or the last TD on the done list, */
 803                if (!td) {
 804                        list_for_each_entry(td_next, &ed->td_list, td_list) {
 805                                if (!td_next->next_dl_td)
 806                                        break;
 807                                td = td_next;
 808                        }
 809                }
 810
 811                /* find the last TD processed by the controller. */
 812                head = hc32_to_cpu(ohci, READ_ONCE(ed->hwHeadP)) & TD_MASK;
 813                td_start = td;
 814                td_next = list_prepare_entry(td, &ed->td_list, td_list);
 815                list_for_each_entry_continue(td_next, &ed->td_list, td_list) {
 816                        if (head == (u32) td_next->td_dma)
 817                                break;
 818                        td = td_next;   /* head pointer has passed this TD */
 819                }
 820                if (td != td_start) {
 821                        /*
 822                         * In case a WDH cycle is in progress, we will wait
 823                         * for the next two cycles to complete before assuming
 824                         * this TD will never get on the done queue.
 825                         */
 826                        ed->takeback_wdh_cnt = ohci->wdh_cnt + 2;
 827                        ed->pending_td = td;
 828                }
 829        }
 830
 831        ohci_work(ohci);
 832
 833        if (ohci->rh_state == OHCI_RH_RUNNING) {
 834
 835                /*
 836                 * Sometimes a controller just stops working.  We can tell
 837                 * by checking that the frame counter has advanced since
 838                 * the last time we ran.
 839                 *
 840                 * But be careful: Some controllers violate the spec by
 841                 * stopping their frame counter when no ports are active.
 842                 */
 843                frame_no = ohci_frame_no(ohci);
 844                if (frame_no == ohci->prev_frame_no) {
 845                        int             active_cnt = 0;
 846                        int             i;
 847                        unsigned        tmp;
 848
 849                        for (i = 0; i < ohci->num_ports; ++i) {
 850                                tmp = roothub_portstatus(ohci, i);
 851                                /* Enabled and not suspended? */
 852                                if ((tmp & RH_PS_PES) && !(tmp & RH_PS_PSS))
 853                                        ++active_cnt;
 854                        }
 855
 856                        if (active_cnt > 0) {
 857                                ohci_err(ohci, "frame counter not updating; disabled\n");
 858                                goto died;
 859                        }
 860                }
 861                if (!list_empty(&ohci->eds_in_use)) {
 862                        prev_frame_no = frame_no;
 863                        ohci->prev_wdh_cnt = ohci->wdh_cnt;
 864                        ohci->prev_donehead = ohci_readl(ohci,
 865                                        &ohci->regs->donehead);
 866                        mod_timer(&ohci->io_watchdog,
 867                                        jiffies + IO_WATCHDOG_DELAY);
 868                }
 869        }
 870
 871 done:
 872        ohci->prev_frame_no = prev_frame_no;
 873        spin_unlock_irqrestore(&ohci->lock, flags);
 874}
 875
 876/* an interrupt happens */
 877
 878static irqreturn_t ohci_irq (struct usb_hcd *hcd)
 879{
 880        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 881        struct ohci_regs __iomem *regs = ohci->regs;
 882        int                     ints;
 883
 884        /* Read interrupt status (and flush pending writes).  We ignore the
 885         * optimization of checking the LSB of hcca->done_head; it doesn't
 886         * work on all systems (edge triggering for OHCI can be a factor).
 887         */
 888        ints = ohci_readl(ohci, &regs->intrstatus);
 889
 890        /* Check for an all 1's result which is a typical consequence
 891         * of dead, unclocked, or unplugged (CardBus...) devices
 892         */
 893        if (ints == ~(u32)0) {
 894                ohci->rh_state = OHCI_RH_HALTED;
 895                ohci_dbg (ohci, "device removed!\n");
 896                usb_hc_died(hcd);
 897                return IRQ_HANDLED;
 898        }
 899
 900        /* We only care about interrupts that are enabled */
 901        ints &= ohci_readl(ohci, &regs->intrenable);
 902
 903        /* interrupt for some other device? */
 904        if (ints == 0 || unlikely(ohci->rh_state == OHCI_RH_HALTED))
 905                return IRQ_NOTMINE;
 906
 907        if (ints & OHCI_INTR_UE) {
 908                // e.g. due to PCI Master/Target Abort
 909                if (quirk_nec(ohci)) {
 910                        /* Workaround for a silicon bug in some NEC chips used
 911                         * in Apple's PowerBooks. Adapted from Darwin code.
 912                         */
 913                        ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
 914
 915                        ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);
 916
 917                        schedule_work (&ohci->nec_work);
 918                } else {
 919                        ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
 920                        ohci->rh_state = OHCI_RH_HALTED;
 921                        usb_hc_died(hcd);
 922                }
 923
 924                ohci_dump(ohci);
 925                ohci_usb_reset (ohci);
 926        }
 927
 928        if (ints & OHCI_INTR_RHSC) {
 929                ohci_dbg(ohci, "rhsc\n");
 930                ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 931                ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
 932                                &regs->intrstatus);
 933
 934                /* NOTE: Vendors didn't always make the same implementation
 935                 * choices for RHSC.  Many followed the spec; RHSC triggers
 936                 * on an edge, like setting and maybe clearing a port status
 937                 * change bit.  With others it's level-triggered, active
 938                 * until hub_wq clears all the port status change bits.  We'll
 939                 * always disable it here and rely on polling until hub_wq
 940                 * re-enables it.
 941                 */
 942                ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
 943                usb_hcd_poll_rh_status(hcd);
 944        }
 945
 946        /* For connect and disconnect events, we expect the controller
 947         * to turn on RHSC along with RD.  But for remote wakeup events
 948         * this might not happen.
 949         */
 950        else if (ints & OHCI_INTR_RD) {
 951                ohci_dbg(ohci, "resume detect\n");
 952                ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
 953                set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 954                if (ohci->autostop) {
 955                        spin_lock (&ohci->lock);
 956                        ohci_rh_resume (ohci);
 957                        spin_unlock (&ohci->lock);
 958                } else
 959                        usb_hcd_resume_root_hub(hcd);
 960        }
 961
 962        spin_lock(&ohci->lock);
 963        if (ints & OHCI_INTR_WDH)
 964                update_done_list(ohci);
 965
 966        /* could track INTR_SO to reduce available PCI/... bandwidth */
 967
 968        /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
 969         * when there's still unlinking to be done (next frame).
 970         */
 971        ohci_work(ohci);
 972        if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
 973                        && ohci->rh_state == OHCI_RH_RUNNING)
 974                ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
 975
 976        if (ohci->rh_state == OHCI_RH_RUNNING) {
 977                ohci_writel (ohci, ints, &regs->intrstatus);
 978                if (ints & OHCI_INTR_WDH)
 979                        ++ohci->wdh_cnt;
 980
 981                ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
 982                // flush those writes
 983                (void) ohci_readl (ohci, &ohci->regs->control);
 984        }
 985        spin_unlock(&ohci->lock);
 986
 987        return IRQ_HANDLED;
 988}
 989
 990/*-------------------------------------------------------------------------*/
 991
 992static void ohci_stop (struct usb_hcd *hcd)
 993{
 994        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 995
 996        ohci_dump(ohci);
 997
 998        if (quirk_nec(ohci))
 999                flush_work(&ohci->nec_work);
1000        del_timer_sync(&ohci->io_watchdog);
1001        ohci->prev_frame_no = IO_WATCHDOG_OFF;
1002
1003        ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
1004        ohci_usb_reset(ohci);
1005        free_irq(hcd->irq, hcd);
1006        hcd->irq = 0;
1007
1008        if (quirk_amdiso(ohci))
1009                usb_amd_dev_put();
1010
1011        remove_debug_files (ohci);
1012        ohci_mem_cleanup (ohci);
1013        if (ohci->hcca) {
1014                if (hcd->localmem_pool)
1015                        gen_pool_free(hcd->localmem_pool,
1016                                      (unsigned long)ohci->hcca,
1017                                      sizeof(*ohci->hcca));
1018                else
1019                        dma_free_coherent(hcd->self.controller,
1020                                          sizeof(*ohci->hcca),
1021                                          ohci->hcca, ohci->hcca_dma);
1022                ohci->hcca = NULL;
1023                ohci->hcca_dma = 0;
1024        }
1025}
1026
1027/*-------------------------------------------------------------------------*/
1028
1029#if defined(CONFIG_PM) || defined(CONFIG_USB_PCI)
1030
1031/* must not be called from interrupt context */
1032int ohci_restart(struct ohci_hcd *ohci)
1033{
1034        int temp;
1035        int i;
1036        struct urb_priv *priv;
1037
1038        ohci_init(ohci);
1039        spin_lock_irq(&ohci->lock);
1040        ohci->rh_state = OHCI_RH_HALTED;
1041
1042        /* Recycle any "live" eds/tds (and urbs). */
1043        if (!list_empty (&ohci->pending))
1044                ohci_dbg(ohci, "abort schedule...\n");
1045        list_for_each_entry (priv, &ohci->pending, pending) {
1046                struct urb      *urb = priv->td[0]->urb;
1047                struct ed       *ed = priv->ed;
1048
1049                switch (ed->state) {
1050                case ED_OPER:
1051                        ed->state = ED_UNLINK;
1052                        ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
1053                        ed_deschedule (ohci, ed);
1054
1055                        ed->ed_next = ohci->ed_rm_list;
1056                        ed->ed_prev = NULL;
1057                        ohci->ed_rm_list = ed;
1058                        fallthrough;
1059                case ED_UNLINK:
1060                        break;
1061                default:
1062                        ohci_dbg(ohci, "bogus ed %p state %d\n",
1063                                        ed, ed->state);
1064                }
1065
1066                if (!urb->unlinked)
1067                        urb->unlinked = -ESHUTDOWN;
1068        }
1069        ohci_work(ohci);
1070        spin_unlock_irq(&ohci->lock);
1071
1072        /* paranoia, in case that didn't work: */
1073
1074        /* empty the interrupt branches */
1075        for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
1076        for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
1077
1078        /* no EDs to remove */
1079        ohci->ed_rm_list = NULL;
1080
1081        /* empty control and bulk lists */
1082        ohci->ed_controltail = NULL;
1083        ohci->ed_bulktail    = NULL;
1084
1085        if ((temp = ohci_run (ohci)) < 0) {
1086                ohci_err (ohci, "can't restart, %d\n", temp);
1087                return temp;
1088        }
1089        ohci_dbg(ohci, "restart complete\n");
1090        return 0;
1091}
1092EXPORT_SYMBOL_GPL(ohci_restart);
1093
1094#endif
1095
1096#ifdef CONFIG_PM
1097
1098int ohci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1099{
1100        struct ohci_hcd *ohci = hcd_to_ohci (hcd);
1101        unsigned long   flags;
1102        int             rc = 0;
1103
1104        /* Disable irq emission and mark HW unaccessible. Use
1105         * the spinlock to properly synchronize with possible pending
1106         * RH suspend or resume activity.
1107         */
1108        spin_lock_irqsave (&ohci->lock, flags);
1109        ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
1110        (void)ohci_readl(ohci, &ohci->regs->intrdisable);
1111
1112        clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1113        spin_unlock_irqrestore (&ohci->lock, flags);
1114
1115        synchronize_irq(hcd->irq);
1116
1117        if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1118                ohci_resume(hcd, false);
1119                rc = -EBUSY;
1120        }
1121        return rc;
1122}
1123EXPORT_SYMBOL_GPL(ohci_suspend);
1124
1125
1126int ohci_resume(struct usb_hcd *hcd, bool hibernated)
1127{
1128        struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
1129        int                     port;
1130        bool                    need_reinit = false;
1131
1132        set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1133
1134        /* Make sure resume from hibernation re-enumerates everything */
1135        if (hibernated)
1136                ohci_usb_reset(ohci);
1137
1138        /* See if the controller is already running or has been reset */
1139        ohci->hc_control = ohci_readl(ohci, &ohci->regs->control);
1140        if (ohci->hc_control & (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) {
1141                need_reinit = true;
1142        } else {
1143                switch (ohci->hc_control & OHCI_CTRL_HCFS) {
1144                case OHCI_USB_OPER:
1145                case OHCI_USB_RESET:
1146                        need_reinit = true;
1147                }
1148        }
1149
1150        /* If needed, reinitialize and suspend the root hub */
1151        if (need_reinit) {
1152                spin_lock_irq(&ohci->lock);
1153                ohci_rh_resume(ohci);
1154                ohci_rh_suspend(ohci, 0);
1155                spin_unlock_irq(&ohci->lock);
1156        }
1157
1158        /* Normally just turn on port power and enable interrupts */
1159        else {
1160                ohci_dbg(ohci, "powerup ports\n");
1161                for (port = 0; port < ohci->num_ports; port++)
1162                        ohci_writel(ohci, RH_PS_PPS,
1163                                        &ohci->regs->roothub.portstatus[port]);
1164
1165                ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrenable);
1166                ohci_readl(ohci, &ohci->regs->intrenable);
1167                msleep(20);
1168        }
1169
1170        usb_hcd_resume_root_hub(hcd);
1171
1172        return 0;
1173}
1174EXPORT_SYMBOL_GPL(ohci_resume);
1175
1176#endif
1177
1178/*-------------------------------------------------------------------------*/
1179
1180/*
1181 * Generic structure: This gets copied for platform drivers so that
1182 * individual entries can be overridden as needed.
1183 */
1184
1185static const struct hc_driver ohci_hc_driver = {
1186        .description =          hcd_name,
1187        .product_desc =         "OHCI Host Controller",
1188        .hcd_priv_size =        sizeof(struct ohci_hcd),
1189
1190        /*
1191         * generic hardware linkage
1192        */
1193        .irq =                  ohci_irq,
1194        .flags =                HCD_MEMORY | HCD_DMA | HCD_USB11,
1195
1196        /*
1197        * basic lifecycle operations
1198        */
1199        .reset =                ohci_setup,
1200        .start =                ohci_start,
1201        .stop =                 ohci_stop,
1202        .shutdown =             ohci_shutdown,
1203
1204        /*
1205         * managing i/o requests and associated device resources
1206        */
1207        .urb_enqueue =          ohci_urb_enqueue,
1208        .urb_dequeue =          ohci_urb_dequeue,
1209        .endpoint_disable =     ohci_endpoint_disable,
1210
1211        /*
1212        * scheduling support
1213        */
1214        .get_frame_number =     ohci_get_frame,
1215
1216        /*
1217        * root hub support
1218        */
1219        .hub_status_data =      ohci_hub_status_data,
1220        .hub_control =          ohci_hub_control,
1221#ifdef CONFIG_PM
1222        .bus_suspend =          ohci_bus_suspend,
1223        .bus_resume =           ohci_bus_resume,
1224#endif
1225        .start_port_reset =     ohci_start_port_reset,
1226};
1227
1228void ohci_init_driver(struct hc_driver *drv,
1229                const struct ohci_driver_overrides *over)
1230{
1231        /* Copy the generic table to drv and then apply the overrides */
1232        *drv = ohci_hc_driver;
1233
1234        if (over) {
1235                drv->product_desc = over->product_desc;
1236                drv->hcd_priv_size += over->extra_priv_size;
1237                if (over->reset)
1238                        drv->reset = over->reset;
1239        }
1240}
1241EXPORT_SYMBOL_GPL(ohci_init_driver);
1242
1243/*-------------------------------------------------------------------------*/
1244
1245MODULE_AUTHOR (DRIVER_AUTHOR);
1246MODULE_DESCRIPTION(DRIVER_DESC);
1247MODULE_LICENSE ("GPL");
1248
1249#if defined(CONFIG_ARCH_SA1100) && defined(CONFIG_SA1111)
1250#include "ohci-sa1111.c"
1251#define SA1111_DRIVER           ohci_hcd_sa1111_driver
1252#endif
1253
1254#ifdef CONFIG_USB_OHCI_HCD_PPC_OF
1255#include "ohci-ppc-of.c"
1256#define OF_PLATFORM_DRIVER      ohci_hcd_ppc_of_driver
1257#endif
1258
1259#ifdef CONFIG_PPC_PS3
1260#include "ohci-ps3.c"
1261#define PS3_SYSTEM_BUS_DRIVER   ps3_ohci_driver
1262#endif
1263
1264#ifdef CONFIG_MFD_SM501
1265#include "ohci-sm501.c"
1266#define SM501_OHCI_DRIVER       ohci_hcd_sm501_driver
1267#endif
1268
1269#ifdef CONFIG_MFD_TC6393XB
1270#include "ohci-tmio.c"
1271#define TMIO_OHCI_DRIVER        ohci_hcd_tmio_driver
1272#endif
1273
1274static int __init ohci_hcd_mod_init(void)
1275{
1276        int retval = 0;
1277
1278        if (usb_disabled())
1279                return -ENODEV;
1280
1281        printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1282        pr_debug ("%s: block sizes: ed %zd td %zd\n", hcd_name,
1283                sizeof (struct ed), sizeof (struct td));
1284        set_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1285
1286        ohci_debug_root = debugfs_create_dir("ohci", usb_debug_root);
1287
1288#ifdef PS3_SYSTEM_BUS_DRIVER
1289        retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1290        if (retval < 0)
1291                goto error_ps3;
1292#endif
1293
1294#ifdef OF_PLATFORM_DRIVER
1295        retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1296        if (retval < 0)
1297                goto error_of_platform;
1298#endif
1299
1300#ifdef SA1111_DRIVER
1301        retval = sa1111_driver_register(&SA1111_DRIVER);
1302        if (retval < 0)
1303                goto error_sa1111;
1304#endif
1305
1306#ifdef SM501_OHCI_DRIVER
1307        retval = platform_driver_register(&SM501_OHCI_DRIVER);
1308        if (retval < 0)
1309                goto error_sm501;
1310#endif
1311
1312#ifdef TMIO_OHCI_DRIVER
1313        retval = platform_driver_register(&TMIO_OHCI_DRIVER);
1314        if (retval < 0)
1315                goto error_tmio;
1316#endif
1317
1318        return retval;
1319
1320        /* Error path */
1321#ifdef TMIO_OHCI_DRIVER
1322        platform_driver_unregister(&TMIO_OHCI_DRIVER);
1323 error_tmio:
1324#endif
1325#ifdef SM501_OHCI_DRIVER
1326        platform_driver_unregister(&SM501_OHCI_DRIVER);
1327 error_sm501:
1328#endif
1329#ifdef SA1111_DRIVER
1330        sa1111_driver_unregister(&SA1111_DRIVER);
1331 error_sa1111:
1332#endif
1333#ifdef OF_PLATFORM_DRIVER
1334        platform_driver_unregister(&OF_PLATFORM_DRIVER);
1335 error_of_platform:
1336#endif
1337#ifdef PS3_SYSTEM_BUS_DRIVER
1338        ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1339 error_ps3:
1340#endif
1341        debugfs_remove(ohci_debug_root);
1342        ohci_debug_root = NULL;
1343
1344        clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1345        return retval;
1346}
1347module_init(ohci_hcd_mod_init);
1348
1349static void __exit ohci_hcd_mod_exit(void)
1350{
1351#ifdef TMIO_OHCI_DRIVER
1352        platform_driver_unregister(&TMIO_OHCI_DRIVER);
1353#endif
1354#ifdef SM501_OHCI_DRIVER
1355        platform_driver_unregister(&SM501_OHCI_DRIVER);
1356#endif
1357#ifdef SA1111_DRIVER
1358        sa1111_driver_unregister(&SA1111_DRIVER);
1359#endif
1360#ifdef OF_PLATFORM_DRIVER
1361        platform_driver_unregister(&OF_PLATFORM_DRIVER);
1362#endif
1363#ifdef PS3_SYSTEM_BUS_DRIVER
1364        ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1365#endif
1366        debugfs_remove(ohci_debug_root);
1367        clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1368}
1369module_exit(ohci_hcd_mod_exit);
1370
1371