linux/drivers/usb/host/oxu210hp-hcd.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (c) 2008 Rodolfo Giometti <giometti@linux.it>
   4 * Copyright (c) 2008 Eurotech S.p.A. <info@eurtech.it>
   5 *
   6 * This code is *strongly* based on EHCI-HCD code by David Brownell since
   7 * the chip is a quasi-EHCI compatible.
   8 */
   9
  10#include <linux/module.h>
  11#include <linux/pci.h>
  12#include <linux/dmapool.h>
  13#include <linux/kernel.h>
  14#include <linux/delay.h>
  15#include <linux/ioport.h>
  16#include <linux/sched.h>
  17#include <linux/slab.h>
  18#include <linux/errno.h>
  19#include <linux/timer.h>
  20#include <linux/list.h>
  21#include <linux/interrupt.h>
  22#include <linux/usb.h>
  23#include <linux/usb/hcd.h>
  24#include <linux/moduleparam.h>
  25#include <linux/dma-mapping.h>
  26#include <linux/io.h>
  27
  28#include <asm/irq.h>
  29#include <asm/unaligned.h>
  30
  31#include <linux/irq.h>
  32#include <linux/platform_device.h>
  33
  34#define DRIVER_VERSION "0.0.50"
  35
  36#define OXU_DEVICEID                    0x00
  37        #define OXU_REV_MASK            0xffff0000
  38        #define OXU_REV_SHIFT           16
  39        #define OXU_REV_2100            0x2100
  40        #define OXU_BO_SHIFT            8
  41        #define OXU_BO_MASK             (0x3 << OXU_BO_SHIFT)
  42        #define OXU_MAJ_REV_SHIFT       4
  43        #define OXU_MAJ_REV_MASK        (0xf << OXU_MAJ_REV_SHIFT)
  44        #define OXU_MIN_REV_SHIFT       0
  45        #define OXU_MIN_REV_MASK        (0xf << OXU_MIN_REV_SHIFT)
  46#define OXU_HOSTIFCONFIG                0x04
  47#define OXU_SOFTRESET                   0x08
  48        #define OXU_SRESET              (1 << 0)
  49
  50#define OXU_PIOBURSTREADCTRL            0x0C
  51
  52#define OXU_CHIPIRQSTATUS               0x10
  53#define OXU_CHIPIRQEN_SET               0x14
  54#define OXU_CHIPIRQEN_CLR               0x18
  55        #define OXU_USBSPHLPWUI         0x00000080
  56        #define OXU_USBOTGLPWUI         0x00000040
  57        #define OXU_USBSPHI             0x00000002
  58        #define OXU_USBOTGI             0x00000001
  59
  60#define OXU_CLKCTRL_SET                 0x1C
  61        #define OXU_SYSCLKEN            0x00000008
  62        #define OXU_USBSPHCLKEN         0x00000002
  63        #define OXU_USBOTGCLKEN         0x00000001
  64
  65#define OXU_ASO                         0x68
  66        #define OXU_SPHPOEN             0x00000100
  67        #define OXU_OVRCCURPUPDEN       0x00000800
  68        #define OXU_ASO_OP              (1 << 10)
  69        #define OXU_COMPARATOR          0x000004000
  70
  71#define OXU_USBMODE                     0x1A8
  72        #define OXU_VBPS                0x00000020
  73        #define OXU_ES_LITTLE           0x00000000
  74        #define OXU_CM_HOST_ONLY        0x00000003
  75
  76/*
  77 * Proper EHCI structs & defines
  78 */
  79
  80/* Magic numbers that can affect system performance */
  81#define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  82#define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  83#define EHCI_TUNE_RL_TT         0
  84#define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  85#define EHCI_TUNE_MULT_TT       1
  86#define EHCI_TUNE_FLS           2       /* (small) 256 frame schedule */
  87
  88struct oxu_hcd;
  89
  90/* EHCI register interface, corresponds to EHCI Revision 0.95 specification */
  91
  92/* Section 2.2 Host Controller Capability Registers */
  93struct ehci_caps {
  94        /* these fields are specified as 8 and 16 bit registers,
  95         * but some hosts can't perform 8 or 16 bit PCI accesses.
  96         */
  97        u32             hc_capbase;
  98#define HC_LENGTH(p)            (((p)>>00)&0x00ff)      /* bits 7:0 */
  99#define HC_VERSION(p)           (((p)>>16)&0xffff)      /* bits 31:16 */
 100        u32             hcs_params;     /* HCSPARAMS - offset 0x4 */
 101#define HCS_DEBUG_PORT(p)       (((p)>>20)&0xf) /* bits 23:20, debug port? */
 102#define HCS_INDICATOR(p)        ((p)&(1 << 16)) /* true: has port indicators */
 103#define HCS_N_CC(p)             (((p)>>12)&0xf) /* bits 15:12, #companion HCs */
 104#define HCS_N_PCC(p)            (((p)>>8)&0xf)  /* bits 11:8, ports per CC */
 105#define HCS_PORTROUTED(p)       ((p)&(1 << 7))  /* true: port routing */
 106#define HCS_PPC(p)              ((p)&(1 << 4))  /* true: port power control */
 107#define HCS_N_PORTS(p)          (((p)>>0)&0xf)  /* bits 3:0, ports on HC */
 108
 109        u32             hcc_params;      /* HCCPARAMS - offset 0x8 */
 110#define HCC_EXT_CAPS(p)         (((p)>>8)&0xff) /* for pci extended caps */
 111#define HCC_ISOC_CACHE(p)       ((p)&(1 << 7))  /* true: can cache isoc frame */
 112#define HCC_ISOC_THRES(p)       (((p)>>4)&0x7)  /* bits 6:4, uframes cached */
 113#define HCC_CANPARK(p)          ((p)&(1 << 2))  /* true: can park on async qh */
 114#define HCC_PGM_FRAMELISTLEN(p) ((p)&(1 << 1))  /* true: periodic_size changes*/
 115#define HCC_64BIT_ADDR(p)       ((p)&(1))       /* true: can use 64-bit addr */
 116        u8              portroute[8];    /* nibbles for routing - offset 0xC */
 117} __packed;
 118
 119
 120/* Section 2.3 Host Controller Operational Registers */
 121struct ehci_regs {
 122        /* USBCMD: offset 0x00 */
 123        u32             command;
 124/* 23:16 is r/w intr rate, in microframes; default "8" == 1/msec */
 125#define CMD_PARK        (1<<11)         /* enable "park" on async qh */
 126#define CMD_PARK_CNT(c) (((c)>>8)&3)    /* how many transfers to park for */
 127#define CMD_LRESET      (1<<7)          /* partial reset (no ports, etc) */
 128#define CMD_IAAD        (1<<6)          /* "doorbell" interrupt async advance */
 129#define CMD_ASE         (1<<5)          /* async schedule enable */
 130#define CMD_PSE         (1<<4)          /* periodic schedule enable */
 131/* 3:2 is periodic frame list size */
 132#define CMD_RESET       (1<<1)          /* reset HC not bus */
 133#define CMD_RUN         (1<<0)          /* start/stop HC */
 134
 135        /* USBSTS: offset 0x04 */
 136        u32             status;
 137#define STS_ASS         (1<<15)         /* Async Schedule Status */
 138#define STS_PSS         (1<<14)         /* Periodic Schedule Status */
 139#define STS_RECL        (1<<13)         /* Reclamation */
 140#define STS_HALT        (1<<12)         /* Not running (any reason) */
 141/* some bits reserved */
 142        /* these STS_* flags are also intr_enable bits (USBINTR) */
 143#define STS_IAA         (1<<5)          /* Interrupted on async advance */
 144#define STS_FATAL       (1<<4)          /* such as some PCI access errors */
 145#define STS_FLR         (1<<3)          /* frame list rolled over */
 146#define STS_PCD         (1<<2)          /* port change detect */
 147#define STS_ERR         (1<<1)          /* "error" completion (overflow, ...) */
 148#define STS_INT         (1<<0)          /* "normal" completion (short, ...) */
 149
 150#define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 151
 152        /* USBINTR: offset 0x08 */
 153        u32             intr_enable;
 154
 155        /* FRINDEX: offset 0x0C */
 156        u32             frame_index;    /* current microframe number */
 157        /* CTRLDSSEGMENT: offset 0x10 */
 158        u32             segment;        /* address bits 63:32 if needed */
 159        /* PERIODICLISTBASE: offset 0x14 */
 160        u32             frame_list;     /* points to periodic list */
 161        /* ASYNCLISTADDR: offset 0x18 */
 162        u32             async_next;     /* address of next async queue head */
 163
 164        u32             reserved[9];
 165
 166        /* CONFIGFLAG: offset 0x40 */
 167        u32             configured_flag;
 168#define FLAG_CF         (1<<0)          /* true: we'll support "high speed" */
 169
 170        /* PORTSC: offset 0x44 */
 171        u32             port_status[0]; /* up to N_PORTS */
 172/* 31:23 reserved */
 173#define PORT_WKOC_E     (1<<22)         /* wake on overcurrent (enable) */
 174#define PORT_WKDISC_E   (1<<21)         /* wake on disconnect (enable) */
 175#define PORT_WKCONN_E   (1<<20)         /* wake on connect (enable) */
 176/* 19:16 for port testing */
 177#define PORT_LED_OFF    (0<<14)
 178#define PORT_LED_AMBER  (1<<14)
 179#define PORT_LED_GREEN  (2<<14)
 180#define PORT_LED_MASK   (3<<14)
 181#define PORT_OWNER      (1<<13)         /* true: companion hc owns this port */
 182#define PORT_POWER      (1<<12)         /* true: has power (see PPC) */
 183#define PORT_USB11(x) (((x)&(3<<10)) == (1<<10))        /* USB 1.1 device */
 184/* 11:10 for detecting lowspeed devices (reset vs release ownership) */
 185/* 9 reserved */
 186#define PORT_RESET      (1<<8)          /* reset port */
 187#define PORT_SUSPEND    (1<<7)          /* suspend port */
 188#define PORT_RESUME     (1<<6)          /* resume it */
 189#define PORT_OCC        (1<<5)          /* over current change */
 190#define PORT_OC         (1<<4)          /* over current active */
 191#define PORT_PEC        (1<<3)          /* port enable change */
 192#define PORT_PE         (1<<2)          /* port enable */
 193#define PORT_CSC        (1<<1)          /* connect status change */
 194#define PORT_CONNECT    (1<<0)          /* device connected */
 195#define PORT_RWC_BITS   (PORT_CSC | PORT_PEC | PORT_OCC)
 196} __packed;
 197
 198/* Appendix C, Debug port ... intended for use with special "debug devices"
 199 * that can help if there's no serial console.  (nonstandard enumeration.)
 200 */
 201struct ehci_dbg_port {
 202        u32     control;
 203#define DBGP_OWNER      (1<<30)
 204#define DBGP_ENABLED    (1<<28)
 205#define DBGP_DONE       (1<<16)
 206#define DBGP_INUSE      (1<<10)
 207#define DBGP_ERRCODE(x) (((x)>>7)&0x07)
 208#       define DBGP_ERR_BAD     1
 209#       define DBGP_ERR_SIGNAL  2
 210#define DBGP_ERROR      (1<<6)
 211#define DBGP_GO         (1<<5)
 212#define DBGP_OUT        (1<<4)
 213#define DBGP_LEN(x)     (((x)>>0)&0x0f)
 214        u32     pids;
 215#define DBGP_PID_GET(x)         (((x)>>16)&0xff)
 216#define DBGP_PID_SET(data, tok) (((data)<<8)|(tok))
 217        u32     data03;
 218        u32     data47;
 219        u32     address;
 220#define DBGP_EPADDR(dev, ep)    (((dev)<<8)|(ep))
 221} __packed;
 222
 223#define QTD_NEXT(dma)   cpu_to_le32((u32)dma)
 224
 225/*
 226 * EHCI Specification 0.95 Section 3.5
 227 * QTD: describe data transfer components (buffer, direction, ...)
 228 * See Fig 3-6 "Queue Element Transfer Descriptor Block Diagram".
 229 *
 230 * These are associated only with "QH" (Queue Head) structures,
 231 * used with control, bulk, and interrupt transfers.
 232 */
 233struct ehci_qtd {
 234        /* first part defined by EHCI spec */
 235        __le32                  hw_next;                /* see EHCI 3.5.1 */
 236        __le32                  hw_alt_next;            /* see EHCI 3.5.2 */
 237        __le32                  hw_token;               /* see EHCI 3.5.3 */
 238#define QTD_TOGGLE      (1 << 31)       /* data toggle */
 239#define QTD_LENGTH(tok) (((tok)>>16) & 0x7fff)
 240#define QTD_IOC         (1 << 15)       /* interrupt on complete */
 241#define QTD_CERR(tok)   (((tok)>>10) & 0x3)
 242#define QTD_PID(tok)    (((tok)>>8) & 0x3)
 243#define QTD_STS_ACTIVE  (1 << 7)        /* HC may execute this */
 244#define QTD_STS_HALT    (1 << 6)        /* halted on error */
 245#define QTD_STS_DBE     (1 << 5)        /* data buffer error (in HC) */
 246#define QTD_STS_BABBLE  (1 << 4)        /* device was babbling (qtd halted) */
 247#define QTD_STS_XACT    (1 << 3)        /* device gave illegal response */
 248#define QTD_STS_MMF     (1 << 2)        /* incomplete split transaction */
 249#define QTD_STS_STS     (1 << 1)        /* split transaction state */
 250#define QTD_STS_PING    (1 << 0)        /* issue PING? */
 251        __le32                  hw_buf[5];              /* see EHCI 3.5.4 */
 252        __le32                  hw_buf_hi[5];           /* Appendix B */
 253
 254        /* the rest is HCD-private */
 255        dma_addr_t              qtd_dma;                /* qtd address */
 256        struct list_head        qtd_list;               /* sw qtd list */
 257        struct urb              *urb;                   /* qtd's urb */
 258        size_t                  length;                 /* length of buffer */
 259
 260        u32                     qtd_buffer_len;
 261        void                    *buffer;
 262        dma_addr_t              buffer_dma;
 263        void                    *transfer_buffer;
 264        void                    *transfer_dma;
 265} __aligned(32);
 266
 267/* mask NakCnt+T in qh->hw_alt_next */
 268#define QTD_MASK cpu_to_le32 (~0x1f)
 269
 270#define IS_SHORT_READ(token) (QTD_LENGTH(token) != 0 && QTD_PID(token) == 1)
 271
 272/* Type tag from {qh, itd, sitd, fstn}->hw_next */
 273#define Q_NEXT_TYPE(dma) ((dma) & cpu_to_le32 (3 << 1))
 274
 275/* values for that type tag */
 276#define Q_TYPE_QH       cpu_to_le32 (1 << 1)
 277
 278/* next async queue entry, or pointer to interrupt/periodic QH */
 279#define QH_NEXT(dma)    (cpu_to_le32(((u32)dma)&~0x01f)|Q_TYPE_QH)
 280
 281/* for periodic/async schedules and qtd lists, mark end of list */
 282#define EHCI_LIST_END   cpu_to_le32(1) /* "null pointer" to hw */
 283
 284/*
 285 * Entries in periodic shadow table are pointers to one of four kinds
 286 * of data structure.  That's dictated by the hardware; a type tag is
 287 * encoded in the low bits of the hardware's periodic schedule.  Use
 288 * Q_NEXT_TYPE to get the tag.
 289 *
 290 * For entries in the async schedule, the type tag always says "qh".
 291 */
 292union ehci_shadow {
 293        struct ehci_qh          *qh;            /* Q_TYPE_QH */
 294        __le32                  *hw_next;       /* (all types) */
 295        void                    *ptr;
 296};
 297
 298/*
 299 * EHCI Specification 0.95 Section 3.6
 300 * QH: describes control/bulk/interrupt endpoints
 301 * See Fig 3-7 "Queue Head Structure Layout".
 302 *
 303 * These appear in both the async and (for interrupt) periodic schedules.
 304 */
 305
 306struct ehci_qh {
 307        /* first part defined by EHCI spec */
 308        __le32                  hw_next;         /* see EHCI 3.6.1 */
 309        __le32                  hw_info1;       /* see EHCI 3.6.2 */
 310#define QH_HEAD         0x00008000
 311        __le32                  hw_info2;       /* see EHCI 3.6.2 */
 312#define QH_SMASK        0x000000ff
 313#define QH_CMASK        0x0000ff00
 314#define QH_HUBADDR      0x007f0000
 315#define QH_HUBPORT      0x3f800000
 316#define QH_MULT         0xc0000000
 317        __le32                  hw_current;      /* qtd list - see EHCI 3.6.4 */
 318
 319        /* qtd overlay (hardware parts of a struct ehci_qtd) */
 320        __le32                  hw_qtd_next;
 321        __le32                  hw_alt_next;
 322        __le32                  hw_token;
 323        __le32                  hw_buf[5];
 324        __le32                  hw_buf_hi[5];
 325
 326        /* the rest is HCD-private */
 327        dma_addr_t              qh_dma;         /* address of qh */
 328        union ehci_shadow       qh_next;        /* ptr to qh; or periodic */
 329        struct list_head        qtd_list;       /* sw qtd list */
 330        struct ehci_qtd         *dummy;
 331        struct ehci_qh          *reclaim;       /* next to reclaim */
 332
 333        struct oxu_hcd          *oxu;
 334        struct kref             kref;
 335        unsigned int            stamp;
 336
 337        u8                      qh_state;
 338#define QH_STATE_LINKED         1               /* HC sees this */
 339#define QH_STATE_UNLINK         2               /* HC may still see this */
 340#define QH_STATE_IDLE           3               /* HC doesn't see this */
 341#define QH_STATE_UNLINK_WAIT    4               /* LINKED and on reclaim q */
 342#define QH_STATE_COMPLETING     5               /* don't touch token.HALT */
 343
 344        /* periodic schedule info */
 345        u8                      usecs;          /* intr bandwidth */
 346        u8                      gap_uf;         /* uframes split/csplit gap */
 347        u8                      c_usecs;        /* ... split completion bw */
 348        u16                     tt_usecs;       /* tt downstream bandwidth */
 349        unsigned short          period;         /* polling interval */
 350        unsigned short          start;          /* where polling starts */
 351#define NO_FRAME ((unsigned short)~0)                   /* pick new start */
 352        struct usb_device       *dev;           /* access to TT */
 353} __aligned(32);
 354
 355/*
 356 * Proper OXU210HP structs
 357 */
 358
 359#define OXU_OTG_CORE_OFFSET     0x00400
 360#define OXU_OTG_CAP_OFFSET      (OXU_OTG_CORE_OFFSET + 0x100)
 361#define OXU_SPH_CORE_OFFSET     0x00800
 362#define OXU_SPH_CAP_OFFSET      (OXU_SPH_CORE_OFFSET + 0x100)
 363
 364#define OXU_OTG_MEM             0xE000
 365#define OXU_SPH_MEM             0x16000
 366
 367/* Only how many elements & element structure are specifies here. */
 368/* 2 host controllers are enabled - total size <= 28 kbytes */
 369#define DEFAULT_I_TDPS          1024
 370#define QHEAD_NUM               16
 371#define QTD_NUM                 32
 372#define SITD_NUM                8
 373#define MURB_NUM                8
 374
 375#define BUFFER_NUM              8
 376#define BUFFER_SIZE             512
 377
 378struct oxu_info {
 379        struct usb_hcd *hcd[2];
 380};
 381
 382struct oxu_buf {
 383        u8                      buffer[BUFFER_SIZE];
 384} __aligned(BUFFER_SIZE);
 385
 386struct oxu_onchip_mem {
 387        struct oxu_buf          db_pool[BUFFER_NUM];
 388
 389        u32                     frame_list[DEFAULT_I_TDPS];
 390        struct ehci_qh          qh_pool[QHEAD_NUM];
 391        struct ehci_qtd         qtd_pool[QTD_NUM];
 392} __aligned(4 << 10);
 393
 394#define EHCI_MAX_ROOT_PORTS     15              /* see HCS_N_PORTS */
 395
 396struct oxu_murb {
 397        struct urb              urb;
 398        struct urb              *main;
 399        u8                      last;
 400};
 401
 402struct oxu_hcd {                                /* one per controller */
 403        unsigned int            is_otg:1;
 404
 405        u8                      qh_used[QHEAD_NUM];
 406        u8                      qtd_used[QTD_NUM];
 407        u8                      db_used[BUFFER_NUM];
 408        u8                      murb_used[MURB_NUM];
 409
 410        struct oxu_onchip_mem   __iomem *mem;
 411        spinlock_t              mem_lock;
 412
 413        struct timer_list       urb_timer;
 414
 415        struct ehci_caps __iomem *caps;
 416        struct ehci_regs __iomem *regs;
 417
 418        u32                     hcs_params;     /* cached register copy */
 419        spinlock_t              lock;
 420
 421        /* async schedule support */
 422        struct ehci_qh          *async;
 423        struct ehci_qh          *reclaim;
 424        unsigned int            reclaim_ready:1;
 425        unsigned int            scanning:1;
 426
 427        /* periodic schedule support */
 428        unsigned int            periodic_size;
 429        __le32                  *periodic;      /* hw periodic table */
 430        dma_addr_t              periodic_dma;
 431        unsigned int            i_thresh;       /* uframes HC might cache */
 432
 433        union ehci_shadow       *pshadow;       /* mirror hw periodic table */
 434        int                     next_uframe;    /* scan periodic, start here */
 435        unsigned int            periodic_sched; /* periodic activity count */
 436
 437        /* per root hub port */
 438        unsigned long           reset_done[EHCI_MAX_ROOT_PORTS];
 439        /* bit vectors (one bit per port) */
 440        unsigned long           bus_suspended;  /* which ports were
 441                                                 * already suspended at the
 442                                                 * start of a bus suspend
 443                                                 */
 444        unsigned long           companion_ports;/* which ports are dedicated
 445                                                 * to the companion controller
 446                                                 */
 447
 448        struct timer_list       watchdog;
 449        unsigned long           actions;
 450        unsigned int            stamp;
 451        unsigned long           next_statechange;
 452        u32                     command;
 453
 454        /* SILICON QUIRKS */
 455        struct list_head        urb_list;       /* this is the head to urb
 456                                                 * queue that didn't get enough
 457                                                 * resources
 458                                                 */
 459        struct oxu_murb         *murb_pool;     /* murb per split big urb */
 460        unsigned int            urb_len;
 461
 462        u8                      sbrn;           /* packed release number */
 463};
 464
 465#define EHCI_IAA_JIFFIES        (HZ/100)        /* arbitrary; ~10 msec */
 466#define EHCI_IO_JIFFIES         (HZ/10)         /* io watchdog > irq_thresh */
 467#define EHCI_ASYNC_JIFFIES      (HZ/20)         /* async idle timeout */
 468#define EHCI_SHRINK_JIFFIES     (HZ/200)        /* async qh unlink delay */
 469
 470enum ehci_timer_action {
 471        TIMER_IO_WATCHDOG,
 472        TIMER_IAA_WATCHDOG,
 473        TIMER_ASYNC_SHRINK,
 474        TIMER_ASYNC_OFF,
 475};
 476
 477/*
 478 * Main defines
 479 */
 480
 481#define oxu_dbg(oxu, fmt, args...) \
 482                dev_dbg(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
 483#define oxu_err(oxu, fmt, args...) \
 484                dev_err(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
 485#define oxu_info(oxu, fmt, args...) \
 486                dev_info(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
 487
 488#ifdef CONFIG_DYNAMIC_DEBUG
 489#define DEBUG
 490#endif
 491
 492static inline struct usb_hcd *oxu_to_hcd(struct oxu_hcd *oxu)
 493{
 494        return container_of((void *) oxu, struct usb_hcd, hcd_priv);
 495}
 496
 497static inline struct oxu_hcd *hcd_to_oxu(struct usb_hcd *hcd)
 498{
 499        return (struct oxu_hcd *) (hcd->hcd_priv);
 500}
 501
 502/*
 503 * Debug stuff
 504 */
 505
 506#undef OXU_URB_TRACE
 507#undef OXU_VERBOSE_DEBUG
 508
 509#ifdef OXU_VERBOSE_DEBUG
 510#define oxu_vdbg                        oxu_dbg
 511#else
 512#define oxu_vdbg(oxu, fmt, args...)     /* Nop */
 513#endif
 514
 515#ifdef DEBUG
 516
 517static int __attribute__((__unused__))
 518dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
 519{
 520        return scnprintf(buf, len, "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
 521                label, label[0] ? " " : "", status,
 522                (status & STS_ASS) ? " Async" : "",
 523                (status & STS_PSS) ? " Periodic" : "",
 524                (status & STS_RECL) ? " Recl" : "",
 525                (status & STS_HALT) ? " Halt" : "",
 526                (status & STS_IAA) ? " IAA" : "",
 527                (status & STS_FATAL) ? " FATAL" : "",
 528                (status & STS_FLR) ? " FLR" : "",
 529                (status & STS_PCD) ? " PCD" : "",
 530                (status & STS_ERR) ? " ERR" : "",
 531                (status & STS_INT) ? " INT" : ""
 532                );
 533}
 534
 535static int __attribute__((__unused__))
 536dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
 537{
 538        return scnprintf(buf, len, "%s%sintrenable %02x%s%s%s%s%s%s",
 539                label, label[0] ? " " : "", enable,
 540                (enable & STS_IAA) ? " IAA" : "",
 541                (enable & STS_FATAL) ? " FATAL" : "",
 542                (enable & STS_FLR) ? " FLR" : "",
 543                (enable & STS_PCD) ? " PCD" : "",
 544                (enable & STS_ERR) ? " ERR" : "",
 545                (enable & STS_INT) ? " INT" : ""
 546                );
 547}
 548
 549static const char *const fls_strings[] =
 550    { "1024", "512", "256", "??" };
 551
 552static int dbg_command_buf(char *buf, unsigned len,
 553                                const char *label, u32 command)
 554{
 555        return scnprintf(buf, len,
 556                "%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
 557                label, label[0] ? " " : "", command,
 558                (command & CMD_PARK) ? "park" : "(park)",
 559                CMD_PARK_CNT(command),
 560                (command >> 16) & 0x3f,
 561                (command & CMD_LRESET) ? " LReset" : "",
 562                (command & CMD_IAAD) ? " IAAD" : "",
 563                (command & CMD_ASE) ? " Async" : "",
 564                (command & CMD_PSE) ? " Periodic" : "",
 565                fls_strings[(command >> 2) & 0x3],
 566                (command & CMD_RESET) ? " Reset" : "",
 567                (command & CMD_RUN) ? "RUN" : "HALT"
 568                );
 569}
 570
 571static int dbg_port_buf(char *buf, unsigned len, const char *label,
 572                                int port, u32 status)
 573{
 574        char    *sig;
 575
 576        /* signaling state */
 577        switch (status & (3 << 10)) {
 578        case 0 << 10:
 579                sig = "se0";
 580                break;
 581        case 1 << 10:
 582                sig = "k";      /* low speed */
 583                break;
 584        case 2 << 10:
 585                sig = "j";
 586                break;
 587        default:
 588                sig = "?";
 589                break;
 590        }
 591
 592        return scnprintf(buf, len,
 593                "%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
 594                label, label[0] ? " " : "", port, status,
 595                (status & PORT_POWER) ? " POWER" : "",
 596                (status & PORT_OWNER) ? " OWNER" : "",
 597                sig,
 598                (status & PORT_RESET) ? " RESET" : "",
 599                (status & PORT_SUSPEND) ? " SUSPEND" : "",
 600                (status & PORT_RESUME) ? " RESUME" : "",
 601                (status & PORT_OCC) ? " OCC" : "",
 602                (status & PORT_OC) ? " OC" : "",
 603                (status & PORT_PEC) ? " PEC" : "",
 604                (status & PORT_PE) ? " PE" : "",
 605                (status & PORT_CSC) ? " CSC" : "",
 606                (status & PORT_CONNECT) ? " CONNECT" : ""
 607            );
 608}
 609
 610#else
 611
 612static inline int __attribute__((__unused__))
 613dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
 614{ return 0; }
 615
 616static inline int __attribute__((__unused__))
 617dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
 618{ return 0; }
 619
 620static inline int __attribute__((__unused__))
 621dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
 622{ return 0; }
 623
 624static inline int __attribute__((__unused__))
 625dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
 626{ return 0; }
 627
 628#endif /* DEBUG */
 629
 630/* functions have the "wrong" filename when they're output... */
 631#define dbg_status(oxu, label, status) { \
 632        char _buf[80]; \
 633        dbg_status_buf(_buf, sizeof _buf, label, status); \
 634        oxu_dbg(oxu, "%s\n", _buf); \
 635}
 636
 637#define dbg_cmd(oxu, label, command) { \
 638        char _buf[80]; \
 639        dbg_command_buf(_buf, sizeof _buf, label, command); \
 640        oxu_dbg(oxu, "%s\n", _buf); \
 641}
 642
 643#define dbg_port(oxu, label, port, status) { \
 644        char _buf[80]; \
 645        dbg_port_buf(_buf, sizeof _buf, label, port, status); \
 646        oxu_dbg(oxu, "%s\n", _buf); \
 647}
 648
 649/*
 650 * Module parameters
 651 */
 652
 653/* Initial IRQ latency: faster than hw default */
 654static int log2_irq_thresh;                     /* 0 to 6 */
 655module_param(log2_irq_thresh, int, S_IRUGO);
 656MODULE_PARM_DESC(log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
 657
 658/* Initial park setting: slower than hw default */
 659static unsigned park;
 660module_param(park, uint, S_IRUGO);
 661MODULE_PARM_DESC(park, "park setting; 1-3 back-to-back async packets");
 662
 663/* For flakey hardware, ignore overcurrent indicators */
 664static bool ignore_oc;
 665module_param(ignore_oc, bool, S_IRUGO);
 666MODULE_PARM_DESC(ignore_oc, "ignore bogus hardware overcurrent indications");
 667
 668
 669static void ehci_work(struct oxu_hcd *oxu);
 670static int oxu_hub_control(struct usb_hcd *hcd,
 671                                u16 typeReq, u16 wValue, u16 wIndex,
 672                                char *buf, u16 wLength);
 673
 674/*
 675 * Local functions
 676 */
 677
 678/* Low level read/write registers functions */
 679static inline u32 oxu_readl(void *base, u32 reg)
 680{
 681        return readl(base + reg);
 682}
 683
 684static inline void oxu_writel(void *base, u32 reg, u32 val)
 685{
 686        writel(val, base + reg);
 687}
 688
 689static inline void timer_action_done(struct oxu_hcd *oxu,
 690                                        enum ehci_timer_action action)
 691{
 692        clear_bit(action, &oxu->actions);
 693}
 694
 695static inline void timer_action(struct oxu_hcd *oxu,
 696                                        enum ehci_timer_action action)
 697{
 698        if (!test_and_set_bit(action, &oxu->actions)) {
 699                unsigned long t;
 700
 701                switch (action) {
 702                case TIMER_IAA_WATCHDOG:
 703                        t = EHCI_IAA_JIFFIES;
 704                        break;
 705                case TIMER_IO_WATCHDOG:
 706                        t = EHCI_IO_JIFFIES;
 707                        break;
 708                case TIMER_ASYNC_OFF:
 709                        t = EHCI_ASYNC_JIFFIES;
 710                        break;
 711                case TIMER_ASYNC_SHRINK:
 712                default:
 713                        t = EHCI_SHRINK_JIFFIES;
 714                        break;
 715                }
 716                t += jiffies;
 717                /* all timings except IAA watchdog can be overridden.
 718                 * async queue SHRINK often precedes IAA.  while it's ready
 719                 * to go OFF neither can matter, and afterwards the IO
 720                 * watchdog stops unless there's still periodic traffic.
 721                 */
 722                if (action != TIMER_IAA_WATCHDOG
 723                                && t > oxu->watchdog.expires
 724                                && timer_pending(&oxu->watchdog))
 725                        return;
 726                mod_timer(&oxu->watchdog, t);
 727        }
 728}
 729
 730/*
 731 * handshake - spin reading hc until handshake completes or fails
 732 * @ptr: address of hc register to be read
 733 * @mask: bits to look at in result of read
 734 * @done: value of those bits when handshake succeeds
 735 * @usec: timeout in microseconds
 736 *
 737 * Returns negative errno, or zero on success
 738 *
 739 * Success happens when the "mask" bits have the specified value (hardware
 740 * handshake done).  There are two failure modes:  "usec" have passed (major
 741 * hardware flakeout), or the register reads as all-ones (hardware removed).
 742 *
 743 * That last failure should_only happen in cases like physical cardbus eject
 744 * before driver shutdown. But it also seems to be caused by bugs in cardbus
 745 * bridge shutdown:  shutting down the bridge before the devices using it.
 746 */
 747static int handshake(struct oxu_hcd *oxu, void __iomem *ptr,
 748                                        u32 mask, u32 done, int usec)
 749{
 750        u32 result;
 751
 752        do {
 753                result = readl(ptr);
 754                if (result == ~(u32)0)          /* card removed */
 755                        return -ENODEV;
 756                result &= mask;
 757                if (result == done)
 758                        return 0;
 759                udelay(1);
 760                usec--;
 761        } while (usec > 0);
 762        return -ETIMEDOUT;
 763}
 764
 765/* Force HC to halt state from unknown (EHCI spec section 2.3) */
 766static int ehci_halt(struct oxu_hcd *oxu)
 767{
 768        u32     temp = readl(&oxu->regs->status);
 769
 770        /* disable any irqs left enabled by previous code */
 771        writel(0, &oxu->regs->intr_enable);
 772
 773        if ((temp & STS_HALT) != 0)
 774                return 0;
 775
 776        temp = readl(&oxu->regs->command);
 777        temp &= ~CMD_RUN;
 778        writel(temp, &oxu->regs->command);
 779        return handshake(oxu, &oxu->regs->status,
 780                          STS_HALT, STS_HALT, 16 * 125);
 781}
 782
 783/* Put TDI/ARC silicon into EHCI mode */
 784static void tdi_reset(struct oxu_hcd *oxu)
 785{
 786        u32 __iomem *reg_ptr;
 787        u32 tmp;
 788
 789        reg_ptr = (u32 __iomem *)(((u8 __iomem *)oxu->regs) + 0x68);
 790        tmp = readl(reg_ptr);
 791        tmp |= 0x3;
 792        writel(tmp, reg_ptr);
 793}
 794
 795/* Reset a non-running (STS_HALT == 1) controller */
 796static int ehci_reset(struct oxu_hcd *oxu)
 797{
 798        int     retval;
 799        u32     command = readl(&oxu->regs->command);
 800
 801        command |= CMD_RESET;
 802        dbg_cmd(oxu, "reset", command);
 803        writel(command, &oxu->regs->command);
 804        oxu_to_hcd(oxu)->state = HC_STATE_HALT;
 805        oxu->next_statechange = jiffies;
 806        retval = handshake(oxu, &oxu->regs->command,
 807                            CMD_RESET, 0, 250 * 1000);
 808
 809        if (retval)
 810                return retval;
 811
 812        tdi_reset(oxu);
 813
 814        return retval;
 815}
 816
 817/* Idle the controller (from running) */
 818static void ehci_quiesce(struct oxu_hcd *oxu)
 819{
 820        u32     temp;
 821
 822#ifdef DEBUG
 823        BUG_ON(!HC_IS_RUNNING(oxu_to_hcd(oxu)->state));
 824#endif
 825
 826        /* wait for any schedule enables/disables to take effect */
 827        temp = readl(&oxu->regs->command) << 10;
 828        temp &= STS_ASS | STS_PSS;
 829        if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
 830                                temp, 16 * 125) != 0) {
 831                oxu_to_hcd(oxu)->state = HC_STATE_HALT;
 832                return;
 833        }
 834
 835        /* then disable anything that's still active */
 836        temp = readl(&oxu->regs->command);
 837        temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
 838        writel(temp, &oxu->regs->command);
 839
 840        /* hardware can take 16 microframes to turn off ... */
 841        if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
 842                                0, 16 * 125) != 0) {
 843                oxu_to_hcd(oxu)->state = HC_STATE_HALT;
 844                return;
 845        }
 846}
 847
 848static int check_reset_complete(struct oxu_hcd *oxu, int index,
 849                                u32 __iomem *status_reg, int port_status)
 850{
 851        if (!(port_status & PORT_CONNECT)) {
 852                oxu->reset_done[index] = 0;
 853                return port_status;
 854        }
 855
 856        /* if reset finished and it's still not enabled -- handoff */
 857        if (!(port_status & PORT_PE)) {
 858                oxu_dbg(oxu, "Failed to enable port %d on root hub TT\n",
 859                                index+1);
 860                return port_status;
 861        } else
 862                oxu_dbg(oxu, "port %d high speed\n", index + 1);
 863
 864        return port_status;
 865}
 866
 867static void ehci_hub_descriptor(struct oxu_hcd *oxu,
 868                                struct usb_hub_descriptor *desc)
 869{
 870        int ports = HCS_N_PORTS(oxu->hcs_params);
 871        u16 temp;
 872
 873        desc->bDescriptorType = USB_DT_HUB;
 874        desc->bPwrOn2PwrGood = 10;      /* oxu 1.0, 2.3.9 says 20ms max */
 875        desc->bHubContrCurrent = 0;
 876
 877        desc->bNbrPorts = ports;
 878        temp = 1 + (ports / 8);
 879        desc->bDescLength = 7 + 2 * temp;
 880
 881        /* ports removable, and usb 1.0 legacy PortPwrCtrlMask */
 882        memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
 883        memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
 884
 885        temp = HUB_CHAR_INDV_PORT_OCPM; /* per-port overcurrent reporting */
 886        if (HCS_PPC(oxu->hcs_params))
 887                temp |= HUB_CHAR_INDV_PORT_LPSM; /* per-port power control */
 888        else
 889                temp |= HUB_CHAR_NO_LPSM; /* no power switching */
 890        desc->wHubCharacteristics = (__force __u16)cpu_to_le16(temp);
 891}
 892
 893
 894/* Allocate an OXU210HP on-chip memory data buffer
 895 *
 896 * An on-chip memory data buffer is required for each OXU210HP USB transfer.
 897 * Each transfer descriptor has one or more on-chip memory data buffers.
 898 *
 899 * Data buffers are allocated from a fix sized pool of data blocks.
 900 * To minimise fragmentation and give reasonable memory utlisation,
 901 * data buffers are allocated with sizes the power of 2 multiples of
 902 * the block size, starting on an address a multiple of the allocated size.
 903 *
 904 * FIXME: callers of this function require a buffer to be allocated for
 905 * len=0. This is a waste of on-chip memory and should be fix. Then this
 906 * function should be changed to not allocate a buffer for len=0.
 907 */
 908static int oxu_buf_alloc(struct oxu_hcd *oxu, struct ehci_qtd *qtd, int len)
 909{
 910        int n_blocks;   /* minium blocks needed to hold len */
 911        int a_blocks;   /* blocks allocated */
 912        int i, j;
 913
 914        /* Don't allocte bigger than supported */
 915        if (len > BUFFER_SIZE * BUFFER_NUM) {
 916                oxu_err(oxu, "buffer too big (%d)\n", len);
 917                return -ENOMEM;
 918        }
 919
 920        spin_lock(&oxu->mem_lock);
 921
 922        /* Number of blocks needed to hold len */
 923        n_blocks = (len + BUFFER_SIZE - 1) / BUFFER_SIZE;
 924
 925        /* Round the number of blocks up to the power of 2 */
 926        for (a_blocks = 1; a_blocks < n_blocks; a_blocks <<= 1)
 927                ;
 928
 929        /* Find a suitable available data buffer */
 930        for (i = 0; i < BUFFER_NUM;
 931                        i += max(a_blocks, (int)oxu->db_used[i])) {
 932
 933                /* Check all the required blocks are available */
 934                for (j = 0; j < a_blocks; j++)
 935                        if (oxu->db_used[i + j])
 936                                break;
 937
 938                if (j != a_blocks)
 939                        continue;
 940
 941                /* Allocate blocks found! */
 942                qtd->buffer = (void *) &oxu->mem->db_pool[i];
 943                qtd->buffer_dma = virt_to_phys(qtd->buffer);
 944
 945                qtd->qtd_buffer_len = BUFFER_SIZE * a_blocks;
 946                oxu->db_used[i] = a_blocks;
 947
 948                spin_unlock(&oxu->mem_lock);
 949
 950                return 0;
 951        }
 952
 953        /* Failed */
 954
 955        spin_unlock(&oxu->mem_lock);
 956
 957        return -ENOMEM;
 958}
 959
 960static void oxu_buf_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
 961{
 962        int index;
 963
 964        spin_lock(&oxu->mem_lock);
 965
 966        index = (qtd->buffer - (void *) &oxu->mem->db_pool[0])
 967                                                         / BUFFER_SIZE;
 968        oxu->db_used[index] = 0;
 969        qtd->qtd_buffer_len = 0;
 970        qtd->buffer_dma = 0;
 971        qtd->buffer = NULL;
 972
 973        spin_unlock(&oxu->mem_lock);
 974}
 975
 976static inline void ehci_qtd_init(struct ehci_qtd *qtd, dma_addr_t dma)
 977{
 978        memset(qtd, 0, sizeof *qtd);
 979        qtd->qtd_dma = dma;
 980        qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
 981        qtd->hw_next = EHCI_LIST_END;
 982        qtd->hw_alt_next = EHCI_LIST_END;
 983        INIT_LIST_HEAD(&qtd->qtd_list);
 984}
 985
 986static inline void oxu_qtd_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
 987{
 988        int index;
 989
 990        if (qtd->buffer)
 991                oxu_buf_free(oxu, qtd);
 992
 993        spin_lock(&oxu->mem_lock);
 994
 995        index = qtd - &oxu->mem->qtd_pool[0];
 996        oxu->qtd_used[index] = 0;
 997
 998        spin_unlock(&oxu->mem_lock);
 999}
1000
1001static struct ehci_qtd *ehci_qtd_alloc(struct oxu_hcd *oxu)
1002{
1003        int i;
1004        struct ehci_qtd *qtd = NULL;
1005
1006        spin_lock(&oxu->mem_lock);
1007
1008        for (i = 0; i < QTD_NUM; i++)
1009                if (!oxu->qtd_used[i])
1010                        break;
1011
1012        if (i < QTD_NUM) {
1013                qtd = (struct ehci_qtd *) &oxu->mem->qtd_pool[i];
1014                memset(qtd, 0, sizeof *qtd);
1015
1016                qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
1017                qtd->hw_next = EHCI_LIST_END;
1018                qtd->hw_alt_next = EHCI_LIST_END;
1019                INIT_LIST_HEAD(&qtd->qtd_list);
1020
1021                qtd->qtd_dma = virt_to_phys(qtd);
1022
1023                oxu->qtd_used[i] = 1;
1024        }
1025
1026        spin_unlock(&oxu->mem_lock);
1027
1028        return qtd;
1029}
1030
1031static void oxu_qh_free(struct oxu_hcd *oxu, struct ehci_qh *qh)
1032{
1033        int index;
1034
1035        spin_lock(&oxu->mem_lock);
1036
1037        index = qh - &oxu->mem->qh_pool[0];
1038        oxu->qh_used[index] = 0;
1039
1040        spin_unlock(&oxu->mem_lock);
1041}
1042
1043static void qh_destroy(struct kref *kref)
1044{
1045        struct ehci_qh *qh = container_of(kref, struct ehci_qh, kref);
1046        struct oxu_hcd *oxu = qh->oxu;
1047
1048        /* clean qtds first, and know this is not linked */
1049        if (!list_empty(&qh->qtd_list) || qh->qh_next.ptr) {
1050                oxu_dbg(oxu, "unused qh not empty!\n");
1051                BUG();
1052        }
1053        if (qh->dummy)
1054                oxu_qtd_free(oxu, qh->dummy);
1055        oxu_qh_free(oxu, qh);
1056}
1057
1058static struct ehci_qh *oxu_qh_alloc(struct oxu_hcd *oxu)
1059{
1060        int i;
1061        struct ehci_qh *qh = NULL;
1062
1063        spin_lock(&oxu->mem_lock);
1064
1065        for (i = 0; i < QHEAD_NUM; i++)
1066                if (!oxu->qh_used[i])
1067                        break;
1068
1069        if (i < QHEAD_NUM) {
1070                qh = (struct ehci_qh *) &oxu->mem->qh_pool[i];
1071                memset(qh, 0, sizeof *qh);
1072
1073                kref_init(&qh->kref);
1074                qh->oxu = oxu;
1075                qh->qh_dma = virt_to_phys(qh);
1076                INIT_LIST_HEAD(&qh->qtd_list);
1077
1078                /* dummy td enables safe urb queuing */
1079                qh->dummy = ehci_qtd_alloc(oxu);
1080                if (qh->dummy == NULL) {
1081                        oxu_dbg(oxu, "no dummy td\n");
1082                        oxu->qh_used[i] = 0;
1083                        qh = NULL;
1084                        goto unlock;
1085                }
1086
1087                oxu->qh_used[i] = 1;
1088        }
1089unlock:
1090        spin_unlock(&oxu->mem_lock);
1091
1092        return qh;
1093}
1094
1095/* to share a qh (cpu threads, or hc) */
1096static inline struct ehci_qh *qh_get(struct ehci_qh *qh)
1097{
1098        kref_get(&qh->kref);
1099        return qh;
1100}
1101
1102static inline void qh_put(struct ehci_qh *qh)
1103{
1104        kref_put(&qh->kref, qh_destroy);
1105}
1106
1107static void oxu_murb_free(struct oxu_hcd *oxu, struct oxu_murb *murb)
1108{
1109        int index;
1110
1111        spin_lock(&oxu->mem_lock);
1112
1113        index = murb - &oxu->murb_pool[0];
1114        oxu->murb_used[index] = 0;
1115
1116        spin_unlock(&oxu->mem_lock);
1117}
1118
1119static struct oxu_murb *oxu_murb_alloc(struct oxu_hcd *oxu)
1120
1121{
1122        int i;
1123        struct oxu_murb *murb = NULL;
1124
1125        spin_lock(&oxu->mem_lock);
1126
1127        for (i = 0; i < MURB_NUM; i++)
1128                if (!oxu->murb_used[i])
1129                        break;
1130
1131        if (i < MURB_NUM) {
1132                murb = &(oxu->murb_pool)[i];
1133
1134                oxu->murb_used[i] = 1;
1135        }
1136
1137        spin_unlock(&oxu->mem_lock);
1138
1139        return murb;
1140}
1141
1142/* The queue heads and transfer descriptors are managed from pools tied
1143 * to each of the "per device" structures.
1144 * This is the initialisation and cleanup code.
1145 */
1146static void ehci_mem_cleanup(struct oxu_hcd *oxu)
1147{
1148        kfree(oxu->murb_pool);
1149        oxu->murb_pool = NULL;
1150
1151        if (oxu->async)
1152                qh_put(oxu->async);
1153        oxu->async = NULL;
1154
1155        del_timer(&oxu->urb_timer);
1156
1157        oxu->periodic = NULL;
1158
1159        /* shadow periodic table */
1160        kfree(oxu->pshadow);
1161        oxu->pshadow = NULL;
1162}
1163
1164/* Remember to add cleanup code (above) if you add anything here.
1165 */
1166static int ehci_mem_init(struct oxu_hcd *oxu, gfp_t flags)
1167{
1168        int i;
1169
1170        for (i = 0; i < oxu->periodic_size; i++)
1171                oxu->mem->frame_list[i] = EHCI_LIST_END;
1172        for (i = 0; i < QHEAD_NUM; i++)
1173                oxu->qh_used[i] = 0;
1174        for (i = 0; i < QTD_NUM; i++)
1175                oxu->qtd_used[i] = 0;
1176
1177        oxu->murb_pool = kcalloc(MURB_NUM, sizeof(struct oxu_murb), flags);
1178        if (!oxu->murb_pool)
1179                goto fail;
1180
1181        for (i = 0; i < MURB_NUM; i++)
1182                oxu->murb_used[i] = 0;
1183
1184        oxu->async = oxu_qh_alloc(oxu);
1185        if (!oxu->async)
1186                goto fail;
1187
1188        oxu->periodic = (__le32 *) &oxu->mem->frame_list;
1189        oxu->periodic_dma = virt_to_phys(oxu->periodic);
1190
1191        for (i = 0; i < oxu->periodic_size; i++)
1192                oxu->periodic[i] = EHCI_LIST_END;
1193
1194        /* software shadow of hardware table */
1195        oxu->pshadow = kcalloc(oxu->periodic_size, sizeof(void *), flags);
1196        if (oxu->pshadow != NULL)
1197                return 0;
1198
1199fail:
1200        oxu_dbg(oxu, "couldn't init memory\n");
1201        ehci_mem_cleanup(oxu);
1202        return -ENOMEM;
1203}
1204
1205/* Fill a qtd, returning how much of the buffer we were able to queue up.
1206 */
1207static int qtd_fill(struct ehci_qtd *qtd, dma_addr_t buf, size_t len,
1208                                int token, int maxpacket)
1209{
1210        int i, count;
1211        u64 addr = buf;
1212
1213        /* one buffer entry per 4K ... first might be short or unaligned */
1214        qtd->hw_buf[0] = cpu_to_le32((u32)addr);
1215        qtd->hw_buf_hi[0] = cpu_to_le32((u32)(addr >> 32));
1216        count = 0x1000 - (buf & 0x0fff);        /* rest of that page */
1217        if (likely(len < count))                /* ... iff needed */
1218                count = len;
1219        else {
1220                buf +=  0x1000;
1221                buf &= ~0x0fff;
1222
1223                /* per-qtd limit: from 16K to 20K (best alignment) */
1224                for (i = 1; count < len && i < 5; i++) {
1225                        addr = buf;
1226                        qtd->hw_buf[i] = cpu_to_le32((u32)addr);
1227                        qtd->hw_buf_hi[i] = cpu_to_le32((u32)(addr >> 32));
1228                        buf += 0x1000;
1229                        if ((count + 0x1000) < len)
1230                                count += 0x1000;
1231                        else
1232                                count = len;
1233                }
1234
1235                /* short packets may only terminate transfers */
1236                if (count != len)
1237                        count -= (count % maxpacket);
1238        }
1239        qtd->hw_token = cpu_to_le32((count << 16) | token);
1240        qtd->length = count;
1241
1242        return count;
1243}
1244
1245static inline void qh_update(struct oxu_hcd *oxu,
1246                                struct ehci_qh *qh, struct ehci_qtd *qtd)
1247{
1248        /* writes to an active overlay are unsafe */
1249        BUG_ON(qh->qh_state != QH_STATE_IDLE);
1250
1251        qh->hw_qtd_next = QTD_NEXT(qtd->qtd_dma);
1252        qh->hw_alt_next = EHCI_LIST_END;
1253
1254        /* Except for control endpoints, we make hardware maintain data
1255         * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
1256         * and set the pseudo-toggle in udev. Only usb_clear_halt() will
1257         * ever clear it.
1258         */
1259        if (!(qh->hw_info1 & cpu_to_le32(1 << 14))) {
1260                unsigned        is_out, epnum;
1261
1262                is_out = !(qtd->hw_token & cpu_to_le32(1 << 8));
1263                epnum = (le32_to_cpup(&qh->hw_info1) >> 8) & 0x0f;
1264                if (unlikely(!usb_gettoggle(qh->dev, epnum, is_out))) {
1265                        qh->hw_token &= ~cpu_to_le32(QTD_TOGGLE);
1266                        usb_settoggle(qh->dev, epnum, is_out, 1);
1267                }
1268        }
1269
1270        /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
1271        wmb();
1272        qh->hw_token &= cpu_to_le32(QTD_TOGGLE | QTD_STS_PING);
1273}
1274
1275/* If it weren't for a common silicon quirk (writing the dummy into the qh
1276 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
1277 * recovery (including urb dequeue) would need software changes to a QH...
1278 */
1279static void qh_refresh(struct oxu_hcd *oxu, struct ehci_qh *qh)
1280{
1281        struct ehci_qtd *qtd;
1282
1283        if (list_empty(&qh->qtd_list))
1284                qtd = qh->dummy;
1285        else {
1286                qtd = list_entry(qh->qtd_list.next,
1287                                struct ehci_qtd, qtd_list);
1288                /* first qtd may already be partially processed */
1289                if (cpu_to_le32(qtd->qtd_dma) == qh->hw_current)
1290                        qtd = NULL;
1291        }
1292
1293        if (qtd)
1294                qh_update(oxu, qh, qtd);
1295}
1296
1297static void qtd_copy_status(struct oxu_hcd *oxu, struct urb *urb,
1298                                size_t length, u32 token)
1299{
1300        /* count IN/OUT bytes, not SETUP (even short packets) */
1301        if (likely(QTD_PID(token) != 2))
1302                urb->actual_length += length - QTD_LENGTH(token);
1303
1304        /* don't modify error codes */
1305        if (unlikely(urb->status != -EINPROGRESS))
1306                return;
1307
1308        /* force cleanup after short read; not always an error */
1309        if (unlikely(IS_SHORT_READ(token)))
1310                urb->status = -EREMOTEIO;
1311
1312        /* serious "can't proceed" faults reported by the hardware */
1313        if (token & QTD_STS_HALT) {
1314                if (token & QTD_STS_BABBLE) {
1315                        /* FIXME "must" disable babbling device's port too */
1316                        urb->status = -EOVERFLOW;
1317                } else if (token & QTD_STS_MMF) {
1318                        /* fs/ls interrupt xfer missed the complete-split */
1319                        urb->status = -EPROTO;
1320                } else if (token & QTD_STS_DBE) {
1321                        urb->status = (QTD_PID(token) == 1) /* IN ? */
1322                                ? -ENOSR  /* hc couldn't read data */
1323                                : -ECOMM; /* hc couldn't write data */
1324                } else if (token & QTD_STS_XACT) {
1325                        /* timeout, bad crc, wrong PID, etc; retried */
1326                        if (QTD_CERR(token))
1327                                urb->status = -EPIPE;
1328                        else {
1329                                oxu_dbg(oxu, "devpath %s ep%d%s 3strikes\n",
1330                                        urb->dev->devpath,
1331                                        usb_pipeendpoint(urb->pipe),
1332                                        usb_pipein(urb->pipe) ? "in" : "out");
1333                                urb->status = -EPROTO;
1334                        }
1335                /* CERR nonzero + no errors + halt --> stall */
1336                } else if (QTD_CERR(token))
1337                        urb->status = -EPIPE;
1338                else    /* unknown */
1339                        urb->status = -EPROTO;
1340
1341                oxu_vdbg(oxu, "dev%d ep%d%s qtd token %08x --> status %d\n",
1342                        usb_pipedevice(urb->pipe),
1343                        usb_pipeendpoint(urb->pipe),
1344                        usb_pipein(urb->pipe) ? "in" : "out",
1345                        token, urb->status);
1346        }
1347}
1348
1349static void ehci_urb_done(struct oxu_hcd *oxu, struct urb *urb)
1350__releases(oxu->lock)
1351__acquires(oxu->lock)
1352{
1353        if (likely(urb->hcpriv != NULL)) {
1354                struct ehci_qh  *qh = (struct ehci_qh *) urb->hcpriv;
1355
1356                /* S-mask in a QH means it's an interrupt urb */
1357                if ((qh->hw_info2 & cpu_to_le32(QH_SMASK)) != 0) {
1358
1359                        /* ... update hc-wide periodic stats (for usbfs) */
1360                        oxu_to_hcd(oxu)->self.bandwidth_int_reqs--;
1361                }
1362                qh_put(qh);
1363        }
1364
1365        urb->hcpriv = NULL;
1366        switch (urb->status) {
1367        case -EINPROGRESS:              /* success */
1368                urb->status = 0;
1369        default:                        /* fault */
1370                break;
1371        case -EREMOTEIO:                /* fault or normal */
1372                if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
1373                        urb->status = 0;
1374                break;
1375        case -ECONNRESET:               /* canceled */
1376        case -ENOENT:
1377                break;
1378        }
1379
1380#ifdef OXU_URB_TRACE
1381        oxu_dbg(oxu, "%s %s urb %p ep%d%s status %d len %d/%d\n",
1382                __func__, urb->dev->devpath, urb,
1383                usb_pipeendpoint(urb->pipe),
1384                usb_pipein(urb->pipe) ? "in" : "out",
1385                urb->status,
1386                urb->actual_length, urb->transfer_buffer_length);
1387#endif
1388
1389        /* complete() can reenter this HCD */
1390        spin_unlock(&oxu->lock);
1391        usb_hcd_giveback_urb(oxu_to_hcd(oxu), urb, urb->status);
1392        spin_lock(&oxu->lock);
1393}
1394
1395static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
1396static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
1397
1398static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
1399static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
1400
1401#define HALT_BIT cpu_to_le32(QTD_STS_HALT)
1402
1403/* Process and free completed qtds for a qh, returning URBs to drivers.
1404 * Chases up to qh->hw_current.  Returns number of completions called,
1405 * indicating how much "real" work we did.
1406 */
1407static unsigned qh_completions(struct oxu_hcd *oxu, struct ehci_qh *qh)
1408{
1409        struct ehci_qtd *last = NULL, *end = qh->dummy;
1410        struct ehci_qtd *qtd, *tmp;
1411        int stopped;
1412        unsigned count = 0;
1413        int do_status = 0;
1414        u8 state;
1415        struct oxu_murb *murb = NULL;
1416
1417        if (unlikely(list_empty(&qh->qtd_list)))
1418                return count;
1419
1420        /* completions (or tasks on other cpus) must never clobber HALT
1421         * till we've gone through and cleaned everything up, even when
1422         * they add urbs to this qh's queue or mark them for unlinking.
1423         *
1424         * NOTE:  unlinking expects to be done in queue order.
1425         */
1426        state = qh->qh_state;
1427        qh->qh_state = QH_STATE_COMPLETING;
1428        stopped = (state == QH_STATE_IDLE);
1429
1430        /* remove de-activated QTDs from front of queue.
1431         * after faults (including short reads), cleanup this urb
1432         * then let the queue advance.
1433         * if queue is stopped, handles unlinks.
1434         */
1435        list_for_each_entry_safe(qtd, tmp, &qh->qtd_list, qtd_list) {
1436                struct urb *urb;
1437                u32 token = 0;
1438
1439                urb = qtd->urb;
1440
1441                /* Clean up any state from previous QTD ...*/
1442                if (last) {
1443                        if (likely(last->urb != urb)) {
1444                                if (last->urb->complete == NULL) {
1445                                        murb = (struct oxu_murb *) last->urb;
1446                                        last->urb = murb->main;
1447                                        if (murb->last) {
1448                                                ehci_urb_done(oxu, last->urb);
1449                                                count++;
1450                                        }
1451                                        oxu_murb_free(oxu, murb);
1452                                } else {
1453                                        ehci_urb_done(oxu, last->urb);
1454                                        count++;
1455                                }
1456                        }
1457                        oxu_qtd_free(oxu, last);
1458                        last = NULL;
1459                }
1460
1461                /* ignore urbs submitted during completions we reported */
1462                if (qtd == end)
1463                        break;
1464
1465                /* hardware copies qtd out of qh overlay */
1466                rmb();
1467                token = le32_to_cpu(qtd->hw_token);
1468
1469                /* always clean up qtds the hc de-activated */
1470                if ((token & QTD_STS_ACTIVE) == 0) {
1471
1472                        if ((token & QTD_STS_HALT) != 0) {
1473                                stopped = 1;
1474
1475                        /* magic dummy for some short reads; qh won't advance.
1476                         * that silicon quirk can kick in with this dummy too.
1477                         */
1478                        } else if (IS_SHORT_READ(token) &&
1479                                        !(qtd->hw_alt_next & EHCI_LIST_END)) {
1480                                stopped = 1;
1481                                goto halt;
1482                        }
1483
1484                /* stop scanning when we reach qtds the hc is using */
1485                } else if (likely(!stopped &&
1486                                HC_IS_RUNNING(oxu_to_hcd(oxu)->state))) {
1487                        break;
1488
1489                } else {
1490                        stopped = 1;
1491
1492                        if (unlikely(!HC_IS_RUNNING(oxu_to_hcd(oxu)->state)))
1493                                urb->status = -ESHUTDOWN;
1494
1495                        /* ignore active urbs unless some previous qtd
1496                         * for the urb faulted (including short read) or
1497                         * its urb was canceled.  we may patch qh or qtds.
1498                         */
1499                        if (likely(urb->status == -EINPROGRESS))
1500                                continue;
1501
1502                        /* issue status after short control reads */
1503                        if (unlikely(do_status != 0)
1504                                        && QTD_PID(token) == 0 /* OUT */) {
1505                                do_status = 0;
1506                                continue;
1507                        }
1508
1509                        /* token in overlay may be most current */
1510                        if (state == QH_STATE_IDLE
1511                                        && cpu_to_le32(qtd->qtd_dma)
1512                                                == qh->hw_current)
1513                                token = le32_to_cpu(qh->hw_token);
1514
1515                        /* force halt for unlinked or blocked qh, so we'll
1516                         * patch the qh later and so that completions can't
1517                         * activate it while we "know" it's stopped.
1518                         */
1519                        if ((HALT_BIT & qh->hw_token) == 0) {
1520halt:
1521                                qh->hw_token |= HALT_BIT;
1522                                wmb();
1523                        }
1524                }
1525
1526                /* Remove it from the queue */
1527                qtd_copy_status(oxu, urb->complete ?
1528                                        urb : ((struct oxu_murb *) urb)->main,
1529                                qtd->length, token);
1530                if ((usb_pipein(qtd->urb->pipe)) &&
1531                                (NULL != qtd->transfer_buffer))
1532                        memcpy(qtd->transfer_buffer, qtd->buffer, qtd->length);
1533                do_status = (urb->status == -EREMOTEIO)
1534                                && usb_pipecontrol(urb->pipe);
1535
1536                if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
1537                        last = list_entry(qtd->qtd_list.prev,
1538                                        struct ehci_qtd, qtd_list);
1539                        last->hw_next = qtd->hw_next;
1540                }
1541                list_del(&qtd->qtd_list);
1542                last = qtd;
1543        }
1544
1545        /* last urb's completion might still need calling */
1546        if (likely(last != NULL)) {
1547                if (last->urb->complete == NULL) {
1548                        murb = (struct oxu_murb *) last->urb;
1549                        last->urb = murb->main;
1550                        if (murb->last) {
1551                                ehci_urb_done(oxu, last->urb);
1552                                count++;
1553                        }
1554                        oxu_murb_free(oxu, murb);
1555                } else {
1556                        ehci_urb_done(oxu, last->urb);
1557                        count++;
1558                }
1559                oxu_qtd_free(oxu, last);
1560        }
1561
1562        /* restore original state; caller must unlink or relink */
1563        qh->qh_state = state;
1564
1565        /* be sure the hardware's done with the qh before refreshing
1566         * it after fault cleanup, or recovering from silicon wrongly
1567         * overlaying the dummy qtd (which reduces DMA chatter).
1568         */
1569        if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END) {
1570                switch (state) {
1571                case QH_STATE_IDLE:
1572                        qh_refresh(oxu, qh);
1573                        break;
1574                case QH_STATE_LINKED:
1575                        /* should be rare for periodic transfers,
1576                         * except maybe high bandwidth ...
1577                         */
1578                        if ((cpu_to_le32(QH_SMASK)
1579                                        & qh->hw_info2) != 0) {
1580                                intr_deschedule(oxu, qh);
1581                                (void) qh_schedule(oxu, qh);
1582                        } else
1583                                unlink_async(oxu, qh);
1584                        break;
1585                /* otherwise, unlink already started */
1586                }
1587        }
1588
1589        return count;
1590}
1591
1592/* High bandwidth multiplier, as encoded in highspeed endpoint descriptors */
1593#define hb_mult(wMaxPacketSize)         (1 + (((wMaxPacketSize) >> 11) & 0x03))
1594/* ... and packet size, for any kind of endpoint descriptor */
1595#define max_packet(wMaxPacketSize)      ((wMaxPacketSize) & 0x07ff)
1596
1597/* Reverse of qh_urb_transaction: free a list of TDs.
1598 * used for cleanup after errors, before HC sees an URB's TDs.
1599 */
1600static void qtd_list_free(struct oxu_hcd *oxu,
1601                                struct urb *urb, struct list_head *head)
1602{
1603        struct ehci_qtd *qtd, *temp;
1604
1605        list_for_each_entry_safe(qtd, temp, head, qtd_list) {
1606                list_del(&qtd->qtd_list);
1607                oxu_qtd_free(oxu, qtd);
1608        }
1609}
1610
1611/* Create a list of filled qtds for this URB; won't link into qh.
1612 */
1613static struct list_head *qh_urb_transaction(struct oxu_hcd *oxu,
1614                                                struct urb *urb,
1615                                                struct list_head *head,
1616                                                gfp_t flags)
1617{
1618        struct ehci_qtd *qtd, *qtd_prev;
1619        dma_addr_t buf;
1620        int len, maxpacket;
1621        int is_input;
1622        u32 token;
1623        void *transfer_buf = NULL;
1624        int ret;
1625
1626        /*
1627         * URBs map to sequences of QTDs: one logical transaction
1628         */
1629        qtd = ehci_qtd_alloc(oxu);
1630        if (unlikely(!qtd))
1631                return NULL;
1632        list_add_tail(&qtd->qtd_list, head);
1633        qtd->urb = urb;
1634
1635        token = QTD_STS_ACTIVE;
1636        token |= (EHCI_TUNE_CERR << 10);
1637        /* for split transactions, SplitXState initialized to zero */
1638
1639        len = urb->transfer_buffer_length;
1640        is_input = usb_pipein(urb->pipe);
1641        if (!urb->transfer_buffer && urb->transfer_buffer_length && is_input)
1642                urb->transfer_buffer = phys_to_virt(urb->transfer_dma);
1643
1644        if (usb_pipecontrol(urb->pipe)) {
1645                /* SETUP pid */
1646                ret = oxu_buf_alloc(oxu, qtd, sizeof(struct usb_ctrlrequest));
1647                if (ret)
1648                        goto cleanup;
1649
1650                qtd_fill(qtd, qtd->buffer_dma, sizeof(struct usb_ctrlrequest),
1651                                token | (2 /* "setup" */ << 8), 8);
1652                memcpy(qtd->buffer, qtd->urb->setup_packet,
1653                                sizeof(struct usb_ctrlrequest));
1654
1655                /* ... and always at least one more pid */
1656                token ^= QTD_TOGGLE;
1657                qtd_prev = qtd;
1658                qtd = ehci_qtd_alloc(oxu);
1659                if (unlikely(!qtd))
1660                        goto cleanup;
1661                qtd->urb = urb;
1662                qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1663                list_add_tail(&qtd->qtd_list, head);
1664
1665                /* for zero length DATA stages, STATUS is always IN */
1666                if (len == 0)
1667                        token |= (1 /* "in" */ << 8);
1668        }
1669
1670        /*
1671         * Data transfer stage: buffer setup
1672         */
1673
1674        ret = oxu_buf_alloc(oxu, qtd, len);
1675        if (ret)
1676                goto cleanup;
1677
1678        buf = qtd->buffer_dma;
1679        transfer_buf = urb->transfer_buffer;
1680
1681        if (!is_input)
1682                memcpy(qtd->buffer, qtd->urb->transfer_buffer, len);
1683
1684        if (is_input)
1685                token |= (1 /* "in" */ << 8);
1686        /* else it's already initted to "out" pid (0 << 8) */
1687
1688        maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
1689
1690        /*
1691         * buffer gets wrapped in one or more qtds;
1692         * last one may be "short" (including zero len)
1693         * and may serve as a control status ack
1694         */
1695        for (;;) {
1696                int this_qtd_len;
1697
1698                this_qtd_len = qtd_fill(qtd, buf, len, token, maxpacket);
1699                qtd->transfer_buffer = transfer_buf;
1700                len -= this_qtd_len;
1701                buf += this_qtd_len;
1702                transfer_buf += this_qtd_len;
1703                if (is_input)
1704                        qtd->hw_alt_next = oxu->async->hw_alt_next;
1705
1706                /* qh makes control packets use qtd toggle; maybe switch it */
1707                if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
1708                        token ^= QTD_TOGGLE;
1709
1710                if (likely(len <= 0))
1711                        break;
1712
1713                qtd_prev = qtd;
1714                qtd = ehci_qtd_alloc(oxu);
1715                if (unlikely(!qtd))
1716                        goto cleanup;
1717                if (likely(len > 0)) {
1718                        ret = oxu_buf_alloc(oxu, qtd, len);
1719                        if (ret)
1720                                goto cleanup;
1721                }
1722                qtd->urb = urb;
1723                qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1724                list_add_tail(&qtd->qtd_list, head);
1725        }
1726
1727        /* unless the bulk/interrupt caller wants a chance to clean
1728         * up after short reads, hc should advance qh past this urb
1729         */
1730        if (likely((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
1731                                || usb_pipecontrol(urb->pipe)))
1732                qtd->hw_alt_next = EHCI_LIST_END;
1733
1734        /*
1735         * control requests may need a terminating data "status" ack;
1736         * bulk ones may need a terminating short packet (zero length).
1737         */
1738        if (likely(urb->transfer_buffer_length != 0)) {
1739                int     one_more = 0;
1740
1741                if (usb_pipecontrol(urb->pipe)) {
1742                        one_more = 1;
1743                        token ^= 0x0100;        /* "in" <--> "out"  */
1744                        token |= QTD_TOGGLE;    /* force DATA1 */
1745                } else if (usb_pipebulk(urb->pipe)
1746                                && (urb->transfer_flags & URB_ZERO_PACKET)
1747                                && !(urb->transfer_buffer_length % maxpacket)) {
1748                        one_more = 1;
1749                }
1750                if (one_more) {
1751                        qtd_prev = qtd;
1752                        qtd = ehci_qtd_alloc(oxu);
1753                        if (unlikely(!qtd))
1754                                goto cleanup;
1755                        qtd->urb = urb;
1756                        qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1757                        list_add_tail(&qtd->qtd_list, head);
1758
1759                        /* never any data in such packets */
1760                        qtd_fill(qtd, 0, 0, token, 0);
1761                }
1762        }
1763
1764        /* by default, enable interrupt on urb completion */
1765        qtd->hw_token |= cpu_to_le32(QTD_IOC);
1766        return head;
1767
1768cleanup:
1769        qtd_list_free(oxu, urb, head);
1770        return NULL;
1771}
1772
1773/* Each QH holds a qtd list; a QH is used for everything except iso.
1774 *
1775 * For interrupt urbs, the scheduler must set the microframe scheduling
1776 * mask(s) each time the QH gets scheduled.  For highspeed, that's
1777 * just one microframe in the s-mask.  For split interrupt transactions
1778 * there are additional complications: c-mask, maybe FSTNs.
1779 */
1780static struct ehci_qh *qh_make(struct oxu_hcd *oxu,
1781                                struct urb *urb, gfp_t flags)
1782{
1783        struct ehci_qh *qh = oxu_qh_alloc(oxu);
1784        u32 info1 = 0, info2 = 0;
1785        int is_input, type;
1786        int maxp = 0;
1787
1788        if (!qh)
1789                return qh;
1790
1791        /*
1792         * init endpoint/device data for this QH
1793         */
1794        info1 |= usb_pipeendpoint(urb->pipe) << 8;
1795        info1 |= usb_pipedevice(urb->pipe) << 0;
1796
1797        is_input = usb_pipein(urb->pipe);
1798        type = usb_pipetype(urb->pipe);
1799        maxp = usb_maxpacket(urb->dev, urb->pipe, !is_input);
1800
1801        /* Compute interrupt scheduling parameters just once, and save.
1802         * - allowing for high bandwidth, how many nsec/uframe are used?
1803         * - split transactions need a second CSPLIT uframe; same question
1804         * - splits also need a schedule gap (for full/low speed I/O)
1805         * - qh has a polling interval
1806         *
1807         * For control/bulk requests, the HC or TT handles these.
1808         */
1809        if (type == PIPE_INTERRUPT) {
1810                qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
1811                                                                is_input, 0,
1812                                hb_mult(maxp) * max_packet(maxp)));
1813                qh->start = NO_FRAME;
1814
1815                if (urb->dev->speed == USB_SPEED_HIGH) {
1816                        qh->c_usecs = 0;
1817                        qh->gap_uf = 0;
1818
1819                        qh->period = urb->interval >> 3;
1820                        if (qh->period == 0 && urb->interval != 1) {
1821                                /* NOTE interval 2 or 4 uframes could work.
1822                                 * But interval 1 scheduling is simpler, and
1823                                 * includes high bandwidth.
1824                                 */
1825                                oxu_dbg(oxu, "intr period %d uframes, NYET!\n",
1826                                        urb->interval);
1827                                goto done;
1828                        }
1829                } else {
1830                        struct usb_tt   *tt = urb->dev->tt;
1831                        int             think_time;
1832
1833                        /* gap is f(FS/LS transfer times) */
1834                        qh->gap_uf = 1 + usb_calc_bus_time(urb->dev->speed,
1835                                        is_input, 0, maxp) / (125 * 1000);
1836
1837                        /* FIXME this just approximates SPLIT/CSPLIT times */
1838                        if (is_input) {         /* SPLIT, gap, CSPLIT+DATA */
1839                                qh->c_usecs = qh->usecs + HS_USECS(0);
1840                                qh->usecs = HS_USECS(1);
1841                        } else {                /* SPLIT+DATA, gap, CSPLIT */
1842                                qh->usecs += HS_USECS(1);
1843                                qh->c_usecs = HS_USECS(0);
1844                        }
1845
1846                        think_time = tt ? tt->think_time : 0;
1847                        qh->tt_usecs = NS_TO_US(think_time +
1848                                        usb_calc_bus_time(urb->dev->speed,
1849                                        is_input, 0, max_packet(maxp)));
1850                        qh->period = urb->interval;
1851                }
1852        }
1853
1854        /* support for tt scheduling, and access to toggles */
1855        qh->dev = urb->dev;
1856
1857        /* using TT? */
1858        switch (urb->dev->speed) {
1859        case USB_SPEED_LOW:
1860                info1 |= (1 << 12);     /* EPS "low" */
1861                /* FALL THROUGH */
1862
1863        case USB_SPEED_FULL:
1864                /* EPS 0 means "full" */
1865                if (type != PIPE_INTERRUPT)
1866                        info1 |= (EHCI_TUNE_RL_TT << 28);
1867                if (type == PIPE_CONTROL) {
1868                        info1 |= (1 << 27);     /* for TT */
1869                        info1 |= 1 << 14;       /* toggle from qtd */
1870                }
1871                info1 |= maxp << 16;
1872
1873                info2 |= (EHCI_TUNE_MULT_TT << 30);
1874                info2 |= urb->dev->ttport << 23;
1875
1876                /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
1877
1878                break;
1879
1880        case USB_SPEED_HIGH:            /* no TT involved */
1881                info1 |= (2 << 12);     /* EPS "high" */
1882                if (type == PIPE_CONTROL) {
1883                        info1 |= (EHCI_TUNE_RL_HS << 28);
1884                        info1 |= 64 << 16;      /* usb2 fixed maxpacket */
1885                        info1 |= 1 << 14;       /* toggle from qtd */
1886                        info2 |= (EHCI_TUNE_MULT_HS << 30);
1887                } else if (type == PIPE_BULK) {
1888                        info1 |= (EHCI_TUNE_RL_HS << 28);
1889                        info1 |= 512 << 16;     /* usb2 fixed maxpacket */
1890                        info2 |= (EHCI_TUNE_MULT_HS << 30);
1891                } else {                /* PIPE_INTERRUPT */
1892                        info1 |= max_packet(maxp) << 16;
1893                        info2 |= hb_mult(maxp) << 30;
1894                }
1895                break;
1896        default:
1897                oxu_dbg(oxu, "bogus dev %p speed %d\n", urb->dev, urb->dev->speed);
1898done:
1899                qh_put(qh);
1900                return NULL;
1901        }
1902
1903        /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
1904
1905        /* init as live, toggle clear, advance to dummy */
1906        qh->qh_state = QH_STATE_IDLE;
1907        qh->hw_info1 = cpu_to_le32(info1);
1908        qh->hw_info2 = cpu_to_le32(info2);
1909        usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input, 1);
1910        qh_refresh(oxu, qh);
1911        return qh;
1912}
1913
1914/* Move qh (and its qtds) onto async queue; maybe enable queue.
1915 */
1916static void qh_link_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
1917{
1918        __le32 dma = QH_NEXT(qh->qh_dma);
1919        struct ehci_qh *head;
1920
1921        /* (re)start the async schedule? */
1922        head = oxu->async;
1923        timer_action_done(oxu, TIMER_ASYNC_OFF);
1924        if (!head->qh_next.qh) {
1925                u32     cmd = readl(&oxu->regs->command);
1926
1927                if (!(cmd & CMD_ASE)) {
1928                        /* in case a clear of CMD_ASE didn't take yet */
1929                        (void)handshake(oxu, &oxu->regs->status,
1930                                        STS_ASS, 0, 150);
1931                        cmd |= CMD_ASE | CMD_RUN;
1932                        writel(cmd, &oxu->regs->command);
1933                        oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
1934                        /* posted write need not be known to HC yet ... */
1935                }
1936        }
1937
1938        /* clear halt and/or toggle; and maybe recover from silicon quirk */
1939        if (qh->qh_state == QH_STATE_IDLE)
1940                qh_refresh(oxu, qh);
1941
1942        /* splice right after start */
1943        qh->qh_next = head->qh_next;
1944        qh->hw_next = head->hw_next;
1945        wmb();
1946
1947        head->qh_next.qh = qh;
1948        head->hw_next = dma;
1949
1950        qh->qh_state = QH_STATE_LINKED;
1951        /* qtd completions reported later by interrupt */
1952}
1953
1954#define QH_ADDR_MASK    cpu_to_le32(0x7f)
1955
1956/*
1957 * For control/bulk/interrupt, return QH with these TDs appended.
1958 * Allocates and initializes the QH if necessary.
1959 * Returns null if it can't allocate a QH it needs to.
1960 * If the QH has TDs (urbs) already, that's great.
1961 */
1962static struct ehci_qh *qh_append_tds(struct oxu_hcd *oxu,
1963                                struct urb *urb, struct list_head *qtd_list,
1964                                int epnum, void **ptr)
1965{
1966        struct ehci_qh *qh = NULL;
1967
1968        qh = (struct ehci_qh *) *ptr;
1969        if (unlikely(qh == NULL)) {
1970                /* can't sleep here, we have oxu->lock... */
1971                qh = qh_make(oxu, urb, GFP_ATOMIC);
1972                *ptr = qh;
1973        }
1974        if (likely(qh != NULL)) {
1975                struct ehci_qtd *qtd;
1976
1977                if (unlikely(list_empty(qtd_list)))
1978                        qtd = NULL;
1979                else
1980                        qtd = list_entry(qtd_list->next, struct ehci_qtd,
1981                                        qtd_list);
1982
1983                /* control qh may need patching ... */
1984                if (unlikely(epnum == 0)) {
1985
1986                        /* usb_reset_device() briefly reverts to address 0 */
1987                        if (usb_pipedevice(urb->pipe) == 0)
1988                                qh->hw_info1 &= ~QH_ADDR_MASK;
1989                }
1990
1991                /* just one way to queue requests: swap with the dummy qtd.
1992                 * only hc or qh_refresh() ever modify the overlay.
1993                 */
1994                if (likely(qtd != NULL)) {
1995                        struct ehci_qtd *dummy;
1996                        dma_addr_t dma;
1997                        __le32 token;
1998
1999                        /* to avoid racing the HC, use the dummy td instead of
2000                         * the first td of our list (becomes new dummy).  both
2001                         * tds stay deactivated until we're done, when the
2002                         * HC is allowed to fetch the old dummy (4.10.2).
2003                         */
2004                        token = qtd->hw_token;
2005                        qtd->hw_token = HALT_BIT;
2006                        wmb();
2007                        dummy = qh->dummy;
2008
2009                        dma = dummy->qtd_dma;
2010                        *dummy = *qtd;
2011                        dummy->qtd_dma = dma;
2012
2013                        list_del(&qtd->qtd_list);
2014                        list_add(&dummy->qtd_list, qtd_list);
2015                        list_splice(qtd_list, qh->qtd_list.prev);
2016
2017                        ehci_qtd_init(qtd, qtd->qtd_dma);
2018                        qh->dummy = qtd;
2019
2020                        /* hc must see the new dummy at list end */
2021                        dma = qtd->qtd_dma;
2022                        qtd = list_entry(qh->qtd_list.prev,
2023                                        struct ehci_qtd, qtd_list);
2024                        qtd->hw_next = QTD_NEXT(dma);
2025
2026                        /* let the hc process these next qtds */
2027                        dummy->hw_token = (token & ~(0x80));
2028                        wmb();
2029                        dummy->hw_token = token;
2030
2031                        urb->hcpriv = qh_get(qh);
2032                }
2033        }
2034        return qh;
2035}
2036
2037static int submit_async(struct oxu_hcd  *oxu, struct urb *urb,
2038                        struct list_head *qtd_list, gfp_t mem_flags)
2039{
2040        struct ehci_qtd *qtd;
2041        int epnum;
2042        unsigned long flags;
2043        struct ehci_qh *qh = NULL;
2044        int rc = 0;
2045
2046        qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
2047        epnum = urb->ep->desc.bEndpointAddress;
2048
2049#ifdef OXU_URB_TRACE
2050        oxu_dbg(oxu, "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
2051                __func__, urb->dev->devpath, urb,
2052                epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
2053                urb->transfer_buffer_length,
2054                qtd, urb->ep->hcpriv);
2055#endif
2056
2057        spin_lock_irqsave(&oxu->lock, flags);
2058        if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu)))) {
2059                rc = -ESHUTDOWN;
2060                goto done;
2061        }
2062
2063        qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
2064        if (unlikely(qh == NULL)) {
2065                rc = -ENOMEM;
2066                goto done;
2067        }
2068
2069        /* Control/bulk operations through TTs don't need scheduling,
2070         * the HC and TT handle it when the TT has a buffer ready.
2071         */
2072        if (likely(qh->qh_state == QH_STATE_IDLE))
2073                qh_link_async(oxu, qh_get(qh));
2074done:
2075        spin_unlock_irqrestore(&oxu->lock, flags);
2076        if (unlikely(qh == NULL))
2077                qtd_list_free(oxu, urb, qtd_list);
2078        return rc;
2079}
2080
2081/* The async qh for the qtds being reclaimed are now unlinked from the HC */
2082
2083static void end_unlink_async(struct oxu_hcd *oxu)
2084{
2085        struct ehci_qh *qh = oxu->reclaim;
2086        struct ehci_qh *next;
2087
2088        timer_action_done(oxu, TIMER_IAA_WATCHDOG);
2089
2090        qh->qh_state = QH_STATE_IDLE;
2091        qh->qh_next.qh = NULL;
2092        qh_put(qh);                     /* refcount from reclaim */
2093
2094        /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
2095        next = qh->reclaim;
2096        oxu->reclaim = next;
2097        oxu->reclaim_ready = 0;
2098        qh->reclaim = NULL;
2099
2100        qh_completions(oxu, qh);
2101
2102        if (!list_empty(&qh->qtd_list)
2103                        && HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2104                qh_link_async(oxu, qh);
2105        else {
2106                qh_put(qh);             /* refcount from async list */
2107
2108                /* it's not free to turn the async schedule on/off; leave it
2109                 * active but idle for a while once it empties.
2110                 */
2111                if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state)
2112                                && oxu->async->qh_next.qh == NULL)
2113                        timer_action(oxu, TIMER_ASYNC_OFF);
2114        }
2115
2116        if (next) {
2117                oxu->reclaim = NULL;
2118                start_unlink_async(oxu, next);
2119        }
2120}
2121
2122/* makes sure the async qh will become idle */
2123/* caller must own oxu->lock */
2124
2125static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
2126{
2127        int cmd = readl(&oxu->regs->command);
2128        struct ehci_qh *prev;
2129
2130#ifdef DEBUG
2131        assert_spin_locked(&oxu->lock);
2132        BUG_ON(oxu->reclaim || (qh->qh_state != QH_STATE_LINKED
2133                                && qh->qh_state != QH_STATE_UNLINK_WAIT));
2134#endif
2135
2136        /* stop async schedule right now? */
2137        if (unlikely(qh == oxu->async)) {
2138                /* can't get here without STS_ASS set */
2139                if (oxu_to_hcd(oxu)->state != HC_STATE_HALT
2140                                && !oxu->reclaim) {
2141                        /* ... and CMD_IAAD clear */
2142                        writel(cmd & ~CMD_ASE, &oxu->regs->command);
2143                        wmb();
2144                        /* handshake later, if we need to */
2145                        timer_action_done(oxu, TIMER_ASYNC_OFF);
2146                }
2147                return;
2148        }
2149
2150        qh->qh_state = QH_STATE_UNLINK;
2151        oxu->reclaim = qh = qh_get(qh);
2152
2153        prev = oxu->async;
2154        while (prev->qh_next.qh != qh)
2155                prev = prev->qh_next.qh;
2156
2157        prev->hw_next = qh->hw_next;
2158        prev->qh_next = qh->qh_next;
2159        wmb();
2160
2161        if (unlikely(oxu_to_hcd(oxu)->state == HC_STATE_HALT)) {
2162                /* if (unlikely(qh->reclaim != 0))
2163                 *      this will recurse, probably not much
2164                 */
2165                end_unlink_async(oxu);
2166                return;
2167        }
2168
2169        oxu->reclaim_ready = 0;
2170        cmd |= CMD_IAAD;
2171        writel(cmd, &oxu->regs->command);
2172        (void) readl(&oxu->regs->command);
2173        timer_action(oxu, TIMER_IAA_WATCHDOG);
2174}
2175
2176static void scan_async(struct oxu_hcd *oxu)
2177{
2178        struct ehci_qh *qh;
2179        enum ehci_timer_action action = TIMER_IO_WATCHDOG;
2180
2181        if (!++(oxu->stamp))
2182                oxu->stamp++;
2183        timer_action_done(oxu, TIMER_ASYNC_SHRINK);
2184rescan:
2185        qh = oxu->async->qh_next.qh;
2186        if (likely(qh != NULL)) {
2187                do {
2188                        /* clean any finished work for this qh */
2189                        if (!list_empty(&qh->qtd_list)
2190                                        && qh->stamp != oxu->stamp) {
2191                                int temp;
2192
2193                                /* unlinks could happen here; completion
2194                                 * reporting drops the lock.  rescan using
2195                                 * the latest schedule, but don't rescan
2196                                 * qhs we already finished (no looping).
2197                                 */
2198                                qh = qh_get(qh);
2199                                qh->stamp = oxu->stamp;
2200                                temp = qh_completions(oxu, qh);
2201                                qh_put(qh);
2202                                if (temp != 0)
2203                                        goto rescan;
2204                        }
2205
2206                        /* unlink idle entries, reducing HC PCI usage as well
2207                         * as HCD schedule-scanning costs.  delay for any qh
2208                         * we just scanned, there's a not-unusual case that it
2209                         * doesn't stay idle for long.
2210                         * (plus, avoids some kind of re-activation race.)
2211                         */
2212                        if (list_empty(&qh->qtd_list)) {
2213                                if (qh->stamp == oxu->stamp)
2214                                        action = TIMER_ASYNC_SHRINK;
2215                                else if (!oxu->reclaim
2216                                            && qh->qh_state == QH_STATE_LINKED)
2217                                        start_unlink_async(oxu, qh);
2218                        }
2219
2220                        qh = qh->qh_next.qh;
2221                } while (qh);
2222        }
2223        if (action == TIMER_ASYNC_SHRINK)
2224                timer_action(oxu, TIMER_ASYNC_SHRINK);
2225}
2226
2227/*
2228 * periodic_next_shadow - return "next" pointer on shadow list
2229 * @periodic: host pointer to qh/itd/sitd
2230 * @tag: hardware tag for type of this record
2231 */
2232static union ehci_shadow *periodic_next_shadow(union ehci_shadow *periodic,
2233                                                __le32 tag)
2234{
2235        switch (tag) {
2236        default:
2237        case Q_TYPE_QH:
2238                return &periodic->qh->qh_next;
2239        }
2240}
2241
2242/* caller must hold oxu->lock */
2243static void periodic_unlink(struct oxu_hcd *oxu, unsigned frame, void *ptr)
2244{
2245        union ehci_shadow *prev_p = &oxu->pshadow[frame];
2246        __le32 *hw_p = &oxu->periodic[frame];
2247        union ehci_shadow here = *prev_p;
2248
2249        /* find predecessor of "ptr"; hw and shadow lists are in sync */
2250        while (here.ptr && here.ptr != ptr) {
2251                prev_p = periodic_next_shadow(prev_p, Q_NEXT_TYPE(*hw_p));
2252                hw_p = here.hw_next;
2253                here = *prev_p;
2254        }
2255        /* an interrupt entry (at list end) could have been shared */
2256        if (!here.ptr)
2257                return;
2258
2259        /* update shadow and hardware lists ... the old "next" pointers
2260         * from ptr may still be in use, the caller updates them.
2261         */
2262        *prev_p = *periodic_next_shadow(&here, Q_NEXT_TYPE(*hw_p));
2263        *hw_p = *here.hw_next;
2264}
2265
2266/* how many of the uframe's 125 usecs are allocated? */
2267static unsigned short periodic_usecs(struct oxu_hcd *oxu,
2268                                        unsigned frame, unsigned uframe)
2269{
2270        __le32 *hw_p = &oxu->periodic[frame];
2271        union ehci_shadow *q = &oxu->pshadow[frame];
2272        unsigned usecs = 0;
2273
2274        while (q->ptr) {
2275                switch (Q_NEXT_TYPE(*hw_p)) {
2276                case Q_TYPE_QH:
2277                default:
2278                        /* is it in the S-mask? */
2279                        if (q->qh->hw_info2 & cpu_to_le32(1 << uframe))
2280                                usecs += q->qh->usecs;
2281                        /* ... or C-mask? */
2282                        if (q->qh->hw_info2 & cpu_to_le32(1 << (8 + uframe)))
2283                                usecs += q->qh->c_usecs;
2284                        hw_p = &q->qh->hw_next;
2285                        q = &q->qh->qh_next;
2286                        break;
2287                }
2288        }
2289#ifdef DEBUG
2290        if (usecs > 100)
2291                oxu_err(oxu, "uframe %d sched overrun: %d usecs\n",
2292                                                frame * 8 + uframe, usecs);
2293#endif
2294        return usecs;
2295}
2296
2297static int enable_periodic(struct oxu_hcd *oxu)
2298{
2299        u32 cmd;
2300        int status;
2301
2302        /* did clearing PSE did take effect yet?
2303         * takes effect only at frame boundaries...
2304         */
2305        status = handshake(oxu, &oxu->regs->status, STS_PSS, 0, 9 * 125);
2306        if (status != 0) {
2307                oxu_to_hcd(oxu)->state = HC_STATE_HALT;
2308                usb_hc_died(oxu_to_hcd(oxu));
2309                return status;
2310        }
2311
2312        cmd = readl(&oxu->regs->command) | CMD_PSE;
2313        writel(cmd, &oxu->regs->command);
2314        /* posted write ... PSS happens later */
2315        oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
2316
2317        /* make sure ehci_work scans these */
2318        oxu->next_uframe = readl(&oxu->regs->frame_index)
2319                % (oxu->periodic_size << 3);
2320        return 0;
2321}
2322
2323static int disable_periodic(struct oxu_hcd *oxu)
2324{
2325        u32 cmd;
2326        int status;
2327
2328        /* did setting PSE not take effect yet?
2329         * takes effect only at frame boundaries...
2330         */
2331        status = handshake(oxu, &oxu->regs->status, STS_PSS, STS_PSS, 9 * 125);
2332        if (status != 0) {
2333                oxu_to_hcd(oxu)->state = HC_STATE_HALT;
2334                usb_hc_died(oxu_to_hcd(oxu));
2335                return status;
2336        }
2337
2338        cmd = readl(&oxu->regs->command) & ~CMD_PSE;
2339        writel(cmd, &oxu->regs->command);
2340        /* posted write ... */
2341
2342        oxu->next_uframe = -1;
2343        return 0;
2344}
2345
2346/* periodic schedule slots have iso tds (normal or split) first, then a
2347 * sparse tree for active interrupt transfers.
2348 *
2349 * this just links in a qh; caller guarantees uframe masks are set right.
2350 * no FSTN support (yet; oxu 0.96+)
2351 */
2352static int qh_link_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
2353{
2354        unsigned i;
2355        unsigned period = qh->period;
2356
2357        dev_dbg(&qh->dev->dev,
2358                "link qh%d-%04x/%p start %d [%d/%d us]\n",
2359                period, le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
2360                qh, qh->start, qh->usecs, qh->c_usecs);
2361
2362        /* high bandwidth, or otherwise every microframe */
2363        if (period == 0)
2364                period = 1;
2365
2366        for (i = qh->start; i < oxu->periodic_size; i += period) {
2367                union ehci_shadow       *prev = &oxu->pshadow[i];
2368                __le32                  *hw_p = &oxu->periodic[i];
2369                union ehci_shadow       here = *prev;
2370                __le32                  type = 0;
2371
2372                /* skip the iso nodes at list head */
2373                while (here.ptr) {
2374                        type = Q_NEXT_TYPE(*hw_p);
2375                        if (type == Q_TYPE_QH)
2376                                break;
2377                        prev = periodic_next_shadow(prev, type);
2378                        hw_p = &here.qh->hw_next;
2379                        here = *prev;
2380                }
2381
2382                /* sorting each branch by period (slow-->fast)
2383                 * enables sharing interior tree nodes
2384                 */
2385                while (here.ptr && qh != here.qh) {
2386                        if (qh->period > here.qh->period)
2387                                break;
2388                        prev = &here.qh->qh_next;
2389                        hw_p = &here.qh->hw_next;
2390                        here = *prev;
2391                }
2392                /* link in this qh, unless some earlier pass did that */
2393                if (qh != here.qh) {
2394                        qh->qh_next = here;
2395                        if (here.qh)
2396                                qh->hw_next = *hw_p;
2397                        wmb();
2398                        prev->qh = qh;
2399                        *hw_p = QH_NEXT(qh->qh_dma);
2400                }
2401        }
2402        qh->qh_state = QH_STATE_LINKED;
2403        qh_get(qh);
2404
2405        /* update per-qh bandwidth for usbfs */
2406        oxu_to_hcd(oxu)->self.bandwidth_allocated += qh->period
2407                ? ((qh->usecs + qh->c_usecs) / qh->period)
2408                : (qh->usecs * 8);
2409
2410        /* maybe enable periodic schedule processing */
2411        if (!oxu->periodic_sched++)
2412                return enable_periodic(oxu);
2413
2414        return 0;
2415}
2416
2417static void qh_unlink_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
2418{
2419        unsigned i;
2420        unsigned period;
2421
2422        /* FIXME:
2423         *   IF this isn't high speed
2424         *   and this qh is active in the current uframe
2425         *   (and overlay token SplitXstate is false?)
2426         * THEN
2427         *   qh->hw_info1 |= cpu_to_le32(1 << 7 "ignore");
2428         */
2429
2430        /* high bandwidth, or otherwise part of every microframe */
2431        period = qh->period;
2432        if (period == 0)
2433                period = 1;
2434
2435        for (i = qh->start; i < oxu->periodic_size; i += period)
2436                periodic_unlink(oxu, i, qh);
2437
2438        /* update per-qh bandwidth for usbfs */
2439        oxu_to_hcd(oxu)->self.bandwidth_allocated -= qh->period
2440                ? ((qh->usecs + qh->c_usecs) / qh->period)
2441                : (qh->usecs * 8);
2442
2443        dev_dbg(&qh->dev->dev,
2444                "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
2445                qh->period,
2446                le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
2447                qh, qh->start, qh->usecs, qh->c_usecs);
2448
2449        /* qh->qh_next still "live" to HC */
2450        qh->qh_state = QH_STATE_UNLINK;
2451        qh->qh_next.ptr = NULL;
2452        qh_put(qh);
2453
2454        /* maybe turn off periodic schedule */
2455        oxu->periodic_sched--;
2456        if (!oxu->periodic_sched)
2457                (void) disable_periodic(oxu);
2458}
2459
2460static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2461{
2462        unsigned wait;
2463
2464        qh_unlink_periodic(oxu, qh);
2465
2466        /* simple/paranoid:  always delay, expecting the HC needs to read
2467         * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
2468         * expect hub_wq to clean up after any CSPLITs we won't issue.
2469         * active high speed queues may need bigger delays...
2470         */
2471        if (list_empty(&qh->qtd_list)
2472                || (cpu_to_le32(QH_CMASK) & qh->hw_info2) != 0)
2473                wait = 2;
2474        else
2475                wait = 55;      /* worst case: 3 * 1024 */
2476
2477        udelay(wait);
2478        qh->qh_state = QH_STATE_IDLE;
2479        qh->hw_next = EHCI_LIST_END;
2480        wmb();
2481}
2482
2483static int check_period(struct oxu_hcd *oxu,
2484                        unsigned frame, unsigned uframe,
2485                        unsigned period, unsigned usecs)
2486{
2487        int claimed;
2488
2489        /* complete split running into next frame?
2490         * given FSTN support, we could sometimes check...
2491         */
2492        if (uframe >= 8)
2493                return 0;
2494
2495        /*
2496         * 80% periodic == 100 usec/uframe available
2497         * convert "usecs we need" to "max already claimed"
2498         */
2499        usecs = 100 - usecs;
2500
2501        /* we "know" 2 and 4 uframe intervals were rejected; so
2502         * for period 0, check _every_ microframe in the schedule.
2503         */
2504        if (unlikely(period == 0)) {
2505                do {
2506                        for (uframe = 0; uframe < 7; uframe++) {
2507                                claimed = periodic_usecs(oxu, frame, uframe);
2508                                if (claimed > usecs)
2509                                        return 0;
2510                        }
2511                } while ((frame += 1) < oxu->periodic_size);
2512
2513        /* just check the specified uframe, at that period */
2514        } else {
2515                do {
2516                        claimed = periodic_usecs(oxu, frame, uframe);
2517                        if (claimed > usecs)
2518                                return 0;
2519                } while ((frame += period) < oxu->periodic_size);
2520        }
2521
2522        return 1;
2523}
2524
2525static int check_intr_schedule(struct oxu_hcd   *oxu,
2526                                unsigned frame, unsigned uframe,
2527                                const struct ehci_qh *qh, __le32 *c_maskp)
2528{
2529        int retval = -ENOSPC;
2530
2531        if (qh->c_usecs && uframe >= 6)         /* FSTN territory? */
2532                goto done;
2533
2534        if (!check_period(oxu, frame, uframe, qh->period, qh->usecs))
2535                goto done;
2536        if (!qh->c_usecs) {
2537                retval = 0;
2538                *c_maskp = 0;
2539                goto done;
2540        }
2541
2542done:
2543        return retval;
2544}
2545
2546/* "first fit" scheduling policy used the first time through,
2547 * or when the previous schedule slot can't be re-used.
2548 */
2549static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2550{
2551        int             status;
2552        unsigned        uframe;
2553        __le32          c_mask;
2554        unsigned        frame;          /* 0..(qh->period - 1), or NO_FRAME */
2555
2556        qh_refresh(oxu, qh);
2557        qh->hw_next = EHCI_LIST_END;
2558        frame = qh->start;
2559
2560        /* reuse the previous schedule slots, if we can */
2561        if (frame < qh->period) {
2562                uframe = ffs(le32_to_cpup(&qh->hw_info2) & QH_SMASK);
2563                status = check_intr_schedule(oxu, frame, --uframe,
2564                                qh, &c_mask);
2565        } else {
2566                uframe = 0;
2567                c_mask = 0;
2568                status = -ENOSPC;
2569        }
2570
2571        /* else scan the schedule to find a group of slots such that all
2572         * uframes have enough periodic bandwidth available.
2573         */
2574        if (status) {
2575                /* "normal" case, uframing flexible except with splits */
2576                if (qh->period) {
2577                        frame = qh->period - 1;
2578                        do {
2579                                for (uframe = 0; uframe < 8; uframe++) {
2580                                        status = check_intr_schedule(oxu,
2581                                                        frame, uframe, qh,
2582                                                        &c_mask);
2583                                        if (status == 0)
2584                                                break;
2585                                }
2586                        } while (status && frame--);
2587
2588                /* qh->period == 0 means every uframe */
2589                } else {
2590                        frame = 0;
2591                        status = check_intr_schedule(oxu, 0, 0, qh, &c_mask);
2592                }
2593                if (status)
2594                        goto done;
2595                qh->start = frame;
2596
2597                /* reset S-frame and (maybe) C-frame masks */
2598                qh->hw_info2 &= cpu_to_le32(~(QH_CMASK | QH_SMASK));
2599                qh->hw_info2 |= qh->period
2600                        ? cpu_to_le32(1 << uframe)
2601                        : cpu_to_le32(QH_SMASK);
2602                qh->hw_info2 |= c_mask;
2603        } else
2604                oxu_dbg(oxu, "reused qh %p schedule\n", qh);
2605
2606        /* stuff into the periodic schedule */
2607        status = qh_link_periodic(oxu, qh);
2608done:
2609        return status;
2610}
2611
2612static int intr_submit(struct oxu_hcd *oxu, struct urb *urb,
2613                        struct list_head *qtd_list, gfp_t mem_flags)
2614{
2615        unsigned epnum;
2616        unsigned long flags;
2617        struct ehci_qh *qh;
2618        int status = 0;
2619        struct list_head        empty;
2620
2621        /* get endpoint and transfer/schedule data */
2622        epnum = urb->ep->desc.bEndpointAddress;
2623
2624        spin_lock_irqsave(&oxu->lock, flags);
2625
2626        if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu)))) {
2627                status = -ESHUTDOWN;
2628                goto done;
2629        }
2630
2631        /* get qh and force any scheduling errors */
2632        INIT_LIST_HEAD(&empty);
2633        qh = qh_append_tds(oxu, urb, &empty, epnum, &urb->ep->hcpriv);
2634        if (qh == NULL) {
2635                status = -ENOMEM;
2636                goto done;
2637        }
2638        if (qh->qh_state == QH_STATE_IDLE) {
2639                status = qh_schedule(oxu, qh);
2640                if (status != 0)
2641                        goto done;
2642        }
2643
2644        /* then queue the urb's tds to the qh */
2645        qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
2646        BUG_ON(qh == NULL);
2647
2648        /* ... update usbfs periodic stats */
2649        oxu_to_hcd(oxu)->self.bandwidth_int_reqs++;
2650
2651done:
2652        spin_unlock_irqrestore(&oxu->lock, flags);
2653        if (status)
2654                qtd_list_free(oxu, urb, qtd_list);
2655
2656        return status;
2657}
2658
2659static inline int itd_submit(struct oxu_hcd *oxu, struct urb *urb,
2660                                                gfp_t mem_flags)
2661{
2662        oxu_dbg(oxu, "iso support is missing!\n");
2663        return -ENOSYS;
2664}
2665
2666static inline int sitd_submit(struct oxu_hcd *oxu, struct urb *urb,
2667                                                gfp_t mem_flags)
2668{
2669        oxu_dbg(oxu, "split iso support is missing!\n");
2670        return -ENOSYS;
2671}
2672
2673static void scan_periodic(struct oxu_hcd *oxu)
2674{
2675        unsigned frame, clock, now_uframe, mod;
2676        unsigned modified;
2677
2678        mod = oxu->periodic_size << 3;
2679
2680        /*
2681         * When running, scan from last scan point up to "now"
2682         * else clean up by scanning everything that's left.
2683         * Touches as few pages as possible:  cache-friendly.
2684         */
2685        now_uframe = oxu->next_uframe;
2686        if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2687                clock = readl(&oxu->regs->frame_index);
2688        else
2689                clock = now_uframe + mod - 1;
2690        clock %= mod;
2691
2692        for (;;) {
2693                union ehci_shadow       q, *q_p;
2694                __le32                  type, *hw_p;
2695
2696                /* don't scan past the live uframe */
2697                frame = now_uframe >> 3;
2698                if (frame != (clock >> 3)) {
2699                        /* safe to scan the whole frame at once */
2700                        now_uframe |= 0x07;
2701                }
2702
2703restart:
2704                /* scan each element in frame's queue for completions */
2705                q_p = &oxu->pshadow[frame];
2706                hw_p = &oxu->periodic[frame];
2707                q.ptr = q_p->ptr;
2708                type = Q_NEXT_TYPE(*hw_p);
2709                modified = 0;
2710
2711                while (q.ptr != NULL) {
2712                        union ehci_shadow temp;
2713
2714                        switch (type) {
2715                        case Q_TYPE_QH:
2716                                /* handle any completions */
2717                                temp.qh = qh_get(q.qh);
2718                                type = Q_NEXT_TYPE(q.qh->hw_next);
2719                                q = q.qh->qh_next;
2720                                modified = qh_completions(oxu, temp.qh);
2721                                if (unlikely(list_empty(&temp.qh->qtd_list)))
2722                                        intr_deschedule(oxu, temp.qh);
2723                                qh_put(temp.qh);
2724                                break;
2725                        default:
2726                                oxu_dbg(oxu, "corrupt type %d frame %d shadow %p\n",
2727                                        type, frame, q.ptr);
2728                                q.ptr = NULL;
2729                        }
2730
2731                        /* assume completion callbacks modify the queue */
2732                        if (unlikely(modified))
2733                                goto restart;
2734                }
2735
2736                /* Stop when we catch up to the HC */
2737
2738                /* FIXME:  this assumes we won't get lapped when
2739                 * latencies climb; that should be rare, but...
2740                 * detect it, and just go all the way around.
2741                 * FLR might help detect this case, so long as latencies
2742                 * don't exceed periodic_size msec (default 1.024 sec).
2743                 */
2744
2745                /* FIXME: likewise assumes HC doesn't halt mid-scan */
2746
2747                if (now_uframe == clock) {
2748                        unsigned        now;
2749
2750                        if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2751                                break;
2752                        oxu->next_uframe = now_uframe;
2753                        now = readl(&oxu->regs->frame_index) % mod;
2754                        if (now_uframe == now)
2755                                break;
2756
2757                        /* rescan the rest of this frame, then ... */
2758                        clock = now;
2759                } else {
2760                        now_uframe++;
2761                        now_uframe %= mod;
2762                }
2763        }
2764}
2765
2766/* On some systems, leaving remote wakeup enabled prevents system shutdown.
2767 * The firmware seems to think that powering off is a wakeup event!
2768 * This routine turns off remote wakeup and everything else, on all ports.
2769 */
2770static void ehci_turn_off_all_ports(struct oxu_hcd *oxu)
2771{
2772        int port = HCS_N_PORTS(oxu->hcs_params);
2773
2774        while (port--)
2775                writel(PORT_RWC_BITS, &oxu->regs->port_status[port]);
2776}
2777
2778static void ehci_port_power(struct oxu_hcd *oxu, int is_on)
2779{
2780        unsigned port;
2781
2782        if (!HCS_PPC(oxu->hcs_params))
2783                return;
2784
2785        oxu_dbg(oxu, "...power%s ports...\n", is_on ? "up" : "down");
2786        for (port = HCS_N_PORTS(oxu->hcs_params); port > 0; )
2787                (void) oxu_hub_control(oxu_to_hcd(oxu),
2788                                is_on ? SetPortFeature : ClearPortFeature,
2789                                USB_PORT_FEAT_POWER,
2790                                port--, NULL, 0);
2791        msleep(20);
2792}
2793
2794/* Called from some interrupts, timers, and so on.
2795 * It calls driver completion functions, after dropping oxu->lock.
2796 */
2797static void ehci_work(struct oxu_hcd *oxu)
2798{
2799        timer_action_done(oxu, TIMER_IO_WATCHDOG);
2800        if (oxu->reclaim_ready)
2801                end_unlink_async(oxu);
2802
2803        /* another CPU may drop oxu->lock during a schedule scan while
2804         * it reports urb completions.  this flag guards against bogus
2805         * attempts at re-entrant schedule scanning.
2806         */
2807        if (oxu->scanning)
2808                return;
2809        oxu->scanning = 1;
2810        scan_async(oxu);
2811        if (oxu->next_uframe != -1)
2812                scan_periodic(oxu);
2813        oxu->scanning = 0;
2814
2815        /* the IO watchdog guards against hardware or driver bugs that
2816         * misplace IRQs, and should let us run completely without IRQs.
2817         * such lossage has been observed on both VT6202 and VT8235.
2818         */
2819        if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state) &&
2820                        (oxu->async->qh_next.ptr != NULL ||
2821                         oxu->periodic_sched != 0))
2822                timer_action(oxu, TIMER_IO_WATCHDOG);
2823}
2824
2825static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
2826{
2827        /* if we need to use IAA and it's busy, defer */
2828        if (qh->qh_state == QH_STATE_LINKED
2829                        && oxu->reclaim
2830                        && HC_IS_RUNNING(oxu_to_hcd(oxu)->state)) {
2831                struct ehci_qh          *last;
2832
2833                for (last = oxu->reclaim;
2834                                last->reclaim;
2835                                last = last->reclaim)
2836                        continue;
2837                qh->qh_state = QH_STATE_UNLINK_WAIT;
2838                last->reclaim = qh;
2839
2840        /* bypass IAA if the hc can't care */
2841        } else if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state) && oxu->reclaim)
2842                end_unlink_async(oxu);
2843
2844        /* something else might have unlinked the qh by now */
2845        if (qh->qh_state == QH_STATE_LINKED)
2846                start_unlink_async(oxu, qh);
2847}
2848
2849/*
2850 * USB host controller methods
2851 */
2852
2853static irqreturn_t oxu210_hcd_irq(struct usb_hcd *hcd)
2854{
2855        struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2856        u32 status, pcd_status = 0;
2857        int bh;
2858
2859        spin_lock(&oxu->lock);
2860
2861        status = readl(&oxu->regs->status);
2862
2863        /* e.g. cardbus physical eject */
2864        if (status == ~(u32) 0) {
2865                oxu_dbg(oxu, "device removed\n");
2866                goto dead;
2867        }
2868
2869        /* Shared IRQ? */
2870        status &= INTR_MASK;
2871        if (!status || unlikely(hcd->state == HC_STATE_HALT)) {
2872                spin_unlock(&oxu->lock);
2873                return IRQ_NONE;
2874        }
2875
2876        /* clear (just) interrupts */
2877        writel(status, &oxu->regs->status);
2878        readl(&oxu->regs->command);     /* unblock posted write */
2879        bh = 0;
2880
2881#ifdef OXU_VERBOSE_DEBUG
2882        /* unrequested/ignored: Frame List Rollover */
2883        dbg_status(oxu, "irq", status);
2884#endif
2885
2886        /* INT, ERR, and IAA interrupt rates can be throttled */
2887
2888        /* normal [4.15.1.2] or error [4.15.1.1] completion */
2889        if (likely((status & (STS_INT|STS_ERR)) != 0))
2890                bh = 1;
2891
2892        /* complete the unlinking of some qh [4.15.2.3] */
2893        if (status & STS_IAA) {
2894                oxu->reclaim_ready = 1;
2895                bh = 1;
2896        }
2897
2898        /* remote wakeup [4.3.1] */
2899        if (status & STS_PCD) {
2900                unsigned i = HCS_N_PORTS(oxu->hcs_params);
2901                pcd_status = status;
2902
2903                /* resume root hub? */
2904                if (!(readl(&oxu->regs->command) & CMD_RUN))
2905                        usb_hcd_resume_root_hub(hcd);
2906
2907                while (i--) {
2908                        int pstatus = readl(&oxu->regs->port_status[i]);
2909
2910                        if (pstatus & PORT_OWNER)
2911                                continue;
2912                        if (!(pstatus & PORT_RESUME)
2913                                        || oxu->reset_done[i] != 0)
2914                                continue;
2915
2916                        /* start USB_RESUME_TIMEOUT resume signaling from this
2917                         * port, and make hub_wq collect PORT_STAT_C_SUSPEND to
2918                         * stop that signaling.
2919                         */
2920                        oxu->reset_done[i] = jiffies +
2921                                msecs_to_jiffies(USB_RESUME_TIMEOUT);
2922                        oxu_dbg(oxu, "port %d remote wakeup\n", i + 1);
2923                        mod_timer(&hcd->rh_timer, oxu->reset_done[i]);
2924                }
2925        }
2926
2927        /* PCI errors [4.15.2.4] */
2928        if (unlikely((status & STS_FATAL) != 0)) {
2929                /* bogus "fatal" IRQs appear on some chips... why?  */
2930                status = readl(&oxu->regs->status);
2931                dbg_cmd(oxu, "fatal", readl(&oxu->regs->command));
2932                dbg_status(oxu, "fatal", status);
2933                if (status & STS_HALT) {
2934                        oxu_err(oxu, "fatal error\n");
2935dead:
2936                        ehci_reset(oxu);
2937                        writel(0, &oxu->regs->configured_flag);
2938                        usb_hc_died(hcd);
2939                        /* generic layer kills/unlinks all urbs, then
2940                         * uses oxu_stop to clean up the rest
2941                         */
2942                        bh = 1;
2943                }
2944        }
2945
2946        if (bh)
2947                ehci_work(oxu);
2948        spin_unlock(&oxu->lock);
2949        if (pcd_status & STS_PCD)
2950                usb_hcd_poll_rh_status(hcd);
2951        return IRQ_HANDLED;
2952}
2953
2954static irqreturn_t oxu_irq(struct usb_hcd *hcd)
2955{
2956        struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2957        int ret = IRQ_HANDLED;
2958
2959        u32 status = oxu_readl(hcd->regs, OXU_CHIPIRQSTATUS);
2960        u32 enable = oxu_readl(hcd->regs, OXU_CHIPIRQEN_SET);
2961
2962        /* Disable all interrupt */
2963        oxu_writel(hcd->regs, OXU_CHIPIRQEN_CLR, enable);
2964
2965        if ((oxu->is_otg && (status & OXU_USBOTGI)) ||
2966                (!oxu->is_otg && (status & OXU_USBSPHI)))
2967                oxu210_hcd_irq(hcd);
2968        else
2969                ret = IRQ_NONE;
2970
2971        /* Enable all interrupt back */
2972        oxu_writel(hcd->regs, OXU_CHIPIRQEN_SET, enable);
2973
2974        return ret;
2975}
2976
2977static void oxu_watchdog(struct timer_list *t)
2978{
2979        struct oxu_hcd  *oxu = from_timer(oxu, t, watchdog);
2980        unsigned long flags;
2981
2982        spin_lock_irqsave(&oxu->lock, flags);
2983
2984        /* lost IAA irqs wedge things badly; seen with a vt8235 */
2985        if (oxu->reclaim) {
2986                u32 status = readl(&oxu->regs->status);
2987                if (status & STS_IAA) {
2988                        oxu_vdbg(oxu, "lost IAA\n");
2989                        writel(STS_IAA, &oxu->regs->status);
2990                        oxu->reclaim_ready = 1;
2991                }
2992        }
2993
2994        /* stop async processing after it's idled a bit */
2995        if (test_bit(TIMER_ASYNC_OFF, &oxu->actions))
2996                start_unlink_async(oxu, oxu->async);
2997
2998        /* oxu could run by timer, without IRQs ... */
2999        ehci_work(oxu);
3000
3001        spin_unlock_irqrestore(&oxu->lock, flags);
3002}
3003
3004/* One-time init, only for memory state.
3005 */
3006static int oxu_hcd_init(struct usb_hcd *hcd)
3007{
3008        struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3009        u32 temp;
3010        int retval;
3011        u32 hcc_params;
3012
3013        spin_lock_init(&oxu->lock);
3014
3015        timer_setup(&oxu->watchdog, oxu_watchdog, 0);
3016
3017        /*
3018         * hw default: 1K periodic list heads, one per frame.
3019         * periodic_size can shrink by USBCMD update if hcc_params allows.
3020         */
3021        oxu->periodic_size = DEFAULT_I_TDPS;
3022        retval = ehci_mem_init(oxu, GFP_KERNEL);
3023        if (retval < 0)
3024                return retval;
3025
3026        /* controllers may cache some of the periodic schedule ... */
3027        hcc_params = readl(&oxu->caps->hcc_params);
3028        if (HCC_ISOC_CACHE(hcc_params))         /* full frame cache */
3029                oxu->i_thresh = 8;
3030        else                                    /* N microframes cached */
3031                oxu->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
3032
3033        oxu->reclaim = NULL;
3034        oxu->reclaim_ready = 0;
3035        oxu->next_uframe = -1;
3036
3037        /*
3038         * dedicate a qh for the async ring head, since we couldn't unlink
3039         * a 'real' qh without stopping the async schedule [4.8].  use it
3040         * as the 'reclamation list head' too.
3041         * its dummy is used in hw_alt_next of many tds, to prevent the qh
3042         * from automatically advancing to the next td after short reads.
3043         */
3044        oxu->async->qh_next.qh = NULL;
3045        oxu->async->hw_next = QH_NEXT(oxu->async->qh_dma);
3046        oxu->async->hw_info1 = cpu_to_le32(QH_HEAD);
3047        oxu->async->hw_token = cpu_to_le32(QTD_STS_HALT);
3048        oxu->async->hw_qtd_next = EHCI_LIST_END;
3049        oxu->async->qh_state = QH_STATE_LINKED;
3050        oxu->async->hw_alt_next = QTD_NEXT(oxu->async->dummy->qtd_dma);
3051
3052        /* clear interrupt enables, set irq latency */
3053        if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
3054                log2_irq_thresh = 0;
3055        temp = 1 << (16 + log2_irq_thresh);
3056        if (HCC_CANPARK(hcc_params)) {
3057                /* HW default park == 3, on hardware that supports it (like
3058                 * NVidia and ALI silicon), maximizes throughput on the async
3059                 * schedule by avoiding QH fetches between transfers.
3060                 *
3061                 * With fast usb storage devices and NForce2, "park" seems to
3062                 * make problems:  throughput reduction (!), data errors...
3063                 */
3064                if (park) {
3065                        park = min(park, (unsigned) 3);
3066                        temp |= CMD_PARK;
3067                        temp |= park << 8;
3068                }
3069                oxu_dbg(oxu, "park %d\n", park);
3070        }
3071        if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
3072                /* periodic schedule size can be smaller than default */
3073                temp &= ~(3 << 2);
3074                temp |= (EHCI_TUNE_FLS << 2);
3075        }
3076        oxu->command = temp;
3077
3078        return 0;
3079}
3080
3081/* Called during probe() after chip reset completes.
3082 */
3083static int oxu_reset(struct usb_hcd *hcd)
3084{
3085        struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3086
3087        spin_lock_init(&oxu->mem_lock);
3088        INIT_LIST_HEAD(&oxu->urb_list);
3089        oxu->urb_len = 0;
3090
3091        if (oxu->is_otg) {
3092                oxu->caps = hcd->regs + OXU_OTG_CAP_OFFSET;
3093                oxu->regs = hcd->regs + OXU_OTG_CAP_OFFSET + \
3094                        HC_LENGTH(readl(&oxu->caps->hc_capbase));
3095
3096                oxu->mem = hcd->regs + OXU_SPH_MEM;
3097        } else {
3098                oxu->caps = hcd->regs + OXU_SPH_CAP_OFFSET;
3099                oxu->regs = hcd->regs + OXU_SPH_CAP_OFFSET + \
3100                        HC_LENGTH(readl(&oxu->caps->hc_capbase));
3101
3102                oxu->mem = hcd->regs + OXU_OTG_MEM;
3103        }
3104
3105        oxu->hcs_params = readl(&oxu->caps->hcs_params);
3106        oxu->sbrn = 0x20;
3107
3108        return oxu_hcd_init(hcd);
3109}
3110
3111static int oxu_run(struct usb_hcd *hcd)
3112{
3113        struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3114        int retval;
3115        u32 temp, hcc_params;
3116
3117        hcd->uses_new_polling = 1;
3118
3119        /* EHCI spec section 4.1 */
3120        retval = ehci_reset(oxu);
3121        if (retval != 0) {
3122                ehci_mem_cleanup(oxu);
3123                return retval;
3124        }
3125        writel(oxu->periodic_dma, &oxu->regs->frame_list);
3126        writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
3127
3128        /* hcc_params controls whether oxu->regs->segment must (!!!)
3129         * be used; it constrains QH/ITD/SITD and QTD locations.
3130         * dma_pool consistent memory always uses segment zero.
3131         * streaming mappings for I/O buffers, like pci_map_single(),
3132         * can return segments above 4GB, if the device allows.
3133         *
3134         * NOTE:  the dma mask is visible through dev->dma_mask, so
3135         * drivers can pass this info along ... like NETIF_F_HIGHDMA,
3136         * Scsi_Host.highmem_io, and so forth.  It's readonly to all
3137         * host side drivers though.
3138         */
3139        hcc_params = readl(&oxu->caps->hcc_params);
3140        if (HCC_64BIT_ADDR(hcc_params))
3141                writel(0, &oxu->regs->segment);
3142
3143        oxu->command &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE |
3144                                CMD_ASE | CMD_RESET);
3145        oxu->command |= CMD_RUN;
3146        writel(oxu->command, &oxu->regs->command);
3147        dbg_cmd(oxu, "init", oxu->command);
3148
3149        /*
3150         * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
3151         * are explicitly handed to companion controller(s), so no TT is
3152         * involved with the root hub.  (Except where one is integrated,
3153         * and there's no companion controller unless maybe for USB OTG.)
3154         */
3155        hcd->state = HC_STATE_RUNNING;
3156        writel(FLAG_CF, &oxu->regs->configured_flag);
3157        readl(&oxu->regs->command);     /* unblock posted writes */
3158
3159        temp = HC_VERSION(readl(&oxu->caps->hc_capbase));
3160        oxu_info(oxu, "USB %x.%x started, quasi-EHCI %x.%02x, driver %s%s\n",
3161                ((oxu->sbrn & 0xf0)>>4), (oxu->sbrn & 0x0f),
3162                temp >> 8, temp & 0xff, DRIVER_VERSION,
3163                ignore_oc ? ", overcurrent ignored" : "");
3164
3165        writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */
3166
3167        return 0;
3168}
3169
3170static void oxu_stop(struct usb_hcd *hcd)
3171{
3172        struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3173
3174        /* Turn off port power on all root hub ports. */
3175        ehci_port_power(oxu, 0);
3176
3177        /* no more interrupts ... */
3178        del_timer_sync(&oxu->watchdog);
3179
3180        spin_lock_irq(&oxu->lock);
3181        if (HC_IS_RUNNING(hcd->state))
3182                ehci_quiesce(oxu);
3183
3184        ehci_reset(oxu);
3185        writel(0, &oxu->regs->intr_enable);
3186        spin_unlock_irq(&oxu->lock);
3187
3188        /* let companion controllers work when we aren't */
3189        writel(0, &oxu->regs->configured_flag);
3190
3191        /* root hub is shut down separately (first, when possible) */
3192        spin_lock_irq(&oxu->lock);
3193        if (oxu->async)
3194                ehci_work(oxu);
3195        spin_unlock_irq(&oxu->lock);
3196        ehci_mem_cleanup(oxu);
3197
3198        dbg_status(oxu, "oxu_stop completed", readl(&oxu->regs->status));
3199}
3200
3201/* Kick in for silicon on any bus (not just pci, etc).
3202 * This forcibly disables dma and IRQs, helping kexec and other cases
3203 * where the next system software may expect clean state.
3204 */
3205static void oxu_shutdown(struct usb_hcd *hcd)
3206{
3207        struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3208
3209        (void) ehci_halt(oxu);
3210        ehci_turn_off_all_ports(oxu);
3211
3212        /* make BIOS/etc use companion controller during reboot */
3213        writel(0, &oxu->regs->configured_flag);
3214
3215        /* unblock posted writes */
3216        readl(&oxu->regs->configured_flag);
3217}
3218
3219/* Non-error returns are a promise to giveback() the urb later
3220 * we drop ownership so next owner (or urb unlink) can get it
3221 *
3222 * urb + dev is in hcd.self.controller.urb_list
3223 * we're queueing TDs onto software and hardware lists
3224 *
3225 * hcd-specific init for hcpriv hasn't been done yet
3226 *
3227 * NOTE:  control, bulk, and interrupt share the same code to append TDs
3228 * to a (possibly active) QH, and the same QH scanning code.
3229 */
3230static int __oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
3231                                gfp_t mem_flags)
3232{
3233        struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3234        struct list_head qtd_list;
3235
3236        INIT_LIST_HEAD(&qtd_list);
3237
3238        switch (usb_pipetype(urb->pipe)) {
3239        case PIPE_CONTROL:
3240        case PIPE_BULK:
3241        default:
3242                if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
3243                        return -ENOMEM;
3244                return submit_async(oxu, urb, &qtd_list, mem_flags);
3245
3246        case PIPE_INTERRUPT:
3247                if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
3248                        return -ENOMEM;
3249                return intr_submit(oxu, urb, &qtd_list, mem_flags);
3250
3251        case PIPE_ISOCHRONOUS:
3252                if (urb->dev->speed == USB_SPEED_HIGH)
3253                        return itd_submit(oxu, urb, mem_flags);
3254                else
3255                        return sitd_submit(oxu, urb, mem_flags);
3256        }
3257}
3258
3259/* This function is responsible for breaking URBs with big data size
3260 * into smaller size and processing small urbs in sequence.
3261 */
3262static int oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
3263                                gfp_t mem_flags)
3264{
3265        struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3266        int num, rem;
3267        void *transfer_buffer;
3268        struct urb *murb;
3269        int i, ret;
3270
3271        /* If not bulk pipe just enqueue the URB */
3272        if (!usb_pipebulk(urb->pipe))
3273                return __oxu_urb_enqueue(hcd, urb, mem_flags);
3274
3275        /* Otherwise we should verify the USB transfer buffer size! */
3276        transfer_buffer = urb->transfer_buffer;
3277
3278        num = urb->transfer_buffer_length / 4096;
3279        rem = urb->transfer_buffer_length % 4096;
3280        if (rem != 0)
3281                num++;
3282
3283        /* If URB is smaller than 4096 bytes just enqueue it! */
3284        if (num == 1)
3285                return __oxu_urb_enqueue(hcd, urb, mem_flags);
3286
3287        /* Ok, we have more job to do! :) */
3288
3289        for (i = 0; i < num - 1; i++) {
3290                /* Get free micro URB poll till a free urb is received */
3291
3292                do {
3293                        murb = (struct urb *) oxu_murb_alloc(oxu);
3294                        if (!murb)
3295                                schedule();
3296                } while (!murb);
3297
3298                /* Coping the urb */
3299                memcpy(murb, urb, sizeof(struct urb));
3300
3301                murb->transfer_buffer_length = 4096;
3302                murb->transfer_buffer = transfer_buffer + i * 4096;
3303
3304                /* Null pointer for the encodes that this is a micro urb */
3305                murb->complete = NULL;
3306
3307                ((struct oxu_murb *) murb)->main = urb;
3308                ((struct oxu_murb *) murb)->last = 0;
3309
3310                /* This loop is to guarantee urb to be processed when there's
3311                 * not enough resources at a particular time by retrying.
3312                 */
3313                do {
3314                        ret  = __oxu_urb_enqueue(hcd, murb, mem_flags);
3315                        if (ret)
3316                                schedule();
3317                } while (ret);
3318        }
3319
3320        /* Last urb requires special handling  */
3321
3322        /* Get free micro URB poll till a free urb is received */
3323        do {
3324                murb = (struct urb *) oxu_murb_alloc(oxu);
3325                if (!murb)
3326                        schedule();
3327        } while (!murb);
3328
3329        /* Coping the urb */
3330        memcpy(murb, urb, sizeof(struct urb));
3331
3332        murb->transfer_buffer_length = rem > 0 ? rem : 4096;
3333        murb->transfer_buffer = transfer_buffer + (num - 1) * 4096;
3334
3335        /* Null pointer for the encodes that this is a micro urb */
3336        murb->complete = NULL;
3337
3338        ((struct oxu_murb *) murb)->main = urb;
3339        ((struct oxu_murb *) murb)->last = 1;
3340
3341        do {
3342                ret = __oxu_urb_enqueue(hcd, murb, mem_flags);
3343                if (ret)
3344                        schedule();
3345        } while (ret);
3346
3347        return ret;
3348}
3349
3350/* Remove from hardware lists.
3351 * Completions normally happen asynchronously
3352 */
3353static int oxu_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
3354{
3355        struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3356        struct ehci_qh *qh;
3357        unsigned long flags;
3358
3359        spin_lock_irqsave(&oxu->lock, flags);
3360        switch (usb_pipetype(urb->pipe)) {
3361        case PIPE_CONTROL:
3362        case PIPE_BULK:
3363        default:
3364                qh = (struct ehci_qh *) urb->hcpriv;
3365                if (!qh)
3366                        break;
3367                unlink_async(oxu, qh);
3368                break;
3369
3370        case PIPE_INTERRUPT:
3371                qh = (struct ehci_qh *) urb->hcpriv;
3372                if (!qh)
3373                        break;
3374                switch (qh->qh_state) {
3375                case QH_STATE_LINKED:
3376                        intr_deschedule(oxu, qh);
3377                        /* FALL THROUGH */
3378                case QH_STATE_IDLE:
3379                        qh_completions(oxu, qh);
3380                        break;
3381                default:
3382                        oxu_dbg(oxu, "bogus qh %p state %d\n",
3383                                        qh, qh->qh_state);
3384                        goto done;
3385                }
3386
3387                /* reschedule QH iff another request is queued */
3388                if (!list_empty(&qh->qtd_list)
3389                                && HC_IS_RUNNING(hcd->state)) {
3390                        int status;
3391
3392                        status = qh_schedule(oxu, qh);
3393                        spin_unlock_irqrestore(&oxu->lock, flags);
3394
3395                        if (status != 0) {
3396                                /* shouldn't happen often, but ...
3397                                 * FIXME kill those tds' urbs
3398                                 */
3399                                dev_err(hcd->self.controller,
3400                                        "can't reschedule qh %p, err %d\n", qh,
3401                                        status);
3402                        }
3403                        return status;
3404                }
3405                break;
3406        }
3407done:
3408        spin_unlock_irqrestore(&oxu->lock, flags);
3409        return 0;
3410}
3411
3412/* Bulk qh holds the data toggle */
3413static void oxu_endpoint_disable(struct usb_hcd *hcd,
3414                                        struct usb_host_endpoint *ep)
3415{
3416        struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3417        unsigned long           flags;
3418        struct ehci_qh          *qh, *tmp;
3419
3420        /* ASSERT:  any requests/urbs are being unlinked */
3421        /* ASSERT:  nobody can be submitting urbs for this any more */
3422
3423rescan:
3424        spin_lock_irqsave(&oxu->lock, flags);
3425        qh = ep->hcpriv;
3426        if (!qh)
3427                goto done;
3428
3429        /* endpoints can be iso streams.  for now, we don't
3430         * accelerate iso completions ... so spin a while.
3431         */
3432        if (qh->hw_info1 == 0) {
3433                oxu_vdbg(oxu, "iso delay\n");
3434                goto idle_timeout;
3435        }
3436
3437        if (!HC_IS_RUNNING(hcd->state))
3438                qh->qh_state = QH_STATE_IDLE;
3439        switch (qh->qh_state) {
3440        case QH_STATE_LINKED:
3441                for (tmp = oxu->async->qh_next.qh;
3442                                tmp && tmp != qh;
3443                                tmp = tmp->qh_next.qh)
3444                        continue;
3445                /* periodic qh self-unlinks on empty */
3446                if (!tmp)
3447                        goto nogood;
3448                unlink_async(oxu, qh);
3449                /* FALL THROUGH */
3450        case QH_STATE_UNLINK:           /* wait for hw to finish? */
3451idle_timeout:
3452                spin_unlock_irqrestore(&oxu->lock, flags);
3453                schedule_timeout_uninterruptible(1);
3454                goto rescan;
3455        case QH_STATE_IDLE:             /* fully unlinked */
3456                if (list_empty(&qh->qtd_list)) {
3457                        qh_put(qh);
3458                        break;
3459                }
3460                /* fall through */
3461        default:
3462nogood:
3463                /* caller was supposed to have unlinked any requests;
3464                 * that's not our job.  just leak this memory.
3465                 */
3466                oxu_err(oxu, "qh %p (#%02x) state %d%s\n",
3467                        qh, ep->desc.bEndpointAddress, qh->qh_state,
3468                        list_empty(&qh->qtd_list) ? "" : "(has tds)");
3469                break;
3470        }
3471        ep->hcpriv = NULL;
3472done:
3473        spin_unlock_irqrestore(&oxu->lock, flags);
3474}
3475
3476static int oxu_get_frame(struct usb_hcd *hcd)
3477{
3478        struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3479
3480        return (readl(&oxu->regs->frame_index) >> 3) %
3481                oxu->periodic_size;
3482}
3483
3484/* Build "status change" packet (one or two bytes) from HC registers */
3485static int oxu_hub_status_data(struct usb_hcd *hcd, char *buf)
3486{
3487        struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3488        u32 temp, mask, status = 0;
3489        int ports, i, retval = 1;
3490        unsigned long flags;
3491
3492        /* if !PM, root hub timers won't get shut down ... */
3493        if (!HC_IS_RUNNING(hcd->state))
3494                return 0;
3495
3496        /* init status to no-changes */
3497        buf[0] = 0;
3498        ports = HCS_N_PORTS(oxu->hcs_params);
3499        if (ports > 7) {
3500                buf[1] = 0;
3501                retval++;
3502        }
3503
3504        /* Some boards (mostly VIA?) report bogus overcurrent indications,
3505         * causing massive log spam unless we completely ignore them.  It
3506         * may be relevant that VIA VT8235 controllers, where PORT_POWER is
3507         * always set, seem to clear PORT_OCC and PORT_CSC when writing to
3508         * PORT_POWER; that's surprising, but maybe within-spec.
3509         */
3510        if (!ignore_oc)
3511                mask = PORT_CSC | PORT_PEC | PORT_OCC;
3512        else
3513                mask = PORT_CSC | PORT_PEC;
3514
3515        /* no hub change reports (bit 0) for now (power, ...) */
3516
3517        /* port N changes (bit N)? */
3518        spin_lock_irqsave(&oxu->lock, flags);
3519        for (i = 0; i < ports; i++) {
3520                temp = readl(&oxu->regs->port_status[i]);
3521
3522                /*
3523                 * Return status information even for ports with OWNER set.
3524                 * Otherwise hub_wq wouldn't see the disconnect event when a
3525                 * high-speed device is switched over to the companion
3526                 * controller by the user.
3527                 */
3528
3529                if (!(temp & PORT_CONNECT))
3530                        oxu->reset_done[i] = 0;
3531                if ((temp & mask) != 0 || ((temp & PORT_RESUME) != 0 &&
3532                                time_after_eq(jiffies, oxu->reset_done[i]))) {
3533                        if (i < 7)
3534                                buf[0] |= 1 << (i + 1);
3535                        else
3536                                buf[1] |= 1 << (i - 7);
3537                        status = STS_PCD;
3538                }
3539        }
3540        /* FIXME autosuspend idle root hubs */
3541        spin_unlock_irqrestore(&oxu->lock, flags);
3542        return status ? retval : 0;
3543}
3544
3545/* Returns the speed of a device attached to a port on the root hub. */
3546static inline unsigned int oxu_port_speed(struct oxu_hcd *oxu,
3547                                                unsigned int portsc)
3548{
3549        switch ((portsc >> 26) & 3) {
3550        case 0:
3551                return 0;
3552        case 1:
3553                return USB_PORT_STAT_LOW_SPEED;
3554        case 2:
3555        default:
3556                return USB_PORT_STAT_HIGH_SPEED;
3557        }
3558}
3559
3560#define PORT_WAKE_BITS  (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
3561static int oxu_hub_control(struct usb_hcd *hcd, u16 typeReq,
3562                                u16 wValue, u16 wIndex, char *buf, u16 wLength)
3563{
3564        struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3565        int ports = HCS_N_PORTS(oxu->hcs_params);
3566        u32 __iomem *status_reg = &oxu->regs->port_status[wIndex - 1];
3567        u32 temp, status;
3568        unsigned long   flags;
3569        int retval = 0;
3570        unsigned selector;
3571
3572        /*
3573         * FIXME:  support SetPortFeatures USB_PORT_FEAT_INDICATOR.
3574         * HCS_INDICATOR may say we can change LEDs to off/amber/green.
3575         * (track current state ourselves) ... blink for diagnostics,
3576         * power, "this is the one", etc.  EHCI spec supports this.
3577         */
3578
3579        spin_lock_irqsave(&oxu->lock, flags);
3580        switch (typeReq) {
3581        case ClearHubFeature:
3582                switch (wValue) {
3583                case C_HUB_LOCAL_POWER:
3584                case C_HUB_OVER_CURRENT:
3585                        /* no hub-wide feature/status flags */
3586                        break;
3587                default:
3588                        goto error;
3589                }
3590                break;
3591        case ClearPortFeature:
3592                if (!wIndex || wIndex > ports)
3593                        goto error;
3594                wIndex--;
3595                temp = readl(status_reg);
3596
3597                /*
3598                 * Even if OWNER is set, so the port is owned by the
3599                 * companion controller, hub_wq needs to be able to clear
3600                 * the port-change status bits (especially
3601                 * USB_PORT_STAT_C_CONNECTION).
3602                 */
3603
3604                switch (wValue) {
3605                case USB_PORT_FEAT_ENABLE:
3606                        writel(temp & ~PORT_PE, status_reg);
3607                        break;
3608                case USB_PORT_FEAT_C_ENABLE:
3609                        writel((temp & ~PORT_RWC_BITS) | PORT_PEC, status_reg);
3610                        break;
3611                case USB_PORT_FEAT_SUSPEND:
3612                        if (temp & PORT_RESET)
3613                                goto error;
3614                        if (temp & PORT_SUSPEND) {
3615                                if ((temp & PORT_PE) == 0)
3616                                        goto error;
3617                                /* resume signaling for 20 msec */
3618                                temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
3619                                writel(temp | PORT_RESUME, status_reg);
3620                                oxu->reset_done[wIndex] = jiffies
3621                                                + msecs_to_jiffies(20);
3622                        }
3623                        break;
3624                case USB_PORT_FEAT_C_SUSPEND:
3625                        /* we auto-clear this feature */
3626                        break;
3627                case USB_PORT_FEAT_POWER:
3628                        if (HCS_PPC(oxu->hcs_params))
3629                                writel(temp & ~(PORT_RWC_BITS | PORT_POWER),
3630                                          status_reg);
3631                        break;
3632                case USB_PORT_FEAT_C_CONNECTION:
3633                        writel((temp & ~PORT_RWC_BITS) | PORT_CSC, status_reg);
3634                        break;
3635                case USB_PORT_FEAT_C_OVER_CURRENT:
3636                        writel((temp & ~PORT_RWC_BITS) | PORT_OCC, status_reg);
3637                        break;
3638                case USB_PORT_FEAT_C_RESET:
3639                        /* GetPortStatus clears reset */
3640                        break;
3641                default:
3642                        goto error;
3643                }
3644                readl(&oxu->regs->command);     /* unblock posted write */
3645                break;
3646        case GetHubDescriptor:
3647                ehci_hub_descriptor(oxu, (struct usb_hub_descriptor *)
3648                        buf);
3649                break;
3650        case GetHubStatus:
3651                /* no hub-wide feature/status flags */
3652                memset(buf, 0, 4);
3653                break;
3654        case GetPortStatus:
3655                if (!wIndex || wIndex > ports)
3656                        goto error;
3657                wIndex--;
3658                status = 0;
3659                temp = readl(status_reg);
3660
3661                /* wPortChange bits */
3662                if (temp & PORT_CSC)
3663                        status |= USB_PORT_STAT_C_CONNECTION << 16;
3664                if (temp & PORT_PEC)
3665                        status |= USB_PORT_STAT_C_ENABLE << 16;
3666                if ((temp & PORT_OCC) && !ignore_oc)
3667                        status |= USB_PORT_STAT_C_OVERCURRENT << 16;
3668
3669                /* whoever resumes must GetPortStatus to complete it!! */
3670                if (temp & PORT_RESUME) {
3671
3672                        /* Remote Wakeup received? */
3673                        if (!oxu->reset_done[wIndex]) {
3674                                /* resume signaling for 20 msec */
3675                                oxu->reset_done[wIndex] = jiffies
3676                                                + msecs_to_jiffies(20);
3677                                /* check the port again */
3678                                mod_timer(&oxu_to_hcd(oxu)->rh_timer,
3679                                                oxu->reset_done[wIndex]);
3680                        }
3681
3682                        /* resume completed? */
3683                        else if (time_after_eq(jiffies,
3684                                        oxu->reset_done[wIndex])) {
3685                                status |= USB_PORT_STAT_C_SUSPEND << 16;
3686                                oxu->reset_done[wIndex] = 0;
3687
3688                                /* stop resume signaling */
3689                                temp = readl(status_reg);
3690                                writel(temp & ~(PORT_RWC_BITS | PORT_RESUME),
3691                                        status_reg);
3692                                retval = handshake(oxu, status_reg,
3693                                           PORT_RESUME, 0, 2000 /* 2msec */);
3694                                if (retval != 0) {
3695                                        oxu_err(oxu,
3696                                                "port %d resume error %d\n",
3697                                                wIndex + 1, retval);
3698                                        goto error;
3699                                }
3700                                temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
3701                        }
3702                }
3703
3704                /* whoever resets must GetPortStatus to complete it!! */
3705                if ((temp & PORT_RESET)
3706                                && time_after_eq(jiffies,
3707                                        oxu->reset_done[wIndex])) {
3708                        status |= USB_PORT_STAT_C_RESET << 16;
3709                        oxu->reset_done[wIndex] = 0;
3710
3711                        /* force reset to complete */
3712                        writel(temp & ~(PORT_RWC_BITS | PORT_RESET),
3713                                        status_reg);
3714                        /* REVISIT:  some hardware needs 550+ usec to clear
3715                         * this bit; seems too long to spin routinely...
3716                         */
3717                        retval = handshake(oxu, status_reg,
3718                                        PORT_RESET, 0, 750);
3719                        if (retval != 0) {
3720                                oxu_err(oxu, "port %d reset error %d\n",
3721                                        wIndex + 1, retval);
3722                                goto error;
3723                        }
3724
3725                        /* see what we found out */
3726                        temp = check_reset_complete(oxu, wIndex, status_reg,
3727                                        readl(status_reg));
3728                }
3729
3730                /* transfer dedicated ports to the companion hc */
3731                if ((temp & PORT_CONNECT) &&
3732                                test_bit(wIndex, &oxu->companion_ports)) {
3733                        temp &= ~PORT_RWC_BITS;
3734                        temp |= PORT_OWNER;
3735                        writel(temp, status_reg);
3736                        oxu_dbg(oxu, "port %d --> companion\n", wIndex + 1);
3737                        temp = readl(status_reg);
3738                }
3739
3740                /*
3741                 * Even if OWNER is set, there's no harm letting hub_wq
3742                 * see the wPortStatus values (they should all be 0 except
3743                 * for PORT_POWER anyway).
3744                 */
3745
3746                if (temp & PORT_CONNECT) {
3747                        status |= USB_PORT_STAT_CONNECTION;
3748                        /* status may be from integrated TT */
3749                        status |= oxu_port_speed(oxu, temp);
3750                }
3751                if (temp & PORT_PE)
3752                        status |= USB_PORT_STAT_ENABLE;
3753                if (temp & (PORT_SUSPEND|PORT_RESUME))
3754                        status |= USB_PORT_STAT_SUSPEND;
3755                if (temp & PORT_OC)
3756                        status |= USB_PORT_STAT_OVERCURRENT;
3757                if (temp & PORT_RESET)
3758                        status |= USB_PORT_STAT_RESET;
3759                if (temp & PORT_POWER)
3760                        status |= USB_PORT_STAT_POWER;
3761
3762#ifndef OXU_VERBOSE_DEBUG
3763        if (status & ~0xffff)   /* only if wPortChange is interesting */
3764#endif
3765                dbg_port(oxu, "GetStatus", wIndex + 1, temp);
3766                put_unaligned(cpu_to_le32(status), (__le32 *) buf);
3767                break;
3768        case SetHubFeature:
3769                switch (wValue) {
3770                case C_HUB_LOCAL_POWER:
3771                case C_HUB_OVER_CURRENT:
3772                        /* no hub-wide feature/status flags */
3773                        break;
3774                default:
3775                        goto error;
3776                }
3777                break;
3778        case SetPortFeature:
3779                selector = wIndex >> 8;
3780                wIndex &= 0xff;
3781                if (!wIndex || wIndex > ports)
3782                        goto error;
3783                wIndex--;
3784                temp = readl(status_reg);
3785                if (temp & PORT_OWNER)
3786                        break;
3787
3788                temp &= ~PORT_RWC_BITS;
3789                switch (wValue) {
3790                case USB_PORT_FEAT_SUSPEND:
3791                        if ((temp & PORT_PE) == 0
3792                                        || (temp & PORT_RESET) != 0)
3793                                goto error;
3794                        if (device_may_wakeup(&hcd->self.root_hub->dev))
3795                                temp |= PORT_WAKE_BITS;
3796                        writel(temp | PORT_SUSPEND, status_reg);
3797                        break;
3798                case USB_PORT_FEAT_POWER:
3799                        if (HCS_PPC(oxu->hcs_params))
3800                                writel(temp | PORT_POWER, status_reg);
3801                        break;
3802                case USB_PORT_FEAT_RESET:
3803                        if (temp & PORT_RESUME)
3804                                goto error;
3805                        /* line status bits may report this as low speed,
3806                         * which can be fine if this root hub has a
3807                         * transaction translator built in.
3808                         */
3809                        oxu_vdbg(oxu, "port %d reset\n", wIndex + 1);
3810                        temp |= PORT_RESET;
3811                        temp &= ~PORT_PE;
3812
3813                        /*
3814                         * caller must wait, then call GetPortStatus
3815                         * usb 2.0 spec says 50 ms resets on root
3816                         */
3817                        oxu->reset_done[wIndex] = jiffies
3818                                        + msecs_to_jiffies(50);
3819                        writel(temp, status_reg);
3820                        break;
3821
3822                /* For downstream facing ports (these):  one hub port is put
3823                 * into test mode according to USB2 11.24.2.13, then the hub
3824                 * must be reset (which for root hub now means rmmod+modprobe,
3825                 * or else system reboot).  See EHCI 2.3.9 and 4.14 for info
3826                 * about the EHCI-specific stuff.
3827                 */
3828                case USB_PORT_FEAT_TEST:
3829                        if (!selector || selector > 5)
3830                                goto error;
3831                        ehci_quiesce(oxu);
3832                        ehci_halt(oxu);
3833                        temp |= selector << 16;
3834                        writel(temp, status_reg);
3835                        break;
3836
3837                default:
3838                        goto error;
3839                }
3840                readl(&oxu->regs->command);     /* unblock posted writes */
3841                break;
3842
3843        default:
3844error:
3845                /* "stall" on error */
3846                retval = -EPIPE;
3847        }
3848        spin_unlock_irqrestore(&oxu->lock, flags);
3849        return retval;
3850}
3851
3852#ifdef CONFIG_PM
3853
3854static int oxu_bus_suspend(struct usb_hcd *hcd)
3855{
3856        struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3857        int port;
3858        int mask;
3859
3860        oxu_dbg(oxu, "suspend root hub\n");
3861
3862        if (time_before(jiffies, oxu->next_statechange))
3863                msleep(5);
3864
3865        port = HCS_N_PORTS(oxu->hcs_params);
3866        spin_lock_irq(&oxu->lock);
3867
3868        /* stop schedules, clean any completed work */
3869        if (HC_IS_RUNNING(hcd->state)) {
3870                ehci_quiesce(oxu);
3871                hcd->state = HC_STATE_QUIESCING;
3872        }
3873        oxu->command = readl(&oxu->regs->command);
3874        if (oxu->reclaim)
3875                oxu->reclaim_ready = 1;
3876        ehci_work(oxu);
3877
3878        /* Unlike other USB host controller types, EHCI doesn't have
3879         * any notion of "global" or bus-wide suspend.  The driver has
3880         * to manually suspend all the active unsuspended ports, and
3881         * then manually resume them in the bus_resume() routine.
3882         */
3883        oxu->bus_suspended = 0;
3884        while (port--) {
3885                u32 __iomem *reg = &oxu->regs->port_status[port];
3886                u32 t1 = readl(reg) & ~PORT_RWC_BITS;
3887                u32 t2 = t1;
3888
3889                /* keep track of which ports we suspend */
3890                if ((t1 & PORT_PE) && !(t1 & PORT_OWNER) &&
3891                                !(t1 & PORT_SUSPEND)) {
3892                        t2 |= PORT_SUSPEND;
3893                        set_bit(port, &oxu->bus_suspended);
3894                }
3895
3896                /* enable remote wakeup on all ports */
3897                if (device_may_wakeup(&hcd->self.root_hub->dev))
3898                        t2 |= PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E;
3899                else
3900                        t2 &= ~(PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E);
3901
3902                if (t1 != t2) {
3903                        oxu_vdbg(oxu, "port %d, %08x -> %08x\n",
3904                                port + 1, t1, t2);
3905                        writel(t2, reg);
3906                }
3907        }
3908
3909        /* turn off now-idle HC */
3910        del_timer_sync(&oxu->watchdog);
3911        ehci_halt(oxu);
3912        hcd->state = HC_STATE_SUSPENDED;
3913
3914        /* allow remote wakeup */
3915        mask = INTR_MASK;
3916        if (!device_may_wakeup(&hcd->self.root_hub->dev))
3917                mask &= ~STS_PCD;
3918        writel(mask, &oxu->regs->intr_enable);
3919        readl(&oxu->regs->intr_enable);
3920
3921        oxu->next_statechange = jiffies + msecs_to_jiffies(10);
3922        spin_unlock_irq(&oxu->lock);
3923        return 0;
3924}
3925
3926/* Caller has locked the root hub, and should reset/reinit on error */
3927static int oxu_bus_resume(struct usb_hcd *hcd)
3928{
3929        struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3930        u32 temp;
3931        int i;
3932
3933        if (time_before(jiffies, oxu->next_statechange))
3934                msleep(5);
3935        spin_lock_irq(&oxu->lock);
3936
3937        /* Ideally and we've got a real resume here, and no port's power
3938         * was lost.  (For PCI, that means Vaux was maintained.)  But we
3939         * could instead be restoring a swsusp snapshot -- so that BIOS was
3940         * the last user of the controller, not reset/pm hardware keeping
3941         * state we gave to it.
3942         */
3943        temp = readl(&oxu->regs->intr_enable);
3944        oxu_dbg(oxu, "resume root hub%s\n", temp ? "" : " after power loss");
3945
3946        /* at least some APM implementations will try to deliver
3947         * IRQs right away, so delay them until we're ready.
3948         */
3949        writel(0, &oxu->regs->intr_enable);
3950
3951        /* re-init operational registers */
3952        writel(0, &oxu->regs->segment);
3953        writel(oxu->periodic_dma, &oxu->regs->frame_list);
3954        writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
3955
3956        /* restore CMD_RUN, framelist size, and irq threshold */
3957        writel(oxu->command, &oxu->regs->command);
3958
3959        /* Some controller/firmware combinations need a delay during which
3960         * they set up the port statuses.  See Bugzilla #8190. */
3961        mdelay(8);
3962
3963        /* manually resume the ports we suspended during bus_suspend() */
3964        i = HCS_N_PORTS(oxu->hcs_params);
3965        while (i--) {
3966                temp = readl(&oxu->regs->port_status[i]);
3967                temp &= ~(PORT_RWC_BITS
3968                        | PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E);
3969                if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3970                        oxu->reset_done[i] = jiffies + msecs_to_jiffies(20);
3971                        temp |= PORT_RESUME;
3972                }
3973                writel(temp, &oxu->regs->port_status[i]);
3974        }
3975        i = HCS_N_PORTS(oxu->hcs_params);
3976        mdelay(20);
3977        while (i--) {
3978                temp = readl(&oxu->regs->port_status[i]);
3979                if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3980                        temp &= ~(PORT_RWC_BITS | PORT_RESUME);
3981                        writel(temp, &oxu->regs->port_status[i]);
3982                        oxu_vdbg(oxu, "resumed port %d\n", i + 1);
3983                }
3984        }
3985        (void) readl(&oxu->regs->command);
3986
3987        /* maybe re-activate the schedule(s) */
3988        temp = 0;
3989        if (oxu->async->qh_next.qh)
3990                temp |= CMD_ASE;
3991        if (oxu->periodic_sched)
3992                temp |= CMD_PSE;
3993        if (temp) {
3994                oxu->command |= temp;
3995                writel(oxu->command, &oxu->regs->command);
3996        }
3997
3998        oxu->next_statechange = jiffies + msecs_to_jiffies(5);
3999        hcd->state = HC_STATE_RUNNING;
4000
4001        /* Now we can safely re-enable irqs */
4002        writel(INTR_MASK, &oxu->regs->intr_enable);
4003
4004        spin_unlock_irq(&oxu->lock);
4005        return 0;
4006}
4007
4008#else
4009
4010static int oxu_bus_suspend(struct usb_hcd *hcd)
4011{
4012        return 0;
4013}
4014
4015static int oxu_bus_resume(struct usb_hcd *hcd)
4016{
4017        return 0;
4018}
4019
4020#endif  /* CONFIG_PM */
4021
4022static const struct hc_driver oxu_hc_driver = {
4023        .description =          "oxu210hp_hcd",
4024        .product_desc =         "oxu210hp HCD",
4025        .hcd_priv_size =        sizeof(struct oxu_hcd),
4026
4027        /*
4028         * Generic hardware linkage
4029         */
4030        .irq =                  oxu_irq,
4031        .flags =                HCD_MEMORY | HCD_USB2,
4032
4033        /*
4034         * Basic lifecycle operations
4035         */
4036        .reset =                oxu_reset,
4037        .start =                oxu_run,
4038        .stop =                 oxu_stop,
4039        .shutdown =             oxu_shutdown,
4040
4041        /*
4042         * Managing i/o requests and associated device resources
4043         */
4044        .urb_enqueue =          oxu_urb_enqueue,
4045        .urb_dequeue =          oxu_urb_dequeue,
4046        .endpoint_disable =     oxu_endpoint_disable,
4047
4048        /*
4049         * Scheduling support
4050         */
4051        .get_frame_number =     oxu_get_frame,
4052
4053        /*
4054         * Root hub support
4055         */
4056        .hub_status_data =      oxu_hub_status_data,
4057        .hub_control =          oxu_hub_control,
4058        .bus_suspend =          oxu_bus_suspend,
4059        .bus_resume =           oxu_bus_resume,
4060};
4061
4062/*
4063 * Module stuff
4064 */
4065
4066static void oxu_configuration(struct platform_device *pdev, void *base)
4067{
4068        u32 tmp;
4069
4070        /* Initialize top level registers.
4071         * First write ever
4072         */
4073        oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
4074        oxu_writel(base, OXU_SOFTRESET, OXU_SRESET);
4075        oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
4076
4077        tmp = oxu_readl(base, OXU_PIOBURSTREADCTRL);
4078        oxu_writel(base, OXU_PIOBURSTREADCTRL, tmp | 0x0040);
4079
4080        oxu_writel(base, OXU_ASO, OXU_SPHPOEN | OXU_OVRCCURPUPDEN |
4081                                        OXU_COMPARATOR | OXU_ASO_OP);
4082
4083        tmp = oxu_readl(base, OXU_CLKCTRL_SET);
4084        oxu_writel(base, OXU_CLKCTRL_SET, tmp | OXU_SYSCLKEN | OXU_USBOTGCLKEN);
4085
4086        /* Clear all top interrupt enable */
4087        oxu_writel(base, OXU_CHIPIRQEN_CLR, 0xff);
4088
4089        /* Clear all top interrupt status */
4090        oxu_writel(base, OXU_CHIPIRQSTATUS, 0xff);
4091
4092        /* Enable all needed top interrupt except OTG SPH core */
4093        oxu_writel(base, OXU_CHIPIRQEN_SET, OXU_USBSPHLPWUI | OXU_USBOTGLPWUI);
4094}
4095
4096static int oxu_verify_id(struct platform_device *pdev, void *base)
4097{
4098        u32 id;
4099        static const char * const bo[] = {
4100                "reserved",
4101                "128-pin LQFP",
4102                "84-pin TFBGA",
4103                "reserved",
4104        };
4105
4106        /* Read controller signature register to find a match */
4107        id = oxu_readl(base, OXU_DEVICEID);
4108        dev_info(&pdev->dev, "device ID %x\n", id);
4109        if ((id & OXU_REV_MASK) != (OXU_REV_2100 << OXU_REV_SHIFT))
4110                return -1;
4111
4112        dev_info(&pdev->dev, "found device %x %s (%04x:%04x)\n",
4113                id >> OXU_REV_SHIFT,
4114                bo[(id & OXU_BO_MASK) >> OXU_BO_SHIFT],
4115                (id & OXU_MAJ_REV_MASK) >> OXU_MAJ_REV_SHIFT,
4116                (id & OXU_MIN_REV_MASK) >> OXU_MIN_REV_SHIFT);
4117
4118        return 0;
4119}
4120
4121static const struct hc_driver oxu_hc_driver;
4122static struct usb_hcd *oxu_create(struct platform_device *pdev,
4123                                unsigned long memstart, unsigned long memlen,
4124                                void *base, int irq, int otg)
4125{
4126        struct device *dev = &pdev->dev;
4127
4128        struct usb_hcd *hcd;
4129        struct oxu_hcd *oxu;
4130        int ret;
4131
4132        /* Set endian mode and host mode */
4133        oxu_writel(base + (otg ? OXU_OTG_CORE_OFFSET : OXU_SPH_CORE_OFFSET),
4134                                OXU_USBMODE,
4135                                OXU_CM_HOST_ONLY | OXU_ES_LITTLE | OXU_VBPS);
4136
4137        hcd = usb_create_hcd(&oxu_hc_driver, dev,
4138                                otg ? "oxu210hp_otg" : "oxu210hp_sph");
4139        if (!hcd)
4140                return ERR_PTR(-ENOMEM);
4141
4142        hcd->rsrc_start = memstart;
4143        hcd->rsrc_len = memlen;
4144        hcd->regs = base;
4145        hcd->irq = irq;
4146        hcd->state = HC_STATE_HALT;
4147
4148        oxu = hcd_to_oxu(hcd);
4149        oxu->is_otg = otg;
4150
4151        ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
4152        if (ret < 0)
4153                return ERR_PTR(ret);
4154
4155        device_wakeup_enable(hcd->self.controller);
4156        return hcd;
4157}
4158
4159static int oxu_init(struct platform_device *pdev,
4160                                unsigned long memstart, unsigned long memlen,
4161                                void *base, int irq)
4162{
4163        struct oxu_info *info = platform_get_drvdata(pdev);
4164        struct usb_hcd *hcd;
4165        int ret;
4166
4167        /* First time configuration at start up */
4168        oxu_configuration(pdev, base);
4169
4170        ret = oxu_verify_id(pdev, base);
4171        if (ret) {
4172                dev_err(&pdev->dev, "no devices found!\n");
4173                return -ENODEV;
4174        }
4175
4176        /* Create the OTG controller */
4177        hcd = oxu_create(pdev, memstart, memlen, base, irq, 1);
4178        if (IS_ERR(hcd)) {
4179                dev_err(&pdev->dev, "cannot create OTG controller!\n");
4180                ret = PTR_ERR(hcd);
4181                goto error_create_otg;
4182        }
4183        info->hcd[0] = hcd;
4184
4185        /* Create the SPH host controller */
4186        hcd = oxu_create(pdev, memstart, memlen, base, irq, 0);
4187        if (IS_ERR(hcd)) {
4188                dev_err(&pdev->dev, "cannot create SPH controller!\n");
4189                ret = PTR_ERR(hcd);
4190                goto error_create_sph;
4191        }
4192        info->hcd[1] = hcd;
4193
4194        oxu_writel(base, OXU_CHIPIRQEN_SET,
4195                oxu_readl(base, OXU_CHIPIRQEN_SET) | 3);
4196
4197        return 0;
4198
4199error_create_sph:
4200        usb_remove_hcd(info->hcd[0]);
4201        usb_put_hcd(info->hcd[0]);
4202
4203error_create_otg:
4204        return ret;
4205}
4206
4207static int oxu_drv_probe(struct platform_device *pdev)
4208{
4209        struct resource *res;
4210        void *base;
4211        unsigned long memstart, memlen;
4212        int irq, ret;
4213        struct oxu_info *info;
4214
4215        if (usb_disabled())
4216                return -ENODEV;
4217
4218        /*
4219         * Get the platform resources
4220         */
4221        res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
4222        if (!res) {
4223                dev_err(&pdev->dev,
4224                        "no IRQ! Check %s setup!\n", dev_name(&pdev->dev));
4225                return -ENODEV;
4226        }
4227        irq = res->start;
4228        dev_dbg(&pdev->dev, "IRQ resource %d\n", irq);
4229
4230        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
4231        base = devm_ioremap_resource(&pdev->dev, res);
4232        if (IS_ERR(base)) {
4233                ret = PTR_ERR(base);
4234                goto error;
4235        }
4236        memstart = res->start;
4237        memlen = resource_size(res);
4238
4239        ret = irq_set_irq_type(irq, IRQF_TRIGGER_FALLING);
4240        if (ret) {
4241                dev_err(&pdev->dev, "error setting irq type\n");
4242                ret = -EFAULT;
4243                goto error;
4244        }
4245
4246        /* Allocate a driver data struct to hold useful info for both
4247         * SPH & OTG devices
4248         */
4249        info = devm_kzalloc(&pdev->dev, sizeof(struct oxu_info), GFP_KERNEL);
4250        if (!info) {
4251                ret = -EFAULT;
4252                goto error;
4253        }
4254        platform_set_drvdata(pdev, info);
4255
4256        ret = oxu_init(pdev, memstart, memlen, base, irq);
4257        if (ret < 0) {
4258                dev_dbg(&pdev->dev, "cannot init USB devices\n");
4259                goto error;
4260        }
4261
4262        dev_info(&pdev->dev, "devices enabled and running\n");
4263        platform_set_drvdata(pdev, info);
4264
4265        return 0;
4266
4267error:
4268        dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), ret);
4269        return ret;
4270}
4271
4272static void oxu_remove(struct platform_device *pdev, struct usb_hcd *hcd)
4273{
4274        usb_remove_hcd(hcd);
4275        usb_put_hcd(hcd);
4276}
4277
4278static int oxu_drv_remove(struct platform_device *pdev)
4279{
4280        struct oxu_info *info = platform_get_drvdata(pdev);
4281
4282        oxu_remove(pdev, info->hcd[0]);
4283        oxu_remove(pdev, info->hcd[1]);
4284
4285        return 0;
4286}
4287
4288static void oxu_drv_shutdown(struct platform_device *pdev)
4289{
4290        oxu_drv_remove(pdev);
4291}
4292
4293#if 0
4294/* FIXME: TODO */
4295static int oxu_drv_suspend(struct device *dev)
4296{
4297        struct platform_device *pdev = to_platform_device(dev);
4298        struct usb_hcd *hcd = dev_get_drvdata(dev);
4299
4300        return 0;
4301}
4302
4303static int oxu_drv_resume(struct device *dev)
4304{
4305        struct platform_device *pdev = to_platform_device(dev);
4306        struct usb_hcd *hcd = dev_get_drvdata(dev);
4307
4308        return 0;
4309}
4310#else
4311#define oxu_drv_suspend NULL
4312#define oxu_drv_resume  NULL
4313#endif
4314
4315static struct platform_driver oxu_driver = {
4316        .probe          = oxu_drv_probe,
4317        .remove         = oxu_drv_remove,
4318        .shutdown       = oxu_drv_shutdown,
4319        .suspend        = oxu_drv_suspend,
4320        .resume         = oxu_drv_resume,
4321        .driver = {
4322                .name = "oxu210hp-hcd",
4323                .bus = &platform_bus_type
4324        }
4325};
4326
4327module_platform_driver(oxu_driver);
4328
4329MODULE_DESCRIPTION("Oxford OXU210HP HCD driver - ver. " DRIVER_VERSION);
4330MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
4331MODULE_LICENSE("GPL");
4332