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8#include <linux/module.h>
9#include <linux/kernel.h>
10#include <linux/sched.h>
11#include <linux/list.h>
12#include <linux/delay.h>
13#include <linux/clk.h>
14#include <linux/err.h>
15#include <linux/io.h>
16#include <linux/gpio/consumer.h>
17#include <linux/platform_device.h>
18#include <linux/dma-mapping.h>
19#include <linux/usb/usb_phy_generic.h>
20
21#include <mach/cputype.h>
22#include <mach/hardware.h>
23
24#include <asm/mach-types.h>
25
26#include "musb_core.h"
27
28#include "davinci.h"
29#include "cppi_dma.h"
30
31
32#define USB_PHY_CTRL IO_ADDRESS(USBPHY_CTL_PADDR)
33#define DM355_DEEPSLEEP IO_ADDRESS(DM355_DEEPSLEEP_PADDR)
34
35struct davinci_glue {
36 struct device *dev;
37 struct platform_device *musb;
38 struct clk *clk;
39 bool vbus_state;
40 struct gpio_desc *vbus;
41 struct work_struct vbus_work;
42};
43
44
45
46
47
48
49
50static inline void phy_on(void)
51{
52 u32 phy_ctrl = __raw_readl(USB_PHY_CTRL);
53
54
55 phy_ctrl &= ~(USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN);
56 phy_ctrl |= USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON;
57 __raw_writel(phy_ctrl, USB_PHY_CTRL);
58
59
60 while ((__raw_readl(USB_PHY_CTRL) & USBPHY_PHYCLKGD) == 0)
61 cpu_relax();
62}
63
64static inline void phy_off(void)
65{
66 u32 phy_ctrl = __raw_readl(USB_PHY_CTRL);
67
68
69 phy_ctrl &= ~(USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON);
70 phy_ctrl |= USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN;
71 __raw_writel(phy_ctrl, USB_PHY_CTRL);
72}
73
74static int dma_off = 1;
75
76static void davinci_musb_enable(struct musb *musb)
77{
78 u32 tmp, old, val;
79
80
81 tmp = (musb->epmask & DAVINCI_USB_TX_ENDPTS_MASK)
82 << DAVINCI_USB_TXINT_SHIFT;
83 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
84 old = tmp;
85 tmp = (musb->epmask & (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK))
86 << DAVINCI_USB_RXINT_SHIFT;
87 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
88 tmp |= old;
89
90 val = ~MUSB_INTR_SOF;
91 tmp |= ((val & 0x01ff) << DAVINCI_USB_USBINT_SHIFT);
92 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
93
94 if (is_dma_capable() && !dma_off)
95 printk(KERN_WARNING "%s %s: dma not reactivated\n",
96 __FILE__, __func__);
97 else
98 dma_off = 0;
99
100
101 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
102 DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT);
103}
104
105
106
107
108static void davinci_musb_disable(struct musb *musb)
109{
110
111
112
113
114
115 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_CLR_REG,
116 DAVINCI_USB_USBINT_MASK
117 | DAVINCI_USB_TXINT_MASK
118 | DAVINCI_USB_RXINT_MASK);
119 musb_writel(musb->ctrl_base, DAVINCI_USB_EOI_REG, 0);
120
121 if (is_dma_capable() && !dma_off)
122 WARNING("dma still active\n");
123}
124
125
126#define portstate(stmt) stmt
127
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139
140
141static void evm_deferred_drvvbus(struct work_struct *work)
142{
143 struct davinci_glue *glue = container_of(work, struct davinci_glue,
144 vbus_work);
145
146 gpiod_set_value_cansleep(glue->vbus, glue->vbus_state);
147 glue->vbus_state = !glue->vbus_state;
148}
149
150static void davinci_musb_source_power(struct musb *musb, int is_on,
151 int immediate)
152{
153 struct davinci_glue *glue = dev_get_drvdata(musb->controller->parent);
154
155
156 if (!glue->vbus)
157 return;
158
159 if (is_on)
160 is_on = 1;
161
162 if (glue->vbus_state == is_on)
163 return;
164
165 glue->vbus_state = !is_on;
166
167 if (machine_is_davinci_evm()) {
168 if (immediate)
169 gpiod_set_value_cansleep(glue->vbus, glue->vbus_state);
170 else
171 schedule_work(&glue->vbus_work);
172 }
173 if (immediate)
174 glue->vbus_state = is_on;
175}
176
177static void davinci_musb_set_vbus(struct musb *musb, int is_on)
178{
179 WARN_ON(is_on && is_peripheral_active(musb));
180 davinci_musb_source_power(musb, is_on, 0);
181}
182
183
184#define POLL_SECONDS 2
185
186static void otg_timer(struct timer_list *t)
187{
188 struct musb *musb = from_timer(musb, t, dev_timer);
189 void __iomem *mregs = musb->mregs;
190 u8 devctl;
191 unsigned long flags;
192
193
194
195
196 devctl = musb_readb(mregs, MUSB_DEVCTL);
197 dev_dbg(musb->controller, "poll devctl %02x (%s)\n", devctl,
198 usb_otg_state_string(musb->xceiv->otg->state));
199
200 spin_lock_irqsave(&musb->lock, flags);
201 switch (musb->xceiv->otg->state) {
202 case OTG_STATE_A_WAIT_VFALL:
203
204
205
206
207
208 if (devctl & MUSB_DEVCTL_VBUS) {
209 mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
210 break;
211 }
212 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
213 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
214 MUSB_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT);
215 break;
216 case OTG_STATE_B_IDLE:
217
218
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227
228
229 musb_writeb(mregs, MUSB_DEVCTL,
230 devctl | MUSB_DEVCTL_SESSION);
231 devctl = musb_readb(mregs, MUSB_DEVCTL);
232 if (devctl & MUSB_DEVCTL_BDEVICE)
233 mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
234 else
235 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
236 break;
237 default:
238 break;
239 }
240 spin_unlock_irqrestore(&musb->lock, flags);
241}
242
243static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
244{
245 unsigned long flags;
246 irqreturn_t retval = IRQ_NONE;
247 struct musb *musb = __hci;
248 struct usb_otg *otg = musb->xceiv->otg;
249 void __iomem *tibase = musb->ctrl_base;
250 struct cppi *cppi;
251 u32 tmp;
252
253 spin_lock_irqsave(&musb->lock, flags);
254
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265
266
267 cppi = container_of(musb->dma_controller, struct cppi, controller);
268 if (is_cppi_enabled(musb) && musb->dma_controller && !cppi->irq)
269 retval = cppi_interrupt(irq, __hci);
270
271
272 tmp = musb_readl(tibase, DAVINCI_USB_INT_SRC_MASKED_REG);
273 musb_writel(tibase, DAVINCI_USB_INT_SRC_CLR_REG, tmp);
274 dev_dbg(musb->controller, "IRQ %08x\n", tmp);
275
276 musb->int_rx = (tmp & DAVINCI_USB_RXINT_MASK)
277 >> DAVINCI_USB_RXINT_SHIFT;
278 musb->int_tx = (tmp & DAVINCI_USB_TXINT_MASK)
279 >> DAVINCI_USB_TXINT_SHIFT;
280 musb->int_usb = (tmp & DAVINCI_USB_USBINT_MASK)
281 >> DAVINCI_USB_USBINT_SHIFT;
282
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288
289
290 if (tmp & (DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT)) {
291 int drvvbus = musb_readl(tibase, DAVINCI_USB_STAT_REG);
292 void __iomem *mregs = musb->mregs;
293 u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
294 int err = musb->int_usb & MUSB_INTR_VBUSERROR;
295
296 err = musb->int_usb & MUSB_INTR_VBUSERROR;
297 if (err) {
298
299
300
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302
303
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305
306
307
308 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
309 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
310 mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
311 WARNING("VBUS error workaround (delay coming)\n");
312 } else if (drvvbus) {
313 MUSB_HST_MODE(musb);
314 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
315 portstate(musb->port1_status |= USB_PORT_STAT_POWER);
316 del_timer(&musb->dev_timer);
317 } else {
318 musb->is_active = 0;
319 MUSB_DEV_MODE(musb);
320 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
321 portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
322 }
323
324
325
326
327 davinci_musb_source_power(musb, drvvbus, 0);
328 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
329 drvvbus ? "on" : "off",
330 usb_otg_state_string(musb->xceiv->otg->state),
331 err ? " ERROR" : "",
332 devctl);
333 retval = IRQ_HANDLED;
334 }
335
336 if (musb->int_tx || musb->int_rx || musb->int_usb)
337 retval |= musb_interrupt(musb);
338
339
340 musb_writel(tibase, DAVINCI_USB_EOI_REG, 0);
341
342
343 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
344 mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
345
346 spin_unlock_irqrestore(&musb->lock, flags);
347
348 return retval;
349}
350
351static int davinci_musb_set_mode(struct musb *musb, u8 mode)
352{
353
354 return -EIO;
355}
356
357static int davinci_musb_init(struct musb *musb)
358{
359 void __iomem *tibase = musb->ctrl_base;
360 u32 revision;
361 int ret = -ENODEV;
362
363 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
364 if (IS_ERR_OR_NULL(musb->xceiv)) {
365 ret = -EPROBE_DEFER;
366 goto unregister;
367 }
368
369 musb->mregs += DAVINCI_BASE_OFFSET;
370
371
372 revision = musb_readl(tibase, DAVINCI_USB_VERSION_REG);
373 if (revision == 0)
374 goto fail;
375
376 timer_setup(&musb->dev_timer, otg_timer, 0);
377
378 davinci_musb_source_power(musb, 0, 1);
379
380
381
382
383 if (machine_is_davinci_dm355_evm()) {
384 u32 phy_ctrl = __raw_readl(USB_PHY_CTRL);
385
386 phy_ctrl &= ~(3 << 9);
387 phy_ctrl |= USBPHY_DATAPOL;
388 __raw_writel(phy_ctrl, USB_PHY_CTRL);
389 }
390
391
392
393
394 if (cpu_is_davinci_dm355()) {
395 u32 deepsleep = __raw_readl(DM355_DEEPSLEEP);
396
397 deepsleep &= ~DRVVBUS_FORCE;
398 __raw_writel(deepsleep, DM355_DEEPSLEEP);
399 }
400
401
402 musb_writel(tibase, DAVINCI_USB_CTRL_REG, 0x1);
403
404
405 phy_on();
406
407 msleep(5);
408
409
410 pr_debug("DaVinci OTG revision %08x phy %03x control %02x\n",
411 revision, __raw_readl(USB_PHY_CTRL),
412 musb_readb(tibase, DAVINCI_USB_CTRL_REG));
413
414 musb->isr = davinci_musb_interrupt;
415 return 0;
416
417fail:
418 usb_put_phy(musb->xceiv);
419unregister:
420 usb_phy_generic_unregister();
421 return ret;
422}
423
424static int davinci_musb_exit(struct musb *musb)
425{
426 int maxdelay = 30;
427 u8 devctl, warn = 0;
428
429 del_timer_sync(&musb->dev_timer);
430
431
432 if (cpu_is_davinci_dm355()) {
433 u32 deepsleep = __raw_readl(DM355_DEEPSLEEP);
434
435 deepsleep &= ~DRVVBUS_FORCE;
436 deepsleep |= DRVVBUS_OVERRIDE;
437 __raw_writel(deepsleep, DM355_DEEPSLEEP);
438 }
439
440 davinci_musb_source_power(musb, 0 , 1);
441
442
443
444
445
446
447 do {
448 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
449 if (!(devctl & MUSB_DEVCTL_VBUS))
450 break;
451 if ((devctl & MUSB_DEVCTL_VBUS) != warn) {
452 warn = devctl & MUSB_DEVCTL_VBUS;
453 dev_dbg(musb->controller, "VBUS %d\n",
454 warn >> MUSB_DEVCTL_VBUS_SHIFT);
455 }
456 msleep(1000);
457 maxdelay--;
458 } while (maxdelay > 0);
459
460
461 if (devctl & MUSB_DEVCTL_VBUS)
462 dev_dbg(musb->controller, "VBUS off timeout (devctl %02x)\n", devctl);
463
464 phy_off();
465
466 usb_put_phy(musb->xceiv);
467
468 return 0;
469}
470
471static const struct musb_platform_ops davinci_ops = {
472 .quirks = MUSB_DMA_CPPI,
473 .init = davinci_musb_init,
474 .exit = davinci_musb_exit,
475
476#ifdef CONFIG_USB_TI_CPPI_DMA
477 .dma_init = cppi_dma_controller_create,
478 .dma_exit = cppi_dma_controller_destroy,
479#endif
480 .enable = davinci_musb_enable,
481 .disable = davinci_musb_disable,
482
483 .set_mode = davinci_musb_set_mode,
484
485 .set_vbus = davinci_musb_set_vbus,
486};
487
488static const struct platform_device_info davinci_dev_info = {
489 .name = "musb-hdrc",
490 .id = PLATFORM_DEVID_AUTO,
491 .dma_mask = DMA_BIT_MASK(32),
492};
493
494static int davinci_probe(struct platform_device *pdev)
495{
496 struct resource musb_resources[3];
497 struct musb_hdrc_platform_data *pdata = dev_get_platdata(&pdev->dev);
498 struct platform_device *musb;
499 struct davinci_glue *glue;
500 struct platform_device_info pinfo;
501 struct clk *clk;
502
503 int ret = -ENOMEM;
504
505 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
506 if (!glue)
507 goto err0;
508
509 clk = devm_clk_get(&pdev->dev, "usb");
510 if (IS_ERR(clk)) {
511 dev_err(&pdev->dev, "failed to get clock\n");
512 ret = PTR_ERR(clk);
513 goto err0;
514 }
515
516 ret = clk_enable(clk);
517 if (ret) {
518 dev_err(&pdev->dev, "failed to enable clock\n");
519 goto err0;
520 }
521
522 glue->dev = &pdev->dev;
523 glue->clk = clk;
524
525 pdata->platform_ops = &davinci_ops;
526
527 glue->vbus = devm_gpiod_get_optional(&pdev->dev, NULL, GPIOD_OUT_LOW);
528 if (IS_ERR(glue->vbus)) {
529 ret = PTR_ERR(glue->vbus);
530 goto err0;
531 } else {
532 glue->vbus_state = -1;
533 INIT_WORK(&glue->vbus_work, evm_deferred_drvvbus);
534 }
535
536 usb_phy_generic_register();
537 platform_set_drvdata(pdev, glue);
538
539 memset(musb_resources, 0x00, sizeof(*musb_resources) *
540 ARRAY_SIZE(musb_resources));
541
542 musb_resources[0].name = pdev->resource[0].name;
543 musb_resources[0].start = pdev->resource[0].start;
544 musb_resources[0].end = pdev->resource[0].end;
545 musb_resources[0].flags = pdev->resource[0].flags;
546
547 musb_resources[1].name = pdev->resource[1].name;
548 musb_resources[1].start = pdev->resource[1].start;
549 musb_resources[1].end = pdev->resource[1].end;
550 musb_resources[1].flags = pdev->resource[1].flags;
551
552
553
554
555
556 musb_resources[2].name = pdev->resource[2].name;
557 musb_resources[2].start = pdev->resource[2].start;
558 musb_resources[2].end = pdev->resource[2].end;
559 musb_resources[2].flags = pdev->resource[2].flags;
560
561 pinfo = davinci_dev_info;
562 pinfo.parent = &pdev->dev;
563 pinfo.res = musb_resources;
564 pinfo.num_res = ARRAY_SIZE(musb_resources);
565 pinfo.data = pdata;
566 pinfo.size_data = sizeof(*pdata);
567
568 glue->musb = musb = platform_device_register_full(&pinfo);
569 if (IS_ERR(musb)) {
570 ret = PTR_ERR(musb);
571 dev_err(&pdev->dev, "failed to register musb device: %d\n", ret);
572 goto err1;
573 }
574
575 return 0;
576
577err1:
578 clk_disable(clk);
579
580err0:
581 return ret;
582}
583
584static int davinci_remove(struct platform_device *pdev)
585{
586 struct davinci_glue *glue = platform_get_drvdata(pdev);
587
588 platform_device_unregister(glue->musb);
589 usb_phy_generic_unregister();
590 clk_disable(glue->clk);
591
592 return 0;
593}
594
595static struct platform_driver davinci_driver = {
596 .probe = davinci_probe,
597 .remove = davinci_remove,
598 .driver = {
599 .name = "musb-davinci",
600 },
601};
602
603MODULE_DESCRIPTION("DaVinci MUSB Glue Layer");
604MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
605MODULE_LICENSE("GPL v2");
606module_platform_driver(davinci_driver);
607