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24#include <linux/module.h>
25#include <linux/platform_device.h>
26#include <linux/delay.h>
27#include <linux/types.h>
28#include <linux/errno.h>
29#include <linux/mm.h>
30#include <linux/mman.h>
31#include <linux/fb.h>
32#include <linux/spinlock_types.h>
33#include <linux/spinlock.h>
34#include <linux/slab.h>
35#include <linux/io.h>
36
37#include <video/s1d13xxxfb.h>
38
39#define PFX "s1d13xxxfb: "
40#define BLIT "s1d13xxxfb_bitblt: "
41
42
43
44
45#if 0
46#define dbg(fmt, args...) do { printk(KERN_INFO fmt, ## args); } while(0)
47#else
48#define dbg(fmt, args...) do { no_printk(KERN_INFO fmt, ## args); } while (0)
49#endif
50
51
52
53
54#if 0
55#define dbg_blit(fmt, args...) do { printk(KERN_INFO BLIT fmt, ## args); } while (0)
56#else
57#define dbg_blit(fmt, args...) do { } while (0)
58#endif
59
60
61
62
63static DEFINE_SPINLOCK(s1d13xxxfb_bitblt_lock);
64
65
66
67
68static const int s1d13xxxfb_prod_ids[] = {
69 S1D13505_PROD_ID,
70 S1D13506_PROD_ID,
71 S1D13806_PROD_ID,
72};
73
74
75
76
77static const char *s1d13xxxfb_prod_names[] = {
78 "S1D13505",
79 "S1D13506",
80 "S1D13806",
81};
82
83
84
85
86static const struct fb_fix_screeninfo s1d13xxxfb_fix = {
87 .id = S1D_FBID,
88 .type = FB_TYPE_PACKED_PIXELS,
89 .visual = FB_VISUAL_PSEUDOCOLOR,
90 .xpanstep = 0,
91 .ypanstep = 1,
92 .ywrapstep = 0,
93 .accel = FB_ACCEL_NONE,
94};
95
96static inline u8
97s1d13xxxfb_readreg(struct s1d13xxxfb_par *par, u16 regno)
98{
99 return readb(par->regs + regno);
100}
101
102static inline void
103s1d13xxxfb_writereg(struct s1d13xxxfb_par *par, u16 regno, u8 value)
104{
105 writeb(value, par->regs + regno);
106}
107
108static inline void
109s1d13xxxfb_runinit(struct s1d13xxxfb_par *par,
110 const struct s1d13xxxfb_regval *initregs,
111 const unsigned int size)
112{
113 int i;
114
115 for (i = 0; i < size; i++) {
116 if ((initregs[i].addr == S1DREG_DELAYOFF) ||
117 (initregs[i].addr == S1DREG_DELAYON))
118 mdelay((int)initregs[i].value);
119 else {
120 s1d13xxxfb_writereg(par, initregs[i].addr, initregs[i].value);
121 }
122 }
123
124
125 mdelay(1);
126}
127
128static inline void
129lcd_enable(struct s1d13xxxfb_par *par, int enable)
130{
131 u8 mode = s1d13xxxfb_readreg(par, S1DREG_COM_DISP_MODE);
132
133 if (enable)
134 mode |= 0x01;
135 else
136 mode &= ~0x01;
137
138 s1d13xxxfb_writereg(par, S1DREG_COM_DISP_MODE, mode);
139}
140
141static inline void
142crt_enable(struct s1d13xxxfb_par *par, int enable)
143{
144 u8 mode = s1d13xxxfb_readreg(par, S1DREG_COM_DISP_MODE);
145
146 if (enable)
147 mode |= 0x02;
148 else
149 mode &= ~0x02;
150
151 s1d13xxxfb_writereg(par, S1DREG_COM_DISP_MODE, mode);
152}
153
154
155
156
157
158static inline void
159s1d13xxxfb_setup_pseudocolour(struct fb_info *info)
160{
161 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
162
163 info->var.red.length = 4;
164 info->var.green.length = 4;
165 info->var.blue.length = 4;
166}
167
168static inline void
169s1d13xxxfb_setup_truecolour(struct fb_info *info)
170{
171 info->fix.visual = FB_VISUAL_TRUECOLOR;
172 info->var.bits_per_pixel = 16;
173
174 info->var.red.length = 5;
175 info->var.red.offset = 11;
176
177 info->var.green.length = 6;
178 info->var.green.offset = 5;
179
180 info->var.blue.length = 5;
181 info->var.blue.offset = 0;
182}
183
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195
196
197
198static int
199s1d13xxxfb_set_par(struct fb_info *info)
200{
201 struct s1d13xxxfb_par *s1dfb = info->par;
202 unsigned int val;
203
204 dbg("s1d13xxxfb_set_par: bpp=%d\n", info->var.bits_per_pixel);
205
206 if ((s1dfb->display & 0x01))
207 val = s1d13xxxfb_readreg(s1dfb, S1DREG_LCD_DISP_MODE);
208 else
209 val = s1d13xxxfb_readreg(s1dfb, S1DREG_CRT_DISP_MODE);
210
211 val &= ~0x07;
212
213 switch (info->var.bits_per_pixel) {
214 case 4:
215 dbg("pseudo colour 4\n");
216 s1d13xxxfb_setup_pseudocolour(info);
217 val |= 2;
218 break;
219 case 8:
220 dbg("pseudo colour 8\n");
221 s1d13xxxfb_setup_pseudocolour(info);
222 val |= 3;
223 break;
224 case 16:
225 dbg("true colour\n");
226 s1d13xxxfb_setup_truecolour(info);
227 val |= 5;
228 break;
229
230 default:
231 dbg("bpp not supported!\n");
232 return -EINVAL;
233 }
234
235 dbg("writing %02x to display mode register\n", val);
236
237 if ((s1dfb->display & 0x01))
238 s1d13xxxfb_writereg(s1dfb, S1DREG_LCD_DISP_MODE, val);
239 else
240 s1d13xxxfb_writereg(s1dfb, S1DREG_CRT_DISP_MODE, val);
241
242 info->fix.line_length = info->var.xres * info->var.bits_per_pixel;
243 info->fix.line_length /= 8;
244
245 dbg("setting line_length to %d\n", info->fix.line_length);
246
247 dbg("done setup\n");
248
249 return 0;
250}
251
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260
261
262
263static int
264s1d13xxxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
265 u_int transp, struct fb_info *info)
266{
267 struct s1d13xxxfb_par *s1dfb = info->par;
268 unsigned int pseudo_val;
269
270 if (regno >= S1D_PALETTE_SIZE)
271 return -EINVAL;
272
273 dbg("s1d13xxxfb_setcolreg: %d: rgb=%d,%d,%d, tr=%d\n",
274 regno, red, green, blue, transp);
275
276 if (info->var.grayscale)
277 red = green = blue = (19595*red + 38470*green + 7471*blue) >> 16;
278
279 switch (info->fix.visual) {
280 case FB_VISUAL_TRUECOLOR:
281 if (regno >= 16)
282 return -EINVAL;
283
284
285
286 pseudo_val = (red >> 11) << info->var.red.offset;
287 pseudo_val |= (green >> 10) << info->var.green.offset;
288 pseudo_val |= (blue >> 11) << info->var.blue.offset;
289
290 dbg("s1d13xxxfb_setcolreg: pseudo %d, val %08x\n",
291 regno, pseudo_val);
292
293 ((u32 *)info->pseudo_palette)[regno] = pseudo_val;
294
295 break;
296 case FB_VISUAL_PSEUDOCOLOR:
297 s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_ADDR, regno);
298 s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_DATA, red);
299 s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_DATA, green);
300 s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_DATA, blue);
301
302 break;
303 default:
304 return -ENOSYS;
305 }
306
307 dbg("s1d13xxxfb_setcolreg: done\n");
308
309 return 0;
310}
311
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326
327static int
328s1d13xxxfb_blank(int blank_mode, struct fb_info *info)
329{
330 struct s1d13xxxfb_par *par = info->par;
331
332 dbg("s1d13xxxfb_blank: blank=%d, info=%p\n", blank_mode, info);
333
334 switch (blank_mode) {
335 case FB_BLANK_UNBLANK:
336 case FB_BLANK_NORMAL:
337 if ((par->display & 0x01) != 0)
338 lcd_enable(par, 1);
339 if ((par->display & 0x02) != 0)
340 crt_enable(par, 1);
341 break;
342 case FB_BLANK_VSYNC_SUSPEND:
343 case FB_BLANK_HSYNC_SUSPEND:
344 break;
345 case FB_BLANK_POWERDOWN:
346 lcd_enable(par, 0);
347 crt_enable(par, 0);
348 break;
349 default:
350 return -EINVAL;
351 }
352
353
354 return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
355}
356
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366
367
368static int
369s1d13xxxfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
370{
371 struct s1d13xxxfb_par *par = info->par;
372 u32 start;
373
374 if (var->xoffset != 0)
375 return -EINVAL;
376
377 if (var->yoffset + info->var.yres > info->var.yres_virtual)
378 return -EINVAL;
379
380 start = (info->fix.line_length >> 1) * var->yoffset;
381
382 if ((par->display & 0x01)) {
383
384 s1d13xxxfb_writereg(par, S1DREG_LCD_DISP_START0, (start & 0xff));
385 s1d13xxxfb_writereg(par, S1DREG_LCD_DISP_START1, ((start >> 8) & 0xff));
386 s1d13xxxfb_writereg(par, S1DREG_LCD_DISP_START2, ((start >> 16) & 0x0f));
387 } else {
388
389 s1d13xxxfb_writereg(par, S1DREG_CRT_DISP_START0, (start & 0xff));
390 s1d13xxxfb_writereg(par, S1DREG_CRT_DISP_START1, ((start >> 8) & 0xff));
391 s1d13xxxfb_writereg(par, S1DREG_CRT_DISP_START2, ((start >> 16) & 0x0f));
392 }
393
394 return 0;
395}
396
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408
409
410static u8
411bltbit_wait_bitclear(struct fb_info *info, u8 bit, int timeout)
412{
413 while (s1d13xxxfb_readreg(info->par, S1DREG_BBLT_CTL0) & bit) {
414 udelay(10);
415 if (!--timeout) {
416 dbg_blit("wait_bitclear timeout\n");
417 break;
418 }
419 }
420
421 return timeout;
422}
423
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429
430
431
432static void
433s1d13xxxfb_bitblt_copyarea(struct fb_info *info, const struct fb_copyarea *area)
434{
435 u32 dst, src;
436 u32 stride;
437 u16 reverse = 0;
438 u16 sx = area->sx, sy = area->sy;
439 u16 dx = area->dx, dy = area->dy;
440 u16 width = area->width, height = area->height;
441 u16 bpp;
442
443 spin_lock(&s1d13xxxfb_bitblt_lock);
444
445
446 bpp = (info->var.bits_per_pixel >> 3);
447 stride = bpp * info->var.xres;
448
449
450 if ((dy > sy) || ((dy == sy) && (dx >= sx))) {
451 dst = (((dy + height - 1) * stride) + (bpp * (dx + width - 1)));
452 src = (((sy + height - 1) * stride) + (bpp * (sx + width - 1)));
453 reverse = 1;
454
455 } else {
456 dst = (dy * stride) + (bpp * dx);
457 src = (sy * stride) + (bpp * sx);
458 }
459
460
461 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_SRC_START0, (src & 0xff));
462 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_SRC_START1, (src >> 8) & 0x00ff);
463 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_SRC_START2, (src >> 16) & 0x00ff);
464
465
466 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START0, (dst & 0xff));
467 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START1, (dst >> 8) & 0x00ff);
468 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START2, (dst >> 16) & 0x00ff);
469
470
471 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_WIDTH0, (width & 0xff) - 1);
472 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_WIDTH1, (width >> 8));
473
474 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_HEIGHT0, (height & 0xff) - 1);
475 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_HEIGHT1, (height >> 8));
476
477
478 if (reverse == 1) {
479 dbg_blit("(copyarea) negative rop\n");
480 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_OP, 0x03);
481 } else {
482 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_OP, 0x02);
483 dbg_blit("(copyarea) positive rop\n");
484 }
485
486
487 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CTL0, 0x0);
488
489
490 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CTL1, (bpp >> 1));
491
492
493 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_MEM_OFF0, (stride >> 1) & 0xff);
494 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_MEM_OFF1, (stride >> 9));
495
496 dbg_blit("(copyarea) dx=%d, dy=%d\n", dx, dy);
497 dbg_blit("(copyarea) sx=%d, sy=%d\n", sx, sy);
498 dbg_blit("(copyarea) width=%d, height=%d\n", width - 1, height - 1);
499 dbg_blit("(copyarea) stride=%d\n", stride);
500 dbg_blit("(copyarea) bpp=%d=0x0%d, mem_offset1=%d, mem_offset2=%d\n", bpp, (bpp >> 1),
501 (stride >> 1) & 0xff, stride >> 9);
502
503 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CC_EXP, 0x0c);
504
505
506 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CTL0, 0x80);
507
508
509 bltbit_wait_bitclear(info, 0x80, 8000);
510
511 spin_unlock(&s1d13xxxfb_bitblt_lock);
512}
513
514
515
516
517
518
519
520
521
522static void
523s1d13xxxfb_bitblt_solidfill(struct fb_info *info, const struct fb_fillrect *rect)
524{
525 u32 screen_stride, dest;
526 u32 fg;
527 u16 bpp = (info->var.bits_per_pixel >> 3);
528
529
530 spin_lock(&s1d13xxxfb_bitblt_lock);
531
532
533 screen_stride = (bpp * info->var.xres);
534
535
536 dest = ((rect->dy * screen_stride) + (bpp * rect->dx));
537
538 dbg_blit("(solidfill) dx=%d, dy=%d, stride=%d, dest=%d\n"
539 "(solidfill) : rect_width=%d, rect_height=%d\n",
540 rect->dx, rect->dy, screen_stride, dest,
541 rect->width - 1, rect->height - 1);
542
543 dbg_blit("(solidfill) : xres=%d, yres=%d, bpp=%d\n",
544 info->var.xres, info->var.yres,
545 info->var.bits_per_pixel);
546 dbg_blit("(solidfill) : rop=%d\n", rect->rop);
547
548
549 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START0, (dest & 0x00ff));
550 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START1, ((dest >> 8) & 0x00ff));
551 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_DST_START2, ((dest >> 16) & 0x00ff));
552
553
554 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_WIDTH0, ((rect->width) & 0x00ff) - 1);
555 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_WIDTH1, (rect->width >> 8));
556
557
558 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_HEIGHT0, ((rect->height) & 0x00ff) - 1);
559 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_HEIGHT1, (rect->height >> 8));
560
561 if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
562 info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
563 fg = ((u32 *)info->pseudo_palette)[rect->color];
564 dbg_blit("(solidfill) truecolor/directcolor\n");
565 dbg_blit("(solidfill) pseudo_palette[%d] = %d\n", rect->color, fg);
566 } else {
567 fg = rect->color;
568 dbg_blit("(solidfill) color = %d\n", rect->color);
569 }
570
571
572 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_FGC0, (fg & 0xff));
573 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_FGC1, (fg >> 8) & 0xff);
574
575
576 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CTL0, 0x0);
577
578
579 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_OP, BBLT_SOLID_FILL);
580
581
582 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CTL1, (info->var.bits_per_pixel >> 4));
583
584
585 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_MEM_OFF0, (screen_stride >> 1) & 0x00ff);
586 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_MEM_OFF1, (screen_stride >> 9));
587
588
589 s1d13xxxfb_writereg(info->par, S1DREG_BBLT_CTL0, 0x80);
590
591
592 bltbit_wait_bitclear(info, 0x80, 8000);
593
594
595 spin_unlock(&s1d13xxxfb_bitblt_lock);
596}
597
598
599static struct fb_ops s1d13xxxfb_fbops = {
600 .owner = THIS_MODULE,
601 .fb_set_par = s1d13xxxfb_set_par,
602 .fb_setcolreg = s1d13xxxfb_setcolreg,
603 .fb_blank = s1d13xxxfb_blank,
604
605 .fb_pan_display = s1d13xxxfb_pan_display,
606
607
608 .fb_fillrect = cfb_fillrect,
609 .fb_copyarea = cfb_copyarea,
610 .fb_imageblit = cfb_imageblit,
611};
612
613static int s1d13xxxfb_width_tab[2][4] = {
614 {4, 8, 16, -1},
615 {9, 12, 18, -1},
616};
617
618
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631
632
633static void s1d13xxxfb_fetch_hw_state(struct fb_info *info)
634{
635 struct fb_var_screeninfo *var = &info->var;
636 struct fb_fix_screeninfo *fix = &info->fix;
637 struct s1d13xxxfb_par *par = info->par;
638 u8 panel, display;
639 u16 offset;
640 u32 xres, yres;
641 u32 xres_virtual, yres_virtual;
642 int bpp, lcd_bpp;
643 int is_color, is_dual, is_tft;
644 int lcd_enabled, crt_enabled;
645
646 fix->type = FB_TYPE_PACKED_PIXELS;
647
648
649 par->display = s1d13xxxfb_readreg(par, S1DREG_COM_DISP_MODE);
650 crt_enabled = (par->display & 0x02) != 0;
651 lcd_enabled = (par->display & 0x01) != 0;
652
653 if (lcd_enabled && crt_enabled)
654 printk(KERN_WARNING PFX "Warning: LCD and CRT detected, using LCD\n");
655
656 if (lcd_enabled)
657 display = s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_MODE);
658 else
659 display = s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_MODE);
660
661 bpp = display & 0x07;
662
663 switch (bpp) {
664 case 2:
665 case 3:
666 var->bits_per_pixel = 8;
667 var->red.offset = var->green.offset = var->blue.offset = 0;
668 var->red.length = var->green.length = var->blue.length = 8;
669 break;
670 case 5:
671 s1d13xxxfb_setup_truecolour(info);
672 break;
673 default:
674 dbg("bpp: %i\n", bpp);
675 }
676 fb_alloc_cmap(&info->cmap, 256, 0);
677
678
679 panel = s1d13xxxfb_readreg(par, S1DREG_PANEL_TYPE);
680 is_color = (panel & 0x04) != 0;
681 is_dual = (panel & 0x02) != 0;
682 is_tft = (panel & 0x01) != 0;
683 lcd_bpp = s1d13xxxfb_width_tab[is_tft][(panel >> 4) & 3];
684
685 if (lcd_enabled) {
686 xres = (s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_HWIDTH) + 1) * 8;
687 yres = (s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_VHEIGHT0) +
688 ((s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_VHEIGHT1) & 0x03) << 8) + 1);
689
690 offset = (s1d13xxxfb_readreg(par, S1DREG_LCD_MEM_OFF0) +
691 ((s1d13xxxfb_readreg(par, S1DREG_LCD_MEM_OFF1) & 0x7) << 8));
692 } else {
693 xres = (s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_HWIDTH) + 1) * 8;
694 yres = (s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_VHEIGHT0) +
695 ((s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_VHEIGHT1) & 0x03) << 8) + 1);
696
697 offset = (s1d13xxxfb_readreg(par, S1DREG_CRT_MEM_OFF0) +
698 ((s1d13xxxfb_readreg(par, S1DREG_CRT_MEM_OFF1) & 0x7) << 8));
699 }
700 xres_virtual = offset * 16 / var->bits_per_pixel;
701 yres_virtual = fix->smem_len / (offset * 2);
702
703 var->xres = xres;
704 var->yres = yres;
705 var->xres_virtual = xres_virtual;
706 var->yres_virtual = yres_virtual;
707 var->xoffset = var->yoffset = 0;
708
709 fix->line_length = offset * 2;
710
711 var->grayscale = !is_color;
712
713 var->activate = FB_ACTIVATE_NOW;
714
715 dbg(PFX "bpp=%d, lcd_bpp=%d, "
716 "crt_enabled=%d, lcd_enabled=%d\n",
717 var->bits_per_pixel, lcd_bpp, crt_enabled, lcd_enabled);
718 dbg(PFX "xres=%d, yres=%d, vxres=%d, vyres=%d "
719 "is_color=%d, is_dual=%d, is_tft=%d\n",
720 xres, yres, xres_virtual, yres_virtual, is_color, is_dual, is_tft);
721}
722
723static void __s1d13xxxfb_remove(struct platform_device *pdev)
724{
725 struct fb_info *info = platform_get_drvdata(pdev);
726 struct s1d13xxxfb_par *par = NULL;
727
728 if (info) {
729 par = info->par;
730 if (par && par->regs) {
731
732 s1d13xxxfb_writereg(par, S1DREG_COM_DISP_MODE, 0x00);
733 s1d13xxxfb_writereg(par, S1DREG_PS_CNF, 0x11);
734 iounmap(par->regs);
735 }
736
737 fb_dealloc_cmap(&info->cmap);
738
739 if (info->screen_base)
740 iounmap(info->screen_base);
741
742 framebuffer_release(info);
743 }
744
745 release_mem_region(pdev->resource[0].start,
746 resource_size(&pdev->resource[0]));
747 release_mem_region(pdev->resource[1].start,
748 resource_size(&pdev->resource[1]));
749}
750
751static int s1d13xxxfb_remove(struct platform_device *pdev)
752{
753 struct fb_info *info = platform_get_drvdata(pdev);
754
755 unregister_framebuffer(info);
756 __s1d13xxxfb_remove(pdev);
757 return 0;
758}
759
760static int s1d13xxxfb_probe(struct platform_device *pdev)
761{
762 struct s1d13xxxfb_par *default_par;
763 struct fb_info *info;
764 struct s1d13xxxfb_pdata *pdata = NULL;
765 int ret = 0;
766 int i;
767 u8 revision, prod_id;
768
769 dbg("probe called: device is %p\n", pdev);
770
771 printk(KERN_INFO "Epson S1D13XXX FB Driver\n");
772
773
774 if (dev_get_platdata(&pdev->dev))
775 pdata = dev_get_platdata(&pdev->dev);
776
777 if (pdata && pdata->platform_init_video)
778 pdata->platform_init_video();
779
780 if (pdev->num_resources != 2) {
781 dev_err(&pdev->dev, "invalid num_resources: %i\n",
782 pdev->num_resources);
783 ret = -ENODEV;
784 goto bail;
785 }
786
787
788 if (pdev->resource[0].flags != IORESOURCE_MEM
789 || pdev->resource[1].flags != IORESOURCE_MEM) {
790 dev_err(&pdev->dev, "invalid resource type\n");
791 ret = -ENODEV;
792 goto bail;
793 }
794
795 if (!request_mem_region(pdev->resource[0].start,
796 resource_size(&pdev->resource[0]), "s1d13xxxfb mem")) {
797 dev_dbg(&pdev->dev, "request_mem_region failed\n");
798 ret = -EBUSY;
799 goto bail;
800 }
801
802 if (!request_mem_region(pdev->resource[1].start,
803 resource_size(&pdev->resource[1]), "s1d13xxxfb regs")) {
804 dev_dbg(&pdev->dev, "request_mem_region failed\n");
805 ret = -EBUSY;
806 goto bail;
807 }
808
809 info = framebuffer_alloc(sizeof(struct s1d13xxxfb_par) + sizeof(u32) * 256, &pdev->dev);
810 if (!info) {
811 ret = -ENOMEM;
812 goto bail;
813 }
814
815 platform_set_drvdata(pdev, info);
816 default_par = info->par;
817 default_par->regs = ioremap(pdev->resource[1].start,
818 resource_size(&pdev->resource[1]));
819 if (!default_par->regs) {
820 printk(KERN_ERR PFX "unable to map registers\n");
821 ret = -ENOMEM;
822 goto bail;
823 }
824 info->pseudo_palette = default_par->pseudo_palette;
825
826 info->screen_base = ioremap(pdev->resource[0].start,
827 resource_size(&pdev->resource[0]));
828
829 if (!info->screen_base) {
830 printk(KERN_ERR PFX "unable to map framebuffer\n");
831 ret = -ENOMEM;
832 goto bail;
833 }
834
835
836 prod_id = s1d13xxxfb_readreg(default_par, S1DREG_REV_CODE) >> 2;
837
838 revision = s1d13xxxfb_readreg(default_par, S1DREG_REV_CODE) & 0x3;
839 ret = -ENODEV;
840
841 for (i = 0; i < ARRAY_SIZE(s1d13xxxfb_prod_ids); i++) {
842 if (prod_id == s1d13xxxfb_prod_ids[i]) {
843
844 default_par->prod_id = prod_id;
845 default_par->revision = revision;
846 ret = 0;
847 break;
848 }
849 }
850
851 if (!ret) {
852 printk(KERN_INFO PFX "chip production id %i = %s\n",
853 prod_id, s1d13xxxfb_prod_names[i]);
854 printk(KERN_INFO PFX "chip revision %i\n", revision);
855 } else {
856 printk(KERN_INFO PFX
857 "unknown chip production id %i, revision %i\n",
858 prod_id, revision);
859 printk(KERN_INFO PFX "please contact maintainer\n");
860 goto bail;
861 }
862
863 info->fix = s1d13xxxfb_fix;
864 info->fix.mmio_start = pdev->resource[1].start;
865 info->fix.mmio_len = resource_size(&pdev->resource[1]);
866 info->fix.smem_start = pdev->resource[0].start;
867 info->fix.smem_len = resource_size(&pdev->resource[0]);
868
869 printk(KERN_INFO PFX "regs mapped at 0x%p, fb %d KiB mapped at 0x%p\n",
870 default_par->regs, info->fix.smem_len / 1024, info->screen_base);
871
872 info->par = default_par;
873 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
874 info->fbops = &s1d13xxxfb_fbops;
875
876 switch(prod_id) {
877 case S1D13506_PROD_ID:
878 s1d13xxxfb_fbops.fb_fillrect = s1d13xxxfb_bitblt_solidfill;
879 s1d13xxxfb_fbops.fb_copyarea = s1d13xxxfb_bitblt_copyarea;
880 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN |
881 FBINFO_HWACCEL_FILLRECT | FBINFO_HWACCEL_COPYAREA;
882 break;
883 default:
884 break;
885 }
886
887
888 if (pdata && pdata->initregs)
889 s1d13xxxfb_runinit(info->par, pdata->initregs, pdata->initregssize);
890
891 s1d13xxxfb_fetch_hw_state(info);
892
893 if (register_framebuffer(info) < 0) {
894 ret = -EINVAL;
895 goto bail;
896 }
897
898 fb_info(info, "%s frame buffer device\n", info->fix.id);
899
900 return 0;
901
902bail:
903 __s1d13xxxfb_remove(pdev);
904 return ret;
905
906}
907
908#ifdef CONFIG_PM
909static int s1d13xxxfb_suspend(struct platform_device *dev, pm_message_t state)
910{
911 struct fb_info *info = platform_get_drvdata(dev);
912 struct s1d13xxxfb_par *s1dfb = info->par;
913 struct s1d13xxxfb_pdata *pdata = NULL;
914
915
916 lcd_enable(s1dfb, 0);
917 crt_enable(s1dfb, 0);
918
919 if (dev_get_platdata(&dev->dev))
920 pdata = dev_get_platdata(&dev->dev);
921
922#if 0
923 if (!s1dfb->disp_save)
924 s1dfb->disp_save = kmalloc(info->fix.smem_len, GFP_KERNEL);
925
926 if (!s1dfb->disp_save) {
927 printk(KERN_ERR PFX "no memory to save screen\n");
928 return -ENOMEM;
929 }
930
931 memcpy_fromio(s1dfb->disp_save, info->screen_base, info->fix.smem_len);
932#else
933 s1dfb->disp_save = NULL;
934#endif
935
936 if (!s1dfb->regs_save)
937 s1dfb->regs_save = kmalloc(info->fix.mmio_len, GFP_KERNEL);
938
939 if (!s1dfb->regs_save) {
940 printk(KERN_ERR PFX "no memory to save registers");
941 return -ENOMEM;
942 }
943
944
945 memcpy_fromio(s1dfb->regs_save, s1dfb->regs, info->fix.mmio_len);
946
947
948 s1d13xxxfb_writereg(s1dfb, S1DREG_PS_CNF, 0x11);
949
950 if (pdata && pdata->platform_suspend_video)
951 return pdata->platform_suspend_video();
952 else
953 return 0;
954}
955
956static int s1d13xxxfb_resume(struct platform_device *dev)
957{
958 struct fb_info *info = platform_get_drvdata(dev);
959 struct s1d13xxxfb_par *s1dfb = info->par;
960 struct s1d13xxxfb_pdata *pdata = NULL;
961
962
963 s1d13xxxfb_writereg(s1dfb, S1DREG_PS_CNF, 0x10);
964
965
966 while ((s1d13xxxfb_readreg(s1dfb, S1DREG_PS_STATUS) & 0x01))
967 udelay(10);
968
969 if (dev_get_platdata(&dev->dev))
970 pdata = dev_get_platdata(&dev->dev);
971
972 if (s1dfb->regs_save) {
973
974 memcpy_toio(s1dfb->regs, s1dfb->regs_save, info->fix.mmio_len);
975 kfree(s1dfb->regs_save);
976 }
977
978 if (s1dfb->disp_save) {
979 memcpy_toio(info->screen_base, s1dfb->disp_save,
980 info->fix.smem_len);
981 kfree(s1dfb->disp_save);
982 }
983
984 if ((s1dfb->display & 0x01) != 0)
985 lcd_enable(s1dfb, 1);
986 if ((s1dfb->display & 0x02) != 0)
987 crt_enable(s1dfb, 1);
988
989 if (pdata && pdata->platform_resume_video)
990 return pdata->platform_resume_video();
991 else
992 return 0;
993}
994#endif
995
996static struct platform_driver s1d13xxxfb_driver = {
997 .probe = s1d13xxxfb_probe,
998 .remove = s1d13xxxfb_remove,
999#ifdef CONFIG_PM
1000 .suspend = s1d13xxxfb_suspend,
1001 .resume = s1d13xxxfb_resume,
1002#endif
1003 .driver = {
1004 .name = S1D_DEVICENAME,
1005 },
1006};
1007
1008
1009static int __init
1010s1d13xxxfb_init(void)
1011{
1012
1013#ifndef MODULE
1014 if (fb_get_options("s1d13xxxfb", NULL))
1015 return -ENODEV;
1016#endif
1017
1018 return platform_driver_register(&s1d13xxxfb_driver);
1019}
1020
1021
1022static void __exit
1023s1d13xxxfb_exit(void)
1024{
1025 platform_driver_unregister(&s1d13xxxfb_driver);
1026}
1027
1028module_init(s1d13xxxfb_init);
1029module_exit(s1d13xxxfb_exit);
1030
1031
1032MODULE_LICENSE("GPL");
1033MODULE_DESCRIPTION("Framebuffer driver for S1D13xxx devices");
1034MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>, Thibaut VARENE <varenet@parisc-linux.org>");
1035