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10#ifndef __ACTBL2_H__
11#define __ACTBL2_H__
12
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26
27#define ACPI_SIG_BDAT "BDAT"
28#define ACPI_SIG_IORT "IORT"
29#define ACPI_SIG_IVRS "IVRS"
30#define ACPI_SIG_LPIT "LPIT"
31#define ACPI_SIG_MADT "APIC"
32#define ACPI_SIG_MCFG "MCFG"
33#define ACPI_SIG_MCHI "MCHI"
34#define ACPI_SIG_MPST "MPST"
35#define ACPI_SIG_MSCT "MSCT"
36#define ACPI_SIG_MSDM "MSDM"
37#define ACPI_SIG_NFIT "NFIT"
38#define ACPI_SIG_PCCT "PCCT"
39#define ACPI_SIG_PDTT "PDTT"
40#define ACPI_SIG_PHAT "PHAT"
41#define ACPI_SIG_PMTT "PMTT"
42#define ACPI_SIG_PPTT "PPTT"
43#define ACPI_SIG_PRMT "PRMT"
44#define ACPI_SIG_RASF "RASF"
45#define ACPI_SIG_RGRT "RGRT"
46#define ACPI_SIG_SBST "SBST"
47#define ACPI_SIG_SDEI "SDEI"
48#define ACPI_SIG_SDEV "SDEV"
49#define ACPI_SIG_NHLT "NHLT"
50#define ACPI_SIG_SVKL "SVKL"
51
52
53
54
55
56#pragma pack(1)
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78
79struct acpi_table_aest {
80 struct acpi_table_header header;
81 void *node_array[];
82};
83
84
85
86struct acpi_aest_hdr {
87 u8 type;
88 u16 length;
89 u8 reserved;
90 u32 node_specific_offset;
91 u32 node_interface_offset;
92 u32 node_interrupt_offset;
93 u32 node_interrupt_count;
94 u64 timestamp_rate;
95 u64 reserved1;
96 u64 error_injection_rate;
97};
98
99
100
101#define ACPI_AEST_PROCESSOR_ERROR_NODE 0
102#define ACPI_AEST_MEMORY_ERROR_NODE 1
103#define ACPI_AEST_SMMU_ERROR_NODE 2
104#define ACPI_AEST_VENDOR_ERROR_NODE 3
105#define ACPI_AEST_GIC_ERROR_NODE 4
106#define ACPI_AEST_NODE_TYPE_RESERVED 5
107
108
109
110
111
112
113
114typedef struct acpi_aest_processor {
115 u32 processor_id;
116 u8 resource_type;
117 u8 reserved;
118 u8 flags;
119 u8 revision;
120 u64 processor_affinity;
121
122} acpi_aest_processor;
123
124
125
126#define ACPI_AEST_CACHE_RESOURCE 0
127#define ACPI_AEST_TLB_RESOURCE 1
128#define ACPI_AEST_GENERIC_RESOURCE 2
129#define ACPI_AEST_RESOURCE_RESERVED 3
130
131
132
133typedef struct acpi_aest_processor_cache {
134 u32 cache_reference;
135 u32 reserved;
136
137} acpi_aest_processor_cache;
138
139
140
141#define ACPI_AEST_CACHE_DATA 0
142#define ACPI_AEST_CACHE_INSTRUCTION 1
143#define ACPI_AEST_CACHE_UNIFIED 2
144#define ACPI_AEST_CACHE_RESERVED 3
145
146
147
148typedef struct acpi_aest_processor_tlb {
149 u32 tlb_level;
150 u32 reserved;
151
152} acpi_aest_processor_tlb;
153
154
155
156typedef struct acpi_aest_processor_generic {
157 u8 *resource;
158
159} acpi_aest_processor_generic;
160
161
162
163typedef struct acpi_aest_memory {
164 u32 srat_proximity_domain;
165
166} acpi_aest_memory;
167
168
169
170typedef struct acpi_aest_smmu {
171 u32 iort_node_reference;
172 u32 subcomponent_reference;
173
174} acpi_aest_smmu;
175
176
177
178typedef struct acpi_aest_vendor {
179 u32 acpi_hid;
180 u32 acpi_uid;
181 u8 vendor_specific_data[16];
182
183} acpi_aest_vendor;
184
185
186
187typedef struct acpi_aest_gic {
188 u32 interface_type;
189 u32 instance_id;
190
191} acpi_aest_gic;
192
193
194
195#define ACPI_AEST_GIC_CPU 0
196#define ACPI_AEST_GIC_DISTRIBUTOR 1
197#define ACPI_AEST_GIC_REDISTRIBUTOR 2
198#define ACPI_AEST_GIC_ITS 3
199#define ACPI_AEST_GIC_RESERVED 4
200
201
202
203typedef struct acpi_aest_node_interface {
204 u8 type;
205 u8 reserved[3];
206 u32 flags;
207 u64 address;
208 u32 error_record_index;
209 u32 error_record_count;
210 u64 error_record_implemented;
211 u64 error_status_reporting;
212 u64 addressing_mode;
213
214} acpi_aest_node_interface;
215
216
217
218#define ACPI_AEST_NODE_SYSTEM_REGISTER 0
219#define ACPI_AEST_NODE_MEMORY_MAPPED 1
220#define ACPI_AEST_XFACE_RESERVED 2
221
222
223
224typedef struct acpi_aest_node_interrupt {
225 u8 type;
226 u8 reserved[2];
227 u8 flags;
228 u32 gsiv;
229 u8 iort_id;
230 u8 reserved1[3];
231
232} acpi_aest_node_interrupt;
233
234
235
236#define ACPI_AEST_NODE_FAULT_HANDLING 0
237#define ACPI_AEST_NODE_ERROR_RECOVERY 1
238#define ACPI_AEST_XRUPT_RESERVED 2
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247
248
249struct acpi_table_bdat {
250 struct acpi_table_header header;
251 struct acpi_generic_address gas;
252};
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261
262
263struct acpi_table_iort {
264 struct acpi_table_header header;
265 u32 node_count;
266 u32 node_offset;
267 u32 reserved;
268};
269
270
271
272
273struct acpi_iort_node {
274 u8 type;
275 u16 length;
276 u8 revision;
277 u32 identifier;
278 u32 mapping_count;
279 u32 mapping_offset;
280 char node_data[1];
281};
282
283
284
285enum acpi_iort_node_type {
286 ACPI_IORT_NODE_ITS_GROUP = 0x00,
287 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
288 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
289 ACPI_IORT_NODE_SMMU = 0x03,
290 ACPI_IORT_NODE_SMMU_V3 = 0x04,
291 ACPI_IORT_NODE_PMCG = 0x05,
292 ACPI_IORT_NODE_RMR = 0x06,
293};
294
295struct acpi_iort_id_mapping {
296 u32 input_base;
297 u32 id_count;
298 u32 output_base;
299 u32 output_reference;
300 u32 flags;
301};
302
303
304
305#define ACPI_IORT_ID_SINGLE_MAPPING (1)
306
307struct acpi_iort_memory_access {
308 u32 cache_coherency;
309 u8 hints;
310 u16 reserved;
311 u8 memory_flags;
312};
313
314
315
316#define ACPI_IORT_NODE_COHERENT 0x00000001
317#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000
318
319
320
321#define ACPI_IORT_HT_TRANSIENT (1)
322#define ACPI_IORT_HT_WRITE (1<<1)
323#define ACPI_IORT_HT_READ (1<<2)
324#define ACPI_IORT_HT_OVERRIDE (1<<3)
325
326
327
328#define ACPI_IORT_MF_COHERENCY (1)
329#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
330
331
332
333
334struct acpi_iort_its_group {
335 u32 its_count;
336 u32 identifiers[1];
337};
338
339struct acpi_iort_named_component {
340 u32 node_flags;
341 u64 memory_properties;
342 u8 memory_address_limit;
343 char device_name[1];
344};
345
346
347
348#define ACPI_IORT_NC_STALL_SUPPORTED (1)
349#define ACPI_IORT_NC_PASID_BITS (31<<1)
350
351struct acpi_iort_root_complex {
352 u64 memory_properties;
353 u32 ats_attribute;
354 u32 pci_segment_number;
355 u8 memory_address_limit;
356 u8 reserved[3];
357};
358
359
360
361#define ACPI_IORT_ATS_SUPPORTED (1)
362#define ACPI_IORT_PRI_SUPPORTED (1<<1)
363#define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2)
364
365struct acpi_iort_smmu {
366 u64 base_address;
367 u64 span;
368 u32 model;
369 u32 flags;
370 u32 global_interrupt_offset;
371 u32 context_interrupt_count;
372 u32 context_interrupt_offset;
373 u32 pmu_interrupt_count;
374 u32 pmu_interrupt_offset;
375 u64 interrupts[1];
376};
377
378
379
380#define ACPI_IORT_SMMU_V1 0x00000000
381#define ACPI_IORT_SMMU_V2 0x00000001
382#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002
383#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003
384#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004
385#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005
386
387
388
389#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
390#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
391
392
393
394struct acpi_iort_smmu_gsi {
395 u32 nsg_irpt;
396 u32 nsg_irpt_flags;
397 u32 nsg_cfg_irpt;
398 u32 nsg_cfg_irpt_flags;
399};
400
401struct acpi_iort_smmu_v3 {
402 u64 base_address;
403 u32 flags;
404 u32 reserved;
405 u64 vatos_address;
406 u32 model;
407 u32 event_gsiv;
408 u32 pri_gsiv;
409 u32 gerr_gsiv;
410 u32 sync_gsiv;
411 u32 pxm;
412 u32 id_mapping_index;
413};
414
415
416
417#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000
418#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001
419#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002
420
421
422
423#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
424#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
425#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
426
427struct acpi_iort_pmcg {
428 u64 page0_base_address;
429 u32 overflow_gsiv;
430 u32 node_reference;
431 u64 page1_base_address;
432};
433
434struct acpi_iort_rmr {
435 u32 flags;
436 u32 rmr_count;
437 u32 rmr_offset;
438};
439
440struct acpi_iort_rmr_desc {
441 u64 base_address;
442 u64 length;
443 u32 reserved;
444};
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455
456struct acpi_table_ivrs {
457 struct acpi_table_header header;
458 u32 info;
459 u64 reserved;
460};
461
462
463
464#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00
465#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000
466#define ACPI_IVRS_ATS_RESERVED 0x00400000
467
468
469
470struct acpi_ivrs_header {
471 u8 type;
472 u8 flags;
473 u16 length;
474 u16 device_id;
475};
476
477
478
479enum acpi_ivrs_type {
480 ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
481 ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
482 ACPI_IVRS_TYPE_HARDWARE3 = 0x40,
483 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
484 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
485 ACPI_IVRS_TYPE_MEMORY3 = 0x22
486};
487
488
489
490#define ACPI_IVHD_TT_ENABLE (1)
491#define ACPI_IVHD_PASS_PW (1<<1)
492#define ACPI_IVHD_RES_PASS_PW (1<<2)
493#define ACPI_IVHD_ISOC (1<<3)
494#define ACPI_IVHD_IOTLB (1<<4)
495
496
497
498#define ACPI_IVMD_UNITY (1)
499#define ACPI_IVMD_READ (1<<1)
500#define ACPI_IVMD_WRITE (1<<2)
501#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
502
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507
508
509struct acpi_ivrs_hardware_10 {
510 struct acpi_ivrs_header header;
511 u16 capability_offset;
512 u64 base_address;
513 u16 pci_segment_group;
514 u16 info;
515 u32 feature_reporting;
516};
517
518
519
520struct acpi_ivrs_hardware_11 {
521 struct acpi_ivrs_header header;
522 u16 capability_offset;
523 u64 base_address;
524 u16 pci_segment_group;
525 u16 info;
526 u32 attributes;
527 u64 efr_register_image;
528 u64 reserved;
529};
530
531
532
533#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F
534#define ACPI_IVHD_UNIT_ID_MASK 0x1F00
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540
541
542struct acpi_ivrs_de_header {
543 u8 type;
544 u16 id;
545 u8 data_setting;
546};
547
548
549
550#define ACPI_IVHD_ENTRY_LENGTH 0xC0
551
552
553
554enum acpi_ivrs_device_entry_type {
555
556
557 ACPI_IVRS_TYPE_PAD4 = 0,
558 ACPI_IVRS_TYPE_ALL = 1,
559 ACPI_IVRS_TYPE_SELECT = 2,
560 ACPI_IVRS_TYPE_START = 3,
561 ACPI_IVRS_TYPE_END = 4,
562
563
564
565 ACPI_IVRS_TYPE_PAD8 = 64,
566 ACPI_IVRS_TYPE_NOT_USED = 65,
567 ACPI_IVRS_TYPE_ALIAS_SELECT = 66,
568 ACPI_IVRS_TYPE_ALIAS_START = 67,
569 ACPI_IVRS_TYPE_EXT_SELECT = 70,
570 ACPI_IVRS_TYPE_EXT_START = 71,
571 ACPI_IVRS_TYPE_SPECIAL = 72,
572
573
574
575 ACPI_IVRS_TYPE_HID = 240
576};
577
578
579
580#define ACPI_IVHD_INIT_PASS (1)
581#define ACPI_IVHD_EINT_PASS (1<<1)
582#define ACPI_IVHD_NMI_PASS (1<<2)
583#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
584#define ACPI_IVHD_LINT0_PASS (1<<6)
585#define ACPI_IVHD_LINT1_PASS (1<<7)
586
587
588
589struct acpi_ivrs_device4 {
590 struct acpi_ivrs_de_header header;
591};
592
593
594
595struct acpi_ivrs_device8a {
596 struct acpi_ivrs_de_header header;
597 u8 reserved1;
598 u16 used_id;
599 u8 reserved2;
600};
601
602
603
604struct acpi_ivrs_device8b {
605 struct acpi_ivrs_de_header header;
606 u32 extended_data;
607};
608
609
610
611#define ACPI_IVHD_ATS_DISABLED (1<<31)
612
613
614
615struct acpi_ivrs_device8c {
616 struct acpi_ivrs_de_header header;
617 u8 handle;
618 u16 used_id;
619 u8 variety;
620};
621
622
623
624#define ACPI_IVHD_IOAPIC 1
625#define ACPI_IVHD_HPET 2
626
627
628
629struct acpi_ivrs_device_hid {
630 struct acpi_ivrs_de_header header;
631 u64 acpi_hid;
632 u64 acpi_cid;
633 u8 uid_type;
634 u8 uid_length;
635};
636
637
638
639#define ACPI_IVRS_UID_NOT_PRESENT 0
640#define ACPI_IVRS_UID_IS_INTEGER 1
641#define ACPI_IVRS_UID_IS_STRING 2
642
643
644
645struct acpi_ivrs_memory {
646 struct acpi_ivrs_header header;
647 u16 aux_data;
648 u64 reserved;
649 u64 start_address;
650 u64 memory_length;
651};
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659
660
661struct acpi_table_lpit {
662 struct acpi_table_header header;
663};
664
665
666
667struct acpi_lpit_header {
668 u32 type;
669 u32 length;
670 u16 unique_id;
671 u16 reserved;
672 u32 flags;
673};
674
675
676
677enum acpi_lpit_type {
678 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
679 ACPI_LPIT_TYPE_RESERVED = 0x01
680};
681
682
683
684#define ACPI_LPIT_STATE_DISABLED (1)
685#define ACPI_LPIT_NO_COUNTER (1<<1)
686
687
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689
690
691
692
693struct acpi_lpit_native {
694 struct acpi_lpit_header header;
695 struct acpi_generic_address entry_trigger;
696 u32 residency;
697 u32 latency;
698 struct acpi_generic_address residency_counter;
699 u64 counter_frequency;
700};
701
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703
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705
706
707
708
709struct acpi_table_madt {
710 struct acpi_table_header header;
711 u32 address;
712 u32 flags;
713};
714
715
716
717#define ACPI_MADT_PCAT_COMPAT (1)
718
719
720
721#define ACPI_MADT_DUAL_PIC 1
722#define ACPI_MADT_MULTIPLE_APIC 0
723
724
725
726enum acpi_madt_type {
727 ACPI_MADT_TYPE_LOCAL_APIC = 0,
728 ACPI_MADT_TYPE_IO_APIC = 1,
729 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
730 ACPI_MADT_TYPE_NMI_SOURCE = 3,
731 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
732 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
733 ACPI_MADT_TYPE_IO_SAPIC = 6,
734 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
735 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
736 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
737 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
738 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
739 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
740 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
741 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
742 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
743 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16,
744 ACPI_MADT_TYPE_RESERVED = 17
745};
746
747
748
749
750
751
752
753struct acpi_madt_local_apic {
754 struct acpi_subtable_header header;
755 u8 processor_id;
756 u8 id;
757 u32 lapic_flags;
758};
759
760
761
762struct acpi_madt_io_apic {
763 struct acpi_subtable_header header;
764 u8 id;
765 u8 reserved;
766 u32 address;
767 u32 global_irq_base;
768};
769
770
771
772struct acpi_madt_interrupt_override {
773 struct acpi_subtable_header header;
774 u8 bus;
775 u8 source_irq;
776 u32 global_irq;
777 u16 inti_flags;
778};
779
780
781
782struct acpi_madt_nmi_source {
783 struct acpi_subtable_header header;
784 u16 inti_flags;
785 u32 global_irq;
786};
787
788
789
790struct acpi_madt_local_apic_nmi {
791 struct acpi_subtable_header header;
792 u8 processor_id;
793 u16 inti_flags;
794 u8 lint;
795};
796
797
798
799struct acpi_madt_local_apic_override {
800 struct acpi_subtable_header header;
801 u16 reserved;
802 u64 address;
803};
804
805
806
807struct acpi_madt_io_sapic {
808 struct acpi_subtable_header header;
809 u8 id;
810 u8 reserved;
811 u32 global_irq_base;
812 u64 address;
813};
814
815
816
817struct acpi_madt_local_sapic {
818 struct acpi_subtable_header header;
819 u8 processor_id;
820 u8 id;
821 u8 eid;
822 u8 reserved[3];
823 u32 lapic_flags;
824 u32 uid;
825 char uid_string[1];
826};
827
828
829
830struct acpi_madt_interrupt_source {
831 struct acpi_subtable_header header;
832 u16 inti_flags;
833 u8 type;
834 u8 id;
835 u8 eid;
836 u8 io_sapic_vector;
837 u32 global_irq;
838 u32 flags;
839};
840
841
842
843#define ACPI_MADT_CPEI_OVERRIDE (1)
844
845
846
847struct acpi_madt_local_x2apic {
848 struct acpi_subtable_header header;
849 u16 reserved;
850 u32 local_apic_id;
851 u32 lapic_flags;
852 u32 uid;
853};
854
855
856
857struct acpi_madt_local_x2apic_nmi {
858 struct acpi_subtable_header header;
859 u16 inti_flags;
860 u32 uid;
861 u8 lint;
862 u8 reserved[3];
863};
864
865
866
867struct acpi_madt_generic_interrupt {
868 struct acpi_subtable_header header;
869 u16 reserved;
870 u32 cpu_interface_number;
871 u32 uid;
872 u32 flags;
873 u32 parking_version;
874 u32 performance_interrupt;
875 u64 parked_address;
876 u64 base_address;
877 u64 gicv_base_address;
878 u64 gich_base_address;
879 u32 vgic_interrupt;
880 u64 gicr_base_address;
881 u64 arm_mpidr;
882 u8 efficiency_class;
883 u8 reserved2[1];
884 u16 spe_interrupt;
885};
886
887
888
889
890#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1)
891#define ACPI_MADT_VGIC_IRQ_MODE (1<<2)
892
893
894
895struct acpi_madt_generic_distributor {
896 struct acpi_subtable_header header;
897 u16 reserved;
898 u32 gic_id;
899 u64 base_address;
900 u32 global_irq_base;
901 u8 version;
902 u8 reserved2[3];
903};
904
905
906
907enum acpi_madt_gic_version {
908 ACPI_MADT_GIC_VERSION_NONE = 0,
909 ACPI_MADT_GIC_VERSION_V1 = 1,
910 ACPI_MADT_GIC_VERSION_V2 = 2,
911 ACPI_MADT_GIC_VERSION_V3 = 3,
912 ACPI_MADT_GIC_VERSION_V4 = 4,
913 ACPI_MADT_GIC_VERSION_RESERVED = 5
914};
915
916
917
918struct acpi_madt_generic_msi_frame {
919 struct acpi_subtable_header header;
920 u16 reserved;
921 u32 msi_frame_id;
922 u64 base_address;
923 u32 flags;
924 u16 spi_count;
925 u16 spi_base;
926};
927
928
929
930#define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
931
932
933
934struct acpi_madt_generic_redistributor {
935 struct acpi_subtable_header header;
936 u16 reserved;
937 u64 base_address;
938 u32 length;
939};
940
941
942
943struct acpi_madt_generic_translator {
944 struct acpi_subtable_header header;
945 u16 reserved;
946 u32 translation_id;
947 u64 base_address;
948 u32 reserved2;
949};
950
951
952
953struct acpi_madt_multiproc_wakeup {
954 struct acpi_subtable_header header;
955 u16 mailbox_version;
956 u32 reserved;
957 u64 base_address;
958};
959
960#define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032
961#define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048
962
963struct acpi_madt_multiproc_wakeup_mailbox {
964 u16 command;
965 u16 reserved;
966 u32 apic_id;
967 u64 wakeup_vector;
968 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE];
969 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE];
970};
971
972#define ACPI_MP_WAKE_COMMAND_WAKEUP 1
973
974
975
976
977
978
979
980#define ACPI_MADT_ENABLED (1)
981
982
983
984#define ACPI_MADT_POLARITY_MASK (3)
985#define ACPI_MADT_TRIGGER_MASK (3<<2)
986
987
988
989#define ACPI_MADT_POLARITY_CONFORMS 0
990#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
991#define ACPI_MADT_POLARITY_RESERVED 2
992#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
993
994#define ACPI_MADT_TRIGGER_CONFORMS (0)
995#define ACPI_MADT_TRIGGER_EDGE (1<<2)
996#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
997#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008struct acpi_table_mcfg {
1009 struct acpi_table_header header;
1010 u8 reserved[8];
1011};
1012
1013
1014
1015struct acpi_mcfg_allocation {
1016 u64 address;
1017 u16 pci_segment;
1018 u8 start_bus_number;
1019 u8 end_bus_number;
1020 u32 reserved;
1021};
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033struct acpi_table_mchi {
1034 struct acpi_table_header header;
1035 u8 interface_type;
1036 u8 protocol;
1037 u64 protocol_data;
1038 u8 interrupt_type;
1039 u8 gpe;
1040 u8 pci_device_flag;
1041 u32 global_interrupt;
1042 struct acpi_generic_address control_register;
1043 u8 pci_segment;
1044 u8 pci_bus;
1045 u8 pci_device;
1046 u8 pci_function;
1047};
1048
1049
1050
1051
1052
1053
1054
1055
1056#define ACPI_MPST_CHANNEL_INFO \
1057 u8 channel_id; \
1058 u8 reserved1[3]; \
1059 u16 power_node_count; \
1060 u16 reserved2;
1061
1062
1063
1064struct acpi_table_mpst {
1065 struct acpi_table_header header;
1066 ACPI_MPST_CHANNEL_INFO
1067};
1068
1069
1070
1071struct acpi_mpst_channel {
1072 ACPI_MPST_CHANNEL_INFO
1073};
1074
1075
1076
1077struct acpi_mpst_power_node {
1078 u8 flags;
1079 u8 reserved1;
1080 u16 node_id;
1081 u32 length;
1082 u64 range_address;
1083 u64 range_length;
1084 u32 num_power_states;
1085 u32 num_physical_components;
1086};
1087
1088
1089
1090#define ACPI_MPST_ENABLED 1
1091#define ACPI_MPST_POWER_MANAGED 2
1092#define ACPI_MPST_HOT_PLUG_CAPABLE 4
1093
1094
1095
1096struct acpi_mpst_power_state {
1097 u8 power_state;
1098 u8 info_index;
1099};
1100
1101
1102
1103struct acpi_mpst_component {
1104 u16 component_id;
1105};
1106
1107
1108
1109struct acpi_mpst_data_hdr {
1110 u16 characteristics_count;
1111 u16 reserved;
1112};
1113
1114struct acpi_mpst_power_data {
1115 u8 structure_id;
1116 u8 flags;
1117 u16 reserved1;
1118 u32 average_power;
1119 u32 power_saving;
1120 u64 exit_latency;
1121 u64 reserved2;
1122};
1123
1124
1125
1126#define ACPI_MPST_PRESERVE 1
1127#define ACPI_MPST_AUTOENTRY 2
1128#define ACPI_MPST_AUTOEXIT 4
1129
1130
1131
1132struct acpi_mpst_shared {
1133 u32 signature;
1134 u16 pcc_command;
1135 u16 pcc_status;
1136 u32 command_register;
1137 u32 status_register;
1138 u32 power_state_id;
1139 u32 power_node_id;
1140 u64 energy_consumed;
1141 u64 average_power;
1142};
1143
1144
1145
1146
1147
1148
1149
1150
1151struct acpi_table_msct {
1152 struct acpi_table_header header;
1153 u32 proximity_offset;
1154 u32 max_proximity_domains;
1155 u32 max_clock_domains;
1156 u64 max_address;
1157};
1158
1159
1160
1161struct acpi_msct_proximity {
1162 u8 revision;
1163 u8 length;
1164 u32 range_start;
1165 u32 range_end;
1166 u32 processor_capacity;
1167 u64 memory_capacity;
1168};
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181struct acpi_table_msdm {
1182 struct acpi_table_header header;
1183};
1184
1185
1186
1187
1188
1189
1190
1191
1192struct acpi_table_nfit {
1193 struct acpi_table_header header;
1194 u32 reserved;
1195};
1196
1197
1198
1199struct acpi_nfit_header {
1200 u16 type;
1201 u16 length;
1202};
1203
1204
1205
1206enum acpi_nfit_type {
1207 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
1208 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
1209 ACPI_NFIT_TYPE_INTERLEAVE = 2,
1210 ACPI_NFIT_TYPE_SMBIOS = 3,
1211 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
1212 ACPI_NFIT_TYPE_DATA_REGION = 5,
1213 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
1214 ACPI_NFIT_TYPE_CAPABILITIES = 7,
1215 ACPI_NFIT_TYPE_RESERVED = 8
1216};
1217
1218
1219
1220
1221
1222
1223
1224struct acpi_nfit_system_address {
1225 struct acpi_nfit_header header;
1226 u16 range_index;
1227 u16 flags;
1228 u32 reserved;
1229 u32 proximity_domain;
1230 u8 range_guid[16];
1231 u64 address;
1232 u64 length;
1233 u64 memory_mapping;
1234 u64 location_cookie;
1235};
1236
1237
1238
1239#define ACPI_NFIT_ADD_ONLINE_ONLY (1)
1240#define ACPI_NFIT_PROXIMITY_VALID (1<<1)
1241#define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2)
1242
1243
1244
1245
1246
1247struct acpi_nfit_memory_map {
1248 struct acpi_nfit_header header;
1249 u32 device_handle;
1250 u16 physical_id;
1251 u16 region_id;
1252 u16 range_index;
1253 u16 region_index;
1254 u64 region_size;
1255 u64 region_offset;
1256 u64 address;
1257 u16 interleave_index;
1258 u16 interleave_ways;
1259 u16 flags;
1260 u16 reserved;
1261};
1262
1263
1264
1265#define ACPI_NFIT_MEM_SAVE_FAILED (1)
1266#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1)
1267#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2)
1268#define ACPI_NFIT_MEM_NOT_ARMED (1<<3)
1269#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4)
1270#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5)
1271#define ACPI_NFIT_MEM_MAP_FAILED (1<<6)
1272
1273
1274
1275struct acpi_nfit_interleave {
1276 struct acpi_nfit_header header;
1277 u16 interleave_index;
1278 u16 reserved;
1279 u32 line_count;
1280 u32 line_size;
1281 u32 line_offset[1];
1282};
1283
1284
1285
1286struct acpi_nfit_smbios {
1287 struct acpi_nfit_header header;
1288 u32 reserved;
1289 u8 data[1];
1290};
1291
1292
1293
1294struct acpi_nfit_control_region {
1295 struct acpi_nfit_header header;
1296 u16 region_index;
1297 u16 vendor_id;
1298 u16 device_id;
1299 u16 revision_id;
1300 u16 subsystem_vendor_id;
1301 u16 subsystem_device_id;
1302 u16 subsystem_revision_id;
1303 u8 valid_fields;
1304 u8 manufacturing_location;
1305 u16 manufacturing_date;
1306 u8 reserved[2];
1307 u32 serial_number;
1308 u16 code;
1309 u16 windows;
1310 u64 window_size;
1311 u64 command_offset;
1312 u64 command_size;
1313 u64 status_offset;
1314 u64 status_size;
1315 u16 flags;
1316 u8 reserved1[6];
1317};
1318
1319
1320
1321#define ACPI_NFIT_CONTROL_BUFFERED (1)
1322
1323
1324
1325#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1)
1326
1327
1328
1329struct acpi_nfit_data_region {
1330 struct acpi_nfit_header header;
1331 u16 region_index;
1332 u16 windows;
1333 u64 offset;
1334 u64 size;
1335 u64 capacity;
1336 u64 start_address;
1337};
1338
1339
1340
1341struct acpi_nfit_flush_address {
1342 struct acpi_nfit_header header;
1343 u32 device_handle;
1344 u16 hint_count;
1345 u8 reserved[6];
1346 u64 hint_address[1];
1347};
1348
1349
1350
1351struct acpi_nfit_capabilities {
1352 struct acpi_nfit_header header;
1353 u8 highest_capability;
1354 u8 reserved[3];
1355 u32 capabilities;
1356 u32 reserved2;
1357};
1358
1359
1360
1361#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1)
1362#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1)
1363#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2)
1364
1365
1366
1367
1368struct nfit_device_handle {
1369 u32 handle;
1370};
1371
1372
1373
1374#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1375#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1376#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1377#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1378#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
1379
1380#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1381#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1382#define ACPI_NFIT_MEMORY_ID_OFFSET 8
1383#define ACPI_NFIT_SOCKET_ID_OFFSET 12
1384#define ACPI_NFIT_NODE_ID_OFFSET 16
1385
1386
1387
1388#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1389 ((dimm) | \
1390 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1391 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1392 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1393 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1394
1395
1396
1397#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1398 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1399
1400#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1401 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1402
1403#define ACPI_NFIT_GET_MEMORY_ID(handle) \
1404 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1405
1406#define ACPI_NFIT_GET_SOCKET_ID(handle) \
1407 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1408
1409#define ACPI_NFIT_GET_NODE_ID(handle) \
1410 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
1411
1412
1413
1414
1415
1416
1417
1418
1419struct acpi_table_pcct {
1420 struct acpi_table_header header;
1421 u32 flags;
1422 u64 reserved;
1423};
1424
1425
1426
1427#define ACPI_PCCT_DOORBELL 1
1428
1429
1430
1431enum acpi_pcct_type {
1432 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
1433 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
1434 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2,
1435 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3,
1436 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4,
1437 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5,
1438 ACPI_PCCT_TYPE_RESERVED = 6
1439};
1440
1441
1442
1443
1444
1445
1446
1447struct acpi_pcct_subspace {
1448 struct acpi_subtable_header header;
1449 u8 reserved[6];
1450 u64 base_address;
1451 u64 length;
1452 struct acpi_generic_address doorbell_register;
1453 u64 preserve_mask;
1454 u64 write_mask;
1455 u32 latency;
1456 u32 max_access_rate;
1457 u16 min_turnaround_time;
1458};
1459
1460
1461
1462struct acpi_pcct_hw_reduced {
1463 struct acpi_subtable_header header;
1464 u32 platform_interrupt;
1465 u8 flags;
1466 u8 reserved;
1467 u64 base_address;
1468 u64 length;
1469 struct acpi_generic_address doorbell_register;
1470 u64 preserve_mask;
1471 u64 write_mask;
1472 u32 latency;
1473 u32 max_access_rate;
1474 u16 min_turnaround_time;
1475};
1476
1477
1478
1479struct acpi_pcct_hw_reduced_type2 {
1480 struct acpi_subtable_header header;
1481 u32 platform_interrupt;
1482 u8 flags;
1483 u8 reserved;
1484 u64 base_address;
1485 u64 length;
1486 struct acpi_generic_address doorbell_register;
1487 u64 preserve_mask;
1488 u64 write_mask;
1489 u32 latency;
1490 u32 max_access_rate;
1491 u16 min_turnaround_time;
1492 struct acpi_generic_address platform_ack_register;
1493 u64 ack_preserve_mask;
1494 u64 ack_write_mask;
1495};
1496
1497
1498
1499struct acpi_pcct_ext_pcc_master {
1500 struct acpi_subtable_header header;
1501 u32 platform_interrupt;
1502 u8 flags;
1503 u8 reserved1;
1504 u64 base_address;
1505 u32 length;
1506 struct acpi_generic_address doorbell_register;
1507 u64 preserve_mask;
1508 u64 write_mask;
1509 u32 latency;
1510 u32 max_access_rate;
1511 u32 min_turnaround_time;
1512 struct acpi_generic_address platform_ack_register;
1513 u64 ack_preserve_mask;
1514 u64 ack_set_mask;
1515 u64 reserved2;
1516 struct acpi_generic_address cmd_complete_register;
1517 u64 cmd_complete_mask;
1518 struct acpi_generic_address cmd_update_register;
1519 u64 cmd_update_preserve_mask;
1520 u64 cmd_update_set_mask;
1521 struct acpi_generic_address error_status_register;
1522 u64 error_status_mask;
1523};
1524
1525
1526
1527struct acpi_pcct_ext_pcc_slave {
1528 struct acpi_subtable_header header;
1529 u32 platform_interrupt;
1530 u8 flags;
1531 u8 reserved1;
1532 u64 base_address;
1533 u32 length;
1534 struct acpi_generic_address doorbell_register;
1535 u64 preserve_mask;
1536 u64 write_mask;
1537 u32 latency;
1538 u32 max_access_rate;
1539 u32 min_turnaround_time;
1540 struct acpi_generic_address platform_ack_register;
1541 u64 ack_preserve_mask;
1542 u64 ack_set_mask;
1543 u64 reserved2;
1544 struct acpi_generic_address cmd_complete_register;
1545 u64 cmd_complete_mask;
1546 struct acpi_generic_address cmd_update_register;
1547 u64 cmd_update_preserve_mask;
1548 u64 cmd_update_set_mask;
1549 struct acpi_generic_address error_status_register;
1550 u64 error_status_mask;
1551};
1552
1553
1554
1555struct acpi_pcct_hw_reg {
1556 struct acpi_subtable_header header;
1557 u16 version;
1558 u64 base_address;
1559 u64 length;
1560 struct acpi_generic_address doorbell_register;
1561 u64 doorbell_preserve;
1562 u64 doorbell_write;
1563 struct acpi_generic_address cmd_complete_register;
1564 u64 cmd_complete_mask;
1565 struct acpi_generic_address error_status_register;
1566 u64 error_status_mask;
1567 u32 nominal_latency;
1568 u32 min_turnaround_time;
1569};
1570
1571
1572
1573#define ACPI_PCCT_INTERRUPT_POLARITY (1)
1574#define ACPI_PCCT_INTERRUPT_MODE (1<<1)
1575
1576
1577
1578
1579
1580
1581
1582struct acpi_pcct_shared_memory {
1583 u32 signature;
1584 u16 command;
1585 u16 status;
1586};
1587
1588
1589
1590struct acpi_pcct_ext_pcc_shared_memory {
1591 u32 signature;
1592 u32 flags;
1593 u32 length;
1594 u32 command;
1595};
1596
1597
1598
1599
1600
1601
1602
1603
1604struct acpi_table_pdtt {
1605 struct acpi_table_header header;
1606 u8 trigger_count;
1607 u8 reserved[3];
1608 u32 array_offset;
1609};
1610
1611
1612
1613
1614
1615
1616struct acpi_pdtt_channel {
1617 u8 subchannel_id;
1618 u8 flags;
1619};
1620
1621
1622
1623#define ACPI_PDTT_RUNTIME_TRIGGER (1)
1624#define ACPI_PDTT_WAIT_COMPLETION (1<<1)
1625#define ACPI_PDTT_TRIGGER_ORDER (1<<2)
1626
1627
1628
1629
1630
1631
1632
1633
1634struct acpi_table_phat {
1635 struct acpi_table_header header;
1636};
1637
1638
1639
1640struct acpi_phat_header {
1641 u16 type;
1642 u16 length;
1643 u8 revision;
1644};
1645
1646
1647
1648#define ACPI_PHAT_TYPE_FW_VERSION_DATA 0
1649#define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1
1650#define ACPI_PHAT_TYPE_RESERVED 2
1651
1652
1653
1654
1655
1656
1657
1658struct acpi_phat_version_data {
1659 struct acpi_phat_header header;
1660 u8 reserved[3];
1661 u32 element_count;
1662};
1663
1664struct acpi_phat_version_element {
1665 u8 guid[16];
1666 u64 version_value;
1667 u32 producer_id;
1668};
1669
1670
1671
1672struct acpi_phat_health_data {
1673 struct acpi_phat_header header;
1674 u8 reserved[2];
1675 u8 health;
1676 u8 device_guid[16];
1677 u32 device_specific_offset;
1678};
1679
1680
1681
1682#define ACPI_PHAT_ERRORS_FOUND 0
1683#define ACPI_PHAT_NO_ERRORS 1
1684#define ACPI_PHAT_UNKNOWN_ERRORS 2
1685#define ACPI_PHAT_ADVISORY 3
1686
1687
1688
1689
1690
1691
1692
1693
1694struct acpi_table_pmtt {
1695 struct acpi_table_header header;
1696 u32 memory_device_count;
1697
1698
1699
1700
1701};
1702
1703
1704
1705struct acpi_pmtt_header {
1706 u8 type;
1707 u8 reserved1;
1708 u16 length;
1709 u16 flags;
1710 u16 reserved2;
1711 u32 memory_device_count;
1712
1713
1714
1715
1716
1717};
1718
1719
1720
1721#define ACPI_PMTT_TYPE_SOCKET 0
1722#define ACPI_PMTT_TYPE_CONTROLLER 1
1723#define ACPI_PMTT_TYPE_DIMM 2
1724#define ACPI_PMTT_TYPE_RESERVED 3
1725#define ACPI_PMTT_TYPE_VENDOR 0xFF
1726
1727
1728
1729#define ACPI_PMTT_TOP_LEVEL 0x0001
1730#define ACPI_PMTT_PHYSICAL 0x0002
1731#define ACPI_PMTT_MEMORY_TYPE 0x000C
1732
1733
1734
1735
1736
1737
1738
1739struct acpi_pmtt_socket {
1740 struct acpi_pmtt_header header;
1741 u16 socket_id;
1742 u16 reserved;
1743};
1744
1745
1746
1747
1748
1749
1750
1751struct acpi_pmtt_controller {
1752 struct acpi_pmtt_header header;
1753 u16 controller_id;
1754 u16 reserved;
1755};
1756
1757
1758
1759
1760
1761
1762
1763struct acpi_pmtt_physical_component {
1764 struct acpi_pmtt_header header;
1765 u32 bios_handle;
1766};
1767
1768
1769
1770struct acpi_pmtt_vendor_specific {
1771 struct acpi_pmtt_header header;
1772 u8 type_uuid[16];
1773 u8 specific[];
1774
1775
1776
1777
1778
1779};
1780
1781
1782
1783
1784
1785
1786
1787
1788struct acpi_table_pptt {
1789 struct acpi_table_header header;
1790};
1791
1792
1793
1794enum acpi_pptt_type {
1795 ACPI_PPTT_TYPE_PROCESSOR = 0,
1796 ACPI_PPTT_TYPE_CACHE = 1,
1797 ACPI_PPTT_TYPE_ID = 2,
1798 ACPI_PPTT_TYPE_RESERVED = 3
1799};
1800
1801
1802
1803struct acpi_pptt_processor {
1804 struct acpi_subtable_header header;
1805 u16 reserved;
1806 u32 flags;
1807 u32 parent;
1808 u32 acpi_processor_id;
1809 u32 number_of_priv_resources;
1810};
1811
1812
1813
1814#define ACPI_PPTT_PHYSICAL_PACKAGE (1)
1815#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
1816#define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2)
1817#define ACPI_PPTT_ACPI_LEAF_NODE (1<<3)
1818#define ACPI_PPTT_ACPI_IDENTICAL (1<<4)
1819
1820
1821
1822struct acpi_pptt_cache {
1823 struct acpi_subtable_header header;
1824 u16 reserved;
1825 u32 flags;
1826 u32 next_level_of_cache;
1827 u32 size;
1828 u32 number_of_sets;
1829 u8 associativity;
1830 u8 attributes;
1831 u16 line_size;
1832};
1833
1834
1835
1836struct acpi_pptt_cache_v1 {
1837 u32 cache_id;
1838};
1839
1840
1841
1842#define ACPI_PPTT_SIZE_PROPERTY_VALID (1)
1843#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1)
1844#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2)
1845#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3)
1846#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4)
1847#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5)
1848#define ACPI_PPTT_LINE_SIZE_VALID (1<<6)
1849#define ACPI_PPTT_CACHE_ID_VALID (1<<7)
1850
1851
1852
1853#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03)
1854#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C)
1855#define ACPI_PPTT_MASK_WRITE_POLICY (0x10)
1856
1857
1858#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0)
1859#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01)
1860#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02)
1861#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03)
1862
1863#define ACPI_PPTT_CACHE_TYPE_DATA (0x0)
1864#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2)
1865#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2)
1866#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2)
1867
1868#define ACPI_PPTT_CACHE_POLICY_WB (0x0)
1869#define ACPI_PPTT_CACHE_POLICY_WT (1<<4)
1870
1871
1872
1873struct acpi_pptt_id {
1874 struct acpi_subtable_header header;
1875 u16 reserved;
1876 u32 vendor_id;
1877 u64 level1_id;
1878 u64 level2_id;
1879 u16 major_rev;
1880 u16 minor_rev;
1881 u16 spin_rev;
1882};
1883
1884
1885
1886
1887
1888
1889
1890
1891struct acpi_table_prmt {
1892 struct acpi_table_header header;
1893};
1894
1895struct acpi_table_prmt_header {
1896 u8 platform_guid[16];
1897 u32 module_info_offset;
1898 u32 module_info_count;
1899};
1900
1901struct acpi_prmt_module_header {
1902 u16 revision;
1903 u16 length;
1904};
1905
1906struct acpi_prmt_module_info {
1907 u16 revision;
1908 u16 length;
1909 u8 module_guid[16];
1910 u16 major_rev;
1911 u16 minor_rev;
1912 u16 handler_info_count;
1913 u32 handler_info_offset;
1914 u64 mmio_list_pointer;
1915};
1916
1917struct acpi_prmt_handler_info {
1918 u16 revision;
1919 u16 length;
1920 u8 handler_guid[16];
1921 u64 handler_address;
1922 u64 static_data_buffer_address;
1923 u64 acpi_param_buffer_address;
1924};
1925
1926
1927
1928
1929
1930
1931
1932
1933struct acpi_table_rasf {
1934 struct acpi_table_header header;
1935 u8 channel_id[12];
1936};
1937
1938
1939
1940struct acpi_rasf_shared_memory {
1941 u32 signature;
1942 u16 command;
1943 u16 status;
1944 u16 version;
1945 u8 capabilities[16];
1946 u8 set_capabilities[16];
1947 u16 num_parameter_blocks;
1948 u32 set_capabilities_status;
1949};
1950
1951
1952
1953struct acpi_rasf_parameter_block {
1954 u16 type;
1955 u16 version;
1956 u16 length;
1957};
1958
1959
1960
1961struct acpi_rasf_patrol_scrub_parameter {
1962 struct acpi_rasf_parameter_block header;
1963 u16 patrol_scrub_command;
1964 u64 requested_address_range[2];
1965 u64 actual_address_range[2];
1966 u16 flags;
1967 u8 requested_speed;
1968};
1969
1970
1971
1972#define ACPI_RASF_SCRUBBER_RUNNING 1
1973#define ACPI_RASF_SPEED (7<<1)
1974#define ACPI_RASF_SPEED_SLOW (0<<1)
1975#define ACPI_RASF_SPEED_MEDIUM (4<<1)
1976#define ACPI_RASF_SPEED_FAST (7<<1)
1977
1978
1979
1980enum acpi_rasf_commands {
1981 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
1982};
1983
1984
1985
1986enum acpi_rasf_capabiliities {
1987 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
1988 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
1989};
1990
1991
1992
1993enum acpi_rasf_patrol_scrub_commands {
1994 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
1995 ACPI_RASF_START_PATROL_SCRUBBER = 2,
1996 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
1997};
1998
1999
2000
2001#define ACPI_RASF_GENERATE_SCI (1<<15)
2002
2003
2004
2005enum acpi_rasf_status {
2006 ACPI_RASF_SUCCESS = 0,
2007 ACPI_RASF_NOT_VALID = 1,
2008 ACPI_RASF_NOT_SUPPORTED = 2,
2009 ACPI_RASF_BUSY = 3,
2010 ACPI_RASF_FAILED = 4,
2011 ACPI_RASF_ABORTED = 5,
2012 ACPI_RASF_INVALID_DATA = 6
2013};
2014
2015
2016
2017#define ACPI_RASF_COMMAND_COMPLETE (1)
2018#define ACPI_RASF_SCI_DOORBELL (1<<1)
2019#define ACPI_RASF_ERROR (1<<2)
2020#define ACPI_RASF_STATUS (0x1F<<3)
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032struct acpi_table_rgrt {
2033 struct acpi_table_header header;
2034 u16 version;
2035 u8 image_type;
2036 u8 reserved;
2037 u8 image[0];
2038};
2039
2040
2041
2042enum acpi_rgrt_image_type {
2043 ACPI_RGRT_TYPE_RESERVED0 = 0,
2044 ACPI_RGRT_IMAGE_TYPE_PNG = 1,
2045 ACPI_RGRT_TYPE_RESERVED = 2
2046};
2047
2048
2049
2050
2051
2052
2053
2054
2055struct acpi_table_sbst {
2056 struct acpi_table_header header;
2057 u32 warning_level;
2058 u32 low_level;
2059 u32 critical_level;
2060};
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071struct acpi_table_sdei {
2072 struct acpi_table_header header;
2073};
2074
2075
2076
2077
2078
2079
2080
2081
2082struct acpi_table_sdev {
2083 struct acpi_table_header header;
2084};
2085
2086struct acpi_sdev_header {
2087 u8 type;
2088 u8 flags;
2089 u16 length;
2090};
2091
2092
2093
2094enum acpi_sdev_type {
2095 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
2096 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
2097 ACPI_SDEV_TYPE_RESERVED = 2
2098};
2099
2100
2101
2102#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
2103#define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1)
2104
2105
2106
2107
2108
2109
2110
2111struct acpi_sdev_namespace {
2112 struct acpi_sdev_header header;
2113 u16 device_id_offset;
2114 u16 device_id_length;
2115 u16 vendor_data_offset;
2116 u16 vendor_data_length;
2117};
2118
2119struct acpi_sdev_secure_component {
2120 u16 secure_component_offset;
2121 u16 secure_component_length;
2122};
2123
2124
2125
2126
2127struct acpi_sdev_component {
2128 struct acpi_sdev_header header;
2129};
2130
2131
2132
2133enum acpi_sac_type {
2134 ACPI_SDEV_TYPE_ID_COMPONENT = 0,
2135 ACPI_SDEV_TYPE_MEM_COMPONENT = 1
2136};
2137
2138struct acpi_sdev_id_component {
2139 struct acpi_sdev_header header;
2140 u16 hardware_id_offset;
2141 u16 hardware_id_length;
2142 u16 subsystem_id_offset;
2143 u16 subsystem_id_length;
2144 u16 hardware_revision;
2145 u8 hardware_rev_present;
2146 u8 class_code_present;
2147 u8 pci_base_class;
2148 u8 pci_sub_class;
2149 u8 pci_programming_xface;
2150};
2151
2152struct acpi_sdev_mem_component {
2153 struct acpi_sdev_header header;
2154 u32 reserved;
2155 u64 memory_base_address;
2156 u64 memory_length;
2157};
2158
2159
2160
2161struct acpi_sdev_pcie {
2162 struct acpi_sdev_header header;
2163 u16 segment;
2164 u16 start_bus;
2165 u16 path_offset;
2166 u16 path_length;
2167 u16 vendor_data_offset;
2168 u16 vendor_data_length;
2169};
2170
2171
2172
2173struct acpi_sdev_pcie_path {
2174 u8 device;
2175 u8 function;
2176};
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187struct acpi_table_svkl {
2188 struct acpi_table_header header;
2189 u32 count;
2190};
2191
2192struct acpi_svkl_key {
2193 u16 type;
2194 u16 format;
2195 u32 size;
2196 u64 address;
2197};
2198
2199enum acpi_svkl_type {
2200 ACPI_SVKL_TYPE_MAIN_STORAGE = 0,
2201 ACPI_SVKL_TYPE_RESERVED = 1
2202};
2203
2204enum acpi_svkl_format {
2205 ACPI_SVKL_FORMAT_RAW_BINARY = 0,
2206 ACPI_SVKL_FORMAT_RESERVED = 1
2207};
2208
2209
2210
2211#pragma pack()
2212
2213#endif
2214