1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Functions and registers to access AC100 codec / RTC combo IC. 4 * 5 * Copyright (C) 2016 Chen-Yu Tsai 6 * 7 * Chen-Yu Tsai <wens@csie.org> 8 */ 9 10#ifndef __LINUX_MFD_AC100_H 11#define __LINUX_MFD_AC100_H 12 13#include <linux/regmap.h> 14 15struct ac100_dev { 16 struct device *dev; 17 struct regmap *regmap; 18}; 19 20/* Audio codec related registers */ 21#define AC100_CHIP_AUDIO_RST 0x00 22#define AC100_PLL_CTRL1 0x01 23#define AC100_PLL_CTRL2 0x02 24#define AC100_SYSCLK_CTRL 0x03 25#define AC100_MOD_CLK_ENA 0x04 26#define AC100_MOD_RST_CTRL 0x05 27#define AC100_I2S_SR_CTRL 0x06 28 29/* I2S1 interface */ 30#define AC100_I2S1_CLK_CTRL 0x10 31#define AC100_I2S1_SND_OUT_CTRL 0x11 32#define AC100_I2S1_SND_IN_CTRL 0x12 33#define AC100_I2S1_MXR_SRC 0x13 34#define AC100_I2S1_VOL_CTRL1 0x14 35#define AC100_I2S1_VOL_CTRL2 0x15 36#define AC100_I2S1_VOL_CTRL3 0x16 37#define AC100_I2S1_VOL_CTRL4 0x17 38#define AC100_I2S1_MXR_GAIN 0x18 39 40/* I2S2 interface */ 41#define AC100_I2S2_CLK_CTRL 0x20 42#define AC100_I2S2_SND_OUT_CTRL 0x21 43#define AC100_I2S2_SND_IN_CTRL 0x22 44#define AC100_I2S2_MXR_SRC 0x23 45#define AC100_I2S2_VOL_CTRL1 0x24 46#define AC100_I2S2_VOL_CTRL2 0x25 47#define AC100_I2S2_VOL_CTRL3 0x26 48#define AC100_I2S2_VOL_CTRL4 0x27 49#define AC100_I2S2_MXR_GAIN 0x28 50 51/* I2S3 interface */ 52#define AC100_I2S3_CLK_CTRL 0x30 53#define AC100_I2S3_SND_OUT_CTRL 0x31 54#define AC100_I2S3_SND_IN_CTRL 0x32 55#define AC100_I2S3_SIG_PATH_CTRL 0x33 56 57/* ADC digital controls */ 58#define AC100_ADC_DIG_CTRL 0x40 59#define AC100_ADC_VOL_CTRL 0x41 60 61/* HMIC plug sensing / key detection */ 62#define AC100_HMIC_CTRL1 0x44 63#define AC100_HMIC_CTRL2 0x45 64#define AC100_HMIC_STATUS 0x46 65 66/* DAC digital controls */ 67#define AC100_DAC_DIG_CTRL 0x48 68#define AC100_DAC_VOL_CTRL 0x49 69#define AC100_DAC_MXR_SRC 0x4c 70#define AC100_DAC_MXR_GAIN 0x4d 71 72/* Analog controls */ 73#define AC100_ADC_APC_CTRL 0x50 74#define AC100_ADC_SRC 0x51 75#define AC100_ADC_SRC_BST_CTRL 0x52 76#define AC100_OUT_MXR_DAC_A_CTRL 0x53 77#define AC100_OUT_MXR_SRC 0x54 78#define AC100_OUT_MXR_SRC_BST 0x55 79#define AC100_HPOUT_CTRL 0x56 80#define AC100_ERPOUT_CTRL 0x57 81#define AC100_SPKOUT_CTRL 0x58 82#define AC100_LINEOUT_CTRL 0x59 83 84/* ADC digital audio processing (high pass filter & auto gain control */ 85#define AC100_ADC_DAP_L_STA 0x80 86#define AC100_ADC_DAP_R_STA 0x81 87#define AC100_ADC_DAP_L_CTRL 0x82 88#define AC100_ADC_DAP_R_CTRL 0x83 89#define AC100_ADC_DAP_L_T_L 0x84 /* Left Target Level */ 90#define AC100_ADC_DAP_R_T_L 0x85 /* Right Target Level */ 91#define AC100_ADC_DAP_L_H_A_C 0x86 /* Left High Avg. Coef */ 92#define AC100_ADC_DAP_L_L_A_C 0x87 /* Left Low Avg. Coef */ 93#define AC100_ADC_DAP_R_H_A_C 0x88 /* Right High Avg. Coef */ 94#define AC100_ADC_DAP_R_L_A_C 0x89 /* Right Low Avg. Coef */ 95#define AC100_ADC_DAP_L_D_T 0x8a /* Left Decay Time */ 96#define AC100_ADC_DAP_L_A_T 0x8b /* Left Attack Time */ 97#define AC100_ADC_DAP_R_D_T 0x8c /* Right Decay Time */ 98#define AC100_ADC_DAP_R_A_T 0x8d /* Right Attack Time */ 99#define AC100_ADC_DAP_N_TH 0x8e /* Noise Threshold */ 100#define AC100_ADC_DAP_L_H_N_A_C 0x8f /* Left High Noise Avg. Coef */ 101#define AC100_ADC_DAP_L_L_N_A_C 0x90 /* Left Low Noise Avg. Coef */ 102#define AC100_ADC_DAP_R_H_N_A_C 0x91 /* Right High Noise Avg. Coef */ 103#define AC100_ADC_DAP_R_L_N_A_C 0x92 /* Right Low Noise Avg. Coef */ 104#define AC100_ADC_DAP_H_HPF_C 0x93 /* High High-Pass-Filter Coef */ 105#define AC100_ADC_DAP_L_HPF_C 0x94 /* Low High-Pass-Filter Coef */ 106#define AC100_ADC_DAP_OPT 0x95 /* AGC Optimum */ 107 108/* DAC digital audio processing (high pass filter & dynamic range control) */ 109#define AC100_DAC_DAP_CTRL 0xa0 110#define AC100_DAC_DAP_H_HPF_C 0xa1 /* High High-Pass-Filter Coef */ 111#define AC100_DAC_DAP_L_HPF_C 0xa2 /* Low High-Pass-Filter Coef */ 112#define AC100_DAC_DAP_L_H_E_A_C 0xa3 /* Left High Energy Avg Coef */ 113#define AC100_DAC_DAP_L_L_E_A_C 0xa4 /* Left Low Energy Avg Coef */ 114#define AC100_DAC_DAP_R_H_E_A_C 0xa5 /* Right High Energy Avg Coef */ 115#define AC100_DAC_DAP_R_L_E_A_C 0xa6 /* Right Low Energy Avg Coef */ 116#define AC100_DAC_DAP_H_G_D_T_C 0xa7 /* High Gain Delay Time Coef */ 117#define AC100_DAC_DAP_L_G_D_T_C 0xa8 /* Low Gain Delay Time Coef */ 118#define AC100_DAC_DAP_H_G_A_T_C 0xa9 /* High Gain Attack Time Coef */ 119#define AC100_DAC_DAP_L_G_A_T_C 0xaa /* Low Gain Attack Time Coef */ 120#define AC100_DAC_DAP_H_E_TH 0xab /* High Energy Threshold */ 121#define AC100_DAC_DAP_L_E_TH 0xac /* Low Energy Threshold */ 122#define AC100_DAC_DAP_H_G_K 0xad /* High Gain K parameter */ 123#define AC100_DAC_DAP_L_G_K 0xae /* Low Gain K parameter */ 124#define AC100_DAC_DAP_H_G_OFF 0xaf /* High Gain offset */ 125#define AC100_DAC_DAP_L_G_OFF 0xb0 /* Low Gain offset */ 126#define AC100_DAC_DAP_OPT 0xb1 /* DRC optimum */ 127 128/* Digital audio processing enable */ 129#define AC100_ADC_DAP_ENA 0xb4 130#define AC100_DAC_DAP_ENA 0xb5 131 132/* SRC control */ 133#define AC100_SRC1_CTRL1 0xb8 134#define AC100_SRC1_CTRL2 0xb9 135#define AC100_SRC1_CTRL3 0xba 136#define AC100_SRC1_CTRL4 0xbb 137#define AC100_SRC2_CTRL1 0xbc 138#define AC100_SRC2_CTRL2 0xbd 139#define AC100_SRC2_CTRL3 0xbe 140#define AC100_SRC2_CTRL4 0xbf 141 142/* RTC clk control */ 143#define AC100_CLK32K_ANALOG_CTRL 0xc0 144#define AC100_CLKOUT_CTRL1 0xc1 145#define AC100_CLKOUT_CTRL2 0xc2 146#define AC100_CLKOUT_CTRL3 0xc3 147 148/* RTC module */ 149#define AC100_RTC_RST 0xc6 150#define AC100_RTC_CTRL 0xc7 151#define AC100_RTC_SEC 0xc8 /* second */ 152#define AC100_RTC_MIN 0xc9 /* minute */ 153#define AC100_RTC_HOU 0xca /* hour */ 154#define AC100_RTC_WEE 0xcb /* weekday */ 155#define AC100_RTC_DAY 0xcc /* day */ 156#define AC100_RTC_MON 0xcd /* month */ 157#define AC100_RTC_YEA 0xce /* year */ 158#define AC100_RTC_UPD 0xcf /* update trigger */ 159 160/* RTC alarm */ 161#define AC100_ALM_INT_ENA 0xd0 162#define AC100_ALM_INT_STA 0xd1 163#define AC100_ALM_SEC 0xd8 164#define AC100_ALM_MIN 0xd9 165#define AC100_ALM_HOU 0xda 166#define AC100_ALM_WEE 0xdb 167#define AC100_ALM_DAY 0xdc 168#define AC100_ALM_MON 0xdd 169#define AC100_ALM_YEA 0xde 170#define AC100_ALM_UPD 0xdf 171 172/* RTC general purpose register 0 ~ 15 */ 173#define AC100_RTC_GP(x) (0xe0 + (x)) 174 175#endif /* __LINUX_MFD_AC100_H */ 176