LXR linux/include/linux/mmc/host.h

   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 *  linux/include/linux/mmc/host.h
   4 *
   5 *  Host driver specific definitions.
   6 */
   7#ifndef LINUX_MMC_HOST_H
   8#define LINUX_MMC_HOST_H
   9
  10#include <linux/sched.h>
  11#include <linux/device.h>
  12#include <linux/fault-inject.h>
  13
  14#include <linux/mmc/core.h>
  15#include <linux/mmc/card.h>
  16#include <linux/mmc/pm.h>
  17#include <linux/dma-direction.h>
  18#include <linux/keyslot-manager.h>
  19
  20struct mmc_ios {
  21        unsigned int    clock;                  /* clock rate */
  22        unsigned short  vdd;
  23        unsigned int    power_delay_ms;         /* waiting for stable power */
  24
  25/* vdd stores the bit number of the selected voltage range from below. */
  26
  27        unsigned char   bus_mode;               /* command output mode */
  28
  29#define MMC_BUSMODE_OPENDRAIN   1
  30#define MMC_BUSMODE_PUSHPULL    2
  31
  32        unsigned char   chip_select;            /* SPI chip select */
  33
  34#define MMC_CS_DONTCARE         0
  35#define MMC_CS_HIGH             1
  36#define MMC_CS_LOW              2
  37
  38        unsigned char   power_mode;             /* power supply mode */
  39
  40#define MMC_POWER_OFF           0
  41#define MMC_POWER_UP            1
  42#define MMC_POWER_ON            2
  43#define MMC_POWER_UNDEFINED     3
  44
  45        unsigned char   bus_width;              /* data bus width */
  46
  47#define MMC_BUS_WIDTH_1         0
  48#define MMC_BUS_WIDTH_4         2
  49#define MMC_BUS_WIDTH_8         3
  50
  51        unsigned char   timing;                 /* timing specification used */
  52
  53#define MMC_TIMING_LEGACY       0
  54#define MMC_TIMING_MMC_HS       1
  55#define MMC_TIMING_SD_HS        2
  56#define MMC_TIMING_UHS_SDR12    3
  57#define MMC_TIMING_UHS_SDR25    4
  58#define MMC_TIMING_UHS_SDR50    5
  59#define MMC_TIMING_UHS_SDR104   6
  60#define MMC_TIMING_UHS_DDR50    7
  61#define MMC_TIMING_MMC_DDR52    8
  62#define MMC_TIMING_MMC_HS200    9
  63#define MMC_TIMING_MMC_HS400    10
  64#define MMC_TIMING_SD_EXP       11
  65#define MMC_TIMING_SD_EXP_1_2V  12
  66
  67        unsigned char   signal_voltage;         /* signalling voltage (1.8V or 3.3V) */
  68
  69#define MMC_SIGNAL_VOLTAGE_330  0
  70#define MMC_SIGNAL_VOLTAGE_180  1
  71#define MMC_SIGNAL_VOLTAGE_120  2
  72
  73        unsigned char   drv_type;               /* driver type (A, B, C, D) */
  74
  75#define MMC_SET_DRIVER_TYPE_B   0
  76#define MMC_SET_DRIVER_TYPE_A   1
  77#define MMC_SET_DRIVER_TYPE_C   2
  78#define MMC_SET_DRIVER_TYPE_D   3
  79
  80        bool enhanced_strobe;                   /* hs400es selection */
  81};
  82
  83struct mmc_clk_phase {
  84        bool valid;
  85        u16 in_deg;
  86        u16 out_deg;
  87};
  88
  89#define MMC_NUM_CLK_PHASES (MMC_TIMING_MMC_HS400 + 1)
  90struct mmc_clk_phase_map {
  91        struct mmc_clk_phase phase[MMC_NUM_CLK_PHASES];
  92};
  93
  94struct mmc_host;
  95
  96struct mmc_host_ops {
  97        /*
  98         * It is optional for the host to implement pre_req and post_req in
  99         * order to support double buffering of requests (prepare one
 100         * request while another request is active).
 101         * pre_req() must always be followed by a post_req().
 102         * To undo a call made to pre_req(), call post_req() with
 103         * a nonzero err condition.
 104         */
 105        void    (*post_req)(struct mmc_host *host, struct mmc_request *req,
 106                            int err);
 107        void    (*pre_req)(struct mmc_host *host, struct mmc_request *req);
 108        void    (*request)(struct mmc_host *host, struct mmc_request *req);
 109        /* Submit one request to host in atomic context. */
 110        int     (*request_atomic)(struct mmc_host *host,
 111                                  struct mmc_request *req);
 112
 113        /*
 114         * Avoid calling the next three functions too often or in a "fast
 115         * path", since underlaying controller might implement them in an
 116         * expensive and/or slow way. Also note that these functions might
 117         * sleep, so don't call them in the atomic contexts!
 118         */
 119
 120        /*
 121         * Notes to the set_ios callback:
 122         * ios->clock might be 0. For some controllers, setting 0Hz
 123         * as any other frequency works. However, some controllers
 124         * explicitly need to disable the clock. Otherwise e.g. voltage
 125         * switching might fail because the SDCLK is not really quiet.
 126         */
 127        void    (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
 128
 129        /*
 130         * Return values for the get_ro callback should be:
 131         *   0 for a read/write card
 132         *   1 for a read-only card
 133         *   -ENOSYS when not supported (equal to NULL callback)
 134         *   or a negative errno value when something bad happened
 135         */
 136        int     (*get_ro)(struct mmc_host *host);
 137
 138        /*
 139         * Return values for the get_cd callback should be:
 140         *   0 for a absent card
 141         *   1 for a present card
 142         *   -ENOSYS when not supported (equal to NULL callback)
 143         *   or a negative errno value when something bad happened
 144         */
 145        int     (*get_cd)(struct mmc_host *host);
 146
 147        void    (*enable_sdio_irq)(struct mmc_host *host, int enable);
 148        /* Mandatory callback when using MMC_CAP2_SDIO_IRQ_NOTHREAD. */
 149        void    (*ack_sdio_irq)(struct mmc_host *host);
 150
 151        /* optional callback for HC quirks */
 152        void    (*init_card)(struct mmc_host *host, struct mmc_card *card);
 153
 154        int     (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
 155
 156        /* Check if the card is pulling dat[0] low */
 157        int     (*card_busy)(struct mmc_host *host);
 158
 159        /* The tuning command opcode value is different for SD and eMMC cards */
 160        int     (*execute_tuning)(struct mmc_host *host, u32 opcode);
 161
 162        /* Prepare HS400 target operating frequency depending host driver */
 163        int     (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
 164
 165        /* Prepare switch to DDR during the HS400 init sequence */
 166        int     (*hs400_prepare_ddr)(struct mmc_host *host);
 167
 168        /* Prepare for switching from HS400 to HS200 */
 169        void    (*hs400_downgrade)(struct mmc_host *host);
 170
 171        /* Complete selection of HS400 */
 172        void    (*hs400_complete)(struct mmc_host *host);
 173
 174        /* Prepare enhanced strobe depending host driver */
 175        void    (*hs400_enhanced_strobe)(struct mmc_host *host,
 176                                         struct mmc_ios *ios);
 177        int     (*select_drive_strength)(struct mmc_card *card,
 178                                         unsigned int max_dtr, int host_drv,
 179                                         int card_drv, int *drv_type);
 180        /* Reset the eMMC card via RST_n */
 181        void    (*hw_reset)(struct mmc_host *host);
 182        void    (*card_event)(struct mmc_host *host);
 183
 184        /*
 185         * Optional callback to support controllers with HW issues for multiple
 186         * I/O. Returns the number of supported blocks for the request.
 187         */
 188        int     (*multi_io_quirk)(struct mmc_card *card,
 189                                  unsigned int direction, int blk_size);
 190
 191        /* Initialize an SD express card, mandatory for MMC_CAP2_SD_EXP. */
 192        int     (*init_sd_express)(struct mmc_host *host, struct mmc_ios *ios);
 193};
 194
 195struct mmc_cqe_ops {
 196        /* Allocate resources, and make the CQE operational */
 197        int     (*cqe_enable)(struct mmc_host *host, struct mmc_card *card);
 198        /* Free resources, and make the CQE non-operational */
 199        void    (*cqe_disable)(struct mmc_host *host);
 200        /*
 201         * Issue a read, write or DCMD request to the CQE. Also deal with the
 202         * effect of ->cqe_off().
 203         */
 204        int     (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq);
 205        /* Free resources (e.g. DMA mapping) associated with the request */
 206        void    (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq);
 207        /*
 208         * Prepare the CQE and host controller to accept non-CQ commands. There
 209         * is no corresponding ->cqe_on(), instead ->cqe_request() is required
 210         * to deal with that.
 211         */
 212        void    (*cqe_off)(struct mmc_host *host);
 213        /*
 214         * Wait for all CQE tasks to complete. Return an error if recovery
 215         * becomes necessary.
 216         */
 217        int     (*cqe_wait_for_idle)(struct mmc_host *host);
 218        /*
 219         * Notify CQE that a request has timed out. Return false if the request
 220         * completed or true if a timeout happened in which case indicate if
 221         * recovery is needed.
 222         */
 223        bool    (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq,
 224                               bool *recovery_needed);
 225        /*
 226         * Stop all CQE activity and prepare the CQE and host controller to
 227         * accept recovery commands.
 228         */
 229        void    (*cqe_recovery_start)(struct mmc_host *host);
 230        /*
 231         * Clear the queue and call mmc_cqe_request_done() on all requests.
 232         * Requests that errored will have the error set on the mmc_request
 233         * (data->error or cmd->error for DCMD).  Requests that did not error
 234         * will have zero data bytes transferred.
 235         */
 236        void    (*cqe_recovery_finish)(struct mmc_host *host);
 237};
 238
 239struct mmc_async_req {
 240        /* active mmc request */
 241        struct mmc_request      *mrq;
 242        /*
 243         * Check error status of completed mmc request.
 244         * Returns 0 if success otherwise non zero.
 245         */
 246        enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *);
 247};
 248
 249/**
 250 * struct mmc_slot - MMC slot functions
 251 *
 252 * @cd_irq:             MMC/SD-card slot hotplug detection IRQ or -EINVAL
 253 * @handler_priv:       MMC/SD-card slot context
 254 *
 255 * Some MMC/SD host controllers implement slot-functions like card and
 256 * write-protect detection natively. However, a large number of controllers
 257 * leave these functions to the CPU. This struct provides a hook to attach
 258 * such slot-function drivers.
 259 */
 260struct mmc_slot {
 261        int cd_irq;
 262        bool cd_wake_enabled;
 263        void *handler_priv;
 264};
 265
 266/**
 267 * mmc_context_info - synchronization details for mmc context
 268 * @is_done_rcv         wake up reason was done request
 269 * @is_new_req          wake up reason was new request
 270 * @is_waiting_last_req mmc context waiting for single running request
 271 * @wait                wait queue
 272 */
 273struct mmc_context_info {
 274        bool                    is_done_rcv;
 275        bool                    is_new_req;
 276        bool                    is_waiting_last_req;
 277        wait_queue_head_t       wait;
 278};
 279
 280struct regulator;
 281struct mmc_pwrseq;
 282
 283struct mmc_supply {
 284        struct regulator *vmmc;         /* Card power supply */
 285        struct regulator *vqmmc;        /* Optional Vccq supply */
 286};
 287
 288struct mmc_ctx {
 289        struct task_struct *task;
 290};
 291
 292struct mmc_host {
 293        struct device           *parent;
 294        struct device           class_dev;
 295        int                     index;
 296        const struct mmc_host_ops *ops;
 297        struct mmc_pwrseq       *pwrseq;
 298        unsigned int            f_min;
 299        unsigned int            f_max;
 300        unsigned int            f_init;
 301        u32                     ocr_avail;
 302        u32                     ocr_avail_sdio; /* SDIO-specific OCR */
 303        u32                     ocr_avail_sd;   /* SD-specific OCR */
 304        u32                     ocr_avail_mmc;  /* MMC-specific OCR */
 305        struct wakeup_source    *ws;            /* Enable consume of uevents */
 306        u32                     max_current_330;
 307        u32                     max_current_300;
 308        u32                     max_current_180;
 309
 310#define MMC_VDD_165_195         0x00000080      /* VDD voltage 1.65 - 1.95 */
 311#define MMC_VDD_20_21           0x00000100      /* VDD voltage 2.0 ~ 2.1 */
 312#define MMC_VDD_21_22           0x00000200      /* VDD voltage 2.1 ~ 2.2 */
 313#define MMC_VDD_22_23           0x00000400      /* VDD voltage 2.2 ~ 2.3 */
 314#define MMC_VDD_23_24           0x00000800      /* VDD voltage 2.3 ~ 2.4 */
 315#define MMC_VDD_24_25           0x00001000      /* VDD voltage 2.4 ~ 2.5 */
 316#define MMC_VDD_25_26           0x00002000      /* VDD voltage 2.5 ~ 2.6 */
 317#define MMC_VDD_26_27           0x00004000      /* VDD voltage 2.6 ~ 2.7 */
 318#define MMC_VDD_27_28           0x00008000      /* VDD voltage 2.7 ~ 2.8 */
 319#define MMC_VDD_28_29           0x00010000      /* VDD voltage 2.8 ~ 2.9 */
 320#define MMC_VDD_29_30           0x00020000      /* VDD voltage 2.9 ~ 3.0 */
 321#define MMC_VDD_30_31           0x00040000      /* VDD voltage 3.0 ~ 3.1 */
 322#define MMC_VDD_31_32           0x00080000      /* VDD voltage 3.1 ~ 3.2 */
 323#define MMC_VDD_32_33           0x00100000      /* VDD voltage 3.2 ~ 3.3 */
 324#define MMC_VDD_33_34           0x00200000      /* VDD voltage 3.3 ~ 3.4 */
 325#define MMC_VDD_34_35           0x00400000      /* VDD voltage 3.4 ~ 3.5 */
 326#define MMC_VDD_35_36           0x00800000      /* VDD voltage 3.5 ~ 3.6 */
 327
 328        u32                     caps;           /* Host capabilities */
 329
 330#define MMC_CAP_4_BIT_DATA      (1 << 0)        /* Can the host do 4 bit transfers */
 331#define MMC_CAP_MMC_HIGHSPEED   (1 << 1)        /* Can do MMC high-speed timing */
 332#define MMC_CAP_SD_HIGHSPEED    (1 << 2)        /* Can do SD high-speed timing */
 333#define MMC_CAP_SDIO_IRQ        (1 << 3)        /* Can signal pending SDIO IRQs */
 334#define MMC_CAP_SPI             (1 << 4)        /* Talks only SPI protocols */
 335#define MMC_CAP_NEEDS_POLL      (1 << 5)        /* Needs polling for card-detection */
 336#define MMC_CAP_8_BIT_DATA      (1 << 6)        /* Can the host do 8 bit transfers */
 337#define MMC_CAP_AGGRESSIVE_PM   (1 << 7)        /* Suspend (e)MMC/SD at idle  */
 338#define MMC_CAP_NONREMOVABLE    (1 << 8)        /* Nonremovable e.g. eMMC */
 339#define MMC_CAP_WAIT_WHILE_BUSY (1 << 9)        /* Waits while card is busy */
 340#define MMC_CAP_3_3V_DDR        (1 << 11)       /* Host supports eMMC DDR 3.3V */
 341#define MMC_CAP_1_8V_DDR        (1 << 12)       /* Host supports eMMC DDR 1.8V */
 342#define MMC_CAP_1_2V_DDR        (1 << 13)       /* Host supports eMMC DDR 1.2V */
 343#define MMC_CAP_DDR             (MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | \
 344                                 MMC_CAP_1_2V_DDR)
 345#define MMC_CAP_POWER_OFF_CARD  (1 << 14)       /* Can power off after boot */
 346#define MMC_CAP_BUS_WIDTH_TEST  (1 << 15)       /* CMD14/CMD19 bus width ok */
 347#define MMC_CAP_UHS_SDR12       (1 << 16)       /* Host supports UHS SDR12 mode */
 348#define MMC_CAP_UHS_SDR25       (1 << 17)       /* Host supports UHS SDR25 mode */
 349#define MMC_CAP_UHS_SDR50       (1 << 18)       /* Host supports UHS SDR50 mode */
 350#define MMC_CAP_UHS_SDR104      (1 << 19)       /* Host supports UHS SDR104 mode */
 351#define MMC_CAP_UHS_DDR50       (1 << 20)       /* Host supports UHS DDR50 mode */
 352#define MMC_CAP_UHS             (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \
 353                                 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \
 354                                 MMC_CAP_UHS_DDR50)
 355#define MMC_CAP_SYNC_RUNTIME_PM (1 << 21)       /* Synced runtime PM suspends. */
 356#define MMC_CAP_NEED_RSP_BUSY   (1 << 22)       /* Commands with R1B can't use R1. */
 357#define MMC_CAP_DRIVER_TYPE_A   (1 << 23)       /* Host supports Driver Type A */
 358#define MMC_CAP_DRIVER_TYPE_C   (1 << 24)       /* Host supports Driver Type C */
 359#define MMC_CAP_DRIVER_TYPE_D   (1 << 25)       /* Host supports Driver Type D */
 360#define MMC_CAP_DONE_COMPLETE   (1 << 27)       /* RW reqs can be completed within mmc_request_done() */
 361#define MMC_CAP_CD_WAKE         (1 << 28)       /* Enable card detect wake */
 362#define MMC_CAP_CMD_DURING_TFR  (1 << 29)       /* Commands during data transfer */
 363#define MMC_CAP_CMD23           (1 << 30)       /* CMD23 supported. */
 364#define MMC_CAP_HW_RESET        (1 << 31)       /* Reset the eMMC card via RST_n */
 365
 366        u32                     caps2;          /* More host capabilities */
 367
 368#define MMC_CAP2_BOOTPART_NOACC (1 << 0)        /* Boot partition no access */
 369#define MMC_CAP2_FULL_PWR_CYCLE (1 << 2)        /* Can do full power cycle */
 370#define MMC_CAP2_FULL_PWR_CYCLE_IN_SUSPEND (1 << 3) /* Can do full power cycle in suspend */
 371#define MMC_CAP2_HS200_1_8V_SDR (1 << 5)        /* can support */
 372#define MMC_CAP2_HS200_1_2V_SDR (1 << 6)        /* can support */
 373#define MMC_CAP2_HS200          (MMC_CAP2_HS200_1_8V_SDR | \
 374                                 MMC_CAP2_HS200_1_2V_SDR)
 375#define MMC_CAP2_SD_EXP         (1 << 7)        /* SD express via PCIe */
 376#define MMC_CAP2_SD_EXP_1_2V    (1 << 8)        /* SD express 1.2V */
 377#define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10)       /* Card-detect signal active high */
 378#define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11)       /* Write-protect signal active high */
 379#define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14)   /* Don't power up before scan */
 380#define MMC_CAP2_HS400_1_8V     (1 << 15)       /* Can support HS400 1.8V */
 381#define MMC_CAP2_HS400_1_2V     (1 << 16)       /* Can support HS400 1.2V */
 382#define MMC_CAP2_HS400          (MMC_CAP2_HS400_1_8V | \
 383                                 MMC_CAP2_HS400_1_2V)
 384#define MMC_CAP2_HSX00_1_8V     (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V)
 385#define MMC_CAP2_HSX00_1_2V     (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
 386#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
 387#define MMC_CAP2_NO_WRITE_PROTECT (1 << 18)     /* No physical write protect pin, assume that card is always read-write */
 388#define MMC_CAP2_NO_SDIO        (1 << 19)       /* Do not send SDIO commands during initialization */
 389#define MMC_CAP2_HS400_ES       (1 << 20)       /* Host supports enhanced strobe */
 390#define MMC_CAP2_NO_SD          (1 << 21)       /* Do not send SD commands during initialization */
 391#define MMC_CAP2_NO_MMC         (1 << 22)       /* Do not send (e)MMC commands during initialization */
 392#define MMC_CAP2_CQE            (1 << 23)       /* Has eMMC command queue engine */
 393#define MMC_CAP2_CQE_DCMD       (1 << 24)       /* CQE can issue a direct command */
 394#define MMC_CAP2_AVOID_3_3V     (1 << 25)       /* Host must negotiate down from 3.3V */
 395#define MMC_CAP2_MERGE_CAPABLE  (1 << 26)       /* Host can merge a segment over the segment size */
 396#ifdef CONFIG_MMC_CRYPTO
 397#define MMC_CAP2_CRYPTO         (1 << 27)       /* Host supports inline encryption */
 398#else
 399#define MMC_CAP2_CRYPTO         0
 400#endif
 401#define MMC_CAP2_ALT_GPT_TEGRA  (1 << 28)       /* Host with eMMC that has GPT entry at a non-standard location */
 402
 403        int                     fixed_drv_type; /* fixed driver type for non-removable media */
 404
 405        mmc_pm_flag_t           pm_caps;        /* supported pm features */
 406
 407        /* host specific block data */
 408        unsigned int            max_seg_size;   /* see blk_queue_max_segment_size */
 409        unsigned short          max_segs;       /* see blk_queue_max_segments */
 410        unsigned short          unused;
 411        unsigned int            max_req_size;   /* maximum number of bytes in one req */
 412        unsigned int            max_blk_size;   /* maximum size of one mmc block */
 413        unsigned int            max_blk_count;  /* maximum number of blocks in one req */
 414        unsigned int            max_busy_timeout; /* max busy timeout in ms */
 415
 416        /* private data */
 417        spinlock_t              lock;           /* lock for claim and bus ops */
 418
 419        struct mmc_ios          ios;            /* current io bus settings */
 420
 421        /* group bitfields together to minimize padding */
 422        unsigned int            use_spi_crc:1;
 423        unsigned int            claimed:1;      /* host exclusively claimed */
 424        unsigned int            doing_init_tune:1; /* initial tuning in progress */
 425        unsigned int            can_retune:1;   /* re-tuning can be used */
 426        unsigned int            doing_retune:1; /* re-tuning in progress */
 427        unsigned int            retune_now:1;   /* do re-tuning at next req */
 428        unsigned int            retune_paused:1; /* re-tuning is temporarily disabled */
 429        unsigned int            retune_crc_disable:1; /* don't trigger retune upon crc */
 430        unsigned int            can_dma_map_merge:1; /* merging can be used */
 431
 432        int                     rescan_disable; /* disable card detection */
 433        int                     rescan_entered; /* used with nonremovable devices */
 434
 435        int                     need_retune;    /* re-tuning is needed */
 436        int                     hold_retune;    /* hold off re-tuning */
 437        unsigned int            retune_period;  /* re-tuning period in secs */
 438        struct timer_list       retune_timer;   /* for periodic re-tuning */
 439
 440        bool                    trigger_card_event; /* card_event necessary */
 441
 442        struct mmc_card         *card;          /* device attached to this host */
 443
 444        wait_queue_head_t       wq;
 445        struct mmc_ctx          *claimer;       /* context that has host claimed */
 446        int                     claim_cnt;      /* "claim" nesting count */
 447        struct mmc_ctx          default_ctx;    /* default context */
 448
 449        struct delayed_work     detect;
 450        int                     detect_change;  /* card detect flag */
 451        struct mmc_slot         slot;
 452
 453        const struct mmc_bus_ops *bus_ops;      /* current bus driver */
 454
 455        unsigned int            sdio_irqs;
 456        struct task_struct      *sdio_irq_thread;
 457        struct delayed_work     sdio_irq_work;
 458        bool                    sdio_irq_pending;
 459        atomic_t                sdio_irq_thread_abort;
 460
 461        mmc_pm_flag_t           pm_flags;       /* requested pm features */
 462
 463        struct led_trigger      *led;           /* activity led */
 464
 465#ifdef CONFIG_REGULATOR
 466        bool                    regulator_enabled; /* regulator state */
 467#endif
 468        struct mmc_supply       supply;
 469
 470        struct dentry           *debugfs_root;
 471
 472        /* Ongoing data transfer that allows commands during transfer */
 473        struct mmc_request      *ongoing_mrq;
 474
 475#ifdef CONFIG_FAIL_MMC_REQUEST
 476        struct fault_attr       fail_mmc_request;
 477#endif
 478
 479        unsigned int            actual_clock;   /* Actual HC clock rate */
 480
 481        unsigned int            slotno; /* used for sdio acpi binding */
 482
 483        int                     dsr_req;        /* DSR value is valid */
 484        u32                     dsr;    /* optional driver stage (DSR) value */
 485
 486        /* Command Queue Engine (CQE) support */
 487        const struct mmc_cqe_ops *cqe_ops;
 488        void                    *cqe_private;
 489        int                     cqe_qdepth;
 490        bool                    cqe_enabled;
 491        bool                    cqe_on;
 492
 493        /* Inline encryption support */
 494#ifdef CONFIG_MMC_CRYPTO
 495        struct blk_keyslot_manager ksm;
 496#endif
 497
 498        /* Host Software Queue support */
 499        bool                    hsq_enabled;
 500
 501        unsigned long           private[] ____cacheline_aligned;
 502};
 503
 504struct device_node;
 505
 506struct mmc_host *mmc_alloc_host(int extra, struct device *);
 507int mmc_add_host(struct mmc_host *);
 508void mmc_remove_host(struct mmc_host *);
 509void mmc_free_host(struct mmc_host *);
 510void mmc_of_parse_clk_phase(struct mmc_host *host,
 511                            struct mmc_clk_phase_map *map);
 512int mmc_of_parse(struct mmc_host *host);
 513int mmc_of_parse_voltage(struct mmc_host *host, u32 *mask);
 514
 515static inline void *mmc_priv(struct mmc_host *host)
 516{
 517        return (void *)host->private;
 518}
 519
 520static inline struct mmc_host *mmc_from_priv(void *priv)
 521{
 522        return container_of(priv, struct mmc_host, private);
 523}
 524
 525#define mmc_host_is_spi(host)   ((host)->caps & MMC_CAP_SPI)
 526
 527#define mmc_dev(x)      ((x)->parent)
 528#define mmc_classdev(x) (&(x)->class_dev)
 529#define mmc_hostname(x) (dev_name(&(x)->class_dev))
 530
 531void mmc_detect_change(struct mmc_host *, unsigned long delay);
 532void mmc_request_done(struct mmc_host *, struct mmc_request *);
 533void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
 534
 535void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq);
 536
 537/*
 538 * May be called from host driver's system/runtime suspend/resume callbacks,
 539 * to know if SDIO IRQs has been claimed.
 540 */
 541static inline bool sdio_irq_claimed(struct mmc_host *host)
 542{
 543        return host->sdio_irqs > 0;
 544}
 545
 546static inline void mmc_signal_sdio_irq(struct mmc_host *host)
 547{
 548        host->ops->enable_sdio_irq(host, 0);
 549        host->sdio_irq_pending = true;
 550        if (host->sdio_irq_thread)
 551                wake_up_process(host->sdio_irq_thread);
 552}
 553
 554void sdio_signal_irq(struct mmc_host *host);
 555
 556#ifdef CONFIG_REGULATOR
 557int mmc_regulator_set_ocr(struct mmc_host *mmc,
 558                        struct regulator *supply,
 559                        unsigned short vdd_bit);
 560int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
 561#else
 562static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
 563                                 struct regulator *supply,
 564                                 unsigned short vdd_bit)
 565{
 566        return 0;
 567}
 568
 569static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
 570                                          struct mmc_ios *ios)
 571{
 572        return -EINVAL;
 573}
 574#endif
 575
 576int mmc_regulator_get_supply(struct mmc_host *mmc);
 577
 578static inline int mmc_card_is_removable(struct mmc_host *host)
 579{
 580        return !(host->caps & MMC_CAP_NONREMOVABLE);
 581}
 582
 583static inline int mmc_card_keep_power(struct mmc_host *host)
 584{
 585        return host->pm_flags & MMC_PM_KEEP_POWER;
 586}
 587
 588static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
 589{
 590        return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
 591}
 592
 593/* TODO: Move to private header */
 594static inline int mmc_card_hs(struct mmc_card *card)
 595{
 596        return card->host->ios.timing == MMC_TIMING_SD_HS ||
 597                card->host->ios.timing == MMC_TIMING_MMC_HS;
 598}
 599
 600/* TODO: Move to private header */
 601static inline int mmc_card_uhs(struct mmc_card *card)
 602{
 603        return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
 604                card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
 605}
 606
 607void mmc_retune_timer_stop(struct mmc_host *host);
 608
 609static inline void mmc_retune_needed(struct mmc_host *host)
 610{
 611        if (host->can_retune)
 612                host->need_retune = 1;
 613}
 614
 615static inline bool mmc_can_retune(struct mmc_host *host)
 616{
 617        return host->can_retune == 1;
 618}
 619
 620static inline bool mmc_doing_retune(struct mmc_host *host)
 621{
 622        return host->doing_retune == 1;
 623}
 624
 625static inline bool mmc_doing_tune(struct mmc_host *host)
 626{
 627        return host->doing_retune == 1 || host->doing_init_tune == 1;
 628}
 629
 630static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data)
 631{
 632        return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
 633}
 634
 635int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
 636int mmc_send_abort_tuning(struct mmc_host *host, u32 opcode);
 637
 638#endif /* LINUX_MMC_HOST_H */
 639