LXR linux/include/linux/pci-epc.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * PCI Endpoint *Controller* (EPC) header file
   4 *
   5 * Copyright (C) 2017 Texas Instruments
   6 * Author: Kishon Vijay Abraham I <kishon@ti.com>
   7 */
   8
   9#ifndef __LINUX_PCI_EPC_H
  10#define __LINUX_PCI_EPC_H
  11
  12#include <linux/pci-epf.h>
  13
  14struct pci_epc;
  15
  16enum pci_epc_interface_type {
  17        UNKNOWN_INTERFACE = -1,
  18        PRIMARY_INTERFACE,
  19        SECONDARY_INTERFACE,
  20};
  21
  22enum pci_epc_irq_type {
  23        PCI_EPC_IRQ_UNKNOWN,
  24        PCI_EPC_IRQ_LEGACY,
  25        PCI_EPC_IRQ_MSI,
  26        PCI_EPC_IRQ_MSIX,
  27};
  28
  29static inline const char *
  30pci_epc_interface_string(enum pci_epc_interface_type type)
  31{
  32        switch (type) {
  33        case PRIMARY_INTERFACE:
  34                return "primary";
  35        case SECONDARY_INTERFACE:
  36                return "secondary";
  37        default:
  38                return "UNKNOWN interface";
  39        }
  40}
  41
  42/**
  43 * struct pci_epc_ops - set of function pointers for performing EPC operations
  44 * @write_header: ops to populate configuration space header
  45 * @set_bar: ops to configure the BAR
  46 * @clear_bar: ops to reset the BAR
  47 * @map_addr: ops to map CPU address to PCI address
  48 * @unmap_addr: ops to unmap CPU address and PCI address
  49 * @set_msi: ops to set the requested number of MSI interrupts in the MSI
  50 *           capability register
  51 * @get_msi: ops to get the number of MSI interrupts allocated by the RC from
  52 *           the MSI capability register
  53 * @set_msix: ops to set the requested number of MSI-X interrupts in the
  54 *           MSI-X capability register
  55 * @get_msix: ops to get the number of MSI-X interrupts allocated by the RC
  56 *           from the MSI-X capability register
  57 * @raise_irq: ops to raise a legacy, MSI or MSI-X interrupt
  58 * @map_msi_irq: ops to map physical address to MSI address and return MSI data
  59 * @start: ops to start the PCI link
  60 * @stop: ops to stop the PCI link
  61 * @get_features: ops to get the features supported by the EPC
  62 * @owner: the module owner containing the ops
  63 */
  64struct pci_epc_ops {
  65        int     (*write_header)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
  66                                struct pci_epf_header *hdr);
  67        int     (*set_bar)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
  68                           struct pci_epf_bar *epf_bar);
  69        void    (*clear_bar)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
  70                             struct pci_epf_bar *epf_bar);
  71        int     (*map_addr)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
  72                            phys_addr_t addr, u64 pci_addr, size_t size);
  73        void    (*unmap_addr)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
  74                              phys_addr_t addr);
  75        int     (*set_msi)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
  76                           u8 interrupts);
  77        int     (*get_msi)(struct pci_epc *epc, u8 func_no, u8 vfunc_no);
  78        int     (*set_msix)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
  79                            u16 interrupts, enum pci_barno, u32 offset);
  80        int     (*get_msix)(struct pci_epc *epc, u8 func_no, u8 vfunc_no);
  81        int     (*raise_irq)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
  82                             enum pci_epc_irq_type type, u16 interrupt_num);
  83        int     (*map_msi_irq)(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
  84                               phys_addr_t phys_addr, u8 interrupt_num,
  85                               u32 entry_size, u32 *msi_data,
  86                               u32 *msi_addr_offset);
  87        int     (*start)(struct pci_epc *epc);
  88        void    (*stop)(struct pci_epc *epc);
  89        const struct pci_epc_features* (*get_features)(struct pci_epc *epc,
  90                                                       u8 func_no, u8 vfunc_no);
  91        struct module *owner;
  92};
  93
  94/**
  95 * struct pci_epc_mem_window - address window of the endpoint controller
  96 * @phys_base: physical base address of the PCI address window
  97 * @size: the size of the PCI address window
  98 * @page_size: size of each page
  99 */
 100struct pci_epc_mem_window {
 101        phys_addr_t     phys_base;
 102        size_t          size;
 103        size_t          page_size;
 104};
 105
 106/**
 107 * struct pci_epc_mem - address space of the endpoint controller
 108 * @window: address window of the endpoint controller
 109 * @bitmap: bitmap to manage the PCI address space
 110 * @pages: number of bits representing the address region
 111 * @lock: mutex to protect bitmap
 112 */
 113struct pci_epc_mem {
 114        struct pci_epc_mem_window window;
 115        unsigned long   *bitmap;
 116        int             pages;
 117        /* mutex to protect against concurrent access for memory allocation*/
 118        struct mutex    lock;
 119};
 120
 121/**
 122 * struct pci_epc - represents the PCI EPC device
 123 * @dev: PCI EPC device
 124 * @pci_epf: list of endpoint functions present in this EPC device
 125 * @ops: function pointers for performing endpoint operations
 126 * @windows: array of address space of the endpoint controller
 127 * @mem: first window of the endpoint controller, which corresponds to
 128 *       default address space of the endpoint controller supporting
 129 *       single window.
 130 * @num_windows: number of windows supported by device
 131 * @max_functions: max number of functions that can be configured in this EPC
 132 * @max_vfs: Array indicating the maximum number of virtual functions that can
 133 *   be associated with each physical function
 134 * @group: configfs group representing the PCI EPC device
 135 * @lock: mutex to protect pci_epc ops
 136 * @function_num_map: bitmap to manage physical function number
 137 * @notifier: used to notify EPF of any EPC events (like linkup)
 138 */
 139struct pci_epc {
 140        struct device                   dev;
 141        struct list_head                pci_epf;
 142        const struct pci_epc_ops        *ops;
 143        struct pci_epc_mem              **windows;
 144        struct pci_epc_mem              *mem;
 145        unsigned int                    num_windows;
 146        u8                              max_functions;
 147        u8                              *max_vfs;
 148        struct config_group             *group;
 149        /* mutex to protect against concurrent access of EP controller */
 150        struct mutex                    lock;
 151        unsigned long                   function_num_map;
 152        struct atomic_notifier_head     notifier;
 153};
 154
 155/**
 156 * struct pci_epc_features - features supported by a EPC device per function
 157 * @linkup_notifier: indicate if the EPC device can notify EPF driver on link up
 158 * @core_init_notifier: indicate cores that can notify about their availability
 159 *                      for initialization
 160 * @msi_capable: indicate if the endpoint function has MSI capability
 161 * @msix_capable: indicate if the endpoint function has MSI-X capability
 162 * @reserved_bar: bitmap to indicate reserved BAR unavailable to function driver
 163 * @bar_fixed_64bit: bitmap to indicate fixed 64bit BARs
 164 * @bar_fixed_size: Array specifying the size supported by each BAR
 165 * @align: alignment size required for BAR buffer allocation
 166 */
 167struct pci_epc_features {
 168        unsigned int    linkup_notifier : 1;
 169        unsigned int    core_init_notifier : 1;
 170        unsigned int    msi_capable : 1;
 171        unsigned int    msix_capable : 1;
 172        u8      reserved_bar;
 173        u8      bar_fixed_64bit;
 174        u64     bar_fixed_size[PCI_STD_NUM_BARS];
 175        size_t  align;
 176};
 177
 178#define to_pci_epc(device) container_of((device), struct pci_epc, dev)
 179
 180#define pci_epc_create(dev, ops)    \
 181                __pci_epc_create((dev), (ops), THIS_MODULE)
 182#define devm_pci_epc_create(dev, ops)    \
 183                __devm_pci_epc_create((dev), (ops), THIS_MODULE)
 184
 185static inline void epc_set_drvdata(struct pci_epc *epc, void *data)
 186{
 187        dev_set_drvdata(&epc->dev, data);
 188}
 189
 190static inline void *epc_get_drvdata(struct pci_epc *epc)
 191{
 192        return dev_get_drvdata(&epc->dev);
 193}
 194
 195static inline int
 196pci_epc_register_notifier(struct pci_epc *epc, struct notifier_block *nb)
 197{
 198        return atomic_notifier_chain_register(&epc->notifier, nb);
 199}
 200
 201struct pci_epc *
 202__devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
 203                      struct module *owner);
 204struct pci_epc *
 205__pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
 206                 struct module *owner);
 207void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc);
 208void pci_epc_destroy(struct pci_epc *epc);
 209int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf,
 210                    enum pci_epc_interface_type type);
 211void pci_epc_linkup(struct pci_epc *epc);
 212void pci_epc_init_notify(struct pci_epc *epc);
 213void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf,
 214                        enum pci_epc_interface_type type);
 215int pci_epc_write_header(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
 216                         struct pci_epf_header *hdr);
 217int pci_epc_set_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
 218                    struct pci_epf_bar *epf_bar);
 219void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
 220                       struct pci_epf_bar *epf_bar);
 221int pci_epc_map_addr(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
 222                     phys_addr_t phys_addr,
 223                     u64 pci_addr, size_t size);
 224void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
 225                        phys_addr_t phys_addr);
 226int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
 227                    u8 interrupts);
 228int pci_epc_get_msi(struct pci_epc *epc, u8 func_no, u8 vfunc_no);
 229int pci_epc_set_msix(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
 230                     u16 interrupts, enum pci_barno, u32 offset);
 231int pci_epc_get_msix(struct pci_epc *epc, u8 func_no, u8 vfunc_no);
 232int pci_epc_map_msi_irq(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
 233                        phys_addr_t phys_addr, u8 interrupt_num,
 234                        u32 entry_size, u32 *msi_data, u32 *msi_addr_offset);
 235int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
 236                      enum pci_epc_irq_type type, u16 interrupt_num);
 237int pci_epc_start(struct pci_epc *epc);
 238void pci_epc_stop(struct pci_epc *epc);
 239const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc,
 240                                                    u8 func_no, u8 vfunc_no);
 241enum pci_barno
 242pci_epc_get_first_free_bar(const struct pci_epc_features *epc_features);
 243enum pci_barno pci_epc_get_next_free_bar(const struct pci_epc_features
 244                                         *epc_features, enum pci_barno bar);
 245struct pci_epc *pci_epc_get(const char *epc_name);
 246void pci_epc_put(struct pci_epc *epc);
 247
 248int pci_epc_mem_init(struct pci_epc *epc, phys_addr_t base,
 249                     size_t size, size_t page_size);
 250int pci_epc_multi_mem_init(struct pci_epc *epc,
 251                           struct pci_epc_mem_window *window,
 252                           unsigned int num_windows);
 253void pci_epc_mem_exit(struct pci_epc *epc);
 254void __iomem *pci_epc_mem_alloc_addr(struct pci_epc *epc,
 255                                     phys_addr_t *phys_addr, size_t size);
 256void pci_epc_mem_free_addr(struct pci_epc *epc, phys_addr_t phys_addr,
 257                           void __iomem *virt_addr, size_t size);
 258#endif /* __LINUX_PCI_EPC_H */
 259