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17#ifndef __SOC_TI_KEYSTONE_NAVIGATOR_DMA_H__
18#define __SOC_TI_KEYSTONE_NAVIGATOR_DMA_H__
19
20#include <linux/dmaengine.h>
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24
25#define MASK(x) (BIT(x) - 1)
26#define KNAV_DMA_DESC_PKT_LEN_MASK MASK(22)
27#define KNAV_DMA_DESC_PKT_LEN_SHIFT 0
28#define KNAV_DMA_DESC_PS_INFO_IN_SOP BIT(22)
29#define KNAV_DMA_DESC_PS_INFO_IN_DESC 0
30#define KNAV_DMA_DESC_TAG_MASK MASK(8)
31#define KNAV_DMA_DESC_SAG_HI_SHIFT 24
32#define KNAV_DMA_DESC_STAG_LO_SHIFT 16
33#define KNAV_DMA_DESC_DTAG_HI_SHIFT 8
34#define KNAV_DMA_DESC_DTAG_LO_SHIFT 0
35#define KNAV_DMA_DESC_HAS_EPIB BIT(31)
36#define KNAV_DMA_DESC_NO_EPIB 0
37#define KNAV_DMA_DESC_PSLEN_SHIFT 24
38#define KNAV_DMA_DESC_PSLEN_MASK MASK(6)
39#define KNAV_DMA_DESC_ERR_FLAG_SHIFT 20
40#define KNAV_DMA_DESC_ERR_FLAG_MASK MASK(4)
41#define KNAV_DMA_DESC_PSFLAG_SHIFT 16
42#define KNAV_DMA_DESC_PSFLAG_MASK MASK(4)
43#define KNAV_DMA_DESC_RETQ_SHIFT 0
44#define KNAV_DMA_DESC_RETQ_MASK MASK(14)
45#define KNAV_DMA_DESC_BUF_LEN_MASK MASK(22)
46#define KNAV_DMA_DESC_EFLAGS_MASK MASK(4)
47#define KNAV_DMA_DESC_EFLAGS_SHIFT 20
48
49#define KNAV_DMA_NUM_EPIB_WORDS 4
50#define KNAV_DMA_NUM_PS_WORDS 16
51#define KNAV_DMA_NUM_SW_DATA_WORDS 4
52#define KNAV_DMA_FDQ_PER_CHAN 4
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54
55enum knav_dma_tx_priority {
56 DMA_PRIO_HIGH = 0,
57 DMA_PRIO_MED_H,
58 DMA_PRIO_MED_L,
59 DMA_PRIO_LOW
60};
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62
63enum knav_dma_rx_err_mode {
64 DMA_DROP = 0,
65 DMA_RETRY
66};
67
68
69enum knav_dma_rx_thresholds {
70 DMA_THRESH_NONE = 0,
71 DMA_THRESH_0 = 1,
72 DMA_THRESH_0_1 = 3,
73 DMA_THRESH_0_1_2 = 7
74};
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77enum knav_dma_desc_type {
78 DMA_DESC_HOST = 0,
79 DMA_DESC_MONOLITHIC = 2
80};
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88struct knav_dma_tx_cfg {
89 bool filt_einfo;
90 bool filt_pswords;
91 enum knav_dma_tx_priority priority;
92};
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109struct knav_dma_rx_cfg {
110 bool einfo_present;
111 bool psinfo_present;
112 enum knav_dma_rx_err_mode err_mode;
113 enum knav_dma_desc_type desc_type;
114 bool psinfo_at_sop;
115 unsigned int sop_offset;
116 unsigned int dst_q;
117 enum knav_dma_rx_thresholds thresh;
118 unsigned int fdq[KNAV_DMA_FDQ_PER_CHAN];
119 unsigned int sz_thresh0;
120 unsigned int sz_thresh1;
121 unsigned int sz_thresh2;
122};
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130struct knav_dma_cfg {
131 enum dma_transfer_direction direction;
132 union {
133 struct knav_dma_tx_cfg tx;
134 struct knav_dma_rx_cfg rx;
135 } u;
136};
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152struct knav_dma_desc {
153 __le32 desc_info;
154 __le32 tag_info;
155 __le32 packet_info;
156 __le32 buff_len;
157 __le32 buff;
158 __le32 next_desc;
159 __le32 orig_len;
160 __le32 orig_buff;
161 __le32 epib[KNAV_DMA_NUM_EPIB_WORDS];
162 __le32 psdata[KNAV_DMA_NUM_PS_WORDS];
163 u32 sw_data[KNAV_DMA_NUM_SW_DATA_WORDS];
164} ____cacheline_aligned;
165
166#if IS_ENABLED(CONFIG_KEYSTONE_NAVIGATOR_DMA)
167void *knav_dma_open_channel(struct device *dev, const char *name,
168 struct knav_dma_cfg *config);
169void knav_dma_close_channel(void *channel);
170int knav_dma_get_flow(void *channel);
171bool knav_dma_device_ready(void);
172#else
173static inline void *knav_dma_open_channel(struct device *dev, const char *name,
174 struct knav_dma_cfg *config)
175{
176 return (void *) NULL;
177}
178static inline void knav_dma_close_channel(void *channel)
179{}
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181static inline int knav_dma_get_flow(void *channel)
182{
183 return -EINVAL;
184}
185
186static inline bool knav_dma_device_ready(void)
187{
188 return false;
189}
190
191#endif
192
193#endif
194
