1
2#ifndef __LINUX_PKT_SCHED_H
3#define __LINUX_PKT_SCHED_H
4
5#include <linux/const.h>
6#include <linux/types.h>
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21#define TC_PRIO_BESTEFFORT 0
22#define TC_PRIO_FILLER 1
23#define TC_PRIO_BULK 2
24#define TC_PRIO_INTERACTIVE_BULK 4
25#define TC_PRIO_INTERACTIVE 6
26#define TC_PRIO_CONTROL 7
27
28#define TC_PRIO_MAX 15
29
30
31
32
33
34struct tc_stats {
35 __u64 bytes;
36 __u32 packets;
37 __u32 drops;
38 __u32 overlimits;
39
40 __u32 bps;
41 __u32 pps;
42 __u32 qlen;
43 __u32 backlog;
44};
45
46struct tc_estimator {
47 signed char interval;
48 unsigned char ewma_log;
49};
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68#define TC_H_MAJ_MASK (0xFFFF0000U)
69#define TC_H_MIN_MASK (0x0000FFFFU)
70#define TC_H_MAJ(h) ((h)&TC_H_MAJ_MASK)
71#define TC_H_MIN(h) ((h)&TC_H_MIN_MASK)
72#define TC_H_MAKE(maj,min) (((maj)&TC_H_MAJ_MASK)|((min)&TC_H_MIN_MASK))
73
74#define TC_H_UNSPEC (0U)
75#define TC_H_ROOT (0xFFFFFFFFU)
76#define TC_H_INGRESS (0xFFFFFFF1U)
77#define TC_H_CLSACT TC_H_INGRESS
78
79#define TC_H_MIN_PRIORITY 0xFFE0U
80#define TC_H_MIN_INGRESS 0xFFF2U
81#define TC_H_MIN_EGRESS 0xFFF3U
82
83
84enum tc_link_layer {
85 TC_LINKLAYER_UNAWARE,
86 TC_LINKLAYER_ETHERNET,
87 TC_LINKLAYER_ATM,
88};
89#define TC_LINKLAYER_MASK 0x0F
90
91struct tc_ratespec {
92 unsigned char cell_log;
93 __u8 linklayer;
94 unsigned short overhead;
95 short cell_align;
96 unsigned short mpu;
97 __u32 rate;
98};
99
100#define TC_RTAB_SIZE 1024
101
102struct tc_sizespec {
103 unsigned char cell_log;
104 unsigned char size_log;
105 short cell_align;
106 int overhead;
107 unsigned int linklayer;
108 unsigned int mpu;
109 unsigned int mtu;
110 unsigned int tsize;
111};
112
113enum {
114 TCA_STAB_UNSPEC,
115 TCA_STAB_BASE,
116 TCA_STAB_DATA,
117 __TCA_STAB_MAX
118};
119
120#define TCA_STAB_MAX (__TCA_STAB_MAX - 1)
121
122
123
124struct tc_fifo_qopt {
125 __u32 limit;
126};
127
128
129
130
131
132
133
134
135
136
137#define SKBPRIO_MAX_PRIORITY 64
138
139struct tc_skbprio_qopt {
140 __u32 limit;
141};
142
143
144
145#define TCQ_PRIO_BANDS 16
146#define TCQ_MIN_PRIO_BANDS 2
147
148struct tc_prio_qopt {
149 int bands;
150 __u8 priomap[TC_PRIO_MAX+1];
151};
152
153
154
155struct tc_multiq_qopt {
156 __u16 bands;
157 __u16 max_bands;
158};
159
160
161
162#define TCQ_PLUG_BUFFER 0
163#define TCQ_PLUG_RELEASE_ONE 1
164#define TCQ_PLUG_RELEASE_INDEFINITE 2
165#define TCQ_PLUG_LIMIT 3
166
167struct tc_plug_qopt {
168
169
170
171
172
173
174
175
176
177 int action;
178 __u32 limit;
179};
180
181
182
183struct tc_tbf_qopt {
184 struct tc_ratespec rate;
185 struct tc_ratespec peakrate;
186 __u32 limit;
187 __u32 buffer;
188 __u32 mtu;
189};
190
191enum {
192 TCA_TBF_UNSPEC,
193 TCA_TBF_PARMS,
194 TCA_TBF_RTAB,
195 TCA_TBF_PTAB,
196 TCA_TBF_RATE64,
197 TCA_TBF_PRATE64,
198 TCA_TBF_BURST,
199 TCA_TBF_PBURST,
200 TCA_TBF_PAD,
201 __TCA_TBF_MAX,
202};
203
204#define TCA_TBF_MAX (__TCA_TBF_MAX - 1)
205
206
207
208
209
210
211
212
213struct tc_sfq_qopt {
214 unsigned quantum;
215 int perturb_period;
216 __u32 limit;
217 unsigned divisor;
218 unsigned flows;
219};
220
221struct tc_sfqred_stats {
222 __u32 prob_drop;
223 __u32 forced_drop;
224 __u32 prob_mark;
225 __u32 forced_mark;
226 __u32 prob_mark_head;
227 __u32 forced_mark_head;
228};
229
230struct tc_sfq_qopt_v1 {
231 struct tc_sfq_qopt v0;
232 unsigned int depth;
233 unsigned int headdrop;
234
235 __u32 limit;
236 __u32 qth_min;
237 __u32 qth_max;
238 unsigned char Wlog;
239 unsigned char Plog;
240 unsigned char Scell_log;
241 unsigned char flags;
242 __u32 max_P;
243
244 struct tc_sfqred_stats stats;
245};
246
247
248struct tc_sfq_xstats {
249 __s32 allot;
250};
251
252
253
254enum {
255 TCA_RED_UNSPEC,
256 TCA_RED_PARMS,
257 TCA_RED_STAB,
258 TCA_RED_MAX_P,
259 TCA_RED_FLAGS,
260 TCA_RED_EARLY_DROP_BLOCK,
261 TCA_RED_MARK_BLOCK,
262 __TCA_RED_MAX,
263};
264
265#define TCA_RED_MAX (__TCA_RED_MAX - 1)
266
267struct tc_red_qopt {
268 __u32 limit;
269 __u32 qth_min;
270 __u32 qth_max;
271 unsigned char Wlog;
272 unsigned char Plog;
273 unsigned char Scell_log;
274
275
276
277
278
279
280
281
282
283
284
285
286
287 unsigned char flags;
288#define TC_RED_ECN 1
289#define TC_RED_HARDDROP 2
290#define TC_RED_ADAPTATIVE 4
291#define TC_RED_NODROP 8
292};
293
294#define TC_RED_HISTORIC_FLAGS (TC_RED_ECN | TC_RED_HARDDROP | TC_RED_ADAPTATIVE)
295
296struct tc_red_xstats {
297 __u32 early;
298 __u32 pdrop;
299 __u32 other;
300 __u32 marked;
301};
302
303
304
305#define MAX_DPs 16
306
307enum {
308 TCA_GRED_UNSPEC,
309 TCA_GRED_PARMS,
310 TCA_GRED_STAB,
311 TCA_GRED_DPS,
312 TCA_GRED_MAX_P,
313 TCA_GRED_LIMIT,
314 TCA_GRED_VQ_LIST,
315 __TCA_GRED_MAX,
316};
317
318#define TCA_GRED_MAX (__TCA_GRED_MAX - 1)
319
320enum {
321 TCA_GRED_VQ_ENTRY_UNSPEC,
322 TCA_GRED_VQ_ENTRY,
323 __TCA_GRED_VQ_ENTRY_MAX,
324};
325#define TCA_GRED_VQ_ENTRY_MAX (__TCA_GRED_VQ_ENTRY_MAX - 1)
326
327enum {
328 TCA_GRED_VQ_UNSPEC,
329 TCA_GRED_VQ_PAD,
330 TCA_GRED_VQ_DP,
331 TCA_GRED_VQ_STAT_BYTES,
332 TCA_GRED_VQ_STAT_PACKETS,
333 TCA_GRED_VQ_STAT_BACKLOG,
334 TCA_GRED_VQ_STAT_PROB_DROP,
335 TCA_GRED_VQ_STAT_PROB_MARK,
336 TCA_GRED_VQ_STAT_FORCED_DROP,
337 TCA_GRED_VQ_STAT_FORCED_MARK,
338 TCA_GRED_VQ_STAT_PDROP,
339 TCA_GRED_VQ_STAT_OTHER,
340 TCA_GRED_VQ_FLAGS,
341 __TCA_GRED_VQ_MAX
342};
343
344#define TCA_GRED_VQ_MAX (__TCA_GRED_VQ_MAX - 1)
345
346struct tc_gred_qopt {
347 __u32 limit;
348 __u32 qth_min;
349 __u32 qth_max;
350 __u32 DP;
351 __u32 backlog;
352 __u32 qave;
353 __u32 forced;
354 __u32 early;
355 __u32 other;
356 __u32 pdrop;
357 __u8 Wlog;
358 __u8 Plog;
359 __u8 Scell_log;
360 __u8 prio;
361 __u32 packets;
362 __u32 bytesin;
363};
364
365
366struct tc_gred_sopt {
367 __u32 DPs;
368 __u32 def_DP;
369 __u8 grio;
370 __u8 flags;
371 __u16 pad1;
372};
373
374
375
376enum {
377 TCA_CHOKE_UNSPEC,
378 TCA_CHOKE_PARMS,
379 TCA_CHOKE_STAB,
380 TCA_CHOKE_MAX_P,
381 __TCA_CHOKE_MAX,
382};
383
384#define TCA_CHOKE_MAX (__TCA_CHOKE_MAX - 1)
385
386struct tc_choke_qopt {
387 __u32 limit;
388 __u32 qth_min;
389 __u32 qth_max;
390 unsigned char Wlog;
391 unsigned char Plog;
392 unsigned char Scell_log;
393 unsigned char flags;
394};
395
396struct tc_choke_xstats {
397 __u32 early;
398 __u32 pdrop;
399 __u32 other;
400 __u32 marked;
401 __u32 matched;
402};
403
404
405#define TC_HTB_NUMPRIO 8
406#define TC_HTB_MAXDEPTH 8
407#define TC_HTB_PROTOVER 3
408
409struct tc_htb_opt {
410 struct tc_ratespec rate;
411 struct tc_ratespec ceil;
412 __u32 buffer;
413 __u32 cbuffer;
414 __u32 quantum;
415 __u32 level;
416 __u32 prio;
417};
418struct tc_htb_glob {
419 __u32 version;
420 __u32 rate2quantum;
421 __u32 defcls;
422 __u32 debug;
423
424
425 __u32 direct_pkts;
426};
427enum {
428 TCA_HTB_UNSPEC,
429 TCA_HTB_PARMS,
430 TCA_HTB_INIT,
431 TCA_HTB_CTAB,
432 TCA_HTB_RTAB,
433 TCA_HTB_DIRECT_QLEN,
434 TCA_HTB_RATE64,
435 TCA_HTB_CEIL64,
436 TCA_HTB_PAD,
437 TCA_HTB_OFFLOAD,
438 __TCA_HTB_MAX,
439};
440
441#define TCA_HTB_MAX (__TCA_HTB_MAX - 1)
442
443struct tc_htb_xstats {
444 __u32 lends;
445 __u32 borrows;
446 __u32 giants;
447 __s32 tokens;
448 __s32 ctokens;
449};
450
451
452
453struct tc_hfsc_qopt {
454 __u16 defcls;
455};
456
457struct tc_service_curve {
458 __u32 m1;
459 __u32 d;
460 __u32 m2;
461};
462
463struct tc_hfsc_stats {
464 __u64 work;
465 __u64 rtwork;
466 __u32 period;
467 __u32 level;
468};
469
470enum {
471 TCA_HFSC_UNSPEC,
472 TCA_HFSC_RSC,
473 TCA_HFSC_FSC,
474 TCA_HFSC_USC,
475 __TCA_HFSC_MAX,
476};
477
478#define TCA_HFSC_MAX (__TCA_HFSC_MAX - 1)
479
480
481
482
483#define TC_CBQ_MAXPRIO 8
484#define TC_CBQ_MAXLEVEL 8
485#define TC_CBQ_DEF_EWMA 5
486
487struct tc_cbq_lssopt {
488 unsigned char change;
489 unsigned char flags;
490#define TCF_CBQ_LSS_BOUNDED 1
491#define TCF_CBQ_LSS_ISOLATED 2
492 unsigned char ewma_log;
493 unsigned char level;
494#define TCF_CBQ_LSS_FLAGS 1
495#define TCF_CBQ_LSS_EWMA 2
496#define TCF_CBQ_LSS_MAXIDLE 4
497#define TCF_CBQ_LSS_MINIDLE 8
498#define TCF_CBQ_LSS_OFFTIME 0x10
499#define TCF_CBQ_LSS_AVPKT 0x20
500 __u32 maxidle;
501 __u32 minidle;
502 __u32 offtime;
503 __u32 avpkt;
504};
505
506struct tc_cbq_wrropt {
507 unsigned char flags;
508 unsigned char priority;
509 unsigned char cpriority;
510 unsigned char __reserved;
511 __u32 allot;
512 __u32 weight;
513};
514
515struct tc_cbq_ovl {
516 unsigned char strategy;
517#define TC_CBQ_OVL_CLASSIC 0
518#define TC_CBQ_OVL_DELAY 1
519#define TC_CBQ_OVL_LOWPRIO 2
520#define TC_CBQ_OVL_DROP 3
521#define TC_CBQ_OVL_RCLASSIC 4
522 unsigned char priority2;
523 __u16 pad;
524 __u32 penalty;
525};
526
527struct tc_cbq_police {
528 unsigned char police;
529 unsigned char __res1;
530 unsigned short __res2;
531};
532
533struct tc_cbq_fopt {
534 __u32 split;
535 __u32 defmap;
536 __u32 defchange;
537};
538
539struct tc_cbq_xstats {
540 __u32 borrows;
541 __u32 overactions;
542 __s32 avgidle;
543 __s32 undertime;
544};
545
546enum {
547 TCA_CBQ_UNSPEC,
548 TCA_CBQ_LSSOPT,
549 TCA_CBQ_WRROPT,
550 TCA_CBQ_FOPT,
551 TCA_CBQ_OVL_STRATEGY,
552 TCA_CBQ_RATE,
553 TCA_CBQ_RTAB,
554 TCA_CBQ_POLICE,
555 __TCA_CBQ_MAX,
556};
557
558#define TCA_CBQ_MAX (__TCA_CBQ_MAX - 1)
559
560
561
562enum {
563 TCA_DSMARK_UNSPEC,
564 TCA_DSMARK_INDICES,
565 TCA_DSMARK_DEFAULT_INDEX,
566 TCA_DSMARK_SET_TC_INDEX,
567 TCA_DSMARK_MASK,
568 TCA_DSMARK_VALUE,
569 __TCA_DSMARK_MAX,
570};
571
572#define TCA_DSMARK_MAX (__TCA_DSMARK_MAX - 1)
573
574
575
576enum {
577 TCA_ATM_UNSPEC,
578 TCA_ATM_FD,
579 TCA_ATM_PTR,
580 TCA_ATM_HDR,
581 TCA_ATM_EXCESS,
582 TCA_ATM_ADDR,
583 TCA_ATM_STATE,
584 __TCA_ATM_MAX,
585};
586
587#define TCA_ATM_MAX (__TCA_ATM_MAX - 1)
588
589
590
591enum {
592 TCA_NETEM_UNSPEC,
593 TCA_NETEM_CORR,
594 TCA_NETEM_DELAY_DIST,
595 TCA_NETEM_REORDER,
596 TCA_NETEM_CORRUPT,
597 TCA_NETEM_LOSS,
598 TCA_NETEM_RATE,
599 TCA_NETEM_ECN,
600 TCA_NETEM_RATE64,
601 TCA_NETEM_PAD,
602 TCA_NETEM_LATENCY64,
603 TCA_NETEM_JITTER64,
604 TCA_NETEM_SLOT,
605 TCA_NETEM_SLOT_DIST,
606 __TCA_NETEM_MAX,
607};
608
609#define TCA_NETEM_MAX (__TCA_NETEM_MAX - 1)
610
611struct tc_netem_qopt {
612 __u32 latency;
613 __u32 limit;
614 __u32 loss;
615 __u32 gap;
616 __u32 duplicate;
617 __u32 jitter;
618};
619
620struct tc_netem_corr {
621 __u32 delay_corr;
622 __u32 loss_corr;
623 __u32 dup_corr;
624};
625
626struct tc_netem_reorder {
627 __u32 probability;
628 __u32 correlation;
629};
630
631struct tc_netem_corrupt {
632 __u32 probability;
633 __u32 correlation;
634};
635
636struct tc_netem_rate {
637 __u32 rate;
638 __s32 packet_overhead;
639 __u32 cell_size;
640 __s32 cell_overhead;
641};
642
643struct tc_netem_slot {
644 __s64 min_delay;
645 __s64 max_delay;
646 __s32 max_packets;
647 __s32 max_bytes;
648 __s64 dist_delay;
649 __s64 dist_jitter;
650};
651
652enum {
653 NETEM_LOSS_UNSPEC,
654 NETEM_LOSS_GI,
655 NETEM_LOSS_GE,
656 __NETEM_LOSS_MAX
657};
658#define NETEM_LOSS_MAX (__NETEM_LOSS_MAX - 1)
659
660
661struct tc_netem_gimodel {
662 __u32 p13;
663 __u32 p31;
664 __u32 p32;
665 __u32 p14;
666 __u32 p23;
667};
668
669
670struct tc_netem_gemodel {
671 __u32 p;
672 __u32 r;
673 __u32 h;
674 __u32 k1;
675};
676
677#define NETEM_DIST_SCALE 8192
678#define NETEM_DIST_MAX 16384
679
680
681
682enum {
683 TCA_DRR_UNSPEC,
684 TCA_DRR_QUANTUM,
685 __TCA_DRR_MAX
686};
687
688#define TCA_DRR_MAX (__TCA_DRR_MAX - 1)
689
690struct tc_drr_stats {
691 __u32 deficit;
692};
693
694
695#define TC_QOPT_BITMASK 15
696#define TC_QOPT_MAX_QUEUE 16
697
698enum {
699 TC_MQPRIO_HW_OFFLOAD_NONE,
700 TC_MQPRIO_HW_OFFLOAD_TCS,
701 __TC_MQPRIO_HW_OFFLOAD_MAX
702};
703
704#define TC_MQPRIO_HW_OFFLOAD_MAX (__TC_MQPRIO_HW_OFFLOAD_MAX - 1)
705
706enum {
707 TC_MQPRIO_MODE_DCB,
708 TC_MQPRIO_MODE_CHANNEL,
709 __TC_MQPRIO_MODE_MAX
710};
711
712#define __TC_MQPRIO_MODE_MAX (__TC_MQPRIO_MODE_MAX - 1)
713
714enum {
715 TC_MQPRIO_SHAPER_DCB,
716 TC_MQPRIO_SHAPER_BW_RATE,
717 __TC_MQPRIO_SHAPER_MAX
718};
719
720#define __TC_MQPRIO_SHAPER_MAX (__TC_MQPRIO_SHAPER_MAX - 1)
721
722struct tc_mqprio_qopt {
723 __u8 num_tc;
724 __u8 prio_tc_map[TC_QOPT_BITMASK + 1];
725 __u8 hw;
726 __u16 count[TC_QOPT_MAX_QUEUE];
727 __u16 offset[TC_QOPT_MAX_QUEUE];
728};
729
730#define TC_MQPRIO_F_MODE 0x1
731#define TC_MQPRIO_F_SHAPER 0x2
732#define TC_MQPRIO_F_MIN_RATE 0x4
733#define TC_MQPRIO_F_MAX_RATE 0x8
734
735enum {
736 TCA_MQPRIO_UNSPEC,
737 TCA_MQPRIO_MODE,
738 TCA_MQPRIO_SHAPER,
739 TCA_MQPRIO_MIN_RATE64,
740 TCA_MQPRIO_MAX_RATE64,
741 __TCA_MQPRIO_MAX,
742};
743
744#define TCA_MQPRIO_MAX (__TCA_MQPRIO_MAX - 1)
745
746
747
748enum {
749 TCA_SFB_UNSPEC,
750 TCA_SFB_PARMS,
751 __TCA_SFB_MAX,
752};
753
754#define TCA_SFB_MAX (__TCA_SFB_MAX - 1)
755
756
757
758
759struct tc_sfb_qopt {
760 __u32 rehash_interval;
761 __u32 warmup_time;
762 __u32 max;
763 __u32 bin_size;
764 __u32 increment;
765 __u32 decrement;
766 __u32 limit;
767 __u32 penalty_rate;
768 __u32 penalty_burst;
769};
770
771struct tc_sfb_xstats {
772 __u32 earlydrop;
773 __u32 penaltydrop;
774 __u32 bucketdrop;
775 __u32 queuedrop;
776 __u32 childdrop;
777 __u32 marked;
778 __u32 maxqlen;
779 __u32 maxprob;
780 __u32 avgprob;
781};
782
783#define SFB_MAX_PROB 0xFFFF
784
785
786enum {
787 TCA_QFQ_UNSPEC,
788 TCA_QFQ_WEIGHT,
789 TCA_QFQ_LMAX,
790 __TCA_QFQ_MAX
791};
792
793#define TCA_QFQ_MAX (__TCA_QFQ_MAX - 1)
794
795struct tc_qfq_stats {
796 __u32 weight;
797 __u32 lmax;
798};
799
800
801
802enum {
803 TCA_CODEL_UNSPEC,
804 TCA_CODEL_TARGET,
805 TCA_CODEL_LIMIT,
806 TCA_CODEL_INTERVAL,
807 TCA_CODEL_ECN,
808 TCA_CODEL_CE_THRESHOLD,
809 __TCA_CODEL_MAX
810};
811
812#define TCA_CODEL_MAX (__TCA_CODEL_MAX - 1)
813
814struct tc_codel_xstats {
815 __u32 maxpacket;
816 __u32 count;
817
818
819 __u32 lastcount;
820 __u32 ldelay;
821 __s32 drop_next;
822 __u32 drop_overlimit;
823 __u32 ecn_mark;
824 __u32 dropping;
825 __u32 ce_mark;
826};
827
828
829
830#define FQ_CODEL_QUANTUM_MAX (1 << 20)
831
832enum {
833 TCA_FQ_CODEL_UNSPEC,
834 TCA_FQ_CODEL_TARGET,
835 TCA_FQ_CODEL_LIMIT,
836 TCA_FQ_CODEL_INTERVAL,
837 TCA_FQ_CODEL_ECN,
838 TCA_FQ_CODEL_FLOWS,
839 TCA_FQ_CODEL_QUANTUM,
840 TCA_FQ_CODEL_CE_THRESHOLD,
841 TCA_FQ_CODEL_DROP_BATCH_SIZE,
842 TCA_FQ_CODEL_MEMORY_LIMIT,
843 __TCA_FQ_CODEL_MAX
844};
845
846#define TCA_FQ_CODEL_MAX (__TCA_FQ_CODEL_MAX - 1)
847
848enum {
849 TCA_FQ_CODEL_XSTATS_QDISC,
850 TCA_FQ_CODEL_XSTATS_CLASS,
851};
852
853struct tc_fq_codel_qd_stats {
854 __u32 maxpacket;
855 __u32 drop_overlimit;
856
857
858 __u32 ecn_mark;
859
860
861 __u32 new_flow_count;
862
863
864 __u32 new_flows_len;
865 __u32 old_flows_len;
866 __u32 ce_mark;
867 __u32 memory_usage;
868 __u32 drop_overmemory;
869};
870
871struct tc_fq_codel_cl_stats {
872 __s32 deficit;
873 __u32 ldelay;
874
875
876 __u32 count;
877 __u32 lastcount;
878 __u32 dropping;
879 __s32 drop_next;
880};
881
882struct tc_fq_codel_xstats {
883 __u32 type;
884 union {
885 struct tc_fq_codel_qd_stats qdisc_stats;
886 struct tc_fq_codel_cl_stats class_stats;
887 };
888};
889
890
891
892enum {
893 TCA_FQ_UNSPEC,
894
895 TCA_FQ_PLIMIT,
896
897 TCA_FQ_FLOW_PLIMIT,
898
899 TCA_FQ_QUANTUM,
900
901 TCA_FQ_INITIAL_QUANTUM,
902
903 TCA_FQ_RATE_ENABLE,
904
905 TCA_FQ_FLOW_DEFAULT_RATE,
906
907 TCA_FQ_FLOW_MAX_RATE,
908
909 TCA_FQ_BUCKETS_LOG,
910
911 TCA_FQ_FLOW_REFILL_DELAY,
912
913 TCA_FQ_ORPHAN_MASK,
914
915 TCA_FQ_LOW_RATE_THRESHOLD,
916
917 TCA_FQ_CE_THRESHOLD,
918
919 TCA_FQ_TIMER_SLACK,
920
921 TCA_FQ_HORIZON,
922
923 TCA_FQ_HORIZON_DROP,
924
925 __TCA_FQ_MAX
926};
927
928#define TCA_FQ_MAX (__TCA_FQ_MAX - 1)
929
930struct tc_fq_qd_stats {
931 __u64 gc_flows;
932 __u64 highprio_packets;
933 __u64 tcp_retrans;
934 __u64 throttled;
935 __u64 flows_plimit;
936 __u64 pkts_too_long;
937 __u64 allocation_errors;
938 __s64 time_next_delayed_flow;
939 __u32 flows;
940 __u32 inactive_flows;
941 __u32 throttled_flows;
942 __u32 unthrottle_latency_ns;
943 __u64 ce_mark;
944 __u64 horizon_drops;
945 __u64 horizon_caps;
946};
947
948
949
950enum {
951 TCA_HHF_UNSPEC,
952 TCA_HHF_BACKLOG_LIMIT,
953 TCA_HHF_QUANTUM,
954 TCA_HHF_HH_FLOWS_LIMIT,
955 TCA_HHF_RESET_TIMEOUT,
956 TCA_HHF_ADMIT_BYTES,
957 TCA_HHF_EVICT_TIMEOUT,
958 TCA_HHF_NON_HH_WEIGHT,
959 __TCA_HHF_MAX
960};
961
962#define TCA_HHF_MAX (__TCA_HHF_MAX - 1)
963
964struct tc_hhf_xstats {
965 __u32 drop_overlimit;
966
967
968 __u32 hh_overlimit;
969 __u32 hh_tot_count;
970 __u32 hh_cur_count;
971};
972
973
974enum {
975 TCA_PIE_UNSPEC,
976 TCA_PIE_TARGET,
977 TCA_PIE_LIMIT,
978 TCA_PIE_TUPDATE,
979 TCA_PIE_ALPHA,
980 TCA_PIE_BETA,
981 TCA_PIE_ECN,
982 TCA_PIE_BYTEMODE,
983 TCA_PIE_DQ_RATE_ESTIMATOR,
984 __TCA_PIE_MAX
985};
986#define TCA_PIE_MAX (__TCA_PIE_MAX - 1)
987
988struct tc_pie_xstats {
989 __u64 prob;
990 __u32 delay;
991 __u32 avg_dq_rate;
992
993
994 __u32 dq_rate_estimating;
995 __u32 packets_in;
996 __u32 dropped;
997 __u32 overlimit;
998
999
1000 __u32 maxq;
1001 __u32 ecn_mark;
1002};
1003
1004
1005enum {
1006 TCA_FQ_PIE_UNSPEC,
1007 TCA_FQ_PIE_LIMIT,
1008 TCA_FQ_PIE_FLOWS,
1009 TCA_FQ_PIE_TARGET,
1010 TCA_FQ_PIE_TUPDATE,
1011 TCA_FQ_PIE_ALPHA,
1012 TCA_FQ_PIE_BETA,
1013 TCA_FQ_PIE_QUANTUM,
1014 TCA_FQ_PIE_MEMORY_LIMIT,
1015 TCA_FQ_PIE_ECN_PROB,
1016 TCA_FQ_PIE_ECN,
1017 TCA_FQ_PIE_BYTEMODE,
1018 TCA_FQ_PIE_DQ_RATE_ESTIMATOR,
1019 __TCA_FQ_PIE_MAX
1020};
1021#define TCA_FQ_PIE_MAX (__TCA_FQ_PIE_MAX - 1)
1022
1023struct tc_fq_pie_xstats {
1024 __u32 packets_in;
1025 __u32 dropped;
1026 __u32 overlimit;
1027 __u32 overmemory;
1028 __u32 ecn_mark;
1029 __u32 new_flow_count;
1030 __u32 new_flows_len;
1031 __u32 old_flows_len;
1032 __u32 memory_usage;
1033};
1034
1035
1036struct tc_cbs_qopt {
1037 __u8 offload;
1038 __u8 _pad[3];
1039 __s32 hicredit;
1040 __s32 locredit;
1041 __s32 idleslope;
1042 __s32 sendslope;
1043};
1044
1045enum {
1046 TCA_CBS_UNSPEC,
1047 TCA_CBS_PARMS,
1048 __TCA_CBS_MAX,
1049};
1050
1051#define TCA_CBS_MAX (__TCA_CBS_MAX - 1)
1052
1053
1054
1055struct tc_etf_qopt {
1056 __s32 delta;
1057 __s32 clockid;
1058 __u32 flags;
1059#define TC_ETF_DEADLINE_MODE_ON _BITUL(0)
1060#define TC_ETF_OFFLOAD_ON _BITUL(1)
1061#define TC_ETF_SKIP_SOCK_CHECK _BITUL(2)
1062};
1063
1064enum {
1065 TCA_ETF_UNSPEC,
1066 TCA_ETF_PARMS,
1067 __TCA_ETF_MAX,
1068};
1069
1070#define TCA_ETF_MAX (__TCA_ETF_MAX - 1)
1071
1072
1073
1074enum {
1075 TCA_CAKE_UNSPEC,
1076 TCA_CAKE_PAD,
1077 TCA_CAKE_BASE_RATE64,
1078 TCA_CAKE_DIFFSERV_MODE,
1079 TCA_CAKE_ATM,
1080 TCA_CAKE_FLOW_MODE,
1081 TCA_CAKE_OVERHEAD,
1082 TCA_CAKE_RTT,
1083 TCA_CAKE_TARGET,
1084 TCA_CAKE_AUTORATE,
1085 TCA_CAKE_MEMORY,
1086 TCA_CAKE_NAT,
1087 TCA_CAKE_RAW,
1088 TCA_CAKE_WASH,
1089 TCA_CAKE_MPU,
1090 TCA_CAKE_INGRESS,
1091 TCA_CAKE_ACK_FILTER,
1092 TCA_CAKE_SPLIT_GSO,
1093 TCA_CAKE_FWMARK,
1094 __TCA_CAKE_MAX
1095};
1096#define TCA_CAKE_MAX (__TCA_CAKE_MAX - 1)
1097
1098enum {
1099 __TCA_CAKE_STATS_INVALID,
1100 TCA_CAKE_STATS_PAD,
1101 TCA_CAKE_STATS_CAPACITY_ESTIMATE64,
1102 TCA_CAKE_STATS_MEMORY_LIMIT,
1103 TCA_CAKE_STATS_MEMORY_USED,
1104 TCA_CAKE_STATS_AVG_NETOFF,
1105 TCA_CAKE_STATS_MIN_NETLEN,
1106 TCA_CAKE_STATS_MAX_NETLEN,
1107 TCA_CAKE_STATS_MIN_ADJLEN,
1108 TCA_CAKE_STATS_MAX_ADJLEN,
1109 TCA_CAKE_STATS_TIN_STATS,
1110 TCA_CAKE_STATS_DEFICIT,
1111 TCA_CAKE_STATS_COBALT_COUNT,
1112 TCA_CAKE_STATS_DROPPING,
1113 TCA_CAKE_STATS_DROP_NEXT_US,
1114 TCA_CAKE_STATS_P_DROP,
1115 TCA_CAKE_STATS_BLUE_TIMER_US,
1116 __TCA_CAKE_STATS_MAX
1117};
1118#define TCA_CAKE_STATS_MAX (__TCA_CAKE_STATS_MAX - 1)
1119
1120enum {
1121 __TCA_CAKE_TIN_STATS_INVALID,
1122 TCA_CAKE_TIN_STATS_PAD,
1123 TCA_CAKE_TIN_STATS_SENT_PACKETS,
1124 TCA_CAKE_TIN_STATS_SENT_BYTES64,
1125 TCA_CAKE_TIN_STATS_DROPPED_PACKETS,
1126 TCA_CAKE_TIN_STATS_DROPPED_BYTES64,
1127 TCA_CAKE_TIN_STATS_ACKS_DROPPED_PACKETS,
1128 TCA_CAKE_TIN_STATS_ACKS_DROPPED_BYTES64,
1129 TCA_CAKE_TIN_STATS_ECN_MARKED_PACKETS,
1130 TCA_CAKE_TIN_STATS_ECN_MARKED_BYTES64,
1131 TCA_CAKE_TIN_STATS_BACKLOG_PACKETS,
1132 TCA_CAKE_TIN_STATS_BACKLOG_BYTES,
1133 TCA_CAKE_TIN_STATS_THRESHOLD_RATE64,
1134 TCA_CAKE_TIN_STATS_TARGET_US,
1135 TCA_CAKE_TIN_STATS_INTERVAL_US,
1136 TCA_CAKE_TIN_STATS_WAY_INDIRECT_HITS,
1137 TCA_CAKE_TIN_STATS_WAY_MISSES,
1138 TCA_CAKE_TIN_STATS_WAY_COLLISIONS,
1139 TCA_CAKE_TIN_STATS_PEAK_DELAY_US,
1140 TCA_CAKE_TIN_STATS_AVG_DELAY_US,
1141 TCA_CAKE_TIN_STATS_BASE_DELAY_US,
1142 TCA_CAKE_TIN_STATS_SPARSE_FLOWS,
1143 TCA_CAKE_TIN_STATS_BULK_FLOWS,
1144 TCA_CAKE_TIN_STATS_UNRESPONSIVE_FLOWS,
1145 TCA_CAKE_TIN_STATS_MAX_SKBLEN,
1146 TCA_CAKE_TIN_STATS_FLOW_QUANTUM,
1147 __TCA_CAKE_TIN_STATS_MAX
1148};
1149#define TCA_CAKE_TIN_STATS_MAX (__TCA_CAKE_TIN_STATS_MAX - 1)
1150#define TC_CAKE_MAX_TINS (8)
1151
1152enum {
1153 CAKE_FLOW_NONE = 0,
1154 CAKE_FLOW_SRC_IP,
1155 CAKE_FLOW_DST_IP,
1156 CAKE_FLOW_HOSTS,
1157 CAKE_FLOW_FLOWS,
1158 CAKE_FLOW_DUAL_SRC,
1159 CAKE_FLOW_DUAL_DST,
1160 CAKE_FLOW_TRIPLE,
1161 CAKE_FLOW_MAX,
1162};
1163
1164enum {
1165 CAKE_DIFFSERV_DIFFSERV3 = 0,
1166 CAKE_DIFFSERV_DIFFSERV4,
1167 CAKE_DIFFSERV_DIFFSERV8,
1168 CAKE_DIFFSERV_BESTEFFORT,
1169 CAKE_DIFFSERV_PRECEDENCE,
1170 CAKE_DIFFSERV_MAX
1171};
1172
1173enum {
1174 CAKE_ACK_NONE = 0,
1175 CAKE_ACK_FILTER,
1176 CAKE_ACK_AGGRESSIVE,
1177 CAKE_ACK_MAX
1178};
1179
1180enum {
1181 CAKE_ATM_NONE = 0,
1182 CAKE_ATM_ATM,
1183 CAKE_ATM_PTM,
1184 CAKE_ATM_MAX
1185};
1186
1187
1188
1189enum {
1190 TC_TAPRIO_CMD_SET_GATES = 0x00,
1191 TC_TAPRIO_CMD_SET_AND_HOLD = 0x01,
1192 TC_TAPRIO_CMD_SET_AND_RELEASE = 0x02,
1193};
1194
1195enum {
1196 TCA_TAPRIO_SCHED_ENTRY_UNSPEC,
1197 TCA_TAPRIO_SCHED_ENTRY_INDEX,
1198 TCA_TAPRIO_SCHED_ENTRY_CMD,
1199 TCA_TAPRIO_SCHED_ENTRY_GATE_MASK,
1200 TCA_TAPRIO_SCHED_ENTRY_INTERVAL,
1201 __TCA_TAPRIO_SCHED_ENTRY_MAX,
1202};
1203#define TCA_TAPRIO_SCHED_ENTRY_MAX (__TCA_TAPRIO_SCHED_ENTRY_MAX - 1)
1204
1205
1206
1207
1208
1209
1210
1211
1212enum {
1213 TCA_TAPRIO_SCHED_UNSPEC,
1214 TCA_TAPRIO_SCHED_ENTRY,
1215 __TCA_TAPRIO_SCHED_MAX,
1216};
1217
1218#define TCA_TAPRIO_SCHED_MAX (__TCA_TAPRIO_SCHED_MAX - 1)
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230#define TCA_TAPRIO_ATTR_FLAG_TXTIME_ASSIST _BITUL(0)
1231#define TCA_TAPRIO_ATTR_FLAG_FULL_OFFLOAD _BITUL(1)
1232
1233enum {
1234 TCA_TAPRIO_ATTR_UNSPEC,
1235 TCA_TAPRIO_ATTR_PRIOMAP,
1236 TCA_TAPRIO_ATTR_SCHED_ENTRY_LIST,
1237 TCA_TAPRIO_ATTR_SCHED_BASE_TIME,
1238 TCA_TAPRIO_ATTR_SCHED_SINGLE_ENTRY,
1239 TCA_TAPRIO_ATTR_SCHED_CLOCKID,
1240 TCA_TAPRIO_PAD,
1241 TCA_TAPRIO_ATTR_ADMIN_SCHED,
1242 TCA_TAPRIO_ATTR_SCHED_CYCLE_TIME,
1243 TCA_TAPRIO_ATTR_SCHED_CYCLE_TIME_EXTENSION,
1244 TCA_TAPRIO_ATTR_FLAGS,
1245 TCA_TAPRIO_ATTR_TXTIME_DELAY,
1246 __TCA_TAPRIO_ATTR_MAX,
1247};
1248
1249#define TCA_TAPRIO_ATTR_MAX (__TCA_TAPRIO_ATTR_MAX - 1)
1250
1251
1252
1253#define TCQ_ETS_MAX_BANDS 16
1254
1255enum {
1256 TCA_ETS_UNSPEC,
1257 TCA_ETS_NBANDS,
1258 TCA_ETS_NSTRICT,
1259 TCA_ETS_QUANTA,
1260 TCA_ETS_QUANTA_BAND,
1261 TCA_ETS_PRIOMAP,
1262 TCA_ETS_PRIOMAP_BAND,
1263 __TCA_ETS_MAX,
1264};
1265
1266#define TCA_ETS_MAX (__TCA_ETS_MAX - 1)
1267
1268#endif
1269