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8#include <linux/delay.h>
9#include <linux/init.h>
10#include <linux/interrupt.h>
11#include <linux/slab.h>
12#include <linux/ioport.h>
13#include <linux/io.h>
14#include <sound/core.h>
15#include <sound/tlv.h>
16#include <sound/ad1816a.h>
17
18#include <asm/dma.h>
19
20static inline int snd_ad1816a_busy_wait(struct snd_ad1816a *chip)
21{
22 int timeout;
23
24 for (timeout = 1000; timeout-- > 0; udelay(10))
25 if (inb(AD1816A_REG(AD1816A_CHIP_STATUS)) & AD1816A_READY)
26 return 0;
27
28 snd_printk(KERN_WARNING "chip busy.\n");
29 return -EBUSY;
30}
31
32static inline unsigned char snd_ad1816a_in(struct snd_ad1816a *chip, unsigned char reg)
33{
34 snd_ad1816a_busy_wait(chip);
35 return inb(AD1816A_REG(reg));
36}
37
38static inline void snd_ad1816a_out(struct snd_ad1816a *chip, unsigned char reg,
39 unsigned char value)
40{
41 snd_ad1816a_busy_wait(chip);
42 outb(value, AD1816A_REG(reg));
43}
44
45static inline void snd_ad1816a_out_mask(struct snd_ad1816a *chip, unsigned char reg,
46 unsigned char mask, unsigned char value)
47{
48 snd_ad1816a_out(chip, reg,
49 (value & mask) | (snd_ad1816a_in(chip, reg) & ~mask));
50}
51
52static unsigned short snd_ad1816a_read(struct snd_ad1816a *chip, unsigned char reg)
53{
54 snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
55 return snd_ad1816a_in(chip, AD1816A_INDIR_DATA_LOW) |
56 (snd_ad1816a_in(chip, AD1816A_INDIR_DATA_HIGH) << 8);
57}
58
59static void snd_ad1816a_write(struct snd_ad1816a *chip, unsigned char reg,
60 unsigned short value)
61{
62 snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
63 snd_ad1816a_out(chip, AD1816A_INDIR_DATA_LOW, value & 0xff);
64 snd_ad1816a_out(chip, AD1816A_INDIR_DATA_HIGH, (value >> 8) & 0xff);
65}
66
67static void snd_ad1816a_write_mask(struct snd_ad1816a *chip, unsigned char reg,
68 unsigned short mask, unsigned short value)
69{
70 snd_ad1816a_write(chip, reg,
71 (value & mask) | (snd_ad1816a_read(chip, reg) & ~mask));
72}
73
74
75static unsigned char snd_ad1816a_get_format(struct snd_ad1816a *chip,
76 snd_pcm_format_t format,
77 int channels)
78{
79 unsigned char retval = AD1816A_FMT_LINEAR_8;
80
81 switch (format) {
82 case SNDRV_PCM_FORMAT_MU_LAW:
83 retval = AD1816A_FMT_ULAW_8;
84 break;
85 case SNDRV_PCM_FORMAT_A_LAW:
86 retval = AD1816A_FMT_ALAW_8;
87 break;
88 case SNDRV_PCM_FORMAT_S16_LE:
89 retval = AD1816A_FMT_LINEAR_16_LIT;
90 break;
91 case SNDRV_PCM_FORMAT_S16_BE:
92 retval = AD1816A_FMT_LINEAR_16_BIG;
93 }
94 return (channels > 1) ? (retval | AD1816A_FMT_STEREO) : retval;
95}
96
97static int snd_ad1816a_open(struct snd_ad1816a *chip, unsigned int mode)
98{
99 unsigned long flags;
100
101 spin_lock_irqsave(&chip->lock, flags);
102
103 if (chip->mode & mode) {
104 spin_unlock_irqrestore(&chip->lock, flags);
105 return -EAGAIN;
106 }
107
108 switch ((mode &= AD1816A_MODE_OPEN)) {
109 case AD1816A_MODE_PLAYBACK:
110 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
111 AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
112 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
113 AD1816A_PLAYBACK_IRQ_ENABLE, 0xffff);
114 break;
115 case AD1816A_MODE_CAPTURE:
116 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
117 AD1816A_CAPTURE_IRQ_PENDING, 0x00);
118 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
119 AD1816A_CAPTURE_IRQ_ENABLE, 0xffff);
120 break;
121 case AD1816A_MODE_TIMER:
122 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
123 AD1816A_TIMER_IRQ_PENDING, 0x00);
124 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
125 AD1816A_TIMER_IRQ_ENABLE, 0xffff);
126 }
127 chip->mode |= mode;
128
129 spin_unlock_irqrestore(&chip->lock, flags);
130 return 0;
131}
132
133static void snd_ad1816a_close(struct snd_ad1816a *chip, unsigned int mode)
134{
135 unsigned long flags;
136
137 spin_lock_irqsave(&chip->lock, flags);
138
139 switch ((mode &= AD1816A_MODE_OPEN)) {
140 case AD1816A_MODE_PLAYBACK:
141 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
142 AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
143 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
144 AD1816A_PLAYBACK_IRQ_ENABLE, 0x0000);
145 break;
146 case AD1816A_MODE_CAPTURE:
147 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
148 AD1816A_CAPTURE_IRQ_PENDING, 0x00);
149 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
150 AD1816A_CAPTURE_IRQ_ENABLE, 0x0000);
151 break;
152 case AD1816A_MODE_TIMER:
153 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
154 AD1816A_TIMER_IRQ_PENDING, 0x00);
155 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
156 AD1816A_TIMER_IRQ_ENABLE, 0x0000);
157 }
158 chip->mode &= ~mode;
159 if (!(chip->mode & AD1816A_MODE_OPEN))
160 chip->mode = 0;
161
162 spin_unlock_irqrestore(&chip->lock, flags);
163}
164
165
166static int snd_ad1816a_trigger(struct snd_ad1816a *chip, unsigned char what,
167 int channel, int cmd, int iscapture)
168{
169 int error = 0;
170
171 switch (cmd) {
172 case SNDRV_PCM_TRIGGER_START:
173 case SNDRV_PCM_TRIGGER_STOP:
174 spin_lock(&chip->lock);
175 cmd = (cmd == SNDRV_PCM_TRIGGER_START) ? 0xff: 0x00;
176
177
178
179
180 if (! iscapture)
181 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
182 AD1816A_PLAYBACK_ENABLE, cmd);
183 else
184 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
185 AD1816A_CAPTURE_ENABLE, cmd);
186 spin_unlock(&chip->lock);
187 break;
188 default:
189 snd_printk(KERN_WARNING "invalid trigger mode 0x%x.\n", what);
190 error = -EINVAL;
191 }
192
193 return error;
194}
195
196static int snd_ad1816a_playback_trigger(struct snd_pcm_substream *substream, int cmd)
197{
198 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
199 return snd_ad1816a_trigger(chip, AD1816A_PLAYBACK_ENABLE,
200 SNDRV_PCM_STREAM_PLAYBACK, cmd, 0);
201}
202
203static int snd_ad1816a_capture_trigger(struct snd_pcm_substream *substream, int cmd)
204{
205 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
206 return snd_ad1816a_trigger(chip, AD1816A_CAPTURE_ENABLE,
207 SNDRV_PCM_STREAM_CAPTURE, cmd, 1);
208}
209
210static int snd_ad1816a_playback_prepare(struct snd_pcm_substream *substream)
211{
212 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
213 unsigned long flags;
214 struct snd_pcm_runtime *runtime = substream->runtime;
215 unsigned int size, rate;
216
217 spin_lock_irqsave(&chip->lock, flags);
218
219 chip->p_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
220 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
221 AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
222
223 snd_dma_program(chip->dma1, runtime->dma_addr, size,
224 DMA_MODE_WRITE | DMA_AUTOINIT);
225
226 rate = runtime->rate;
227 if (chip->clock_freq)
228 rate = (rate * 33000) / chip->clock_freq;
229 snd_ad1816a_write(chip, AD1816A_PLAYBACK_SAMPLE_RATE, rate);
230 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
231 AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
232 snd_ad1816a_get_format(chip, runtime->format,
233 runtime->channels));
234
235 snd_ad1816a_write(chip, AD1816A_PLAYBACK_BASE_COUNT,
236 snd_pcm_lib_period_bytes(substream) / 4 - 1);
237
238 spin_unlock_irqrestore(&chip->lock, flags);
239 return 0;
240}
241
242static int snd_ad1816a_capture_prepare(struct snd_pcm_substream *substream)
243{
244 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
245 unsigned long flags;
246 struct snd_pcm_runtime *runtime = substream->runtime;
247 unsigned int size, rate;
248
249 spin_lock_irqsave(&chip->lock, flags);
250
251 chip->c_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
252 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
253 AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
254
255 snd_dma_program(chip->dma2, runtime->dma_addr, size,
256 DMA_MODE_READ | DMA_AUTOINIT);
257
258 rate = runtime->rate;
259 if (chip->clock_freq)
260 rate = (rate * 33000) / chip->clock_freq;
261 snd_ad1816a_write(chip, AD1816A_CAPTURE_SAMPLE_RATE, rate);
262 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
263 AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
264 snd_ad1816a_get_format(chip, runtime->format,
265 runtime->channels));
266
267 snd_ad1816a_write(chip, AD1816A_CAPTURE_BASE_COUNT,
268 snd_pcm_lib_period_bytes(substream) / 4 - 1);
269
270 spin_unlock_irqrestore(&chip->lock, flags);
271 return 0;
272}
273
274
275static snd_pcm_uframes_t snd_ad1816a_playback_pointer(struct snd_pcm_substream *substream)
276{
277 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
278 size_t ptr;
279 if (!(chip->mode & AD1816A_MODE_PLAYBACK))
280 return 0;
281 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
282 return bytes_to_frames(substream->runtime, ptr);
283}
284
285static snd_pcm_uframes_t snd_ad1816a_capture_pointer(struct snd_pcm_substream *substream)
286{
287 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
288 size_t ptr;
289 if (!(chip->mode & AD1816A_MODE_CAPTURE))
290 return 0;
291 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
292 return bytes_to_frames(substream->runtime, ptr);
293}
294
295
296static irqreturn_t snd_ad1816a_interrupt(int irq, void *dev_id)
297{
298 struct snd_ad1816a *chip = dev_id;
299 unsigned char status;
300
301 spin_lock(&chip->lock);
302 status = snd_ad1816a_in(chip, AD1816A_INTERRUPT_STATUS);
303 spin_unlock(&chip->lock);
304
305 if ((status & AD1816A_PLAYBACK_IRQ_PENDING) && chip->playback_substream)
306 snd_pcm_period_elapsed(chip->playback_substream);
307
308 if ((status & AD1816A_CAPTURE_IRQ_PENDING) && chip->capture_substream)
309 snd_pcm_period_elapsed(chip->capture_substream);
310
311 if ((status & AD1816A_TIMER_IRQ_PENDING) && chip->timer)
312 snd_timer_interrupt(chip->timer, chip->timer->sticks);
313
314 spin_lock(&chip->lock);
315 snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
316 spin_unlock(&chip->lock);
317 return IRQ_HANDLED;
318}
319
320
321static const struct snd_pcm_hardware snd_ad1816a_playback = {
322 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
323 SNDRV_PCM_INFO_MMAP_VALID),
324 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
325 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
326 SNDRV_PCM_FMTBIT_S16_BE),
327 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
328 .rate_min = 4000,
329 .rate_max = 55200,
330 .channels_min = 1,
331 .channels_max = 2,
332 .buffer_bytes_max = (128*1024),
333 .period_bytes_min = 64,
334 .period_bytes_max = (128*1024),
335 .periods_min = 1,
336 .periods_max = 1024,
337 .fifo_size = 0,
338};
339
340static const struct snd_pcm_hardware snd_ad1816a_capture = {
341 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
342 SNDRV_PCM_INFO_MMAP_VALID),
343 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
344 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
345 SNDRV_PCM_FMTBIT_S16_BE),
346 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
347 .rate_min = 4000,
348 .rate_max = 55200,
349 .channels_min = 1,
350 .channels_max = 2,
351 .buffer_bytes_max = (128*1024),
352 .period_bytes_min = 64,
353 .period_bytes_max = (128*1024),
354 .periods_min = 1,
355 .periods_max = 1024,
356 .fifo_size = 0,
357};
358
359static int snd_ad1816a_timer_close(struct snd_timer *timer)
360{
361 struct snd_ad1816a *chip = snd_timer_chip(timer);
362 snd_ad1816a_close(chip, AD1816A_MODE_TIMER);
363 return 0;
364}
365
366static int snd_ad1816a_timer_open(struct snd_timer *timer)
367{
368 struct snd_ad1816a *chip = snd_timer_chip(timer);
369 snd_ad1816a_open(chip, AD1816A_MODE_TIMER);
370 return 0;
371}
372
373static unsigned long snd_ad1816a_timer_resolution(struct snd_timer *timer)
374{
375 if (snd_BUG_ON(!timer))
376 return 0;
377
378 return 10000;
379}
380
381static int snd_ad1816a_timer_start(struct snd_timer *timer)
382{
383 unsigned short bits;
384 unsigned long flags;
385 struct snd_ad1816a *chip = snd_timer_chip(timer);
386 spin_lock_irqsave(&chip->lock, flags);
387 bits = snd_ad1816a_read(chip, AD1816A_INTERRUPT_ENABLE);
388
389 if (!(bits & AD1816A_TIMER_ENABLE)) {
390 snd_ad1816a_write(chip, AD1816A_TIMER_BASE_COUNT,
391 timer->sticks & 0xffff);
392
393 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
394 AD1816A_TIMER_ENABLE, 0xffff);
395 }
396 spin_unlock_irqrestore(&chip->lock, flags);
397 return 0;
398}
399
400static int snd_ad1816a_timer_stop(struct snd_timer *timer)
401{
402 unsigned long flags;
403 struct snd_ad1816a *chip = snd_timer_chip(timer);
404 spin_lock_irqsave(&chip->lock, flags);
405
406 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
407 AD1816A_TIMER_ENABLE, 0x0000);
408
409 spin_unlock_irqrestore(&chip->lock, flags);
410 return 0;
411}
412
413static const struct snd_timer_hardware snd_ad1816a_timer_table = {
414 .flags = SNDRV_TIMER_HW_AUTO,
415 .resolution = 10000,
416 .ticks = 65535,
417 .open = snd_ad1816a_timer_open,
418 .close = snd_ad1816a_timer_close,
419 .c_resolution = snd_ad1816a_timer_resolution,
420 .start = snd_ad1816a_timer_start,
421 .stop = snd_ad1816a_timer_stop,
422};
423
424static int snd_ad1816a_playback_open(struct snd_pcm_substream *substream)
425{
426 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
427 struct snd_pcm_runtime *runtime = substream->runtime;
428 int error;
429
430 error = snd_ad1816a_open(chip, AD1816A_MODE_PLAYBACK);
431 if (error < 0)
432 return error;
433 runtime->hw = snd_ad1816a_playback;
434 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
435 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
436 chip->playback_substream = substream;
437 return 0;
438}
439
440static int snd_ad1816a_capture_open(struct snd_pcm_substream *substream)
441{
442 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
443 struct snd_pcm_runtime *runtime = substream->runtime;
444 int error;
445
446 error = snd_ad1816a_open(chip, AD1816A_MODE_CAPTURE);
447 if (error < 0)
448 return error;
449 runtime->hw = snd_ad1816a_capture;
450 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
451 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
452 chip->capture_substream = substream;
453 return 0;
454}
455
456static int snd_ad1816a_playback_close(struct snd_pcm_substream *substream)
457{
458 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
459
460 chip->playback_substream = NULL;
461 snd_ad1816a_close(chip, AD1816A_MODE_PLAYBACK);
462 return 0;
463}
464
465static int snd_ad1816a_capture_close(struct snd_pcm_substream *substream)
466{
467 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
468
469 chip->capture_substream = NULL;
470 snd_ad1816a_close(chip, AD1816A_MODE_CAPTURE);
471 return 0;
472}
473
474
475static void snd_ad1816a_init(struct snd_ad1816a *chip)
476{
477 unsigned long flags;
478
479 spin_lock_irqsave(&chip->lock, flags);
480
481 snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
482 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
483 AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
484 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
485 AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
486 snd_ad1816a_write(chip, AD1816A_INTERRUPT_ENABLE, 0x0000);
487 snd_ad1816a_write_mask(chip, AD1816A_CHIP_CONFIG,
488 AD1816A_CAPTURE_NOT_EQUAL | AD1816A_WSS_ENABLE, 0xffff);
489 snd_ad1816a_write(chip, AD1816A_DSP_CONFIG, 0x0000);
490 snd_ad1816a_write(chip, AD1816A_POWERDOWN_CTRL, 0x0000);
491
492 spin_unlock_irqrestore(&chip->lock, flags);
493}
494
495#ifdef CONFIG_PM
496void snd_ad1816a_suspend(struct snd_ad1816a *chip)
497{
498 int reg;
499 unsigned long flags;
500
501 spin_lock_irqsave(&chip->lock, flags);
502 for (reg = 0; reg < 48; reg++)
503 chip->image[reg] = snd_ad1816a_read(chip, reg);
504 spin_unlock_irqrestore(&chip->lock, flags);
505}
506
507void snd_ad1816a_resume(struct snd_ad1816a *chip)
508{
509 int reg;
510 unsigned long flags;
511
512 snd_ad1816a_init(chip);
513 spin_lock_irqsave(&chip->lock, flags);
514 for (reg = 0; reg < 48; reg++)
515 snd_ad1816a_write(chip, reg, chip->image[reg]);
516 spin_unlock_irqrestore(&chip->lock, flags);
517}
518#endif
519
520static int snd_ad1816a_probe(struct snd_ad1816a *chip)
521{
522 unsigned long flags;
523
524 spin_lock_irqsave(&chip->lock, flags);
525
526 switch (chip->version = snd_ad1816a_read(chip, AD1816A_VERSION_ID)) {
527 case 0:
528 chip->hardware = AD1816A_HW_AD1815;
529 break;
530 case 1:
531 chip->hardware = AD1816A_HW_AD18MAX10;
532 break;
533 case 3:
534 chip->hardware = AD1816A_HW_AD1816A;
535 break;
536 default:
537 chip->hardware = AD1816A_HW_AUTO;
538 }
539
540 spin_unlock_irqrestore(&chip->lock, flags);
541 return 0;
542}
543
544static const char *snd_ad1816a_chip_id(struct snd_ad1816a *chip)
545{
546 switch (chip->hardware) {
547 case AD1816A_HW_AD1816A: return "AD1816A";
548 case AD1816A_HW_AD1815: return "AD1815";
549 case AD1816A_HW_AD18MAX10: return "AD18max10";
550 default:
551 snd_printk(KERN_WARNING "Unknown chip version %d:%d.\n",
552 chip->version, chip->hardware);
553 return "AD1816A - unknown";
554 }
555}
556
557int snd_ad1816a_create(struct snd_card *card,
558 unsigned long port, int irq, int dma1, int dma2,
559 struct snd_ad1816a *chip)
560{
561 int error;
562
563 chip->irq = -1;
564 chip->dma1 = -1;
565 chip->dma2 = -1;
566
567 chip->res_port = devm_request_region(card->dev, port, 16, "AD1816A");
568 if (!chip->res_port) {
569 snd_printk(KERN_ERR "ad1816a: can't grab port 0x%lx\n", port);
570 return -EBUSY;
571 }
572 if (devm_request_irq(card->dev, irq, snd_ad1816a_interrupt, 0,
573 "AD1816A", (void *) chip)) {
574 snd_printk(KERN_ERR "ad1816a: can't grab IRQ %d\n", irq);
575 return -EBUSY;
576 }
577 chip->irq = irq;
578 card->sync_irq = chip->irq;
579 if (snd_devm_request_dma(card->dev, dma1, "AD1816A - 1")) {
580 snd_printk(KERN_ERR "ad1816a: can't grab DMA1 %d\n", dma1);
581 return -EBUSY;
582 }
583 chip->dma1 = dma1;
584 if (snd_devm_request_dma(card->dev, dma2, "AD1816A - 2")) {
585 snd_printk(KERN_ERR "ad1816a: can't grab DMA2 %d\n", dma2);
586 return -EBUSY;
587 }
588 chip->dma2 = dma2;
589
590 chip->card = card;
591 chip->port = port;
592 spin_lock_init(&chip->lock);
593
594 error = snd_ad1816a_probe(chip);
595 if (error)
596 return error;
597
598 snd_ad1816a_init(chip);
599
600 return 0;
601}
602
603static const struct snd_pcm_ops snd_ad1816a_playback_ops = {
604 .open = snd_ad1816a_playback_open,
605 .close = snd_ad1816a_playback_close,
606 .prepare = snd_ad1816a_playback_prepare,
607 .trigger = snd_ad1816a_playback_trigger,
608 .pointer = snd_ad1816a_playback_pointer,
609};
610
611static const struct snd_pcm_ops snd_ad1816a_capture_ops = {
612 .open = snd_ad1816a_capture_open,
613 .close = snd_ad1816a_capture_close,
614 .prepare = snd_ad1816a_capture_prepare,
615 .trigger = snd_ad1816a_capture_trigger,
616 .pointer = snd_ad1816a_capture_pointer,
617};
618
619int snd_ad1816a_pcm(struct snd_ad1816a *chip, int device)
620{
621 int error;
622 struct snd_pcm *pcm;
623
624 error = snd_pcm_new(chip->card, "AD1816A", device, 1, 1, &pcm);
625 if (error)
626 return error;
627
628 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1816a_playback_ops);
629 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1816a_capture_ops);
630
631 pcm->private_data = chip;
632 pcm->info_flags = (chip->dma1 == chip->dma2 ) ? SNDRV_PCM_INFO_JOINT_DUPLEX : 0;
633
634 strcpy(pcm->name, snd_ad1816a_chip_id(chip));
635 snd_ad1816a_init(chip);
636
637 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, chip->card->dev,
638 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
639
640 chip->pcm = pcm;
641 return 0;
642}
643
644int snd_ad1816a_timer(struct snd_ad1816a *chip, int device)
645{
646 struct snd_timer *timer;
647 struct snd_timer_id tid;
648 int error;
649
650 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
651 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
652 tid.card = chip->card->number;
653 tid.device = device;
654 tid.subdevice = 0;
655 error = snd_timer_new(chip->card, "AD1816A", &tid, &timer);
656 if (error < 0)
657 return error;
658 strcpy(timer->name, snd_ad1816a_chip_id(chip));
659 timer->private_data = chip;
660 chip->timer = timer;
661 timer->hw = snd_ad1816a_timer_table;
662 return 0;
663}
664
665
666
667
668
669static int snd_ad1816a_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
670{
671 static const char * const texts[8] = {
672 "Line", "Mix", "CD", "Synth", "Video",
673 "Mic", "Phone",
674 };
675
676 return snd_ctl_enum_info(uinfo, 2, 7, texts);
677}
678
679static int snd_ad1816a_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
680{
681 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
682 unsigned long flags;
683 unsigned short val;
684
685 spin_lock_irqsave(&chip->lock, flags);
686 val = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL);
687 spin_unlock_irqrestore(&chip->lock, flags);
688 ucontrol->value.enumerated.item[0] = (val >> 12) & 7;
689 ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
690 return 0;
691}
692
693static int snd_ad1816a_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
694{
695 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
696 unsigned long flags;
697 unsigned short val;
698 int change;
699
700 if (ucontrol->value.enumerated.item[0] > 6 ||
701 ucontrol->value.enumerated.item[1] > 6)
702 return -EINVAL;
703 val = (ucontrol->value.enumerated.item[0] << 12) |
704 (ucontrol->value.enumerated.item[1] << 4);
705 spin_lock_irqsave(&chip->lock, flags);
706 change = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL) != val;
707 snd_ad1816a_write(chip, AD1816A_ADC_SOURCE_SEL, val);
708 spin_unlock_irqrestore(&chip->lock, flags);
709 return change;
710}
711
712#define AD1816A_SINGLE_TLV(xname, reg, shift, mask, invert, xtlv) \
713{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
714 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
715 .name = xname, .info = snd_ad1816a_info_single, \
716 .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
717 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
718 .tlv = { .p = (xtlv) } }
719#define AD1816A_SINGLE(xname, reg, shift, mask, invert) \
720{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_single, \
721 .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
722 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
723
724static int snd_ad1816a_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
725{
726 int mask = (kcontrol->private_value >> 16) & 0xff;
727
728 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
729 uinfo->count = 1;
730 uinfo->value.integer.min = 0;
731 uinfo->value.integer.max = mask;
732 return 0;
733}
734
735static int snd_ad1816a_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
736{
737 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
738 unsigned long flags;
739 int reg = kcontrol->private_value & 0xff;
740 int shift = (kcontrol->private_value >> 8) & 0xff;
741 int mask = (kcontrol->private_value >> 16) & 0xff;
742 int invert = (kcontrol->private_value >> 24) & 0xff;
743
744 spin_lock_irqsave(&chip->lock, flags);
745 ucontrol->value.integer.value[0] = (snd_ad1816a_read(chip, reg) >> shift) & mask;
746 spin_unlock_irqrestore(&chip->lock, flags);
747 if (invert)
748 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
749 return 0;
750}
751
752static int snd_ad1816a_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
753{
754 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
755 unsigned long flags;
756 int reg = kcontrol->private_value & 0xff;
757 int shift = (kcontrol->private_value >> 8) & 0xff;
758 int mask = (kcontrol->private_value >> 16) & 0xff;
759 int invert = (kcontrol->private_value >> 24) & 0xff;
760 int change;
761 unsigned short old_val, val;
762
763 val = (ucontrol->value.integer.value[0] & mask);
764 if (invert)
765 val = mask - val;
766 val <<= shift;
767 spin_lock_irqsave(&chip->lock, flags);
768 old_val = snd_ad1816a_read(chip, reg);
769 val = (old_val & ~(mask << shift)) | val;
770 change = val != old_val;
771 snd_ad1816a_write(chip, reg, val);
772 spin_unlock_irqrestore(&chip->lock, flags);
773 return change;
774}
775
776#define AD1816A_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
777{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
778 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
779 .name = xname, .info = snd_ad1816a_info_double, \
780 .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
781 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
782 .tlv = { .p = (xtlv) } }
783
784#define AD1816A_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
785{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_double, \
786 .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
787 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
788
789static int snd_ad1816a_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
790{
791 int mask = (kcontrol->private_value >> 16) & 0xff;
792
793 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
794 uinfo->count = 2;
795 uinfo->value.integer.min = 0;
796 uinfo->value.integer.max = mask;
797 return 0;
798}
799
800static int snd_ad1816a_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
801{
802 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
803 unsigned long flags;
804 int reg = kcontrol->private_value & 0xff;
805 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
806 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
807 int mask = (kcontrol->private_value >> 16) & 0xff;
808 int invert = (kcontrol->private_value >> 24) & 0xff;
809 unsigned short val;
810
811 spin_lock_irqsave(&chip->lock, flags);
812 val = snd_ad1816a_read(chip, reg);
813 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
814 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
815 spin_unlock_irqrestore(&chip->lock, flags);
816 if (invert) {
817 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
818 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
819 }
820 return 0;
821}
822
823static int snd_ad1816a_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
824{
825 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
826 unsigned long flags;
827 int reg = kcontrol->private_value & 0xff;
828 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
829 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
830 int mask = (kcontrol->private_value >> 16) & 0xff;
831 int invert = (kcontrol->private_value >> 24) & 0xff;
832 int change;
833 unsigned short old_val, val1, val2;
834
835 val1 = ucontrol->value.integer.value[0] & mask;
836 val2 = ucontrol->value.integer.value[1] & mask;
837 if (invert) {
838 val1 = mask - val1;
839 val2 = mask - val2;
840 }
841 val1 <<= shift_left;
842 val2 <<= shift_right;
843 spin_lock_irqsave(&chip->lock, flags);
844 old_val = snd_ad1816a_read(chip, reg);
845 val1 = (old_val & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
846 change = val1 != old_val;
847 snd_ad1816a_write(chip, reg, val1);
848 spin_unlock_irqrestore(&chip->lock, flags);
849 return change;
850}
851
852static const DECLARE_TLV_DB_SCALE(db_scale_4bit, -4500, 300, 0);
853static const DECLARE_TLV_DB_SCALE(db_scale_5bit, -4650, 150, 0);
854static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
855static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
856static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
857
858static const struct snd_kcontrol_new snd_ad1816a_controls[] = {
859AD1816A_DOUBLE("Master Playback Switch", AD1816A_MASTER_ATT, 15, 7, 1, 1),
860AD1816A_DOUBLE_TLV("Master Playback Volume", AD1816A_MASTER_ATT, 8, 0, 31, 1,
861 db_scale_5bit),
862AD1816A_DOUBLE("PCM Playback Switch", AD1816A_VOICE_ATT, 15, 7, 1, 1),
863AD1816A_DOUBLE_TLV("PCM Playback Volume", AD1816A_VOICE_ATT, 8, 0, 63, 1,
864 db_scale_6bit),
865AD1816A_DOUBLE("Line Playback Switch", AD1816A_LINE_GAIN_ATT, 15, 7, 1, 1),
866AD1816A_DOUBLE_TLV("Line Playback Volume", AD1816A_LINE_GAIN_ATT, 8, 0, 31, 1,
867 db_scale_5bit_12db_max),
868AD1816A_DOUBLE("CD Playback Switch", AD1816A_CD_GAIN_ATT, 15, 7, 1, 1),
869AD1816A_DOUBLE_TLV("CD Playback Volume", AD1816A_CD_GAIN_ATT, 8, 0, 31, 1,
870 db_scale_5bit_12db_max),
871AD1816A_DOUBLE("Synth Playback Switch", AD1816A_SYNTH_GAIN_ATT, 15, 7, 1, 1),
872AD1816A_DOUBLE_TLV("Synth Playback Volume", AD1816A_SYNTH_GAIN_ATT, 8, 0, 31, 1,
873 db_scale_5bit_12db_max),
874AD1816A_DOUBLE("FM Playback Switch", AD1816A_FM_ATT, 15, 7, 1, 1),
875AD1816A_DOUBLE_TLV("FM Playback Volume", AD1816A_FM_ATT, 8, 0, 63, 1,
876 db_scale_6bit),
877AD1816A_SINGLE("Mic Playback Switch", AD1816A_MIC_GAIN_ATT, 15, 1, 1),
878AD1816A_SINGLE_TLV("Mic Playback Volume", AD1816A_MIC_GAIN_ATT, 8, 31, 1,
879 db_scale_5bit_12db_max),
880AD1816A_SINGLE("Mic Boost", AD1816A_MIC_GAIN_ATT, 14, 1, 0),
881AD1816A_DOUBLE("Video Playback Switch", AD1816A_VID_GAIN_ATT, 15, 7, 1, 1),
882AD1816A_DOUBLE_TLV("Video Playback Volume", AD1816A_VID_GAIN_ATT, 8, 0, 31, 1,
883 db_scale_5bit_12db_max),
884AD1816A_SINGLE("Phone Capture Switch", AD1816A_PHONE_IN_GAIN_ATT, 15, 1, 1),
885AD1816A_SINGLE_TLV("Phone Capture Volume", AD1816A_PHONE_IN_GAIN_ATT, 0, 15, 1,
886 db_scale_4bit),
887AD1816A_SINGLE("Phone Playback Switch", AD1816A_PHONE_OUT_ATT, 7, 1, 1),
888AD1816A_SINGLE_TLV("Phone Playback Volume", AD1816A_PHONE_OUT_ATT, 0, 31, 1,
889 db_scale_5bit),
890{
891 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
892 .name = "Capture Source",
893 .info = snd_ad1816a_info_mux,
894 .get = snd_ad1816a_get_mux,
895 .put = snd_ad1816a_put_mux,
896},
897AD1816A_DOUBLE("Capture Switch", AD1816A_ADC_PGA, 15, 7, 1, 1),
898AD1816A_DOUBLE_TLV("Capture Volume", AD1816A_ADC_PGA, 8, 0, 15, 0,
899 db_scale_rec_gain),
900AD1816A_SINGLE("3D Control - Switch", AD1816A_3D_PHAT_CTRL, 15, 1, 1),
901AD1816A_SINGLE("3D Control - Level", AD1816A_3D_PHAT_CTRL, 0, 15, 0),
902};
903
904int snd_ad1816a_mixer(struct snd_ad1816a *chip)
905{
906 struct snd_card *card;
907 unsigned int idx;
908 int err;
909
910 if (snd_BUG_ON(!chip || !chip->card))
911 return -EINVAL;
912
913 card = chip->card;
914
915 strcpy(card->mixername, snd_ad1816a_chip_id(chip));
916
917 for (idx = 0; idx < ARRAY_SIZE(snd_ad1816a_controls); idx++) {
918 err = snd_ctl_add(card, snd_ctl_new1(&snd_ad1816a_controls[idx], chip));
919 if (err < 0)
920 return err;
921 }
922 return 0;
923}
924
