LXR linux/sound/pci/echoaudio/darla20

   1/***************************************************************************
   2
   3   Copyright Echo Digital Audio Corporation (c) 1998 - 2004
   4   All rights reserved
   5   www.echoaudio.com
   6
   7   This file is part of Echo Digital Audio's generic driver library.
   8
   9   Echo Digital Audio's generic driver library is free software;
  10   you can redistribute it and/or modify it under the terms of
  11   the GNU General Public License as published by the Free Software
  12   Foundation.
  13
  14   This program is distributed in the hope that it will be useful,
  15   but WITHOUT ANY WARRANTY; without even the implied warranty of
  16   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17   GNU General Public License for more details.
  18
  19   You should have received a copy of the GNU General Public License
  20   along with this program; if not, write to the Free Software
  21   Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  22   MA  02111-1307, USA.
  23
  24   *************************************************************************
  25
  26 Translation from C++ and adaptation for use in ALSA-Driver
  27 were made by Giuliano Pochini <pochini@shiny.it>
  28
  29****************************************************************************/
  30
  31
  32static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
  33{
  34        int err;
  35
  36        if (snd_BUG_ON((subdevice_id & 0xfff0) != DARLA20))
  37                return -ENODEV;
  38
  39        err = init_dsp_comm_page(chip);
  40        if (err) {
  41                dev_err(chip->card->dev,
  42                        "init_hw: could not initialize DSP comm page\n");
  43                return err;
  44        }
  45
  46        chip->device_id = device_id;
  47        chip->subdevice_id = subdevice_id;
  48        chip->bad_board = true;
  49        chip->dsp_code_to_load = FW_DARLA20_DSP;
  50        chip->spdif_status = GD_SPDIF_STATUS_UNDEF;
  51        chip->clock_state = GD_CLOCK_UNDEF;
  52        /* Since this card has no ASIC, mark it as loaded so everything
  53           works OK */
  54        chip->asic_loaded = true;
  55        chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL;
  56
  57        err = load_firmware(chip);
  58        if (err < 0)
  59                return err;
  60        chip->bad_board = false;
  61
  62        return err;
  63}
  64
  65
  66
  67static int set_mixer_defaults(struct echoaudio *chip)
  68{
  69        return init_line_levels(chip);
  70}
  71
  72
  73
  74/* The Darla20 has no external clock sources */
  75static u32 detect_input_clocks(const struct echoaudio *chip)
  76{
  77        return ECHO_CLOCK_BIT_INTERNAL;
  78}
  79
  80
  81
  82/* The Darla20 has no ASIC. Just do nothing */
  83static int load_asic(struct echoaudio *chip)
  84{
  85        return 0;
  86}
  87
  88
  89
  90static int set_sample_rate(struct echoaudio *chip, u32 rate)
  91{
  92        u8 clock_state, spdif_status;
  93
  94        if (wait_handshake(chip))
  95                return -EIO;
  96
  97        switch (rate) {
  98        case 44100:
  99                clock_state = GD_CLOCK_44;
 100                spdif_status = GD_SPDIF_STATUS_44;
 101                break;
 102        case 48000:
 103                clock_state = GD_CLOCK_48;
 104                spdif_status = GD_SPDIF_STATUS_48;
 105                break;
 106        default:
 107                clock_state = GD_CLOCK_NOCHANGE;
 108                spdif_status = GD_SPDIF_STATUS_NOCHANGE;
 109                break;
 110        }
 111
 112        if (chip->clock_state == clock_state)
 113                clock_state = GD_CLOCK_NOCHANGE;
 114        if (spdif_status == chip->spdif_status)
 115                spdif_status = GD_SPDIF_STATUS_NOCHANGE;
 116
 117        chip->comm_page->sample_rate = cpu_to_le32(rate);
 118        chip->comm_page->gd_clock_state = clock_state;
 119        chip->comm_page->gd_spdif_status = spdif_status;
 120        chip->comm_page->gd_resampler_state = 3;        /* magic number - should always be 3 */
 121
 122        /* Save the new audio state if it changed */
 123        if (clock_state != GD_CLOCK_NOCHANGE)
 124                chip->clock_state = clock_state;
 125        if (spdif_status != GD_SPDIF_STATUS_NOCHANGE)
 126                chip->spdif_status = spdif_status;
 127        chip->sample_rate = rate;
 128
 129        clear_handshake(chip);
 130        return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
 131}
 132