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9#ifndef __RT5514_SPI_H__
10#define __RT5514_SPI_H__
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14
15#define RT5514_SPI_BUF_LEN 240
16
17#define RT5514_BUFFER_VOICE_BASE 0x18000200
18#define RT5514_BUFFER_VOICE_LIMIT 0x18000204
19#define RT5514_BUFFER_VOICE_WP 0x1800020c
20#define RT5514_IRQ_CTRL 0x18002094
21
22#define RT5514_IRQ_STATUS_BIT (0x1 << 5)
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24
25enum {
26 RT5514_SPI_CMD_16_READ = 0,
27 RT5514_SPI_CMD_16_WRITE,
28 RT5514_SPI_CMD_32_READ,
29 RT5514_SPI_CMD_32_WRITE,
30 RT5514_SPI_CMD_BURST_READ,
31 RT5514_SPI_CMD_BURST_WRITE,
32};
33
34int rt5514_spi_burst_read(unsigned int addr, u8 *rxbuf, size_t len);
35int rt5514_spi_burst_write(u32 addr, const u8 *txbuf, size_t len);
36
37#endif
38